Introduction to Digital Logic

Computer Organization at the

lowest level

UMBC / CMSC 313 / David Bourner <bourner@umbc.edu>

 Objectives
• After this lecture, you should be able to…….

– State the 3 possible arrangements of digital logic

– Formulate simple electronic logic gate function
– Define what is meant by a truth table
– Write truth tables for 2-input AND, OR, NOT forms
– Interpret Boolean expressions in software form
– Synthesize composite combinational functions
– Develop truth tables from gate level diagrams
– Recognize the importance of power dissipation
and propagation delay in logic circuits

UMBC / CMSC 313 / David Bourner <bourner@umbc.edu>

 A-3 Appendix A - Digital Logic

The Combinational Logic Unit

• Translates a set of inputs into a set of outputs according to one or
more mapping functions.
• Inputs and outputs for a CLU normally have two distinct (binary)
values: high and low, 1 and 0, 0 and 1, or 5 v. and 0 v. for example.
• The outputs of a CLU are strictly functions of the inputs, and the
outputs are updated immediately after the inputs change. A set of
inputs i0 – in are presented to the CLU, which produces a set of
outputs according to mapping functions f0 – fm

Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring
 Sequential Logic
• Outputs now depend not only on the current state of the inputs
but also the PAST HISTORY of the inputs. This kind of logic
incorporates MEMORY or REGISTER functions in order to work
differently from combinational logic.
f0(i0,i1,nT)
i0

i1 f1(i1,i3,nT)
Combinational Logic Unit
+
Registers
in fm(i9,in,nT)

Clock signal period T seconds

UMBC / CMSC 313 / David Bourner <bourner@umbc.edu>
 A-5 Appendix A - Digital Logic

Another Definition…..
• Combinational logic: a system in which logical decisions are
made based only on COMBINATIONS of the CURRENT INPUTS
e.g. an adder.
• Sequential logic: a system in which decisions are made based
on COMBINATIONS of the CURRENT INPUTS as well as the
PAST HISTORY of inputs. e.g. a memory unit.
• Finite state machine: in this model, logic maintains an internal
state; Its outputs are functions of both CURRENT INPUTS and
its INTERNAL STATE e.g. of a physical implementation of a
FSM is a vending machine controller.

Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring
 Making Logic Gate Circuits
• We will review material located at the following URL:
http://www.spsu.edu/cs/faculty/bbrown/web_lectures/index.html

• Bob Brown (SCSE Southern Polytechnic State

University) has prepared some good interactive
notes

• We will review the first two sections of the “Gates

Circuits and Digital Logic” Chapter:
– Electric Circuits
– Transistors and Digital Logic Gates

• You are encouraged to re-read these later and to

refer to the relevant sections of the course textbooks

UMBC / CMSC 313 / David Bourner <bourner@umbc.edu>

Boolean Operators in Programs
• We will now learn to analyze some written
Boolean operator statements from the
programmer’s viewpoint
– OR function
– AND function
– Boolean expressions

UMBC / CMSC 313 / David Bourner <bourner@umbc.edu>

 Boolean OR Operator
• Evaluate this logical expression
• If ((x > 0) || (x < 5)) y = 10;
• x is assigned the value of 7
• If (TRUE || FALSE) y =10;
• If TRUE y = 10;
• y=10;

UMBC / CMSC 313 / David Bourner <bourner@umbc.edu>

 Boolean AND Operator
• Let’s look at how this conditional
statement works
• If ((x > 0) && (x < 5)) z = 20;
• Again we assign a value of 7 to variable x
• If (TRUE && FALSE) z =20;
• If FALSE z = 20;
• This is a null statement
• No value is assigned to z. Nothing happens.

UMBC / CMSC 313 / David Bourner <bourner@umbc.edu>

 Boolean Expressions – An
Example
• Work on the Boolean expression in Neveln
on p 32

UMBC / CMSC 313 / David Bourner <bourner@umbc.edu>

 Closed and Open Datapaths
• Let’s look at two chains of logic and see how they
process inputs (data)
INPUT
INPUT U1 SN7432
U1 SN7408 H U2 SN7432
H U2 SN7408 U3 SN7432
U3 SN7408 L OUTP
L OUTPU
FILTER #1
FILTER #2
FILTER #3

FILTER #3

FILTER #2

FILTER #1
How is each activated to pass changing inputs
faithfully to the output?
UMBC / CMSC 313 / David Bourner <bourner@umbc.edu>
 Boolean Networks
• OUTPUT = ((p AND q) OR r)
– An example of a composite function which can be
synthesized with simple logic forms { AND, OR }

p U1 SN7408

q U2 SN7432
OUTPUT

UMBC / CMSC 313 / David Bourner <bourner@umbc.edu>

 Synthesizing XOR function
• We will use 2-input NOT, AND and OR
gates to synthesize this function
• We look for ways of asserting a TRUE
condition (logical ‘1’) output in the truth
table
• We then logically combine these
conditions

UMBC / CMSC 313 / David Bourner <bourner@umbc.edu>

 XOR Synthesis continued
p q (p XOR q)
0 0 0
0 1 1
1 0 1
1 1 0

x= (NOT p) AND q
OUTPUT = x OR y
y = p AND (NOT q)

UMBC / CMSC 313 / David Bourner <bourner@umbc.edu>

 Completed XOR Synthesis

U1 SN7404 y = p AND (NOT q)

U2 SN7408

U3 SN7404
U5 SN7432
p U4 SN7408 OUTPUT

OUTPUT = x OR y
x= (NOT p) AND q

UMBC / CMSC 313 / David Bourner <bourner@umbc.edu>

 Propagation Delay
• This determines how quickly logic can
change state

• Sets the CLOCK SPEED because

combination logic and sequential logic
must work correctly TOGETHER in
complex logic blocks

UMBC / CMSC 313 / David Bourner <bourner@umbc.edu>

 Comparing Clock Frequency
and Cycle Time
Frequency Cycle Length

1 Hz 1 cps 1s 1 sec

1 kHz 103 cps 1 ms 1/1,000 sec

1 MHz 106 cps 1 us 1/1000,000 sec

1 GHz 109 cps 1 ns 1/1000,000,000 sec

UMBC / CMSC 313 / David Bourner <bourner@umbc.edu>

illustrating Propagation Delay
U1 SN7400 U2 SN7400 U3 SN7400 U4 SN7400
DOUT

+
DIN SW1
H
L

T 5 .0 0

D IN

0 .0 0
4 .0 0

DO UT

SIGNALING DELAY
0 .0 0
0 .0 0 5 0 .0 0 n 1 0 0 .0 0 n 1 5 0 .0 0 n 2 0 0 .0 0 n
T im e (s )

UMBC / CMSC 313 / David Bourner <bourner@umbc.edu>

 Power Dissipation
• When IC gates are switching, they transfer charge
from
• Either the DC power supply to the “load” i.e.
gates attached to their output terminal….
• ….or from the load to the ground return

• Any motion of charge in a circuit is a current

(measured in units of Amperes)

• Any current I in a circuit under a potential difference

V (volts) is power dissipated - P = I x V Watts. This
produces heat.

• Heat must be moved off the chip to keep the IC’s

temperature within safe operating limits.

UMBC / CMSC 313 / David Bourner <bourner@umbc.edu>

 Let’s Check off Objectives
1. Reviewed 3 digital logic classifications
2. Modeled simple gate functions
3. Defined the term truth table
4. Wrote truth tables for NOT, OR, AND
5. Mapped logic gate circuit to EXOR
6. Reviewed cascaded OR, AND logic
7. Identified the TWO P’s - critical issues
that impact computers at the gate level
1. Propagation Delay
2. Power Dissipation

UMBC / CMSC313 / David Bourner <bourner@umbc.edu>