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Stellaris® EK-LM3S9B92 Evaluation Kit

User ’s Manual

EK-LM3S9B92 -0 4 Co pyrigh t © 2 009– 201 0 Te xas In strumen ts


Copyright
Copyright © 2009–2010 Texas Instruments, Inc. All rights reserved. Stellaris and StellarisWare are registered trademarks of Texas Instruments.
ARM and Thumb are registered trademarks, and Cortex is a trademark of ARM Limited. Other names and brands may be claimed as the property
of others.

Texas Instruments
108 Wild Basin, Suite 350
Austin, TX 78746
http://www.ti.com/stellaris

2 January 6, 2010
Table of Contents
Chapter 1: Stellaris® LM3S9B92 Evaluation Kit Overview ........................................................................... 9
Kit Contents ...................................................................................................................................................... 10
Using the EK-LM3S9B92.................................................................................................................................. 10
Features............................................................................................................................................................ 10
Chapter 2: Hardware Description .................................................................................................................. 13
Evaluation Board .............................................................................................................................................. 13
Functional Description .................................................................................................................................. 13
In-Circuit Debug Interface Board ...................................................................................................................... 16
Functional Description .................................................................................................................................. 16
Chapter 3: Software Development ................................................................................................................ 19
Software Description......................................................................................................................................... 19
Source Code..................................................................................................................................................... 19
Tool Options ..................................................................................................................................................... 19
Programming the EK-LM3S9B92 Board........................................................................................................... 19
Appendix A: Schematics................................................................................................................................ 21
Appendix B: Connection Details ................................................................................................................... 27
Component Locations....................................................................................................................................... 27
Board Dimensions ............................................................................................................................................ 28
Board Connectivity............................................................................................................................................ 29
References ....................................................................................................................................................... 29
Appendix C: Microcontroller GPIO Assignments ........................................................................................ 31

January 6, 2010 3
4 January 6, 2010
List of Figures
Figure 1-1. LM3S9B92 Evaluation Board .......................................................................................................... 9
Figure 1-2. In-Circuit Debug Interface Board..................................................................................................... 9
Figure 2-1. EK-LM3S9B92 Evaluation Board Block Diagram.......................................................................... 13
Figure 2-2. GPIO Pads .................................................................................................................................... 14
Figure 2-3. JTAG/SWD Connector .................................................................................................................. 14
Figure 2-4. PWR/UART Connector.................................................................................................................. 15
Figure 2-5. In Circuit Debug (ICDI) Board Block Diagram ............................................................................... 16
Figure 2-6. JTAG/SWD Connector J1 ............................................................................................................. 17
Figure 2-7. JTAG/SWD Connector J3 ............................................................................................................. 17
Figure 2-8. PWR/UART Connector.................................................................................................................. 17
Figure B-1. EK-LM3S9B92 Evaluation Board Component Locations .............................................................. 27
Figure B-2. BD-ICDI Board Component Locations .......................................................................................... 27
Figure B-3. EK-LM3S9B92 Evaluation Board Dimensions .............................................................................. 28
Figure B-4. In-Circuit Debug Interface Board Dimensions ............................................................................... 28
Figure B-5. ICDI – EK-LM3S9B92 Board Connectivity .................................................................................... 29

January 6, 2010 5
6 January 6, 2010
List of Tables
Table C-1. EK-LM3S9B92 Evaluation Board GPIO Usage............................................................................. 31

January 6, 2010 7
8 January 6, 2010
C H A P T E R 1
Stellaris® LM3S9B92 Evaluation Kit Overview
Luminary Micro's Stellaris® LM3S9B92 Evaluation Board Kit (EK-LM3S9B92) is a low-cost
platform for evaluation of the LM3S9B92 microcontroller. The kit includes two boards, the
EK-LM3S9B92 evaluation board, and the In-Circuit Debug Interface (BD-ICDI) board.
The EK-LM3S9B92 board includes the LM3S9B92 ARM® Cortex™-M3 Microcontroller, a 10/100
Mbit Ethernet port, a full-speed USB-OTG port, connectors for inteface to the BD-ICDI board, and
oversized pads for easy connection to the microcontroller GPIO ports.
The BD-ICDI board is a USB full-speed JTAG/SWD debugger board. It includes a USB miniB
connector for connection to a USB PC port, and two shrouded header connectors for connection to
the EK-LM3S9B92 board.
Development of software for the EK-LM3S9B92 is simplified by using Luminary Micro's
comprehensive StellarisWare® peripheral driver library and ARM development tools from our tools
partners. The Stellaris® LM3S9B92 Evaluation Board Kit includes the two boards described, a
documentation CD, and cables. All design files are provided on the EK-LM3S9B92 CD.

Figure 1-1. LM3S9B92 Evaluation Board

Figure 1-2. In-Circuit Debug Interface Board

January 6, 2010 9
Stellaris® LM3S9B92 Evaluation Kit Overview

Kit Contents
The EK-LM3S9B92 evaluation kit comes with the following:
„ EK-LM3S9B92 evaluation board
„ In-Circuit Debug Interface (BD-ICDI) board
– Connects to USB port on PC and to 10-pin, fine-pitch ARM JTAG connector on the
EK-LM3S9B92 evaluation board
– Secondary 8-pin Power/UART connector provides power and virtual comm-port capability
to the EK-LM3S9B92 evaluation board.
„ Cables
– USB miniB to USB-A cable
– USB-OTG to USB-A cable
– 10-pin ribbon cable for JTAG/SWD connection
– 8-pin ribbon cable for Power/UART connection
„ CD containing:
– A supported version of one of the following (including a toolchain-specific Quickstart
guide):
• Keil™ RealView® Microcontroller Development Kit (MDK-ARM)
• IAR Embedded Workbench
• Code Sourcery GCC development tools
• Code Red Technologies development tools
• Texas Instruments’ Code Composer Studio™ IDE
– Complete documentation
– Quickstart application source code
– Stellaris® Firmware Development Package with example source code

Using the EK-LM3S9B92


The recommended steps for using the EK-LM3S9B92 evaluation kit are:
1. Follow the Quickstart guide included in the kit. The Quickstart guide will help get the
EK-LM3S9B92 LC Evaluation Board up and running in minutes.
2. Use your preferred ARM tool-chain and the Luminary Micro Peripheral Driver Library to
develop an application. Software applications are loaded using the BD-ICDI board. See
Chapter 3, “Software Development,” for the programming procedure. The StellarisWare
Peripheral Driver Library Software Reference Manual contains specific information on
software structure and function.
3. Customize and integrate the hardware to suit an end application. This user's manual is an
important reference for understanding circuit operation and completing hardware modification.

Features
The EK-LM3S9B92 evaluation kit provides the following features:

10 January 6, 2010
Stellaris® LM3S9B92 Evaluation Kit User’s Manual

„ LM3S9B92 high-performance Stellaris microcontroller and large memory


– 32-bit ARM® Cortex™-M3 core
– 256 KB single-cycle Flash memory, 96 KB single-cycle SRAM, 23.7 KB single-cycle ROM
„ Ethernet 10/100 port with two LED indicators
„ USB 2.0 Full-Speed OTG port
„ Virtual serial communications port capability
„ Oversized board pads for GPIO access
„ User pushbutton and LED
„ Detachable ICDI board can be used for debugging other Luminary Micro boards
„ Easy to customize
– Includes full source code, example applications, and design files
– Develop using tools supporting FastMATH from Keil, IAR, Code Sourcery, and Code Red
(using a Stellaris evaluation kit or preferred ARM Cortex-M3 debugger)
– Supported by Luminary Micro StellarisWare peripheral driver library

January 6, 2010 11
Stellaris® LM3S9B92 Evaluation Kit Overview

12 January 6, 2010
C H A P T E R 2
Hardware Description
The EK-LM3S9B92 evaluation kit contains two boards: the EK-LM3S9B92 evaluation board and
the BD-ICDI JTAG debug board as described in more detail in this chapter.

Evaluation Board
The EK-LM3S9B92 evaluation board uses the Stellaris® LM3S9B92 microcontroller and includes
a 10/100 Ethernet port and a USB 2.0 full-speed OTG port. The board is intended for use with the
ICDI board, but can be used as a standalone board as well. Figure 2-1 shows the block diagram.

Figure 2-1. EK-LM3S9B92 Evaluation Board Block Diagram

BOARD PADs Ethernet 10/100

GPIOs Ethernet

25MHz
RESET
USER LED

Stellaris USER PUSHBUTTON


JTAG/SWD LM3S9B92
JTAG USB – OTG

USB USB Power


PWR/UART
Switch
UART0

MOSC
16MHz
5V

VBUS

DPDT

3.3V
Regulator

Functional Description
Microcontroller, Reset, GPIO Pads, and JTAG (Schematic page 1)
Microcontroller
The evaluation board uses the Stellaris EK-LM3S9B92 microcontroller. A 16 MHz crystal provides
the main oscillator clock which can directly drive the ARM core clock or can drive an internal PLL
to increase the core clock up to 80 MHz. A 25 MHz crystal is used for the Ethernet clock.
The LM3S9B92 microcontroller has an internal LDO voltage regulator that supplies power for
internal use. This rail requires only three capacitors for decoupling and is not connected to any
other circuits.

January 6, 2010 13
Hardware Description

Reset
A reset switch and R-C network connects to the microcontroller’s RSTn input. The reset signal is
also connected to the JTAG/SWD connector J1 to allow reset control from the debugger.

GPIO Pads
Four groups of oversized board pads with a 0.1” spacing provide access to GPIO signals and
standard 0.1” pitch headers can be soldered to these pads. Pads are labeled with the
corresponding GPIO signal, and pads with no labels are unconnected. Note that GPIO signals
required for operation of the Ethernet port, USB port, and JTAG port are reserved for board use
and are not available on these pads. Figure 2-2 shows the pad groups.

Figure 2-2. GPIO Pads


GPIO Pads – Top left GPIO Pads – Top right

US
0

2
3

5
6

2
5

7
1
PD

PD

PD
PD

PD

PD
PD

PD

PG

PG
VB
PH

PH
PH
PH

PH
PH
4

7
DN

2
3

5
6

0
PC

PC

PC
PC

PG
PJ

PJ
PJ

PJ

PJ
PJ

PJ

PJ
SH

GPIO Pads – Bottom left GPIO Pads – Bottom right


ND
2
3

5
6

7
R

D
3V
0

3
4

5
PB

PB

PB
PB

PB

PB
5V

GN
5V

PF

PF

PF

PF

PF
PF
G

3.
D
0
1

3
4

6
7

2
3

6
7
PA

PA

PA
PA

PA

PA
PA

PA
GN

PE

PE
PE

PE

PE
PE
PE

PE
GPIO Jumpers
Some of the GPIO signals used by the board are connected to board jumpers and can be
disconnected to provide additional user GPIOs. GPIOs PA0/PA1/PB4/PD0/PF2/PF3 are
connected to jumpers JR1-JR6 respectively. Each signal can be freed by cutting the trace of the
corresponding jumper (cut at white line on silkscreen). The jumper pads have the same footprint
as an 0603 SMT resistor. To reconnect a previously cut jumper, solder a 0 ohm resistor to the
corresponding jumper footprint.

JTAG/SWD
The JTAG/SWD connector J1 is used for program download and debug. This is a 2x5 fine pitch
(0.050”) ARM JTAG connector, see (Figure 2-3) for signal definition. The LM3S9B92
microcontroller supports JTAG debug, Serial Wire Debug (SWD), and Serial Wire Out (SWO) trace
with this connector. The ICDI board connects via a 10-wire ribbon cable to this connector.

Figure 2-3. JTAG/SWD Connector

10 9
In RSTn GND
In TDI N/C
Out TDO/SWO GND
In TCK/SWCLK GND
I/O TMS/SWDIO 3.3V Out
2 1

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Stellaris® LM3S9B92 Evaluation Kit User’s Manual

PWR/UART
The PWR/UART connector J2 is used to provide 5 V power from the ICDI board and also to
connect the LM3S9B92 UART0 signals. This is a 2x4 fine pitch (0.050") connector, see
(Figure 2-4) for signal definition. The UART0 signals are connected to GPIO jumpers JR1 and JR2
and can be disconnected from connector J2 if required, see “GPIO Jumpers” on page 14. The
ICDI board connects via an 8-wire ribbon cable to this connector.

Figure 2-4. PWR/UART Connector

8 7
In 5V 5V In
N/C N/C
In VCP_RX GND
Out VCP_TX GND
2 1

Ethernet, USB, Power and Miscellaneous (Schematic page 2)


Page 2 of the schematics contains the Ethernet RJ45 connector, USB power switch and USB OTG
connector, 3.3 V regulator, and power switch selector.

Ethernet Port
The on-board RJ45 connector provides a 10/100 base T Ethernet port. The RJ45 connector
includes integrated LEDs and magnetics. The LEDs are connected to GPIO jumpers JR4 and JR5
and can be disconnected from the RJ45 connector if required, see GPIO Jumpers section.

USB Port
The on-board USB microAB connector provides a USB 2.0 full-speed port. To use as an On-The-
Go (OTG) port, the power selector switch SW3 lever must be set to EXT. This selects an external
5 V power source to provide power to the board and the USB power switch. If the SW3 lever is set
to USB, power to the board is received from USB, the on-board USB power switch output is
disconnected from USB, and the board can only be used as a USB device. When using the
USB-OTG port in Host mode, the current provided to a USB device should be limited to 100 mA or
less when powered from the ICDI board. If powered from the 5 V test pad, then this can be
increased to 500 mA.

Board Power
The board requires 5 V for operation, and switch SW3 is used to select the power source. If the
switch lever is moved towards the USB label on the board, power is received from the USB
connector. If the switch lever is moved towards the EXTernal board label, the board is powered
from the PWR/UART connector and the ICDI board provides power to this connector. DC regulator
U2 generates 3.3 V for powering the board circuits and includes power indicator LED D1.

User Devices
Pushbutton switch SW2 and LED D2 are available for the user and connected to PB4 and PD0
respectively. These GPIOs are connected to GPIO jumpers JR3 and JR4 and can be
disconnected from SW2 and D2 if required, see GPIO Jumpers section.

January 6, 2010 15
Hardware Description

In-Circuit Debug Interface Board


The ICDI board is used to download and debug programs on the EK-LM3S9B92 evaluation board,
but can also be used for debug of other Luminary Micro boards. A block diagram is shown in
Figure 2-5.

Figure 2-5. In Circuit Debug (ICDI) Board Block Diagram


JTAG/SWD
JTAG/SWD
USB 2x10
USB 2x5
PortA
PortB JTAG/SWD
MUX PWR /UART
2x4
EEPROM
FTDI

DEBUG
OSC ACTIVE
6MHz
VBUS

RESET
POWER
3.3V
Regulator

Functional Description
USB to JTAG/SWD, Power (Schematic page 1)
USB
An FTDI USB to serial protocol chip is used for the USB 2.0 full-speed device controller. This is
connected to a USB miniB connector and to a set of buffers/multiplexers. A 1-kbit serial EEPROM
contains USB configuration data which is read at power up.

Power
The board receives 5 V power from the USB bus. A DC regulator generates 3.3 V for on-board
circuits, when on LED D1 (POWER) is lit on.

Headers
Three headers are on-board, a 10-pin JTAG/SWD header J1, an 8-pin PWR/UART header J2, and
an optional 20-pin JTAG/SWD header J3. The 10-pin and 8-pin headers are used to connect to the
EK-LM3S9B92 evaluation board.

JTAG/SWD
JTAG/SWD connector J1 connects to the EK-LM3S9B92 evaluation board with a ribbon cable for
program download and debug. This is a 2x5 fine pitch (0.050”) ARM JTAG connector, see
(Figure 2-6) for signal definition.The ICDI supports JTAG debug, SWD (Serial Wire Debug), and
SWO (Serial Wire Out) trace with this connector.
Optional JTAG/SWD connector J3 is a 2x10 standard pitch (0.1”) ARM JTAG connector directly
connected to J1, see (Figure 2-7) for signal definition. This allows the ICDI to connect to targets
that use a 2x10 connector. It also allows the use of an external 2x10 debugger on targets with the

16 January 6, 2010
Stellaris® LM3S9B92 Evaluation Kit User’s Manual

fine pitch connector, including the EK-LM3S9B92. The signal direction shown for J1 and J3 applies
when the ICDI is used as the JTAG/SWD debugger and LED D2 (DEBUG ACTIVE) is lit on. In this
case only one of the two connectors J1/J3 should be used.
The ICDI can also be used as a 20-pin to 10-pin adapter for external JTAG debuggers. Note that
the DEBUG ACTIVE LED must be off before connecting any external JTAG debuggers.

Figure 2-6. JTAG/SWD Connector J1

10 9
Out SRSTn GND
Out TDI N/C
In TDO/SWO GND
Out TCK/SWCLK GND
I/O TMS/SWDIO VSENSE In
2 1

Figure 2-7. JTAG/SWD Connector J3

20 19
GND N/C
GND N/C
GND SRSTn Out
GND TDO/SWO In
GND N/C
GND TCK/SWCLK Out
GND TMS/SWDIO I/O
GND TDI Out
GND N/C
N/C VSENSE In
2 1

Pushbutton
Pushbutton SW1 (RESET) is provided to manually generate the SRSTn signal to the target
device. The SRSTn signal can also be generated under program control.

PWR/UART
The PWR/UART connector J2 connects to the EK-LM3S9B92 evaluation board with a ribbon cable
and provides 5 V power and a virtual communications port connection. This is a 2 x 4 fine pitch
(0.050”) connector, see (Figure 2-8) for signal definition. Signals DBG1/DBG2 are reserved.

Figure 2-8. PWR/UART Connector

8 7
Out 5V 5V Out
DBG2 DBG1
Out VCP_RX GND
In VCP_TX GND
2 1

January 6, 2010 17
Hardware Description

JTAG / SWD Multiplexer (Schematic page 2)


Buffers
A set of tri-state buffers is used to multiplex JTAG and SWD signals, and also multiplex the UART
VCP_TX signal with the SWO signal. LED D2 (DEBUG ACTIVE) is lit on when these buffers are
enabled. To avoid signal contention, external JTAG debuggers should not be connected when
DEBUG ACTIVE is on.

18 January 6, 2010
C H A P T E R 3
Software Development
This chapter provides general information on software development as well as instructions for
Flash memory programming.

Software Description
The software provided with the EK-LM3S9B92 provides access to all of the peripheral devices
supplied in the design. The StellarisWare® Peripheral Driver Library is used to operate the on-chip
peripherals.
The software includes a set of example applications that utilize the StellarisWare Peripheral Driver
Library. These applications demonstrate the capabilities of the LM3S9B92 microcontroller, as well
as providing a starting point for the development of the final application for use on the
EK-LM3S9B92.

Source Code
The complete source code is included on the EK-LM3S9B92 CD. Refer to the Quickstart Guide for
a detailed description of hardware setup and how to install the source code. The source code and
binary files are installed in the DriverLib tree.

Tool Options
The source code installation includes directories containing projects and/or makefiles for the
following tool-chains:
„ Keil ARM RealView® Microcontroller Development System
„ IAR Embedded Workbench for ARM
„ CodeSourcery G++
„ Code Red Technology Red Suite
„ Generic Gnu C compiler
Evaluation versions of these tools may be downloaded from www.ti.com/stellaris. Due to code size
restrictions, the evaluation tools may not build all example programs. A full license is necessary to
re-build or debug all examples.
Instructions on installing and using each of the evaluation tools can be found in the Quickstart
guides (for example, Quickstart-Keil, Quickstart-IAR) which are available for download from the
evaluation kit section of our web site at www.ti.com/stellaris.
For detailed information on using the tools refer to the documentation included in the tool chain
installation or visit the website of the tools supplier.

Programming the EK-LM3S9B92 Board


The EK-LM3S9B92 software package includes pre-built binaries for each of the example
applications. If you installed DriverLib to the default installation path of C:/DriverLib, you can find
the example applications in “C:/DriverLib/boards/ek-tempest”. The ICDI board is used along with
Luminary Micro's LM Flash Programmer tool to program applications on the EK-LM3S9B92 board.

January 6, 2010 19
Software Development

To program example applications into the EK-LM3S9B92 evaluation board using the ICDI
board:
1. Install LM Flash Programmer on a Windows PC.
2. Connect the 10-wire ribbon cable to the 10-pin header on the ICDI board and to the 10-pin
header on the EK-LM3S9B92 board. The red stripe on the ribbon cable should be facing the
bottom of the connectors (see Figure B-5 on page 29).
3. Connect the 8-wire ribbon cable to the 8-pin header on the ICDI board and to the 8-pin header
on the EK-LM3S9B92 board. The red stripe on the ribbon cable should be facing the bottom of
the connectors (see Figure B-5 on page 29).
4. Verify that slide switch SW3 on the EK-LM3S9B92 board is set to EXTernal.
5. Connect the USB cable A-plug to an available port on the PC and the miniB-plug to the ICDI
board.
6. Verify that POWER LED D1 on the ICDI board is lit and POWER LED D1 on the
EK-LM3S9B92 board is also lit.
7. Run LM Flash Programmer.
8. In the Configuration tab, use the Quick Set control to select LM3S9B92 Evaluation Board.
9. Move to the Program tab and click the Browse button. Navigate to the example applications
directory (the default location is “C:/DriverLib/boards/ek-tempest/).
10. Each example application has its own directory. Navigate into the example directory that you
want to load and then into the directory which contains the binary (*.bin) files. Select the binary
file and click Open.
11. Set the “Erase Method” to “Erase Necessary Pages” and check the “Verify After Program” box.
12. Next, click the Program button to start the Erase, Download and Verify process. The DEBUG
ACTIVE LED (D2) on the ICDI will turn on at this time.
13. Program execution will start once Verify is complete.
The EK-LM3S9B92 design uses a Stellaris® LM3S9B92 microcontroller to handle networking,
USB-OTG, and peripheral functions. The entire circuit is built on a compact four-layer printed
circuit board. All design files are provided on the EK-LM3S9B92 CD.

20 January 6, 2010
A P P E N D I X A
Schematics
This section contains the schematics for the EK-LM3S9B92 evaluation board and also the
BD-ICDI debug board.

EK-LM3S9B92 Evaluation Board


„ Microcontroller, Reset, and Headers on page 22
„ Ethernet, USB, and Power on page 23

BD-ICDI Board
„ USB to JTAG, SWD, Headers, and Power on page 24
„ JTAG/SWD Multiplexer on page 25

January 6, 2010 21
Schematic page 1

1 2 3 4 5 6

VBUS Revision Date Description


U1 2/24/2009 First release for prototypes.
A 5V
PA0 26 66 4/15/2009 Released to production.
27
PA0/U0RX PB0/USB0ID
67
USBID B
PA1 PA0
PA1/U0TX PB1/USB0VBUS TP1 TP18
A R1 10K PA2 28 72 PB2 PA1 A
PA2/SSI0CLK PB2/I2C0SCL TP2 TP19 5VR
R2 10K PA3 29 65 PB3 PA2 PB2
PA3/SSI0FSS PB3/I2C0SDA TP3 TP20
R3 10K PA4 30 92 PB4 PA3 PB3
PA4/SSI0RX PB4 TP4 TP21
R4 10K PA5 31 91 PB5 PA4 PB4
PA5/SSI0TX PB5 TP5 TP22
3.3V PA6 34 90 PB6 PA5 PB5
J1 PA6 PB6 TP6 TP23
PA7 35 89 PB7 PA6 PB6
PA7 PB7 TP7 TP24
1 2 TMS PA7 PB7
TP8 TP25
3 4 TCK PC0 80 10 PD0
PC0/TCK/SWCLK PD0 TP9 TP26
C1 5 6 TDO PC1 79 11 PD1 PC4 PD0
PC1/TMS/SWDIO PD1 TP10 TP27
7 8 TDI PC2 78 12 PD2 PC5 PD1
PC2/TDI PD2 TP11 TP28
0.1uF 9 10 RSTn PC3 77 13 PD3 PC6 PD2
PC3/TDO/SWO PD3 TP12 TP29
PC4 25 97 PD4 PC7 PD3
PC4 PD4 TP13 TP30
HDR 2X5-MH-SHRD PC5 24 98 PD5 PD4
PC5 PD5 TP14 TP31
PC6 23 99 PD6 PD5
5V JTAG/SWD PC6 PD6 TP15 TP32
PC7 22 100 PD7 PD6
PC7 PD7 TP16 TP33
PD7
TP17 TP34
J2 PE0 74 47 PF0
PE0 PF0
PE1 75 61 PF1
8 7 PE1 PF1
PE2 95 60 PF2 SHDNn
DBG2 6 5 DBG1 PE2 PF2/LED1
PE3 96 59 PF3
VCP_RX 4 3 PE3 PF3/LED0
PE4 6 58
VCP_TX 2 1 PE4 MDIO ETH_MDIO PE0 PF0
PE5 5 46 TP35 TP52
PE5 TXON ETH_TXON PE1 PF1
PE6 2 43 TP36 TP53
HDR 2X4-MH-SHRD PE6 TXOP ETH_TXOP PE2 PF2
PWR/UART PE7 1 42 PF4 TP37 TP54
PE7 PF4 PE3 PF3
B TP38 TP55 B
PE4 PF4 3.3V
PG0 19 86 PH0 TP39 TP56
PG0 PH0 PE5 PF5
PG1 18 85 PH1 TP40 TP57
PG1 PH1 PE6
XTALN 17 84 PH2 TP41 TP58
XTALNPHY PH2 PE7
XTALP 16 83 TP42 TP59
XTALPPHY PH3/USB0EPEN USBPWR PG0 PG1 VBUS
PF5 41 76 TP43 TP60
PF5 PH4/USB0PFLT USBFLT PJ0 PG7
40 63 PH5 TP44 TP61
ETH_RXIP RXIP PH5 PJ1
37 62 PH6 TP45 TP62
ETH_RXIN RXIN PH6 PJ2 PH0
PG7 36 15 PH7 TP46 TP63
PG7 PH7 PJ3 PH1
TP47 TP64
PJ4 PH2
OSCin 48 14 PJ0 TP48 TP65
OSC0 PJ0 PJ5 PH5
OSCout 49 87 PJ1 TP49 TP66
OSC1 PJ1 PJ6 PH6
39 PJ2 TP50 TP67
PJ2 PJ7 PH7
50 PJ3 TP51 TP68
3.3V PJ3
52 PJ4
PJ4
53 PJ5
SW1 PJ5
54 PJ6
PJ6
1

R6 51 55 PJ7
10K NC PJ7
71 PA0 JR1 VCP_RX
USB0DP USBDP
R23 10 RSTn 64 70
RESET RST USB0DM USBDM
2

PA1 JR2 VCP_TX


C2 33 73 R7 9.1k
ERBIAS USB0RBIAS
PB4 JR3
C USR_PBn C
0.1uF R8
12.4K PD0 JR4
USR_LED
8
VDD33
9 20 PF2 JR5
GND VDD33 ETH_LED1
21 32
GND VDD33
45 44 PF3 JR6
GND VDD33 ETH_LED0
57 56
GND VDD33
69 68 3.3V
GND VDD33
82 81
GND VDD33
94 93
GND VDD33
7 C7 C8 C9 C10 C6
LDO 0.1uF 0.1uF 0.1uF 0.1uF 1uF
38
120ohm @ 100 MHz

Y2 Y1
CVDD
88
CVDD
1 2 1 2 FB1 C11 C12 C13 C14
4 3 0.1uF 0.1uF 0.1uF 0.1uF
AGND AVDD
25.000 MHz 16.000 MHz
C15 C16 C17 C18
LM3S9B92 Texas Instruments
18pF 18pF 18pF 18pF
108 Wild Basin Rd.
CVDD Suite 350
Austin, TX 78746

D C19 C20 C22 Designer: Drawing Title: D


C23 0.1uF 0.1uF
0.1uF Arnaldo Cruz EK-LM3S9B92 Evaluation Board
1uF
Drawn by: Page Title:
Arnaldo Cruz Tempest, Reset, Test Pads
Approved: Size Document Number: Rev
* B 0001 B
Date: 5/18/2009 Sheet 1 of 2
1 2 3 4 5 6
Schematic page 2

1 2 3 4 5 6

3.3V
J5 USB Micro AB

C25 C26
G1 G2 0.1uF 0.01uF
VBUS D- D+ ID G
VBUS R10 R11 R12
10K 330 330 R13 R14
A 49.9 49.9 A

5
FB2 VUSB FB3 J6
120ohm @ 100 MHz 120ohm @ 100 MHz G+
12
11 G-

USBDM ETH_MDIO
USBDP 3 1CT:1
ETH_TXOP
USBID TX+ 1
ETH_TXON R25 10 5 TX- 2
RX+ 3
C27 C28
4
USR_LED 4
10pF 10pF 5
3.3V 7 1CT:1
RX- 6
ETH_RXIP 7
R18 R26 10 6
SW2 R15 ETH_RXIN 8
330
1

10K 8
USR PB
2 Y-
D2 ETH_LED1
1 Y+
ETH_LED0
2

GREEN_LED
USR_PBn USR 9 NC
B 10 GND B
R16 R17 C29 C30
49.9 49.9 10pF 10pF
PulseJack_RJ45_SMT ETHERNET 10/100

GR
GL
C31 C32
0.1uF 0.01uF
5VR
VBUS 5V
1 SW3
2
3

4
5
6
SHDNn
Switch DPDT 3.3V
3.3V

R19 U2
10K 4 5
5V VIN VOUT
R21 10K 3 R20
C SHDN C
C34 330
2 1 4.7uF
USBFLT C33
GND NR
4.7uF PQ1LA333MSPQ
C35
VOUT D1
USBPWR
U3 GREEN_LED
0.1uF
5 1 PWR
VIN VOUT
R22 C36
10K C37
4 3
EN OC C38
4.7uF 0.1uF
2 4.7uF
GND
TPS2051B

CVDD
U4
1 6
VIN VOUT
R27 10K 3 5 R28 FID1 FID2 FID3
EN ADJ 113K Note: 40 Mil Pad 40 Mil Pad 40 Mil Pad
2 4 U4, R27, R28, and R29 100 Mil Mask 100 Mil Mask 100 Mil Mask
GND PG
required only for
D FAN2558ADJ LM3S9B92 rev B1. Drawing Title: D
R29 See errata. EK-LM3S9B92 Evaluation Board
100K
Fiducials Page Title:
Ethernet, USB, Power
Size Document Number: Rev
B B
0001
Date: 5/18/2009 Sheet 2 of 2
1 2 3 4 5 6
Schematic page 1

1 2 3 4 5 6

Revision History
3.3V Revision Date Description
J4 USB_MINI_B_RECEPTACLE
G3 5V D- D+ ID G
G4 A 2/24/2009 First release for prototypes.
G1 G2 B 4/03/2009 Released for production.
R1 R2 R3 R4
10K 10K 10K 10K
A A
5V 1

5
U1
C1
FB1 VBUS
0.1uF
24
120ohm @ 100 MHz ADBUS0 FT_SK
6 23
3V3OUT ADBUS1 FT_DO
22
FB2 ADBUS2 FT_DI
21
ADBUS3 FT_CS
120ohm @ 100 MHz USBM R5 27 UDM 8 20
USBDM ADBUS4
19 DBGRSTn
ADBUS5
USBP R6 27 UDP 7 17
USBDP ADBUS6 DBGENn
16
ADBUS7 DBGMOD
15 VSENSE R11 10K
ACBUS0
13
ACBUS1
5V 5V 12
R7 ACBUS2
11
1.50k ACBUS3
10
R10 SI/WUA TCK
10K TMS_SWDIO
40 VCP_RX
R8 BDBUS0 TDI
39 VCP_TX_SWO
10K BDBUS1 VCP_TX_SWO TDO_SWO
38
BDBUS2
37
BDBUS3
U2 36 J3
BDBUS4 SWO_EN
B 8 1 EECS 48 35 B
VCC CS EECS BDBUS5 20 19
7 2 EESK 1 33 DBG1 J1
C2 NC SK EESK BDBUS6 18 17
6 3 EEDATA 2 32 DBG2
0.1uF ORG DI EEDATA BDBUS7 16 15 SRSTn 10 9
5 4 R9 2.21k 47
GND DO TEST 14 13 TDO 8 7
30
BCBUS0 12 11 6 5
CAT93C46 XTI 43 29
1K 64X16
XTIN BCBUS1 10 9 TCK 4 3
XTO 44 28
XTOUT BCBUS2 8 7 TMS 2 1
27
BCBUS3 6 5 TDI
26
SI/WUB 4 3 HDR 2X5-MH-SHRD
4 JTAG/SWD
RESET# 2 1
5 41
RSTOUT# PWREN#
2X10 HDR-SHRD
3.3V 5V
JTAG/SWD
9 3
GND VCC
Y1 18 42
GND VCC
25 14
1 2 GND VCCIOA
34 31
GND VCCIOB
6.000MHz C3 C4 C5 C6
45 46 R12
C7 C8 AGND AVCC 475 0.1uF 0.1uF 0.1uF 0.1uF
18pF 18pF 5V
C9
FT2232 0.1uF
J2
C C
8 7
DBG2 6 5 DBG1
VCP_RX 4 3
2 1
VCP_TX

13
3.3V HDR 2X4-MH-SHRD
PWR/UART
12 11 R19 10 SRSTn
3.3V R13
5V 330
U3
4 5 U5D
VIN VOUT SN74LVC125A
R15
R14 3 330
SHDN D2
10K C12 GREEN_LED
2 1 4.7uF
GND NR
C11 DEBUG ACTIVE SW1
4.7uF PQ1LA333MSPQ D1
1

4
C13 GREEN_LED
0.1uF PWR RESET Texas Instruments
108 Wild Basin Rd.
Suite 350
2

Austin, TX 78746

D Designer: Drawing Title: D


Arnaldo Cruz In Circuit Debug Interface (ICDI) Board
Drawn by: Page Title:
Arnaldo Cruz USB to JTAG, SWD
Approved: Size Document Number: Rev
* B 0001 B
Date: 5/18/2009 Sheet 1 of 2
1 2 3 4 5 6
Schematic page 2

1 2 3 4 5 6

FT_SK

FT_DO

FID1 FID2 FID3


A 40 Mil Pad 40 Mil Pad 40 Mil Pad A

13
100 Mil Mask 100 Mil Mask 100 Mil Mask

12 11 R16 27
TCK

1
U4D Fiducials
2 3 SN74LVC125A
DBGMOD
R20

10
U5A 10K
3.3V
SN74LVC125A
9 8 R17 27
R21 TDI
DBGENn
10K
4 U4C
SN74LVC125A
5 6

U5B

1
SN74LVC125A
B 2 3 R18 27 B
FT_CS TMS_SWDIO

U6A

1
SN74LVC126A

2 3

4
U4A R22
SN74LVC125A 10K 5 6 3.3V

U6B
SN74LVC126A

14

14

14
U4E U5E U6E
VCC SN74LVC125A VCC SN74LVC125A VCC SN74LVC126A

10
GND GND GND

7
8 9
FT_DI TDO_SWO

U6C
C SN74LVC126A C

3.3V

4
6 5
C14 C15 C16
0.1uF 0.1uF 0.1uF
U4B
SN74LVC125A
13

11 12
VCP_TX_SWO

U6D
SN74LVC126A
SWO_EN
10

D 8 9 Drawing Title: D
VCP_TX
In Circuit Debug Interface (ICDI) Board
U5C Page Title:
SN74LVC125A JTAG, SWD Mux
Size Document Number: Rev
B B
0001
Date: 4/9/2009 Sheet 2 of 2
1 2 3 4 5 6
26 January 6, 2010
A P P E N D I X B
Connection Details
This appendix contains the following sections:
„ Component Locations (see page 27)
„ Board Dimensions (see page 28)
„ Board Connectivity (see page 29)
„ References (see page 29)

Component Locations
Figure B-1. EK-LM3S9B92 Evaluation Board Component Locations

Figure B-2. BD-ICDI Board Component Locations

January 6, 2010 27
Board Dimensions

Board Dimensions
Figure B-3. EK-LM3S9B92 Evaluation Board Dimensions

4.00
0.07 0.07
Ø 0.100
0.34

1.40

0.07 0.07

0.07 0.07

Figure B-4. In-Circuit Debug Interface Board Dimensions

2.50
0.07 0.07
Ø 0.100

1.40

0.07

0.07 0.07

28 January 6, 2010
Stellaris® LM3S9B92 Evaluation Kit User’s Manual

Board Connectivity
Figure B-5. ICDI – EK-LM3S9B92 Board Connectivity

8-wire cable
PWR/UART
BD-ICDI EK-LM3S9B92
Board Evaluation Board
JTAG/SWD

10-wire cable

References
In addition to this document, the following references are included on the Stellaris Evaluation Kit
CD-ROM and are also available for download at www.ti.com/stellaris:
„ Stellaris LM3S9B92 Data Sheet, publication DS-LM3S9B92
„ StellarisWare Driver Library
„ StellarisWare Driver Library User’s Manual, publication SW-DRL-UG
Additional references include:
„ FT2232D Dual USB/UART FIFO IC Datasheet, version 0.91, 2006, Future Technology
Devices International Ltd.
„ Information on development tool being used:
– RealView MDK web site, www.keil.com/arm/rvmdkkit.asp
– IAR Embedded Workbench web site, www.iar.com
– Code Sourcery GCC development tools web site,
www.codesourcery.com/gnu_toolchains/arm
– Code Red Technologies development tools web site, www.code-red-tech.com
– Texas Instruments’ Code Composer Studio™ IDE web site, www.ti.com/ccs

January 6, 2010 29
References

30 January 6, 2010
A P P E N D I X C
Microcontroller GPIO Assignments
The following table shows the LM3S9B92 GPIOs used by the EK-LM3S9B92 board. All other
GPIOs are available for use and accessible on the test pads.

Table C-1. EK-LM3S9B92 Evaluation Board GPIO Usage

Port Function Board Signal Usage Description

Virtual Communications port receive signal from J2


PA0 U0RX VCP_RX
header. To disconnect from header cut JR1 jumper.
UART
Virtual Communications port transmit signal to J2
PA1 U0TX VCP_TX
header. To disconnect from header cut JR2 jumper.

PB0 USB0ID USBID USBID signal from the USB-On-the-Go connector J5.
USB USB VBUS input signal from USB-OTG connector J5 for
PB1 USB0VBUS VBUS
sensing VBUS levels.

Input from user pushbutton SW2. To disconnect from


PB4 GPIO USR_PBn User
pushbutton cut JR3 jumper.

PC0 TCK/SWCLK PC0 JTAG or SWD clock input

PC1 TMS/SWDIO PC1 JTAG/ JTAG TMS input or SWD bidirectional signal SWDIO

PC2 TDI PC2 SWD JTAG TDI signal input.

PC3 TDO/SWO PC3 JTAG TDO output or SWD trace signal SWO output.

Output to user LED D2. To disconnect from LED cut JR4


PD0 GPIO USR_LED User
jumper.

Output to RJ45 jack J6 yellow LED. To disconnect from


PF2 LED1 ETH_LED1
LED cut JR5 jumper.
Ethernet
Output to RJ45 jack J6 green LED. To disconnect from
PF3 LED0 ETH_LED0
LED cut JR6 jumper.

Output to USB-OTG power switch U3. When set high it


enables the USB-OTG power switch to provide USB
PH3 USB0EPEN USBPWR
VBUS power to USB-OTG connector J5. When set low
power switch U3 is disabled.
USB
Overcurrent input status from USB-OTG power switch
U3. When high the power switch status is normal. When
PH4 USB0PFLT USBPFLT
low an overcurrent condition has been detected by the
switch.

January 6, 2010 31
32 January 6, 2010
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