Ion Implantation and Diffusion

Ion Implantation

 Process which is used to selectively deposit dopant ions into the surface of
the wafers.
 This process involves the direct introduction of highly energetic, charged
atomic species onto the target surface.
 This process allows more precise control of junction depths and dopant
distributions.
 The greatest advantage of ion implant over diffusion is its more precise
control for depositing dopant atoms into the substrate

2
Ion Implantation Process
 During ion implantation, impurity atoms are vaporized and accelerated toward the
silicon substrate.
 These high-energy atoms enter the crystal lattice and lose their energy by colliding with
some silicon atoms before finally coming to rest at some depth.
 Adjusting the acceleration energy controls the average depth of depositing the impurity
atoms.
 Heat treatment is used to anneal or repair the crystal lattice disturbances caused by the
atomic collisions.
 These are all the examples of ion implanters

3
 Ion Implantation

Focus Beam trap and Neutral beam and

A typical Ion Implantation gate plate beam path gated
equipment consists of a feed
source, an ion source, a device
for extracting and analyzing
ions, an acceleration tube, a
scanning system, a high
vacuum system. Neutral beam trap Y - axis X - axis Wafer in wafer
and beam gate scanner scanner process chamber

Gases Solids
Ar Ga Process Conditions
AsH3 In
B11F3 * Sb
Flow Rate: 5 sccm
He Liquids Pressure: 10-5 Torr
N2 Al(CH3)3 Accelerating Voltage: 5 to 200 keV
PH3
SiH4
SiF4
* High proportion of the total product use
GeH4

4
Diffusion Process

 Diffusion is the movement of a chemical

species from an area of high
concentration to an area of lower
concentration.
 The controlled diffusion of dopants into
silicon is the foundation of forming a p-
n junction and fabrication of devices
during wafer fabrication.
 Diffusion is used primarily to alter the
type and level of conductivity of
semiconductor materials.
 It is used to form bases, emitters, and
resistors in bipolar devices, as well as Examples of Diffusion Furnaces
drains and sources in MOS devices.
 It is also used to dope polysilicon layers

5
Methods of planar process
Diffusion
 A uniformly doped ingot is
sliced into wafers.
 An oxide film is then grown on
the wafers.
 The film is patterned and
etched using photolithography
exposing specific sections of the
silicon.
 The wafers are then spun with
an opposite polarity doping
source adhering only to the
exposed areas.
 The wafers are then heated in a
furnace (800-1250 deg.C) to
drive the doping atoms into the
silicon.
6
Ion Implantation
 A particle accelerator is used to
accelerate a doping atom so
that it can penetrate a silicon
crystal to a depth of several
microns
 Lattice damage to the crystal is
then repaired by heating the
wafer at a moderate
temperature for a few minutes.
This process is called
annealing.
Diffusion Process Ion Implantation

7
Comparison of Diffusion and Ion Implantation

Diffusion:
 Diffusion is a cheaper and more simplistic method, but can only be
performed from the surface of the wafers.
 Dopants also diffuse unevenly, and interact with each other altering the
diffusion rate.
Ion Implantation:
 Ion implantation is more expensive and complex.
 It does not require high temperatures and also allows for greater control of
dopant concentration and profile.
 It is an anisotropic process and therefore does not spread the dopant
implant as much as diffusion.
 Aids in the manufacture of self-aligned structures which greatly improve
the performance of MOS transistors.

8
 Wafer up to Ion Implantation Process

silicon wafer silicon wafer silicon dioxide (oxide)

p- silicon epi layer p- silicon epi layer

p+ silicon substrate p+ silicon substrate p+ silicon substrate

photoresist photoresist
field oxide

p- epi p- epi

p+ substrate p+ substrate

phosphorus
(-) ions photoresist mask

junction field oxide

depth
n-w ell p- epi
p-channel transistor
p+ substrate

9
Thank you

THANK YOU

10