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2. (a) Draw the circuit diagram of fixed bias circuit in CE configuration and obtain
the expression for IB . Why the circuit is not suitable if the β of the transistor
is changed.
(b) How to obtain bias stability in CE configuration circuit.
(c) Briefly explain about thermal stability. [10+5+5]
4. (a) Draw the circuit diagram of a RC phases shift oscillator using BJT. Derive
the expression for frequency of oscillators.
(b) Classify different type of oscillators based on frequency range.
(c) Why RC oscillators are not suitable for high frequency applications. [10+5+5]
5. (a) In the circuit given Figure1 input signal Vi impressed between gate and
ground, find the amplification Av=Vo /Vi . FET parameters are µ =30 and rd
=5k. Neglect capacitances.
(b) If Vi is impressed in series with 40k resistor (instead of from gate to ground),
find Av =Vo /Vi . [10+10]
6. (a) The gain of an RC coupled 2 stage FET amplifier falls by 90% of the midband
value at 400 kHz. If gm of each FET is 10 m A/V, and total output capacitance
for each stage is 20 pF. Calculate the RL required and the midband gain of
each stage
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Code No: C1EC01-C1405 N5/05
Figure 1:
8. (a) What is a tuned amplifier and how do you classify tuned amplifier.Briefly
explain.
(b) Briefly explain the capacitance coupled single tuned amplifier with its equiv-
alent circuit. [10+10]
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