DATA SHEET

MOS FIELD EFFECT TRANSISTOR

2SK4075
SWITCHING
N-CHANNEL POWER MOS FET

DESCRIPTION
The 2SK4075 is N-channel MOS FET designed for high current switching applications.

ORDERING INFORMATION
PART NUMBER LEAD PLATING PACKING PACKAGE

2SK4075-ZK-E1-AY Pure Sn (Tin) Tape TO-252 (MP-3ZK)

2SK4075-ZK-E2-AY 2500 p/reel typ. 0.27 g

FEATURES
(TO-252)
• Low on-state resistance
RDS(on)1 = 6.7 mΩ MAX. (VGS = 10 V, ID = 30 A)
RDS(on)2 = 10 mΩ MAX. (VGS = 4.5 V, ID = 15 A)
• Low Ciss: Ciss = 2900 pF TYP.
• Logic level drive type

ABSOLUTE MAXIMUM RATINGS (TA = 25°C)

Drain to Source Voltage (VGS = 0 V) VDSS 40 V
Gate to Source Voltage (VDS = 0 V) VGSS ±20 V
Drain Current (DC) (TC = 25°C) ID(DC) ±60 A
Note1
Drain Current (pulse) ID(pulse) ±180 A
Total Power Dissipation (TC = 25°C) PT1 52 W
Total Power Dissipation (TA = 25°C) PT2 1.0 W
Channel Temperature Tch 150 °C
Storage Temperature Tstg –55 to +150 °C
Note2
Single Avalanche Current IAS 28 A
Note2
Single Avalanche Energy EAS 78 mJ
Notes 1. PW ≤ 10 μs, Duty Cycle ≤ 1%
2. Starting Tch = 25°C, VDD = 20 V, RG = 25 Ω, VGS = 20 → 0 V, L = 100 μH

THERMAL RESISTANCE
Channel to Case Thermal Resistance Rth(ch-C) 2.4 °C/W
Channel to Ambient Thermal Resistance Rth(ch-A) 125 °C/W

The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.

Document No. D18223EJ2V0DS00 (2nd edition)

Date Published September 2006 NS CP(K) 2006
Printed in Japan
The mark <R> shows major revised points.
The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field.
 2SK4075

ELECTRICAL CHARACTERISTICS (TA = 25°C)

CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

Zero Gate Voltage Drain Current IDSS VDS = 40 V, VGS = 0 V 1 μA

Gate Leakage Current IGSS VGS = ±20 V, VDS = 0 V ±100 nA

Gate Cut-off Voltage VGS(off) VDS = 10 V, ID = 1 mA 1.5 2.0 2.5 V

Note
<R> Forward Transfer Admittance | yfs | VDS = 10 V, ID = 15 A 9.3 S
Note
Drain to Source On-state Resistance RDS(on)1 VGS = 10 V, ID = 30 A 5.2 6.7 mΩ

RDS(on)2 VGS = 4.5 V, ID = 15 A 7.2 10 mΩ

Input Capacitance Ciss VDS = 10 V 2900 pF

Output Capacitance Coss VGS = 0 V 450 pF

Reverse Transfer Capacitance Crss f = 1 MHz 293 pF

Turn-on Delay Time td(on) VDD = 20 V 18 ns

Rise Time tr ID = 30 A 16 ns

Turn-off Delay Time td(off) VGS = 10 V 54 ns

Fall Time tf RG = 0 Ω 9 ns

Total Gate Charge QG VDD = 32 V 54 nC

Gate to Source Charge QGS VGS = 10 V 11 nC

Gate to Drain Charge QGD ID = 60 A 15 nC

Note
Body Diode Forward Voltage VF(S-D) IF = 60 A, VGS = 0 V 0.9 1.5 V

Reverse Recovery Time trr IF = 60 A, VGS = 0 V 33 ns

Reverse Recovery Charge Qrr di/dt = 100 A/μs 33 nC

Note Pulsed

TEST CIRCUIT 1 AVALANCHE CAPABILITY TEST CIRCUIT 2 SWITCHING TIME

D.U.T. D.U.T.
VGS
RG = 25 Ω L RL
VGS 90%
10% VGS
Wave Form
RG 0
PG. 50 Ω VDD PG. VDD
VGS = 20 → 0 V VDS
90% 90%
VGS VDS
BVDSS 10% 10%
0 VDS 0
IAS Wave Form
ID VDS τ td(on) tr td(off) tf
VDD
τ = 1 μs ton toff
Duty Cycle ≤ 1%
Starting Tch

TEST CIRCUIT 3 GATE CHARGE

D.U.T.
IG = 2 mA RL

PG. 50 Ω VDD

2 Data Sheet D18223EJ2V0DS

 2SK4075

TYPICAL CHARACTERISTICS (TA = 25°C)

DERATING FACTOR OF FORWARD BIAS TOTAL POWER DISSIPATION vs.
SAFE OPERATING AREA CASE TEMPERATURE
60
dT - Percentage of Rated Power - %

100

PT - Total Power Dissipation - W

50
80
40
60
30

40 20

20 10

0 0
0 25 50 75 100 125 150 175 0 25 50 75 100 125 150 175

TC - Case Temperature - °C TC - Case Temperature - °C

FORWARD BIAS SAFE OPERATING AREA

1000
RDS(on) Limited
(VGS = 10 V) ID(pulse)
PW = 100 μs
100
ID - Drain Current - A

ID(DC)
10 DC

Power Dissipation
1 Limited
10 ms
TC = 25°C
1 ms
Single Pulse
0.1
0.1 1 10 100
VDS - Drain to Source Voltage - V

TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH

1000

Rth(ch-A) = 125°C/W
rth(t) - Transient Thermal Resistance - °C/W

100

10
Rth(ch-C) = 2.4°C/W

0.1

Single Pulse
0.01
100 μ 1m 10 m 100 m 1 10 100 1000
PW - Pulse Width - s

Data Sheet D18223EJ2V0DS 3

 2SK4075

DRAIN CURRENT vs. FORWARD TRANSFER CHARACTERISTICS

DRAIN TO SOURCE VOLTAGE
250 100

TA = −55°C
200 VGS = 10 V 10
25°C
ID - Drain Current - A

ID - Drain Current - A
75°C
150 1 150°C
4.5 V
100 0.1

50 0.01
VDS = 10 V
Pulsed Pulsed
0 0.001
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 1 2 3 4 5
VDS - Drain to Source Voltage - V VGS - Gate to Source Voltage - V

GATE CUT-OFF VOLTAGE vs. FORWARD TRANSFER ADMITTANCE vs.

CHANNEL TEMPERATURE DRAIN CURRENT
2.5 100
| yfs | - Forward Transfer Admittance - S
VGS(off) - Gate Cut-off Voltage - V

2 TA = 150°C
75°C
25°C
1.5
−55°C
10
1

0.5 VDS = 10 V
VDS = 10 V
ID = 1 mA Pulsed
0 1
-100 -50 0 50 100 150 200 0.1 1 10 100

Tch - Channel Temperature - °C ID - Drain Current - A

DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN TO SOURCE ON-STATERESISTANCE vs.

DRAIN CURRENT GATE TO SOURCE VOLTAGE
30 30
RDS(on) - Drain to Source On-state Resistance - mΩ

RDS(on) - Drain to Source On-state Resistance - mΩ

Pulsed Pulsed
25 25

20 20
ID = 12 A
15 15
30 A
10 VGS = 4.5 V 10 60 A

5 5
10 V
0 0
0.1 1 10 100 1000 0 5 10 15 20
ID - Drain Current - A VGS - Gate to Source Voltage - V

4 Data Sheet D18223EJ2V0DS

 2SK4075

DRAIN TO SOURCE ON-STATE RESISTANCE vs. CAPACITANCE vs. DRAIN TO

CHANNEL TEMPERATURE SOURCE VOLTAGE
10000
RDS(on) - Drain to Source On-state Resistance - mΩ

14

Ciss, Coss, Crss - Capacitance - pF

C iss
12 ID = 15 A, VGS = 4.5 V

10 1000
C oss
8

6 C rss
100
4 ID = 30 A, VGS = 10 V
VGS = 0 V
2 f = 1 MHz

0 10
-100 -50 0 50 100 150 200 0.1 1 10 100

Tch - Channel Temperature - °C VDS - Drain to Source Voltage - V

SWITCHING CHARACTERISTICS DYNAMIC INPUT/OUTPUT CHARACTERISTICS

1000 40 12
td(on), tr, td(off), tf - Switching Time - ns

VDD = 32 V
VDS - Drain to Source Voltage - V

VGS - Gate to Source Voltage - V

35
20 V 10
30 8V
100 td(off) 8
25

td(on) 20 6

15 VGS
tr
10 4
VDD = 20 V tf 10
VGS = 10 V VDS ID = 60 A 2
5
RG = 0 Ω Pulsed
1 0 0
0.1 1 10 100 0 20 40 60

ID - Drain Current - A QG - Gate Chage - nC

SOURCE TO DRAIN DIODE FORWARD VOLTAGE REVERSE RECOVERY TIME vs.

DRAIN CURRENT
1000 100
trr - Reverse Recovery Time - ns
IF - Diode Forward Current - A

VGS = 10 V
100

0V
10 10

1
di/dt = 100 A/μs
Pulsed V GS = 0 V
0.1 1
0 0.5 1 1.5 0.1 1 10 100

VF(S-D) - Source to Drain Voltage - V ID - Drain Current - A

Data Sheet D18223EJ2V0DS 5

 2SK4075

PACKAGE DRAWING (Unit: mm)

TO-252 (MP-3ZK)

6.5±0.2 2.3±0.1
1.0 TYP. 0.5±0.1
5.1 TYP.
4.3 MIN.
No Plating
4
10.4 MAX. (9.8 TYP.)
4.0 MIN.

6.1±0.2

1 2 3 0.51 MIN.
0.8

No Plating

1.14 MAX. 0.76±0.12 0 to 0.25

2.3 2.3 0.5±0.1

1.0
1. Gate
2. Drain
3. Source
4. Fin (Drain)

EQUIVALENT CIRCUIT

Drain

Body
Gate Diode

Source

Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage exceeding
the rated voltage may be applied to this device.

6 Data Sheet D18223EJ2V0DS

 2SK4075

TAPE INFORMATION
There are two types (-E1, -E2) of taping depending on the direction of the device.

Draw-out side Reel side

MARKING INFORMATION

K4075 Abbreviation of part number

Pb-free plating marking

Lot code

RECOMMENDED SOLDERING CONDITIONS

The 2SK4075 should be soldered and mounted under the following recommended conditions.
For soldering methods and conditions other than those recommended below, please contact an NEC Electronics
sales representative.
For technical information, see the following website.

Semiconductor Device Mount Manual (http://www.necel.com/pkg/en/mount/index.html)

Recommended
Soldering Method Soldering Conditions
Condition Symbol

Infrared reflow Maximum temperature (Package's surface temperature): 260°C or below IR60-00-3
Time at maximum temperature: 10 seconds or less
Time of temperature higher than 220°C: 60 seconds or less
Preheating time at 160 to 180°C: 60 to 120 seconds
Maximum number of reflow processes: 3 times
Maximum chlorine content of rosin flux (percentage mass): 0.2% or less
Partial heating Maximum temperature (Pin temperature): 350°C or below P350
Time (per side of the device): 3 seconds or less
Maximum chlorine content of rosin flux: 0.2% (wt.) or less

Caution Do not use different soldering methods together (except for partial heating).

Data Sheet D18223EJ2V0DS 7

 2SK4075

• The information in this document is current as of September, 2006. The information is subject to
change without notice. For actual design-in, refer to the latest publications of NEC Electronics data
sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not
all products and/or types are available in every country. Please check with an NEC Electronics sales
representative for availability and additional information.
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M8E 02. 11-1