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® TSC2000 TSC2000 SBAS257 – FEBRUARY 2002
® TSC2000 TSC2000 SBAS257 – FEBRUARY 2002
® TSC2000 TSC2000 SBAS257 – FEBRUARY 2002
® TSC2000
®
TSC2000

TSC2000

SBAS257 – FEBRUARY 2002

PDA ANALOG INTERFACE CIRCUIT

FEATURES

4-WIRE TOUCH SCREEN INTERFACE

RATIOMETRIC CONVERSION

SINGLE 2.7V TO 3.6V SUPPLY

SERIAL INTERFACE

INTERNAL DETECTION OF SCREEN TOUCH

PROGRAMMABLE 8-, 10-, OR 12-BIT RESOLUTION

PROGRAMMABLE SAMPLING RATES

DIRECT BATTERY MEASUREMENT (0.5V to 6V)

ON-CHIP TEMPERATURE MEASUREMENT

TOUCH-PRESSURE MEASUREMENT

FULL POWER-DOWN CONTROL

TSSOP-20 PACKAGE

APPLICATIONS

PERSONAL DIGITAL ASSISTANTS

CELLULAR PHONES

MP3 PLAYERS

DESCRIPTION

The TSC2000 is a complete PDA analog interface circuit. It contains a complete 12-bit, Analog-to-Digital (A/D) resistive touch screen converter including drivers, the control to mea- sure touch pressure, and an 8-bit Digital-to-Analog (D/A) converter output for LCD contrast control. The TSC2000 interfaces to the host controller through a standard SPI™ serial interface. The TSC2000 offers programmable resolution and sampling rates from 8- to 12-bits and up to 125kHz to accommodate different screen sizes.

The TSC2000 also offers two battery-measurement inputs, one of which is capable of reading battery voltages up to 6V while operating at only 2.7V. It also has an on-chip temperature sensor capable of reading 0.3°C resolution. The TSC2000 is available in a TSSOP-20 package.

SPI is a registered trademark of Motorola. US Patent No. 624639.

a registered trademark of Motorola. US Patent No. 624639. MISO SS X+ X– Clock Touch Panel
MISO SS X+ X– Clock Touch Panel SCLK Y+ Serial Drivers Y– Interface and MOSI
MISO
SS
X+
X–
Clock
Touch Panel
SCLK
Y+
Serial
Drivers
Y–
Interface
and
MOSI
Control
Temp Sensor
Logic
A/D Converter
MUX
DAV
V
Battery Monitor
BAT1
PENIRQ
V
Battery Monitor
BAT2
AUX1
AUX2
Internal 2.5V
V REF
Reference
ARNG
A OUT
D/A Converter
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

ABSOLUTE MAXIMUM RATINGS (1)

V DD to GND Digital Input Voltage to GND Operating Temperature Range Storage Temperature Range Junction Temperature (T J Max) TSSOP Package Power Dissipation θ JA Thermal Impedance Lead Temperature, Soldering Vapor Phase (60s) Infrared (15s)

0.3V to +6V 0.3V to V DD + 0.3V 40°C to +105°C 65°C to +150°C

+150°C

(T J Max T A )/θ JA

93°C/W

+215°C

+220°C

NOTE: (1) Stresses above those listed under Absolute Maximum Ratingsmay cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability.

for extended periods may affect device reliability. ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit

ELECTROSTATIC DISCHARGE SENSITIVITY

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper han- dling and installation procedures can cause damage.

ESD damage can range from subtle performance degrada- tion to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

 

INTEGRAL

   

SPECIFIED

     

LINEARITY

PACKAGE

TEMPERATURE

PACKAGE

ORDERING

TRANSPORT

PRODUCT

ERROR (LSB)

PACKAGE-LEAD

DESIGNATOR (1)

RANGE

MARKING

NUMBER (2)

MEDIA, QUANTITY

TSC2000IPW

±2

TSSOP-20

PW

40°C to +85°C

TSC2000I

TSC2000IPW

Rails, 70

""

"

"

"

"

TSC2000IPWR

Tape and Reel, 2000

NOTES: (1) For the most current specifications and package information, refer to our web site at www.ti.com. (2) Models labeled with Rindicates large quantity tape and reel.

PIN CONFIGURATION

Top View TSSOP 1 20 AUX1 +V DD X+ 2 19 AUX2 Y+ 3 18
Top View
TSSOP
1
20
AUX1
+V DD
X+
2
19
AUX2
Y+
3
18
ARNG
X–
4
17
A OUT
Y–
5
16
PENIRQ
TSC2000
GND
6
15
MISO
V
7
14
DAV
BAT1
V
8
13
MOSI
BAT2
9
12
SS
V REF
NC
10
11
SCLK
PIN DESCRIPTION PIN NAME DESCRIPTION 1 Power Supply V DD 2 X+ X+ Position Input
PIN DESCRIPTION
PIN
NAME
DESCRIPTION
1
Power Supply
V DD
2
X+
X+ Position Input
3
Y+
Y+ Position Input
4
X–
X– Position Input
5
Y–
Y– Position Input
6
GND
Ground
7 V
Battery Monitor Input 1
BAT1
8 V
Battery Monitor Input 2
BAT2
9
Voltage Reference Input/Output
V REF
10
NC
No Connection
11
SCLK
Serial Clock Input
12
SS
Slave Select Input (Active LOW). Data will not be
clocked in to MOSI unless SS is LOW. When SS is
HIGH, MISO is high impedance.
13
MOSI
Serial Data Input. Data is clocked in at SCLK falling
edge.
14
DAV
Data Available (Active LOW)
15
MISO
Serial Data Output. Data is clocked out at SCLK
falling edge. High impedance when SS is HIGH.
16
PENIRQ
Pen Interrupt
17
Analog Output Current from D/A Converter
A OUT
18
ARNG
D/A Converter Analog Output Range Set
19
AUX2
Auxiliary A/D Converter Input 2
20
AUX1
Auxiliary A/D Converter Input 1

2

Set 19 AUX2 Auxiliary A/D Converter Input 2 20 AUX1 Auxiliary A/D Converter Input 1 2

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TSC2000

SBAS257

ELECTRICAL CHARACTERISTICS

At 40°C to +85°C, +V DD = +2.7V, internal V REF = +2.5V, conversion clock = 2MHz, 12-bit mode, unless otherwise noted.

     

TSC2000IPW

 

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

AUXILIARY ANALOG INPUT Input Voltage Range Input Capacitance Input Leakage Current

 

0

 

+V REF

V

25

pF

±1

µA

BATTERY MONITOR INPUT Input Voltage Range Input Voltage Range Input Capacitance Input Leakage Current Accuracy

VBAT1

0.5

 

6.0

V

VBAT2

0.5

3.0

V

25

pF

±1

µA

3

 

+3

%

TEMPERATURE MEASUREMENT Temperature Range Temperature Resolution Accuracy

 

40

 

+85

°C

0.3

°C

±2

°C

A/D CONVERTER Resolution No Missing Codes Integral Linearity Offset Error Gain Error Noise Power-Supply Rejection

Programmable: 8-, 10-, or 12-Bits 12-Bit Resolution

     

12

Bits

11

 

Bits

   

±2

LSB

±6

LSB

Excluding Reference Error

±6

LSB

30

 

µVrms

80

dB

D/A CONVERTER Output Current Range Resolution Integral Linearity

Set by Resistor from ARNG to GND

650

   

µA

 

8

Bits

±2

 

LSB

VOLTAGE REFERENCE

         

Voltage Range

Internal 2.5V

2.45

2.5

2.55

V

Internal 1.25V

1.225

1.25

1.275

V

Reference Drift External Reference Input Range Current Drain

20

ppm/°C

1.0

V

DD

V

External Reference

20

 

µA

DIGITAL INPUT/OUTPUT

         

Internal Clock Frequency Logic Family

8

MHz

CMOS

Logic Levels:

V

IH

I IH = +5µA

0.7V DD

V

V

IL

I IL = +5µA

0.3

0.3V DD

V

V

OH

I OH = 2 TTL Loads

0.8V DD

V

V

OL

I OL = 2 TTL Loads

0.4

V

POWER-SUPPLY REQUIREMENTS Power-Supply Voltage, +V DD Quiescent Current

Specified Performance See Note (1) See Note (2) Power Down

2.7

 

3.6

V

1.25

2.3

mA

 

500

µA

 

3

µA

TEMPERATURE RANGE Specified Performance

 

40

 

+85

°C

NOTES: (1) AUX1 conversion, no averaging, no REF power down, 50µs conversion. (2) AUX1 conversion, no averaging, external reference, 50µs conversion.

TSC2000

SBAS257

µ s conversion. (2) AUX1 conversion, no averaging, external reference , 50 µ s conversion. TSC2000

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3

TIMING CHARACTERISTICS (1)(2)

At 40°C to +85°C, +V DD = +2.7V, V REF = +2.5V, unless otherwise noted.

     

TSC2000

 

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

SCLK Period Enable Lead Time Enable Lag Time Sequential Transfer Delay Data Setup Time Data Hold Time (inputs) Data Hold Time (outputs) Slave Access Time Slave D OUT Disable Time DataValid Rise Time Fall Time

 

t

sck

30

   

ns

t

Lead

15

ns

 

t

Lag

15

ns

t

td

30

ns

t

su

10

ns

t

hi

10

ns

t

ho

0

ns

t

a

15

ns

t

dis

15

ns

t

v

10

ns

t

r

30

ns

t

f

30

ns

NOTES: (1) All input signals are specified with t r = t f = 5ns (10% to 90% of V DD ) and timed from a voltage level of (V IL + V IH )/2. (2) See timing diagram below.

TIMING DIAGRAM

All specifications typical at –40°C to +85°C, +V DD = +2.7V. SS t td t
All specifications typical at –40°C to +85°C, +V DD = +2.7V.
SS
t td
t Lag
t sck
t Lead
t f
t r
t wsck
SCLK
t wsck
t v
t ho
t dis
MISO
MSB OUT
BIT 6
1
LSB OUT
t a
t su
t hi
MOSI
MSB IN
BIT 6
1
LSB IN
ho t dis MISO MSB OUT BIT 6 1 LSB OUT t a t su t

4

ho t dis MISO MSB OUT BIT 6 1 LSB OUT t a t su t

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TSC2000

SBAS257

TYPICAL CHARACTERISTICS

At T A = +25°C, +V DD = +2.7V, conversion clock = 2MHz, 12-bit mode. Internal V REF = +2.5V, unless otherwise noted.

CONVERSION SUPPLY CURRENT vs TEMPERATURE (AUX1 Conversion, No Averaging, No REF Power-Down, 20µs Conversion)

2 1.95 1.9 1.85 1.8 1.75 –60 –40 –20 0 20 40 60 80 100
2
1.95
1.9
1.85
1.8
1.75
–60
–40
–20
0
20
40
60
80
100
I DD (mA)

Temperature (°C)

POWER-DOWN SUPPLY CURRENT vs SUPPLY VOLTAGE

0.12 0.11 0.1 0.09 0.08 0.07 0.06 2.5 2.7 2.9 3.1 3.3 3.5 3.7 Power-Down
0.12
0.11
0.1
0.09
0.08
0.07
0.06
2.5
2.7 2.9
3.1
3.3
3.5
3.7
Power-Down Current (nA)

Supply Voltage (V)

POWER-DOWN SUPPLY CURRENT vs TEMPERATURE

7 6 5 4 3 2 1 0 –60 –40 –20 0 20 40 60
7
6
5
4
3
2
1
0
–60
–40
–20
0
20
40
60
80
100
I DD (nA)

Temperature (°C)

INTERNAL OSCILLATOR FREQUENCY vs V DD

8.3 8.25 8.2 8.15 8.1 8.05 8 7.95 7.9 7.85 7.8 2.5 2.7 2.9 3.1
8.3
8.25
8.2
8.15
8.1
8.05
8
7.95
7.9
7.85
7.8
2.5
2.7
2.9
3.1
3.3
3.5
3.7
Internal Oscillator Frequency (MHz)

V DD (V)

CHANGE IN GAIN ERROR vs TEMPERATURE

0.5 0.4 0.3 0.2 0.1 0 –0.1 –0.2 –0.3 –0.4 –0.5 –60 –40 –20 0
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
–60
–40
–20
0
20
40
60
80
100
Change in Gain Error (LSB)

Temperature (°C)

CHANGE IN OFFSET ERROR vs TEMPERATURE

0.5 0.4 0.3 0.2 0.1 0 –0.1 –0.2 –0.3 –0.4 –0.5 –60 –40 –20 0
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
–60
–40
–20
0
20
40
60
80
100
Change in Offset (LSB)

Temperature (°C)

TSC2000

SBAS257

–60 –40 –20 0 20 40 60 80 100 Change in Offset (LSB) Temperature ( °

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5

TYPICAL CHARACTERISTICS (Cont.)

At T A = +25°C, +V DD = +2.7V, conversion clock = 2MHz, 12-bit mode. Internal V REF = +2.5V, unless otherwise noted.

INTERNAL REFERENCE vs TEMPERATURE

2.55 1.275 2.54 1.27 2.53 1.265 1.25V Reference 2.52 1.26 2.51 1.255 2.5 1.25 2.5V
2.55
1.275
2.54
1.27
2.53
1.265
1.25V Reference
2.52
1.26
2.51
1.255
2.5
1.25
2.5V Reference
2.49
1.245
2.48
1.24
2.47
1.235
2.46
1.23
2.45
1.225
–60
–40
–20
0
20
40
60
80
100
V REF (V)
V REF (V)
V REF (V)

Temperature (°C)

INTERNAL OSCILLATOR FREQUENCY vs TEMPERATURE

2.55

2.54

2.53

2.52

2.51

2.5

2.49

2.48

2.47

2.46

2.45

INTERNAL REFERENCE vs V DD

1.275 1.27 1.265 1.26 1.25V Reference 1.255 1.25 2.5V Reference 1.245 1.24 1.235 1.23 1.225
1.275
1.27
1.265
1.26
1.25V Reference
1.255
1.25
2.5V Reference
1.245
1.24
1.235
1.23
1.225
2.5
2.7
2.9
3.1
3.3
3.5
3.7
V REF (V)

V DD (V)

TOUCHSCREEN DRIVER ON-RESISTANCE vs TEMPERATURE

8.4 8 7.5 8.2 7 8 6.5 7.8 6 5.5 7.6 5 7.4 4.5 7.2
8.4
8
7.5
8.2
7
8
6.5
7.8
6
5.5
7.6
5
7.4
4.5
7.2
4
–60
–40
–20
0
20
40
60
80
100
–60
–40
–20
0
20
40 60
80
100
Temperature (°C)
Temperature (°C)
Internal Oscillator Frequency (MHz)
Resistance (Ω)

TOUCH SCREEN DRIVER ON-RESISTANCE vs V DD

7 6.9 6.8 6.7 6.6 6.5 6.4 6.3 6.2 6.1 2.5 2.7 2.9 3.1 3.3
7
6.9
6.8
6.7
6.6
6.5
6.4
6.3
6.2
6.1
2.5
2.7
2.9
3.1
3.3
3.5
3.7
On-Resistance (Ω)

Supply Voltage (V)

TEMP1 DIODE VOLTAGE vs TEMPERATURE

800 750 700 650 600 550 500 450 400 –60 –40 –20 0 20 40
800
750
700
650
600
550
500
450
400
–60
–40
–20
0
20
40 60
80
100
Voltage (mV)

Temperature (°C)

6

500 450 400 –60 –40 –20 0 20 40 60 80 100 Voltage (mV) Temperature (

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TSC2000

SBAS257

TYPICAL CHARACTERISTICS (Cont.)

At T A = +25°C, +V DD = +2.7V, conversion clock = 2MHz, 12-bit mode. Internal V REF = +2.5V, unless otherwise noted.

TEMP2 DIODE VOLTAGE vs TEMPERATURE

900 800 700 600 500 –60 –40 –20 0 20 40 60 80 100 Voltage
900
800
700
600
500
–60
–40
–20
0
20
40
60
80
100
Voltage (mV)

Temperature (°C)

TEMP2 DIODE VOLTAGE vs V DD

740 738 736 734 732 730 728 726 724 722 720 2.5 2.7 2.9 3.1
740
738
736
734
732
730
728
726
724
722
720
2.5
2.7
2.9
3.1
3.3
3.5
3.7
Temp2 Voltage (mV)

V DD (V)

TEMP1 DIODE VOLTAGE vs V DD

612.0 611.8 611.6 611.4 611.2 611.0 610.8 610.6 610.4 610.2 610.0 2.5 2.7 2.9 3.1
612.0
611.8
611.6
611.4
611.2
611.0
610.8
610.6
610.4
610.2
610.0
2.5
2.7
2.9
3.1
3.3
3.5
3.7
TEMP1 Voltage (mV)

V DD (V)

DAC OUTPUT CURRENT vs TEMPERATURE

1 0.95 0.9 0.85 0.8 0.75 0.7 0.65 0.6 –60 –40 –20 0 20 40
1
0.95
0.9
0.85
0.8
0.75
0.7
0.65
0.6
–60
–40
–20
0
20
40
60
80
100
DAC Output Current (mA)

Temperature (°C)

DAC MAX CURRENT vs V DD

0.91 0.905 0.9 0.895 0.89 0.885 0.88 0.875 2.5 2.7 2.9 3.1 3.3 3.5 3.7
0.91
0.905
0.9
0.895
0.89
0.885
0.88
0.875
2.5
2.7
2.9
3.1
3.3
3.5
3.7
DAC Output Current (mA)

TSC2000

SBAS257

V DD (V)

0.885 0.88 0.875 2.5 2.7 2.9 3.1 3.3 3.5 3.7 DAC Output Current (mA) TSC2000 SBAS257

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7

OVERVIEW

The TSC2000 is an analog interface circuit for human inter- face devices. A register-based architecture eases integration with microprocessor-based systems through a standard SPI bus. All peripheral functions are controlled through the reg- isters and onboard state machines.

The TSC2000 consists of the following blocks (refer to the block diagram on the front page):

Touch Screen Interface

Battery Monitors

Auxiliary Inputs

Temperature Monitor

Current Output D/A Converter

Communication to the TSC2000 is via a standard SPI serial interface. This interface requires that the Slave Select signal be driven LOW to communicate with the TSC2000. Data is then shifted into or out of the TSC2000 under control of the host microprocessor, which also provides the serial data clock.

Control of the TSC2000 and its functions is accomplished by writing to different registers in the TSC2000. A simple com- mand protocol is used to address the 16-bit registers. Reg- isters control the operation of the A/D converter and D/A converter.

The result of measurements made will be placed in the TSC2000s memory map and may be read by the host at any time. Three signals are available from the TSC2000 to indicate

that data is available for the host to read. The DAV output indicates that an A/D conversion has completed and that data

is available. The PENIRQ output indicates that a touch has been detected on the touch screen. A typical application of the TSC2000 is shown in Figure 1.

+2.7V to +3.3V Voltage Regulator 1µF LCD Contrast + to 0.1µF 10µF TSC2000 (Optional) 1
+2.7V to +3.3V
Voltage
Regulator
1µF
LCD Contrast
+
to
0.1µF
10µF
TSC2000
(Optional)
1
AUX1
20
Auxiliary Input
+V DD
2
X+ AUX2
19
Auxiliary Input
3
Y+ ARNG
18
Touch
4
X–
17
A OUT
Screen
5
Y– PENIRQ
16
Pen Interrupt Request
6
GND MISO
15
Serial Data Out
7
V
DAV
14
Data Available
BAT1
8
V
MOSI
13
Serial Data In
BAT2
1µF
9
V
SS
12
Slave Select
REF
+
to
0.1µF
10µF
10
NC SCLK
11
Serial Clock
(Optional)
Main
Secondary
RRNG
Battery
Battery

FIGURE 1. Typical Circuit Configuration.

8

(Optional) Main Secondary RRNG Battery Battery FIGURE 1. Typical Circuit Configuration. 8 www.ti.com TSC2000 SBAS257

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TSC2000

SBAS257

OPERATIONTOUCH SCREEN

A resistive touch screen works by applying a voltage across

a resistor network and measuring the change in resistance at

a given point on the matrix where a screen is touched by an

input stylus, pen, or finger. The change in the resistance ratio marks the location on the touch screen.

The TSC2000 supports the resistive 4-wire configurations (see Figure 1). The circuit determines location in two coordi- nate pair dimensions, although a third dimension can be added for measuring pressure.

THE 4-WIRE TOUCH SCREEN COORDINATE PAIR MEASUREMENT

A 4-wire touch screen is constructed as shown in Figure 2.

It consists of two transparent resistive layers separated by insulating spacers.

Conductive Bar Transparent Transparent Conductor (ITO) Conductor (ITO) Top Side Bottom Side Y+ X+ Silver
Conductive Bar
Transparent
Transparent
Conductor (ITO)
Conductor (ITO)
Top Side
Bottom Side
Y+
X+
Silver
Ink
X–
Y–
Insulating
Material
(Glass)
ITO = Indium Tin Oxide

FIGURE 2. 4-Wire Touch Screen Construction.

The 4-wire touch screen panel works by applying a voltage across the vertical or horizontal resistive network. The A/D converter converts the voltage measured at the point the panel is touched. A measurement of the Y-position of the pointing device is made by connecting the X+ input to a data converter chip, turning on the Y+ and Ydrivers, and digitizing the voltage seen at the X+ input. The voltage measured is determined by the voltage divider developed at the point of touch. For this measurement, the horizontal panel resistance in the X+ lead does not affect the conver- sion due to the high input impedance of the A/D converter.

Voltage is then applied to the other axis, and the A/D converter converts the voltage representing the X-position on the screen. This provides the X- and Y-coordinates to the associated processor.

Measuring touch pressure (Z) can also be done with the TSC2000. To determine pen or finger touch, the pressure of the touchneeds to be determined. Generally, it is not necessary to have very high performance for this test, there-

fore, the 8-bit resolution mode is recommended (however, calculations will be shown with the 12-bit resolution mode). There are several different ways of performing this measure- ment. The TSC2000 supports two methods. The first method requires knowing the X-plate resistance, measurement of the X-position, and two additional cross panel measurements (Z 2 and Z 1 ) of the touch screen, as seen in Figure 3. Using Equation 1 will calculate the touch resistance:

X-Position  Z 2 R = R • –1 TOUCH X-Plate    
X-Position  Z
2
R
= R
–1
TOUCH
X-Plate
  (1)
4096
 Z
1
Measure X-Position
X+
Y+
Touch
X-Position
X–
Y–
Measure Z 1 -Position
X+
Y+
Touch
Z
1 -Position
X–
Y–

Measure Z 2 -Position

X+ Y+ Touch Z 2 -Position X– Y– FIGURE 3. Pressure Measurement.
X+
Y+
Touch
Z
2 -Position
X–
Y–
FIGURE 3. Pressure Measurement.

The second method requires knowing both the X-plate and Y-plate resistance, measurement of X-position and Y-posi- tion, and Z 1 . Using Equation 2 will also calculate the touch resistance:

(2)

R

=

R

X-Position 4096

1

R

Y-Position

 

TOUCH

X-Plate

4096

Z

1

 

Y

-Plate

4096

When the touch panel is pressed or touched, and the drivers to the panel are turned on, the voltage across the touch panel will often overshoot and then slowly settle (decay) down to a stable DC value. This is due to mechanical bouncing which is caused by vibration of the top layer sheet of the touch panel when the panel is pressed. This settling time must be accounted for, or else the converted value will be in error. Therefore, a delay must be introduced between the time the driver for a particular measurement is turned on, and the time measurement is made.

TSC2000

SBAS257

time the driver for a particular measurement is turned on, and the time measurement is made.

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9

In some applications, external capacitors may be required

across the touch screen for filtering noise picked up by the touch screen; i.e., noise generated by the LCD panel or

back-light circuitry. The value of these capacitors will provide

a low-pass filter to reduce the noise, but will cause an

additional settling time requirement when the panel is touched.

Several solutions to this problem are available in the TSC2000.

A programmable delay time is available which sets the delay

between turning the drivers on and making a conversion.

This is referred to as the Panel Voltage Stabilization time, and is used in some of the modes available in the TSC2000.

In other modes, the TSC2000 can be commanded to turn on

the drivers only without performing a conversion. Time can

then be allowed before a conversion is started.

The TSC2000 touch screen interface can measure position (X and Y) and pressure (Z). Determination of these coordinates is possible under three different modes of the A/D converter:

conversion controlled by the TSC2000, initiated by detection of a touch; conversion controlled by the TSC2000, initiated by the

host responding to the PENIRQ signal; or conversion com- pletely controlled by the host processor.

A/D CONVERTER

The analog inputs of the TSC2000 are shown in Figure 4. The analog inputs (X, Y, and Z touch panel coordinates, battery voltage monitors, chip temperature, and auxiliary inputs) are provided via a multiplexer to the Successive Approximation Register (SAR) A/D converter. The A/D converter architecture is based on capacitive redistribution architecture which inher- ently includes a sample-and-hold function.

+V DD V REF TEMP1 TEMP0 X+ X– Ref ON/OFF Y+ +REF +IN Y– Converter
+V DD
V REF
TEMP1
TEMP0
X+
X–
Ref ON/OFF
Y+
+REF
+IN
Y–
Converter
–IN
2.5V
–REF
Reference
7.5kΩ
V
BAT1
2.5kΩ
V
BAT2
2.5kΩ
2.5kΩ
Battery
Battery
On
On
AUX1
AUX2
GND
FIGURE 4. Simplified Diagram of the Analog Input Section.
TSC2000
10
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SBAS257

A unique configuration of low on-resistance switches allows an unselected A/D converter input channel to provide power and an accompanying pin to provide ground for driving the touch panel. By maintaining a differential input to the con- verter and a differential reference input architecture, it is possible to negate errors caused by the driver switch on- resistances.

The A/D converter is controlled by an A/D Converter Control Register. Several modes of operation are possible, depend- ing upon the bits set in the control register. Channel selec- tion, scan operation, averaging, resolution, and conversion rate may all be programmed through this register. These modes are outlined in the sections below for each type of analog input. The results of conversions made are stored in the appropriate result register.

Data Format

The TSC2000 output data is in Straight Binary format, as shown in Figure 5. This figure shows the ideal output code for the given input voltage and does not include the effects of offset, gain, or noise.

FS = Full-Scale Voltage = V REF (1) 1LSB = V REF (1) /4096

1LSB 11 111 11 110 11 101 00 010 00 001 00 000 0V FS
1LSB
11
111
11
110
11
101
00
010
00
001
00
000
0V
FS – 1LSB
Output Code

Input Voltage (2) (V)

NOTES: (1) Reference voltage at converter: +REF (REF). See Figure 4. (2) Input voltage at converter, after multiplexer: +IN (IN). See Figure 4.

FIGURE 5. Ideal Input Voltages and Output Codes.

Reference

The TSC2000 has an internal voltage reference that can be set to 1.25V or 2.5V, through the Reference Control Register.

The internal reference voltage is only used in the single- ended mode for battery monitoring, temperature measure- ment, and for utilizing the auxiliary inputs. Optimal touch screen performance is achieved when using a ratiometric conversion, thus all touch screen measurements are done automatically in the differential mode. An external reference can also be applied to the V REF pin, and the internal refer- ence can be turned off.

Variable Resolution

The TSC2000 provides three different resolutions for the A/D converter: 8-, 10-, or 12-bits. Lower resolutions are often practical for measurements such as touch pressure. Perform-

ing the conversions at lower resolutions reduces the amount of time it takes for the A/D converter to complete its conversion process, which lowers power consumption.

Conversion Clock and Conversion Time

The TSC2000 contains an internal 8MHz clock, which is used to drive the state machines inside the device that perform the many functions of the part. This clock is divided down to provide a clock to run the A/D converter. The division ratio for this clock is set in the A/D Converter Control Register. The ability to change the conversion clock rate allows the user to choose the optimal value for resolution, speed, and power. If the 8MHz clock is used directly, the A/D converter is limited to 8-bit resolution; using higher resolutions at this speed will not result in accurate conversions. Using a 4MHz conversion clock is suitable for 10-bit resolution; 12-bit resolution requires that the conversion clock run at 1MHz or 2MHz.

Regardless of the conversion clock speed, the internal clock will run nominally at 8MHz. The conversion time of the TSC2000 is dependent upon several functions. While the conversion clock speed plays an important role in the time it takes for a conversion to complete, a certain number of internal clock cycles is needed for proper sampling of the signal. Moreover, additional times, such as the Panel Voltage Stabilization time, can add significantly to the time it takes to perform a conversion. Conversion time can vary depending upon the mode in which the TSC2000 is used. Throughout this data sheet, internal and conversion clock cycles will be used to describe the times that many functions take. In considering the total system design, these times must be taken into account by the user.

Touch Detect

The pen interrupt (PENIRQ) output function is detailed in Figure 6. While in the power-down mode, the Ydriver is ON

and connected to GND and the PENIRQ output is connected

to the X+ input. When the panel is touched, the X+ input is PENIRQ V
to the X+ input. When the panel is touched, the X+ input is
PENIRQ
V DD
V DD
TEMP1
TEMP2
50kΩ
Y+
HIGH Except
when TEMP1,
TEMP2 Activated
TEMP
DIODE
X+
Y–
ON

Y+ or X+ Drivers On, or TEMP1, TEMP2 Measurements Activated.

FIGURE 6. PENIRQ Functional Block Diagram.

TSC2000

SBAS257

On, or TEMP1, TEMP2 Measurements Activated. FIGURE 6. PENIRQ Functional Block Diagram. TSC2000 SBAS257 www.ti.com 11

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11

pulled to ground through the touch screen and PENIRQ output goes LOW due to the current path through the panel to GND, initiating an interrupt to the processor. During the measurement cycles for the X- and Y-positions, the X+ input

will be disconnected from the PENIRQ pull-down transistor to eliminate any leakage current from the pull-up resistor to flow through the touch screen, thus causing no errors.

In

modes where the TSC2000 needs to detect if the screen

is

still touched (for example, when doing a PENIRQ-initiated

X,

Y, and Z conversion), the TSC2000 must reset the drivers

so that the 50kresistor is connected again. Due to the high value of this pull-up resistor, any capacitance on the touch screen inputs will cause a long delay time, and may prevent the detection from occurring correctly. To prevent this, the

TSC2000 has a circuit which allows any screen capacitance

to be precharged, so that the pull-up resistor doesnt have

to be the only source for the charging current. The time allowed for this precharge, as well as the time needed to sense if the screen is still touched, can be set in the Configuration Control register.

This illustrates the need to use the minimum capacitor values possible on the touch screen inputs. These capacitors may be needed to reduce noise, but too large a value will increase the needed precharge and sense times, as well as panel voltage stabilization time.

DIGITAL INTERFACE

The TSC2000 communicates through a standard SPI bus. The SPI allows full-duplex, synchronous, serial communica- tion between a host processor (the master) and peripheral devices (slaves). The SPI master generates the synchroniz- ing clock and initiates transmissions. The SPI slave devices depend on a master to start and synchronize transmissions.

A transmission begins when initiated by a master SPI. The

byte from the master SPI begins shifting in on the slave MOSI pin under the control of the master serial clock. As the byte shifts in on the MOSI pin, a byte shifts out on the MISO pin to the master shift register.

The idle state of the serial clock for the TSC2000 is LOW, which corresponds to a clock polarity setting of 0 (typical microprocessor SPI control bit CPOL = 0). The TSC2000 interface is designed so that with a clock phase bit setting of 1 (typical microprocessor SPI control bit CPHA = 1), the master begins driving its MOSI pin and the slave begins

driving its MISO pin on the first serial clock edge. The SS pin should idle HIGH between transmissions. The TSC2000 will only interpret command words which are transmitted after the

falling edge of SS.

TSC2000 COMMUNICATION PROTOCOL

The TSC2000 is entirely controlled by registers. Reading and writing these registers is accomplished by the use of a 16-bit command, which is sent prior to the data for that register. The command is constructed as shown in Table I.

The command word begins with a R/W bit, which specifies the direction of data flow on the serial bus. The following four bits specify the page of memory this command is directed to, as shown in Table II. The next six bits specify the register address on that page of memory to which the data is directed. The last five bits are reserved for future use.

PG3

PG2

PG1

PG0

PAGE ADDRESSED

 

00

0

0

0

00

0

1

1

0

0

1

0

Reserved

0

0

1

1

Reserved

0

1

0

0

Reserved

0

1

0

1

Reserved

0

1

1

0

Reserved

0

1

1

1

Reserved

1

0

0

0

Reserved

1

0

0

1

Reserved

1

0

1

0

Reserved

1

0

1

1

Reserved

1

1

0

0

Reserved

1

1

0

1

Reserved

1

1

1

0

Reserved

1

1

1

1

Reserved

TABLE II. Page Addressing.

MSB

                           

LSB

BIT 15

BIT 14

BIT 13

BIT 12

BIT 11

BIT 10

BIT 9

BIT 8

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

R/W

PG3

PG2

PG1

PG0

ADDR5

ADDR4

ADDR3

ADDR2

ADDR1

ADDR0

X

X

X

X

X

TABLE I. TSC2000 Command Word.

12

ADDR3 ADDR2 ADDR1 ADDR0 X X X X X TABLE I. TSC2000 Command Word. 1 2

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TSC2000

SBAS257

To read all the first page of memory, for example, the host processor must send the TSC2000 the command 8000 H this specifies a read operation beginning at Page 0, Address 0. The processor can then start clocking data out of the TSC2000. The TSC2000 will automatically increment its address pointer to the end of the page; if the host processor continues clocking data out past the end of a page, the TSC2000 will simply send back the value FFFF H .

Likewise, writing to Page 1 of memory would consist of the processor writing the command 0800 H , which would specify a write operation, with PG0 set to 1, and all the ADDR bits set to 0. This would result in the address pointer pointing at the first location in memory on Page 1. See the TSC2000 Memory Map section for details of register locations. Figure 7 shows an example of a complete data transaction between the host processor and the TSC2000.

TSC2000 MEMORY MAP

The TSC2000 has several 16-bit registers which allow control of the device as well as providing a location for results from the TSC2000 to be stored until read by the host microprocessor. These registers are separated into two pages of memory in the TSC2000: a Data page (Page 0) and a Control page (Page 1). The memory map is shown in Table III.

PAGE 0: DATA REGISTERS

PAGE 1: CONTROL REGISTERS

ADDR

REGISTER

ADDR

REGISTER

00

X

00

ADC

01

Y

01

Reserved

02

Z

1

02

DACCTL

03

Z

2

03

REF

04

Reserved

04

RESET

05

BAT1

05

CONFIG

06

BAT2

06

Reserved

07

AUX1

07

Reserved

08

AUX2

08

Reserved

09

TEMP1

09

Reserved

0A

TEMP2

0A

Reserved

0B

DAC

0B

Reserved

0C

Reserved

0C

Reserved

0D

Reserved

0D

Reserved

0E

Reserved

0E

Reserved

0F

Reserved

0F

Reserved

10

ZERO

10

Reserved

11

Reserved

11

Reserved

12

Reserved

12

Reserved

13

Reserved

13

Reserved

14

Reserved

14

Reserved

15

Reserved

15

Reserved

16

Reserved

16

Reserved

17

Reserved

17

Reserved

18

Reserved

18

Reserved

19

Reserved

19

Reserved

1A

Reserved

1A

Reserved

1B

Reserved

1B

Reserved

1C

Reserved

1C

Reserved

1D

Reserved

1D

Reserved

1E

Reserved

1E

Reserved

1F

Reserved

1F

Reserved

TABLE III. TSC2000 Memory Map.

Write Operation Read Operation SS SCLK MOSI Command Word Data Command Word MISO Data Data
Write Operation
Read Operation
SS
SCLK
MOSI
Command Word
Data
Command Word
MISO
Data
Data

FIGURE 7. Write and Read Operation of TSC2000 Interface.

TSC2000

SBAS257

Command Word MISO Data Data FIGURE 7. Write and Read Operation of TSC2000 Interface. TSC2000 SBAS257

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13

TSC2000 CONTROL REGISTERS

This section will describe each of the registers that were shown in the memory map of Table III. The registers are grouped according to the function they control. Note that in

the TSC2000, bits in control registers may refer to slightly different functions depending upon if you are reading the register or writing to it. A summary of all registers and bit locations is shown in Table IV.

                                     

RESET

ADDR

REGISTER

VALUE

PAGE

(HEX)

NAME

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

(HEX)

0

00

X

0

0

0

0

R11

R10

R9

R8

R7

R6

R5

R4

R3

R2

R1

R0

0000

0

01

Y

0

0

0

0

R11

R10

R9

R8

R7

R6

R5

R4

R3

R2

R1

R0

0000

0

02

Z

1

0

0

0

0

R11

R10

R9

R8

R7

R6

R5

R4

R3

R2

R1

R0

0000

0

03

Z

2

0

0

0

0

R11

R10

R9

R8

R7

R6

R5

R4

R3

R2

R1

R0

0000

0

04

Reserved

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0000

0

05

BAT1

0

0

0

0

R11

R10

R9

R8

R7

R6

R5

R4

R3

R2

R1

R0

0000

0

06

BAT2

0

0

0

0

R11

R10

R9

R8

R7

R6

R5

R4

R3

R2

R1

R0

0000

0

07

AUX1

0

0

0

0

R11

R10

R9

R8

R7

R6

R5

R4

R3

R2

R1

R0

0000

0

08

AUX2

0

0

0

0

R11

R10

R9

R8

R7

R6

R5

R4

R3

R2

R1

R0

0000

0

09

TEMP1

0

0

0

0

R11

R10

R9

R8

R7

R6

R5

R4

R3

R2

R1

R0

0000

0

0A

TEMP2

0

0

0

0

R11

R10

R9

R8

R7

R6

R5

R4

R3

R2

R1

R0

0000

0

0B

DAC

X

X

X

X

X

X

X

X

D7

D6

D5

D4

D3

D2

D1

D0

007F

0

0C

Reserved

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

FFFF

0

0D

Reserved

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

FFFF

0

0E

Reserved

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

FFFF

0

0F

Reserved

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

FFFF

0

10

ZERO

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0000

0

11

Reserved

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

FFFF

0

12

Reserved

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

FFFF

0

13

Reserved

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

FFFF

0

14

Reserved

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

FFFF

0

15

Reserved

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

FFFF

0

16

Reserved

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

FFFF

0

17

Reserved

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

FFFF

0

18

Reserved

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

FFFF

0

19

Reserved

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

FFFF

0

1A

Reserved

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

FFFF

0

1B

Reserved

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

FFFF

0

1C

Reserved

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

FFFF

0

1D

Reserved

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

FFFF

0

1E

Reserved

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

FFFF

0

1F

Reserved

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

FFFF

1

00

ADC

PSM

STS

AD3

AD2

AD1

AD0

RS1

RS0

AV1

AV0

CL1

CL0

PV2

PV1

PV0

x

4000

1

01

Reserved

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

4000

1

02

DACCTL

DPD

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

8000

1

03

REF

X

X

X

X

X

X

X

X

X

X

X

INT

DL1

DL0

PND

RFV

0002

1

04

RESET

1

0

1

1

1

0

1

1