CURRICULUM VITAE

SHIVARUDRAIAH. B S/O Basavarajaiah. B. S Byandahalli, Kadabagere Post, Bangalore North Thaluk PIN: 562130

E-mail: shiv2byn@gmail.com Mobile: +91-9482138388

CARRIER OBJECTIVE To work on innovative solutions by applying and developing my technical skills as a software professional with gifted colleagues in an environment that builds and rewards creative thinking and teamwork. EDUCATIONAL QUALIFICATION Name of the Name Name of the Institution Course M. Tech [VLSI Design & Embedded Systems] B. E [Electronics and Communication] Dr. Ambedkar Institute of Technology, Bangalore East West Institute of Technology, Bangalore K.L.E'S Independent PreUniversity College, Bangalore St. Chistys High School , Bangalore University Visveswaraiah Technological University, Belgaum Visveswaraiah Technological University, Belgaum Karnataka PreUniversity Board Year of passing 2010 Aggregate percentage 76.88%

2008

69.96%

Pre-University course

2004

80.83%

SSLC

K.S.E.E. Board

2002

84.16%

TECHNICAL SKILLS Hardware Programming Software Programming Verilog HDL, Microprocessor 8085, 8086 Microcontroller 8051. Basics of C, C++. MAJOR SUBJECTS STUDIED Basic Electronics, Logic Design, Analog & Digital Communication, Embedded system design, Synthesis & Optimization of digital circuits, CMOS VLSI design, and CMOS RF circuit design. WORKSHOP ATTENDED Front end Verilog and front end design Verification PROJECTS Project Name: Implementation of a Multi-channel UART Controller Based on FIFO Technique and FPGA Description: To meet modern complex control systems communication demands, we

need to go for designing a multi-channel UART controller based on FIFO(First In First Out) technique and FPGA(Field Programmable Gate Array). It includes the design of asynchronous FIFO and structure of the controller. This controller is designed with FIFO circuit block and UART (Universal Asynchronous Receiver Transmitter) circuit block within FPGA to implement communication in modern complex control systems quickly and effectively. Form the communication sequence diagrams; it is easily to know that this controller can be used to implement communication when master equipment and slaver equipment are set at different Baud Rate. It also can be used to reduce synchronization error between sub-systems in a system with several sub-systems. The controller is reconfigurable and scalable. Keywords: FIFO, FPGA, UART. Project Name: Advanced ATM Monitoring System Description: This is an automation system for the ATM which also enhances the security functions at ATM center. This automation system will have installation feature which

will remove the human intervention in switching ON/OFF the lights both inside and outside of ATM center which would result in power saving. Software: Embedded C, Keil. PERSONAL PROFILE Date of Birth Sex Nationality Languages Known Strengths Hobbies : 28-08-1987 : Male : Indian : English, Kannada, and Hindi : Team player, Integrity, Good communication skills : Following all kinds of sports, participating in extra curricular

activities like quiz competition, listening to music etc

DECLARATION I here by declare that all the above details are true according to the best of my knowledge and belief.

Place: Date: [Shivarudraiah. B]