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A Novel Analog Autocalibrating Phase-Voltage Converter for Signal Phase-Shifting Detection

Andrea De Marcellis, Giuseppe Ferri, Senior Member, IEEE, and Elia Palange

AbstractIn this study, we present a novel analog read-out circuit, operating a phase-voltage conversion, suitable for the detection of signal phase shifting for micro- and nano-sensor system applications. Its main characteristics are the following: good linearity in the considered phase-shift range, capability of phase sign detection, independence from input signal amplitudes, setting and zeroing of the offset, autocalibration, high sensitivity and resolution, and high accuracy and precision. For these reasons and, in particular, thanks to its simple internal topology, the developed circuit can be considered as a suitable analog interface for portable measurement systems. Experimental results, achieved through a laboratory breadboard and using sample signals, have conrmed, with respect to the other solutions reported in literature, better linearity, higher sensitivity (equal to about 37 mV/degree in the 90 phase-shift range) and resolution (lower than 0.1 in the same phase-shift range) for both positive and negative phase variations. When a more reduced phase-shift range must be detected (i.e., for optical sensor applications), it is possible to set the circuit parameters to further increase sensitivity and resolution. Index TermsAutocalibrating analog circuit, optical sensor, phase detection, phase shifting, phase-voltage converter.

I. INTRODUCTION HE development in sensor environment of miniaturized integrated electronic circuits and the progress in microelectronic technology have led to the advancement of complete system integration on a single chip, the so-called system-onchip (SoC). Such single-chip solutions can include both analog and digital electronic circuits which implement the sensor interface and the system elaboration capability as well [1][5]. Consequently, the development of accurate electronic topologies as rst front-end circuits, suitable for different types of sensors, is one of the recent aims in analog micro- and nano-electronics design [6][13]. In this regard, the latest advances in nanotechnology have made possible the miniaturization of several active and passive devices [14][16]. In particular, the design and fabrication of Si-based nano-sensors require to reduce, as much as possible, the silicon area of the electronic circuitry employed for signal detection and processing. Moreover, signals from microand nano-sensors have, generally, very small amplitudes even

Manuscript received April 29, 2010; accepted May 21, 2010. Date of publication June 10, 2010; date of current version November 17, 2010. The associate editor coordinating the review of this manuscript and approving it for publication was Prof. Kiseon Kim. The authors are with the Department of Electrical and Information Engineering, University of LAquila, LAquila 67100, Italy (e-mail: andrea.demarcellis@univaq.it; giuseppe.ferri@univaq.it; elia.palange@univaq. it). Digital Object Identier 10.1109/JSEN.2010.2052032

buried into noise. In order to reduce and minimize the noise effects, the best solution, when the signal to reveal has a xed and well-known frequency, is the implementation of circuits based on the lock-in technique [17][27]. In this way, it is possible to reveal and measure the amplitude and/or phase variations (phase delay or phase shift) with high sensitivity and resolution. In particular, recently, some low cost, low-voltage, and low-power integrated analog lock-in ampliers have been proposed to reveal, in amplitude, low-level signals coming from sensors with a zero mean value [17][19]. However, these circuits do not measure the signal phase shift and require a power-on manual calibration procedure, avoiding their use in remote sensor networks which need front-end circuits operating in an autocalibrating mode (i.e., Plug & Play wireless sensor systems). For these purposes, in order to perform a phasevoltage conversion [28][35], we have designed and developed, on a breadboard with low-cost discrete commercial components, a simple autocalibrating circuit suitable for phase-shift detection in sensor interfacing and signal processing. In particular, we have implemented an analog electronic system which allows to detect the relative phase variation between input and reference signals having the same frequency and converting it into a dc voltage signal. The generated voltage level is independent from the signal amplitude variation and mean value, making the circuit suitable for any kind of input signal and waveform. The designed read-out circuit does not need any manual initial setting and/or operation because is capable to implement a phase detection loop for a complete autocalibration procedure of the measurement system. In order to compare the proconverter with other solutions reported in literposed ature, we have considered an operating phase-shift range be. We have tween the input and reference signals equal to proved that the circuit response shows a very good linear behavior and, depending on the specic application, it is possible to reduce or increase the phase shift range through simple circuit modications and suitable passive components redesign. The circuit operation has been validated through repeated experimental measurements employing arbitrary signals provided by programmable function generators. With respect to other solutions reported in literature, the proposed system reveals both positive and negative phase variations with a higher sensitivity and resolution by means of a simple and cheap front-end electronic circuitry. This paper is organized as follows. In Section II, a brief introduction on the new circuit for phase shift detection will be done. in Section III, the design of the proposed autocalibrating circuit for conversion will be described in some detail. Section IV will show some PSpice simulation results. In

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Fig. 1. Block scheme of the proposed circuit for the P V conversion.

Section V, experimental measurements will be reported and discussed. Finally, in Section VI, some conclusions will be given.

II. NOVEL ANALOG ELECTRONIC CIRCUIT FOR SIGNAL PHASE-SHIFTING EVALUATION Fig. 1 reports the block scheme of the proposed converter. It is composed by ve main circuits: a bandpass lter, a tuneable phase shifter, a phase-sensitive detector (PSD), a low-pass lter and a suitable feedback block. The designed circuit, based on a phase-detection technique, does not require any initial calibration and can be considered a Plug & Play system. The circuit is a converter, allowing the measurement of the relative phase and its variations between the and the reference signal , for any kind input signal of waveform and amplitude with the same operating frequency (the reference frequency). At the output node, the generated depends only on the phase difference dc voltage level and . between The circuit presents a very simple internal topology and shows the following main characteristics: very high sensitivity and resolution, with respect to the relative phase variation, easily settable through some passive components; complete autocalibration, obtained through a negative feedback conguration: the system does not require either manual initial setting or additional external calibrations; good noise immunity: since the designed system is based on a PSD, it benets of the positive characteristics typical of phase sensitive detection technique as in the lock-in amplier; very good linearity between dc output voltage and input phase difference both for smaller or higher input phase shifts; capability to reveal both negative and positive phase shifts; independence of dc output voltage from input and reference signal amplitudes; adjustable (or zeroing of) output voltage offset. Referring to Fig. 1, each circuit main block has been designed, at a discrete component level, in ORCAD PSpice environment, so to implement a solution suitable for its prototyping with commercial active and passive components. It is important to underline that the reference frequency can be chosen in the range from some hertz to hundreds of kilohertz being its

maximum value limited by the bandwidth of the available commercial operational ampliers (OAs) used for the circuit implementation. However, once the reference frequency is chosen, the bandpass lter (see Fig. 1) must be designed to be centred at this frequency. III. PROPOSED AUTOCALIBRATING PVC CIRCUIT DESIGN Fig. 2 reports the internal topology, at the block level, of the proposed system, implemented through the use of OAs as active components. Referring to this gure, the main blocks of the read-out circuit, which presents two main paths (the input and reference channels), are given as follows. A noninverting voltage buffer, implemented by an OA, which decouples the external analog signal from the same electronic interface. An active bandpass lter, which allows to provide to the next stage a cleaned sinusoidal voltage signal having a zero dc component (null voltage offset), starting from any . The bandpass lter kind of waveform of the voltage has been implemented by a multiple negative feedback and bandtopology whose central reference frequency are expressed by the following equations: width (1) (2) A PSD or mixer, implemented through a high-precision double half-wave voltage rectier, performing the following operative relationships: (3) Considering Fig. 2, into the PSD, the input signal is having the same multiplied with the reference signal and a phase shift equal to that between frequency and . and in the in-quadrature condiIn order to set tion, we have implemented a feedback block which properly controls six tunable phase shifters that act only on the . phase of A fourth-order passive low-pass lter, suitable for the extraction of the dc component (the mean value) of the signal generated by the PSD. This lter was implemented through

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Fig. 2. Internal topology of the proposed analog phase shift detector circuit implemented through operational ampliers. The block tunable phase shifter has been repeated for six blocks so to reveal an input phase shift equal to 90 .

four passive cells, in a cascaded conguration, whose cutoff frequency is (4) , , and . As mentioned before, in order to perform the conversion and, simultaneously, to develop an autocalibrating system, two further blocks have been designed. Feedback block, composed by an active integrator, generating a ramp voltage with either negative or positive slope . according to the sign of its input voltage Six tunable phase shifters (TPSs), controlled through a voltage signal generated by the previous feedback block, which allow to maintain a phase difference between the PSD input signals equal to 90 (in-quadrature signals). In this way, the mean value of the generated signal through the PSD is equal to zero (null dc component). The TPSs have been developed through the well-known OA-based phase-shifter topology, by substituting a passive element with a voltage controlled grounded impedance, impleand analog multipliers mented by capacitances . Each oating capacitor , combined with the corresponding analog multiplier , implements, in a feedback conguration, a tunable ground capacitor, [36]. The employed analog multiplier is the commercial discrete component AD633 by Analog Devices. The equivalent capacitance controlled by the system main output signal , for each TPS, is (5) being (see Fig. 2)

are the capacitors where tion of a single TPS is given by

. The transfer func-

(6) represents, for each block, the resistances . Depending on the values of the passive components, each TPS gives a specic phase shift equal to where (7) that is a nonlinear function of whose value is so to obtain the in-quadrachanged by the voltage ture condition. However, for small phase shifts, since , (7) becomes (8) and the consequent linearity range of the transfer function depends on the values of the passive components used in the TPS. Under these conditions, to achieve a linear phase shift transfer function of the circuit in the range, we used a cascade of six TPSs. was designed to reMoreover, a high-pass lter move any dc component since that also the AD633 introduces an output dc voltage offset. The complete reference channel has been designed to achieve a higher system dc output signal variation with respect to the relative phase shifting between the two and . signals The additional comparator/attenuator block is necessary since the PSD reference signal must to be a square-wave voltage signal, whose maximum amplitude has to be lower than 1 V. This condition is related to the particular implementation of the PSD circuit.

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Therefore, the open-loop inverting ground comparator (OA13) generates a saturated square-wave signal whose amplitude is about 15 V, i.e., the supply voltage of the circuit. The and ) reduces this amplitude resistive voltage divider ( to the required levels ( 1 V). A complete analysis of the converter (assuming ideal passive and active components) gives the following theoretical and input relationship between the dc output voltage (inverted transfer function): phase difference

TABLE I VALUES OF THE PASSIVE CIRCUIT COMPONENT

(9) is the number of the utilized TPSs and considering and . In (9), the rst term represents the total phase shift of the employed TPSs while the second and third terms are constant phase shifts due to the high-pass and the bandpass lters, respectively. We can now denitively resume the main circuit operation steps as follows. and provides the An input phase shift between and ; 2) variation of: 1) the phase difference between the low-pass lter output signal ; 3) the main dc output generated by the feedback block. signal signal acts also as the control voltage (through The the feedback connection) of the TPSs which opportunely signal at the PSD input with changes the phase of the signal. respect to the Therefore, through the feedback loop control, the TPSs provide the proper system operating conditions: and ; conin-quadrature PSD input signals sequently, a zero mean value of the output signal generated by the PSD and, nally, of at the low-pass lter output given by where (10) is the gain given by the PSD stage and is where and ; from (10), the the relative phase shift between circuit is now autocalibrated (the system has reached its equilibrium condition) because the phase difference between and is equal to 90 , independently from and amplitudes, and depends only the and . Note that on the input phase shift between autocalibration is obtained because the circuit presents the feedback connection between the feedback block and the TPSs. The closed loop is always working and follows any and during the phase shift occurring between circuit operation. phase shift range, it is With respect to the considered possible to use a reduced number of TPSs for lower phase shift

ranges, and this allows to increase the circuit sensitivity and resolution. This is the case, for example, of optical sensor applications that can employ the proposed converter. Employing, in fact, only a single TPSs, a phase variation between the input beand reference signals provides a higher variation of cause a larger control voltage variation for the TPS is required. can have Let us underline that, in principle, the signal any type of waveform. The circuit was, in fact, designed to be driven by a sinusoidal voltage. This does not represent a limitation, since it is possible to utilize, as reference, a square-wave or a pulse voltage signal. However, in these cases, it is necessary to properly modify the passive component values which implement the high-pass lter at the output terminal of the last or, alternatively, to employ another bandpass TPSs lter at the input terminal of the reference channel to obtain a sinusoidal voltage waveform, starting from the chosen reference signal. IV. ANALOG ELECTRONIC PHASE-DETECTOR CIRCUIT ANALYSIS: SIMULATION RESULTS Preliminary verications of the behavior of the proposed system functionalities have been conducted through several ORCAD PSpice simulations. After initial tests with different voltage waveforms having a null mean value, the system has been optimized to operate in a wide phase shift range, from to , which is typical of other solutions proposed equal to 77 Hz has been in literature. A working frequency chosen to avoid any interference with 50-Hz net frequency and its harmonics [19]. A sinusoidal wave, having an amplitude of 100 mV and a dc component (its mean value) equal to 100 mV, was utilized as input voltage signal of the system, while, for the reference signal, a second sinusoidal wave with an amplitude of 1 V and mean value equal to zero was employed. In Table I, the values of the passive components, that have voltage value (voltage offset) been chosen to set a zero [see (9)], are reported. Moreover, referring to (4), for Table I, and Fig. 2, the cutoff frequency of the low-pass lter was set to about 0.84 Hz. In order to simulate relative phase variations between the input and reference signals, a PSpice delay block was used in the input channel to achieve a time delay in the range 3.25 ms, cor. The simulations responding to a phase shifting of about

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Fig. 3. Simulation results concerning the PSD block. (a) Input V and reference V signals in-quadrature when the system is calibrated. b) Output signal V with zero mean value compared with the sinusoidal input V .

Fig. 5. Ongoing autocalibration of the system. (a) Main output signal V (b) Output of the low-pass lter V .

Fig. 4. Initial autocalibration of the system: the low-pass lter output V tends to zero and the main output signal V assumes a constant value.

have been conducted by varying the time delay with different steps corresponding to relative phase shifts. Fig. 3(a) shows the two signals at the PSD block inputs, while Fig. 3(b) reports the output signal generated by the same block, having a null mean value, compared with its input sinusoidal signal. Fig. 4 shows the two main output signals at the initial autocalibration time of the system (circuit power-on): the output tends to zero and the main output signal of the low-pass lter assumes a constant level so guaranteeing the in-quadrature phase condition between input and reference signals at the PSD block input. In particular, this simulation shows the circuit and signals have about time responses when of relative phase shift (time delay equal to 3.25 ms) and the

dc output voltage value tends to about 3.15 V. Fig. 5 shows the ongoing system behavior both in the initial autocalibration time and when a phase variation of about 46 (considering an absolute phase shift from 44 to 90 ) has been done, after 5 s from the circuit power-on. In these simulated conditions, reaches two different values proportionally to the relative phase V at 5 s and V at variations: 10 s [see Fig. 5(a)]. which Fig. 5(b) depicts the output of the low-pass lter tends to zero both initially (at the circuit power-on) and after and . the imposed change of the phase shift between Fig. 6 shows the simulated results for dc signal, as a function of the phase shift between the input and reference signals , compared with theoretical calculations obin the range tained using (9). According to this equation, through a simple linearization of the system response (TPSs are used in their linear ranges), the resulting circuit transfer function can be ex, that is pressed as ranging about in 3 V. As shown in Fig. 6, simuvalid for lation results are in very good agreement with theoretical calculations, conrming the validity of (9) and the expected behavior of the converter. V. EXPERIMENTAL MEASUREMENT RESULTS In order to achieve experimental results validating the circuit operation and the theoretical expectations, repeated measurements were conducted through the implementation of the designed circuit on a laboratory breadboard utilizing commercial discrete passive and active components. In particular, we have

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Fig. 6. Simulation results concerning the output of the system compared with theoretical calculations: generated output dc voltage signal versus the phase shift between input and reference signals in the range 90 .

Fig. 7. Experimental results on initial autocalibration at the power-on of the system: the dc output voltage signal (V ) of the low-pass lter tends to zero assumes a constant value depending on the and the main output signal V 6 . phase shift, which in this case is

18  0

used LF411 of National Semiconductors as OA and AD633 of Analog Devices as analog multiplier. The circuit has been tested by performing electrical measurements with conventional experimental apparatus and laboratory equipments. The sensitivity of the proposed circuit has been set, by an appropriate choice of the employed passive component values into the TPSs and feedback blocks, to about 37 mV/degree, consid. The conducted simulations, ering a phase shift range of testing and measurements have been performed with a circuit supply voltage equal to 15 V. For the TPSs, the control voltage cannot exceed 10 V to fulll the intrinsic characteristics of the active component (AD633) used to implement a grounded voltage-controlled capacitor (VCO) [36]. Consequently, the total output dynamic range of the designed circuit is equal to about 10 V. For these reasons, in the feedback block, a further passive resistive and in voltage divider (implemented by the resistors Fig. 2) has been inserted to limit the output voltage level of the in Fig. 2 introduces active integrator. Moreover, capacitor a further integrating operation of the generated signal so to guarantee the system stability. Measurements have been performed on the circuit by using a digital oscilloscope to evaluate the system behavior in the time . Refdomain and measure the dc output voltage signal erence and input voltages and the control of their relative phase shifts have been provided by two analog voltage function generators. In this way, two sinusoidal wave voltages have been gen77 Hz with an amplitude equal to erated at a frequency 100 mV for (with a 100-mV mean value) and 1 V for with a null mean value. Consequently, the input sinusoidal signal of the PSD, , comes from the active bandpass lter, , is the square-wave while the reference signal of the PSD, voltage generated by the comparator/attenuator block. Once the system accomplished the autocalibration procedure, these two signals become in-quadrature. Fig. 7 shows the typical responses of the voltage signals obtained during the experimental measurements at the main circuit output nodes. These results are in good agreement with both

Fig. 8. Experimental results, compared with theoretical calculations, concerning the variation of as a function of the relative phase shift between the input and reference signals in the phase variation range 90 .

the theoretical and simulation behavior reported in Fig. 4. Finally, Figs. 8 shows the experimental counterpart of the simulation results reported in Fig. 6, compared with the theoretical have been averaged calculations. The reported values of on ten consecutive measurements for each value of the signal phase shift. As for the simulation results, the experimental circuit sensitivity is equal to about 37 mV/degree. The measurements conrm the linear circuit response and are in very good agreement with both simulations (Fig. 6) and theoretical expectations. Moreover, considering the intrinsic circuitry-induced noise level, the circuit resolution was found to be lower than . 0.1 in the phase variation range of If linear t procedures are performed for the simulated (Fig. 6) and experimental data (Fig. 8), we nd the results reported in Table II for the angular and correlation coefcients for three different phase shift ranges. From the data reported in Table II, it comes that the correlation coefcients are always close to 1 even though the corresponding standard deviations increase with the phase shift range. These results agree with those reported in Figs. 6 and 8. More interesting are the data

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TABLE II DATA REGARDING THE ANGULAR AND CORRELATION COEFFICIENTS FOR THREE DIFFERENT PHASE-SHIFT RANGES, CALCULATED FROM THE LINEAR FIT PROCEDURES PERFORMED BOTH FOR THE SIMULATED (SEE FIG. 6) AND EXPERIMENTAL DATA (SEE FIG. 8)

TABLE III MAIN CIRCUIT CHARACTERISTICS AND COMPARISON WITH OTHER SOLUTIONS PROPOSED IN THE LITERATURE

of the angular coefcients that represent the circuit sensitivity that is approximately constant and the corresponding relative errors calculated from the standard deviations increase with the phase shift range from 0.2% to 1% and from 0.8% to 1.3% for the simulated and experimental data, respectively. Table III shows a comparative analysis of the main characteristics of some circuits for phase shift analysis as reported in literature. The comparison demonstrates that the proposed converter, showing a good linear response function, is the only one capable to perform an autocalibration procedure, the phase sign detection and the dc offset setting and zeroing. In particular, the autocalibration property makes it a suitable front-end for remote sensor networks, especially in the case of a system restart from a power-off network line event. The sensitivity of the proposed circuit, which is settable through a suitable choice of the passive component values, is constant and better range. than those of the other solutions in the considered VI. CONCLUSION In this paper, we have presented a novel autocalibrating phase-detector circuit able to reveal both positive and negative phase shifts between two signals of arbitrary waveforms. The proposed system employs a very simple internal topology capable to perform conversions by generating dc output signals independent from the input signal amplitudes, forms, and mean values. In particular, as an application, the system can be used also to measure the phase delay of pulsed signals coming from optical-based sensors used for physical and/or chemical characterizations and to reveal the presence of atomic or molecular compounds. Moreover, since several monitoring applications need physical and/or chemical sensors located in single chip array conguration, we believe that the presented analog converter can be easily integrated on the same chip because of its simple topology. In this sense, it can be regarded as a suitable front-end solution that shows high accuracy and

precision in the determination of the phase shifts. All of these features, together with the unique properties of the proposed circuit to have an autocalibrating procedure, foresee the possibility to fabricate miniaturized and low-cost integrated sensor systems for domestic and industrial portable measurement SoC applications. Future developments of the proposed converter may involve micro- and nano-photonic devices as well as the integration on-chip in a standard CMOS technology of the proposed circuit, after a suitable implementation of the active blocks at the transistor level. ACKNOWLEDGMENT The authors would like to thank F. Iorio and F. Mancini for their technical support during the theoretical analysis and experimental tests. DEDICATION The authors dedicate this work to the memory of the 308 people who lost their life April 6, 2009, as a consequence of the cruel earthquake that struck the city and the University of LAquila. REFERENCES
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Giuseppe Ferri (SM06) received the degree in electronic engineering from the University of LAquila, LAquila, Italy, in 1988. After serving in the military as an ofcer of the Technical Corps, since 1991 he has been a Researcher and Teaching Assistant and, since 2001, an Associate Professor of electronics with the University of LAquila. During 19941995, he was a Visiting Researcher with KU Leuven, ESAT-MICAS, working on lowvoltage low-power analog circuit design, where he teaches courses in analog electronics and microelectronics. He is coauthor of a book entitled Low Voltage, Low Power CMOS Current Conveyors (Kluwer, 2003) and four textbooks in Italian on analog microelectronics. Moreover, he is the author and coauthor of 267 scientic works. He is also coinventor of two patents on active inductors and high-precision analog lock-in (2008). His research activity concerns the analog design of integrated circuits for portable applications (e.g., sensors and biomedicals) and circuit theory. He is an Associate Editor of the Journal of Circuits, Computers and Systems.

Elia Palange received the degree in physics from the University La Sapienza of Rome, Rome, Italy, in 1976 Presently, he is a Professor of physics and nanophotonics with the Faculty of Engineering of the University of LAquila, LAquila, Italy. During his scientic activities, he carried out research on laser physics, nonlinear optics, and spectroscopy and optical properties of nanometer-sized semiconductor heterostructures. He is currently the Supervisor of the Optics and Photonics Laboratory, Electrical and Information Engineering Department, University of LAquila. The Laboratory is developing research activities on novel photonics multifunctional devices based on linear and nonlinear extreme metamaterials and electroactivation of spatial solitons in photorefractive crystals, the use of Si and Ge nanowires for the fabrication of electronic and optoelectronic nanodevices and the synthesis and characterization of the physical properties of magnetic FePt nanoparticles.