Sie sind auf Seite 1von 542

DIGITAL MULTI EFFECTS

DME-3000/7000
DME CONTROL PANEL

BKDM-3010
BKDM-3020
BKDM-3021
BKDM-3022
BKDM-3023
BKDM-3030
BKDM-3040
BKDM-3050
BKDM-3060
BKDM-7031
BKDM-7041
BKDM-7060
BKDM-7070
BZDM-3010
BZDM-3020
BZDM-7010
BZDM-7020

MAINTENANCE MANUAL Part 2


Volume 2 1st Edition
! WARNING
This manual is intended for qualified service personnel only.
To reduce the risk of electric shock, fire or injury, do not perform any servicing other than that
contained in the operating instructions unless you are qualified to do so. Refer all servicing to
qualified service personnel.

! WARNUNG
Die Anleitung ist nur für qualifiziertes Fachpersonal bestimmt.
Alle Wartungsarbeiten dürfen nur von qualifiziertem Fachpersonal ausgeführt werden. Um die
Gefahr eines elektrischen Schlages, Feuergefahr und Verletzungen zu vermeiden, sind bei
Wartungsarbeiten strikt die Angaben in der Anleitung zu befolgen. Andere als die angegeben
Wartungsarbeiten dürfen nur von Personen ausgeführt werden, die eine spezielle Befähigung
dazu besitzen.

! AVERTISSEMENT
Ce manual est destiné uniquement aux personnes compétentes en charge de l’entretien. Afin
de réduire les risques de décharge électrique, d’incendie ou de blessure n’effectuer que les
réparations indiquées dans le mode d’emploi à moins d’être qualifié pour en effectuer d’autres.
Pour toute réparation faire appel à une personne compétente uniquement.

DME-3000 Serial No. 50001 and Higher


DME-7000 Serial No. 10001 and Higher
BKDM-3010 Serial No. 50001 and Higher
BKDM-3020 Serial No. 50001 and Higher
BKDM-3021 Serial No. 50001 and Higher
BKDM-3022 Serial No. 50001 and Higher
BKDM-3023 Serial No. 50001 and Higher
BKDM-3030 Serial No. 50001 and Higher
BKDM-3040 Serial No. 50001 and Higher
BKDM-3050 Serial No. 50001 and Higher
BKDM-3060 Serial No. 50001 and Higher
BKDM-7031 Serial No. 10001 and Higher
BKDM-7041 Serial No. 10001 and Higher
BKDM-7060 Serial No. 10001 and Higher
BKDM-7070 Serial No. 10001 and Higher
BZDM-3010 Serial No. 10111 and Higher
BZDM-3020 Serial No. 10491 and Higher
BZDM-7010 Serial No. 10001 and Higher
BZDM-7020 Serial No. 10001 and Higher
Table of Contents

Manual Structure

Purpose of this manual .............................................................................................. 5


Contents ..................................................................................................................... 5
Related manuals ......................................................................................................... 5

1. Location of Mounted Circuit Boards

1-1. DME-3000/7000 ......................................................................................... 1-1


1-2. BKDM-3010 ............................................................................................... 1-4

2. Semiconductor Pin Assignments

3. Block Diagrams

3-1. Overall Block Diagrams


DME-3000................................................................................................... 3-2
DME-7000................................................................................................... 3-3
BKDM-3010(CPU-119) .............................................................................. 3-4
3-2. Frame Wirings
DME-3000................................................................................................... 3-6
DME-7000................................................................................................... 3-7
BKDM-3010 ............................................................................................... 3-9
3-3. Block Diagrams
CMB-1....................................................................................................... 3-10
CPU-114 .................................................................................................... 3-12
CPU-196 .................................................................................................... 3-15
DPR-35 ...................................................................................................... 3-16
DPR-70 ...................................................................................................... 3-18
KPC-2 ........................................................................................................ 3-20
KPC-9 ........................................................................................................ 3-23
MPU-70 ..................................................................................................... 3-26
MPU-72 ..................................................................................................... 3-28
MPU-80 ..................................................................................................... 3-31
SKP-1 ........................................................................................................ 3-32
VIF-6/6A ................................................................................................... 3-34
VIF-9/9A ................................................................................................... 3-38
WKG-13 .................................................................................................... 3-43
WKG-16 .................................................................................................... 3-46

DME-3000/7000 1
4. Schematic Diagrams

CMB-1 ......................................................................................................... 4-2


CN-1256 .................................................................................................... 4-24
CN-753 ...................................................................................................... 4-26
CPU-114 .................................................................................................... 4-28
CPU-119 .................................................................................................... 4-36
CPU-196 .................................................................................................... 4-42
DPR-35 ...................................................................................................... 4-58
DPR-70 ...................................................................................................... 4-74
KEY-32A .................................................................................................. 4-98
KEY-32B ................................................................................................... 4-99
KEY-32C ................................................................................................... 4-99
KPC-2 ...................................................................................................... 4-100
KPC-9 ...................................................................................................... 4-116
LE-76 ....................................................................................................... 4-192
MB-438 ................................................................................................... 4-142
MB-660 ................................................................................................... 4-150
MPU-70 ................................................................................................... 4-156
MPU-72 ................................................................................................... 4-168
MPU-80 ................................................................................................... 4-190
RE-104 .................................................................................................... 4-192
SE-214 ....................................................................................................... 4-99
SKP-1 ...................................................................................................... 4-194
VIF-6 ....................................................................................................... 4-224
VIF-6A .................................................................................................... 4-238
VIF-9 ....................................................................................................... 4-248
VIF-9A .................................................................................................... 4-266
WKG-13 .................................................................................................. 4-278
WKG-16 .................................................................................................. 4-298

5. Board Layouts

CMB-1 ......................................................................................................... 5-2


CN-1256 ...................................................................................................... 5-4
CN-753 ........................................................................................................ 5-6
CPU-114 ...................................................................................................... 5-8
CPU-119 .................................................................................................... 5-10
CPU-196 .................................................................................................... 5-12
DPR-35 ...................................................................................................... 5-14
DPR-70 ...................................................................................................... 5-16
KEY-32A .................................................................................................. 5-18

2 DME-3000/7000
KEY-32B................................................................................................... 5-20
KEY-32C................................................................................................... 5-20
KPC-2 ........................................................................................................ 5-22
KPC-9 ........................................................................................................ 5-24
LE-76......................................................................................................... 5-36
MB-438 ..................................................................................................... 5-26
MB-660 ..................................................................................................... 5-28
MPU-70 ..................................................................................................... 5-30
MPU-72 ..................................................................................................... 5-32
MPU-80 ..................................................................................................... 5-34
RE-104 ...................................................................................................... 5-36
SE-214 ....................................................................................................... 5-20
SKP-1 ........................................................................................................ 5-38
VIF-6/6A ................................................................................................... 5-40
VIF-9/9A ................................................................................................... 5-42
WKG-13 .................................................................................................... 5-44
WKG-16 .................................................................................................... 5-46

A. Mounted Parts Address

CMB-1........................................................................................................ A-1
CN-1256 ..................................................................................................... A-1
CN-753 ....................................................................................................... A-2
CPU-114 ..................................................................................................... A-2
CPU-119 ..................................................................................................... A-2
CPU-196 ..................................................................................................... A-2
DPR-35 ....................................................................................................... A-3
DPR-70 ....................................................................................................... A-4
KEY-32A ................................................................................................... A-4
KEY-32B.................................................................................................... A-4
KEY-32C.................................................................................................... A-4
KPC-2 ......................................................................................................... A-4
KPC-9 ......................................................................................................... A-5
MB-438 ...................................................................................................... A-6
MB-660 ...................................................................................................... A-6
MPU-70 ...................................................................................................... A-6
MPU-72 ...................................................................................................... A-6
MPU-80 ...................................................................................................... A-7
RE-104 ....................................................................................................... A-7
SE-214 ........................................................................................................ A-7
SKP-1 ......................................................................................................... A-7
VIF-6 .......................................................................................................... A-8

DME-3000/7000 3
VIF-6A ....................................................................................................... A-9
VIF-9 ........................................................................................................ A-10
VIF-9A ..................................................................................................... A-11
WKG-13 ................................................................................................... A-12
WKG-16 ................................................................................................... A-12

4 DME-3000/7000
Manual Structure

Purpose of this manual


This manual is the maintenance manual of the Digital Multi Effects DME-3000/
7000 and the control panel BKDM-3010.
This manual is intended for use by trained service engineers, and describes the
information that premise the service based on the component parts (block diagrams,
schematic diagrams and board layouts etc.).

Contents
The following is a summary of all the sections for understanding the contents of this
manual.

Maintenance Manual Section 1 Location of Mounted Circuit Boards


Part 2 Volume 2
Describes the location of mounted circuit boards.

Section 2 Semiconductor Pin Assignments


Describes the semiconductor pin assignments.

Section 3 Block Diagrams


Describes the overall block diagrams and block diagrams for every circuit boards in
alphabetical order.

Section 4 Schematic Diagrams


Describes the schematic diagrams for every circuit boards and frame wiring in
alphabetical order.

Section 5 Board Layouts


Describes the board layouts for every circuit boards in alphabetical order.

Appendix Mounted Parts Address


Describes the parts address for every circuit boards.

Related manuals
Besides this manual, the following maintenance manuals are available for DME-
3000/7000.

Maintenance Manual Section 1 Service Overview


Part 2 Volume 1 Section 2 Electrical Alignment
Section 3 Spare Parts

Maintenance Manual Section 1 Installation


Part 1 Section 2 DME-3000/7000 Service Overview
Section 3 BKDM-3010 Service Overview
Section 4 Trouble Shooting
Section 5 Overall Block Diagrams
DME-3000/7000 5
Section 1
Location of Mounted Circuit Boards

DME-3000 Digital Multi Effects Page 1-1 DME-7000 Digital Multi Effects Page 1-1
Option Function name Option Function name
BKDM-3020 Composite digital input/output BKDM-3020 Composite digital input/output

BKDM-3021 Component digital input/output BKDM-3021 Component digital input/output


BKDM-3022 Composite digital/analog input/output BKDM-3022 Composite digital/analog input/output
BKDM-3023 Component digital/analog input/output BKDM-3023 Component digital/analog input/output
BKDM-3030 Non-linear address generator BKDM-3030 Non-linear address generator
BKDM-3040 Wipe pattern generator and graphics generator BKDM-3040 Wipe pattern generator and graphics generator
BKDM-3050 Combiner, lighting and Z recursive BKDM-3050 Combiner, lighting and Z recursive
BKDM-3060 Key memory and recursive block BKDM-7031 Digital sparkle generator
BKDM-7031 Digital sparkle generator BKDM-7041 Digital sketch generator
BKDM-7041 Digital sketch generator BKDM-7060 Key memory and recursive block
BKDM-7070 Advanced Shadow generator
BKDM-3010 DME Control Panel Page 1-4

1-1. DME-3000/7000

1. Except Plug-in Boards

1
4

DME-3000 DME-7000
No. Board Name Circuit Function Model name No. Board Name Circuit Function Model name

1 CN-753 Rear panel DME-3000 1 CN-1256 Rear panel DME-7000


2 LE-76 Power indicator DME-3000 2 LE-76 Power indicator DME-7000
3 MB-438 Mother board DME-3000 3 MB-660 Mother board DME-7000
4 RE-104 Power supply DME-3000 4 RE-104 Power supply DME-7000

DME-3000/7000 1-1
2. Plug-in Boards

Slot No. Option Board Standard Board

2
1

2 (Spare)

5
3
6

![
4
!]

1
5

8 *DME-7000 Only
6

4
7

3
8

9, !/, !-, !=
9

1-2 DME-3000/7000
DME-3000
No. Board name Circuit function Model name

1 CMB-1 Combiner, lighting and Z recursive BKDM-3050


2 CPU-114 System control and communication DME-3000
3 DPR-35 Video memory DME-3000
4 KPC-2 Key memory and recursive block BKDM-3060
5 MPU-70 3D linear address generator DME-3000
6 MPU-72 Non-linear address generator BKDM-3030
7 MPU-80 Digital sparkle generator BKDM-7031
8 — — —
9 VIF-6 Component digital/analog input/output BKDM-3023
10 VIF-6A Component digital input/output BKDM-3021
11 VIF-9 Composite digital/analog input/output BKDM-3022
12 VIF-9A Composite digital input/output BKDM-3020
13 WKG-13 Wipe pattern generator and graphics generator BKDM-3040
14 WKG-16 Digital sketch generator BKDM-7041

DME-7000
No. Board name Circuit function Model name

1 CMB-1 Combiner, lighting and Z recursive BKDM-3050


2 CPU-196 System control and communication DME-7000
3 DPR-70 Video memory DME-7000
4 KPC-9 Key memory and recursive block BKDM-7060
5 MPU-70 3D linear address generator DME-7000
6 MPU-72 Non-linear address generator BKDM-3030
7 MPU-80 Digital sparkle generator BKDM-7031
8 SKP-1 Advanced Shadow generator BKDM-7070
9 VIF-6 Component digital/analog input/output BKDM-3023
10 VIF-6A Component digital input/output BKDM-3021
11 VIF-9 Composite digital/analog input/output BKDM-3022
12 VIF-9A Composite digital input/output BKDM-3020
13 WKG-13 Wipe pattern generator and graphics generator BKDM-3040
14 WKG-16 Digital sketch generator BKDM-7041

DME-3000/7000 1-3
1-2. BKDM-3010

3
2

1
4

BKDM-3010
No. Board name Circuit function Model name

1 CPU-119 System control communication display BKDM-3010


2 KEY-32A Key switch BKDM-3010
3 KEY-32B Key switch BKDM-3010
4 KEY-32C 10 Key BKDM-3010
5 SE-214 Photointerrupter BKDM-3010

1-4 DME-3000/7000
Index
IC
Section 2
Semiconductor Pin Assignments

Semiconductors of which functions are equivalent are described


here. For parts replacement, refer to the section of Spare Parts in
this manual. The circuit diagram of each IC is obtained from the
IC data book published by the manufacturer.

DIODE PAGE TRANSISTOR PAGE IC PAGE IC PAGE

10E-1 ................................ 2-4 2SA1150 ........................... 2-4 74AC00SJ ......................... 2-5 CX20158 ......................... 2-12
10E-2 ................................ 2-4 2SA1162 ........................... 2-4 74AC02SJ ......................... 2-8 CX20158-TH ................... 2-12
1S2835-T1 ........................ 2-4 2SA812 ............................. 2-4 74AC02SJX ...................... 2-8 CX22029 ......................... 2-12
1S2836 .............................. 2-4 2SA812-T1-M5M6 ............ 2-4 74AC04SJ ......................... 2-5 CX23065A ...................... 2-12
1SS119 ............................. 2-4 2SB810 ............................. 2-4 74AC04SJX ...................... 2-5 CXA1432M ..................... 2-12
1SS119-25 ........................ 2-4 2SB810-F .......................... 2-4 74AC08SJ ......................... 2-5 CXA1451M ..................... 2-12
1SS226 ............................. 2-4 2SB962 ............................. 2-4 74AC08SJX ...................... 2-5 CXA1577R-9 ................... 2-13
1SS226-TE85L ................. 2-4 2SB962-Z-P ...................... 2-4 74AC11SJ ......................... 2-5 CXD1095Q ..................... 2-16
1SS271 ............................. 2-4 2SC1623 ........................... 2-4 74AC11SJX ...................... 2-5 CXD1312Q ..................... 2-14
1SS271-TE85L ................. 2-4 2SC1623-T1-L5L6 ............ 2-4 74AC139SJ ....................... 2-5 CXD2029Q ..................... 2-17
2SC2757 ........................... 2-4 74AC151SJ ....................... 2-6 CXD2343S ...................... 2-13
CL-150PG-CD .................. 2-4 2SC2757-T1T33 ............... 2-4 74AC163SJ ....................... 2-6 CXD8031Q ..................... 2-18
CL-150PG-CD-T ............... 2-4 2SC3356 ........................... 2-4 74AC240SJ ....................... 2-6 CXD8033Q ..................... 2-18
2SC3356-T1R24 ............... 2-4 74AC240SJX .................... 2-6 CXD8052Q ..................... 2-20
EC10QS02L ...................... 2-4 2SK508 ............................. 2-4 74AC241SJ ....................... 2-6 CXD8053Q ..................... 2-19
EC10QS02L-TE12L5 ........ 2-4 2SK508-T1K51 ................. 2-4 74AC244SJ ....................... 2-7 CXD8058Q ..................... 2-22
ERB81-004TP1 ................. 2-4 2SK508-T1K53 ................. 2-4 74AC244SJX .................... 2-7 CXD8059 ........................ 2-24
ERC81-004 ....................... 2-4 74AC245SJ ....................... 2-7 CXD8060Q ..................... 2-25
ERC81-004L22 ................. 2-4 DTA114EK ........................ 2-4 74AC245SJX .................... 2-7 CXD8061 ........................ 2-26
ERC84-009 ....................... 2-4 DTA114EK-T146 ............... 2-4 74AC32SJ ......................... 2-6 CXD8062Q ..................... 2-28
ERC84-009E ..................... 2-4 DTC114EK ........................ 2-4 74AC32SJX ...................... 2-6 CXD8063Q ..................... 2-30
DTC114EK-T146 .............. 2-4 74AC540SJ ....................... 2-7 CXD8065 ........................ 2-27
GL-6P202 ......................... 2-4 DTC114GL ........................ 2-4 74AC541SJ ....................... 2-7 CXD8156Q ..................... 2-32
GP1A13R .......................... 2-4 74AC574SJ ....................... 2-8 CXD8190Q ..................... 2-33
MMSF3P03HD .................. 2-4 74AC574SJX .................... 2-8 CXD8264Q ..................... 2-36
RD3.9M-B ......................... 2-4 MMSF3P03HDR2 ............. 2-4 74AC74SJ ......................... 2-8 CXD8267Q ..................... 2-36
RD3.9M-T1B ..................... 2-4 74AC74SJX ...................... 2-8 CXD8274Q ..................... 2-37
74AC86SJ ......................... 2-8 CXD8331Q ..................... 2-38
TLP624(BV) ...................... 2-4 74AC86SJX ...................... 2-8 CXD8332Q ..................... 2-40
TLY123 .............................. 2-4 74ACT00SJ ....................... 2-5 CXD8333Q ..................... 2-48
74ACT163SJ..................... 2-6 CXD8334Q ..................... 2-42
74F02SJ ............................ 2-8 CXD8335AQ ................... 2-44
74F283SJ ......................... 2-8 CXD8337Q ..................... 2-46
74F86SJ ............................ 2-8 CXD8838Q ..................... 2-49
CXD8839Q ..................... 2-50
AM26LS30PC ................... 2-9 CXD8840Q ..................... 2-51
AM26LS32ACNS .............. 2-9 CXD8841Q ..................... 2-52
AM26LS32ACNS-E05 ...... 2-9 CXD8846Q ..................... 2-54
AM26LS32PC ................... 2-9 CXD8847Q ..................... 2-53
AM29C821ASC ................ 2-9 CXD8848Q ..................... 2-56
AM29F010-70JC ............. 2-10 CXD8852Q ..................... 2-58
AM29F010-70PC ............ 2-10 CXD8873Q ..................... 2-60
AM29F040-90JC ............. 2-11 CXD8875AR ................... 2-61
AN78L04 ........................... 2-9 CXD8885Q ..................... 2-62
AT28C64B-15SC .............. 2-9 CXD8886Q ..................... 2-63
AV9107C-10CS8T .......... 2-11 CXD8947Q ..................... 2-64
CXD8948Q ..................... 2-65
CAT35C104K .................. 2-11 CXD8950Q ..................... 2-66
CAT35C104K-RE10 ........ 2-11 CXD8951Q ..................... 2-67

DME-3000/7000 2-1
Index
IC

IC PAGE IC PAGE IC PAGE IC PAGE

CXK1203AR ................... 2-68 LC3564SM-10 ................. 2-69 P28F020-150 ................ 2-102 SN74HC4020ANS ........ 2-106
CXK1203AR-T4 .............. 2-68 LM1881M ........................ 2-91 PALCE22V10H-25P ...... 2-101 SN74HC4020ANS-E05 2-106
CXK48324Q .................... 2-68 LM1881M-FL63 .............. 2-91 PALCE22V10H-25PC/4 SN74HC4040ANS ........ 2-106
CXK581000AM-70LL ...... 2-69 LM3080N ........................ 2-91 ....................................... 2-101 SN74HC4040ANS-E05 2-106
CXK581000AM-70LL-TL LM360M .......................... 2-91 SN74HC540ANS .............. 2-7
......................................... 2-69 LT1074CT ....................... 2-91 QS3384SO ..................... 2-99 SN74HC540ANS-E05 ...... 2-7
CXK5864CM-70LL .......... 2-69 LT1129CS8-3.3 ............... 2-91 SN74HC541ANS .............. 2-7
CY27H010-45JC ............. 2-70 LT1129CS8-3.3-E2 ......... 2-91 RF5C15 ......................... 2-102 SN74HC541ANS-E05 ...... 2-7
CY7C185-25VC .............. 2-70 LT1191CS8 ..................... 2-91 SN74HC573BNS .......... 2-106
CY7C194-25VC .............. 2-71 SBX1601A .................... 2-103 SN74HC573BNS-E05 .. 2-106
CY7C199-20VC .............. 2-80 MAX232CWE .................. 2-91 SBX1602A .................... 2-103 SN74HC574ANS .............. 2-8
CY7C245A-25JC ............ 2-72 MAX232CWE-TE-2 ......... 2-91 SBX1639-02 ................. 2-103 SN74HC574ANS-E05 ...... 2-8
CY7C245A-25PC ............ 2-71 MAX241CWI ................... 2-92 SC7S04F ...................... 2-103 SN74HC74ANS ................ 2-8
CY7C245A-35JC ............ 2-72 MAX651CSA ................... 2-92 SCI7701YJA ................. 2-104 SN74HC74ANS-E05 ......... 2-8
CY7C245A-35PC ............ 2-71 MAX691CPE ................... 2-92 SCI7701YJA-T1 ............ 2-104 SN74HC86ANS-E05 ......... 2-8
CY7C277-30PC .............. 2-72 MB40760PF .................... 2-93 SN74ALS163BNS ......... 2-104 SN74HCU04ANS .............. 2-5
CY7C291A-25JC ............ 2-73 MB8421-90LPFQ ............ 2-93 SN74ALS163BNS-E05 . 2-104 SN74HCU04ANS-E05 ...... 2-5
CY7C291A-25JC-TP ...... 2-73 MB88346BPF ................. 2-93 SN74AS21NS ............... 2-104 SN74LS123NS ............. 2-106
MB88346BPFV ............... 2-93 SN74AS21NS-E05 ....... 2-104 SN74LS123NS-E05 ...... 2-106
D050 ............................... 2-71 MB89371AH-PF .............. 2-94 SN74HC00ANS ................ 2-5 SN74LS30NS ............... 2-107
D050-TP2 ....................... 2-71 MC10H124M ................... 2-81 SN74HC00ANS-E05 ......... 2-5 SN74LS30NS-E05 ........ 2-107
DP83932BVF-25 ............. 2-74 MC10H125M ................... 2-80 SN74HC02ANS ................ 2-5 SN74LS38NS ............... 2-107
DS1000Z-25 ................... 2-73 MC14495P1 .................... 2-90 SN74HC02ANS-E05 ......... 2-5 SN74LS38NS-E05 ........ 2-107
DS1000Z-25(TE2) .......... 2-73 MC68882FN25 ............... 2-95 SN74HC04ANS ................ 2-5 SN74LS684NS ............. 2-107
DS1000Z-50 ................... 2-73 MC68EC020RP25 .......... 2-96 SN74HC04ANS-E05 ......... 2-5 SN74LS684NS-E05 ...... 2-107
DS1000Z-50(TE2) .......... 2-73 MC74HC08AF .................. 2-5 SN74HC08ANS ................ 2-5 SN75ALS194N ............. 2-107
MC74HC08AF-T2 ............. 2-5 SN74HC08ANS-E05 ......... 2-5 SN75ALS195J .............. 2-107
EPM7032LC44-12 .......... 2-75 MC74HC163AF ................ 2-6 SN74HC11ANS ................ 2-5
EPM7032LC44-15 .......... 2-75 MC74HC164F ................. 2-95 SN74HC11ANS-E05 ......... 2-5 TC4S11F ...................... 2-107
EPM7032QC44-15 ......... 2-75 MC74HC245AF ................ 2-7 SN74HC125ANS .......... 2-104 TC4S11F(TE85R) ......... 2-107
EPM7064LC68-15 .......... 2-76 MC74HC245AF-T2 ........... 2-7 SN74HC125ANS-E05 .. 2-104 TC4S584F .................... 2-108
EPM7064LC84-15 .......... 2-77 MC74HC30F ................... 2-97 SN74HC138ANS .......... 2-104 TC4S584F-TE85L ......... 2-108
EPM7096LC84-12 .......... 2-78 MC74HC4053F ............... 2-97 SN74HC138ANS-E05 .. 2-104 TC4S66F ...................... 2-108
EPM7160ELC84-20 ........ 2-77 MC74HC4053F-T2 ......... 2-97 SN74HC139ANS .............. 2-5 TC4S66F-TE85L ........... 2-108
MC74HC4078F ............... 2-97 SN74HC139ANS-E05 ...... 2-5 TC528126BJ-10 ............ 2-108
GAL16V8B-25LP ............ 2-73 MC74HC4538AF ............ 2-97 SN74HC157ANS .......... 2-104 TC551664AJ-20 ............ 2-109
GAL22V10B-15LP .......... 2-76 MC74HC4538AF-T2 ....... 2-97 SN74HC157ANS-E05 .. 2-104 TC74AC00F ...................... 2-5
GAL22V10B-25LJ ........... 2-77 MC74HC4538F ............... 2-97 SN74HC163ANS .............. 2-6 TC74AC02F ...................... 2-5
GAL22V10B-25LP .......... 2-76 MC74HC541AFEL ............ 2-7 SN74HC163ANS-E05 ...... 2-6 TC74AC04F ...................... 2-5
MC74HC574AF ................ 2-8 SN74HC164ANS ............ 2-95 TC74AC163F .................... 2-6
HD153108CP .................. 2-80 MC74HC589F ................. 2-98 SN74HC164ANS-E05 .... 2-95 TC74AC164F .................. 2-95
HD63266F ...................... 2-81 MC74HC595AF .............. 2-97 SN74HC166ANS .......... 2-105 TC74AC541F .................... 2-7
HD647180X0CP6 ........... 2-82 MSM514221B-30ZS ....... 2-98 SN74HC166ANS-E05 .. 2-105 TC74AC573F ................ 2-106
HD647180XRFS6 ........... 2-84 MSM514222B-30JS ........ 2-99 SN74HC175ANS .......... 2-105 TC74AC574F .................... 2-8
HM53461ZP-10 .............. 2-79 MSM514256BL-70ZS ..... 2-99 SN74HC175ANS-E05 .. 2-105 TC74ACT04F .................... 2-5
HM63021FP-28N ............ 2-86 MSM514400C-70SJ ..... 2-100 SN74HC240ANS .............. 2-6 TC74ACT574F .................. 2-8
HM63021FP28NZ ........... 2-86 MSM514400C-70ZS ..... 2-100 SN74HC240ANS-E05 ...... 2-6 TC74ACT74F .................... 2-8
HN27C1024HCP-10 ....... 2-86 MSM518221-30ZS ........ 2-100 SN74HC241ANS .............. 2-6 TC74HC123AF ............. 2-108
HN58C65FP-25T ............ 2-78 MSM518222-30JS ........ 2-101 SN74HC241ANS-E05 ...... 2-6 TC74HC221AF ............. 2-109
MX23C4000MC-12-DME3K SN74HC244ANS .............. 2-7 TC74HC221AF-TP2 ..... 2-109
IDT7164S20Y ................. 2-87 ....................................... 2-101 SN74HC244ANS-E05 ...... 2-7 TC74HC238AF ............. 2-109
IDT7210L55J .................. 2-87 SN74HC245ANS .............. 2-7 TC74HC4053AF-TP2 ..... 2-97
IDT74FCT821ASO ......... 2-89 NJM4565M-A .................. 2-98 SN74HC245ANS-E05 ...... 2-7 TC74HC540AF ................. 2-7
IDT74FCT827ASO ......... 2-81 NJM4565M-A-T1 ............ 2-98 SN74HC251ANS .......... 2-105 TC74HC590AF ............. 2-110
IDT79R3041-16J ............ 2-88 NJM78L05A ...................... 2-9 SN74HC251ANS-E05 .. 2-105 TC74HC688AF ............. 2-110
IDT79R3081-25MJ ......... 2-90 NJM78L05UA ................ 2-101 SN74HC273ANS .......... 2-105 TC74HC688AF-TP2 ..... 2-110
IDT74FCT827ATSO ........ 2-81 NJM78L05UA-TE1 ........ 2-101 SN74HC273ANS-E05 .. 2-105 TC74HC86AF ................... 2-8
NJM78L12A ...................... 2-9 SN74HC32ANS ................ 2-6 TC74VHC00FS(EL) .......... 2-5
KM416C256BLJ-7 .......... 2-89 NJM78L12A-T3 ................. 2-9 SN74HC32ANS-E05 ......... 2-6 TC74VHC04F ................... 2-5

2-2 DME-3000/7000
Index
IC

IC PAGE IC PAGE

TC74VHC04F(EL) ............ 2-5 UPC814G2-1 ................ 2-111


TC74VHC08F ................... 2-5 UPD42101G-3 .............. 2-114
TC74VHC08F(EL) ............ 2-5 UPD42101G-3-E1 ......... 2-114
TC74VHC11F ................... 2-5 UPD42102G-3 .............. 2-114
TC74VHC11F(EL) ............ 2-5 UPD4701AC ................. 2-115
TC74VHC123AF ........... 2-108 UPD71054GB-10-3B4 .. 2-116
TC74VHC123AF(EL) .... 2-108 UPD72123GJ-5BG ....... 2-117
TC74VHC132F ............. 2-108
TC74VHC132F(EL) ...... 2-108 WS57C191C-35J .......... 2-116
TC74VHC14F ............... 2-109 WS57C191C-45J .......... 2-116
TC74VHC14F(EL) ........ 2-109 WS57C291C-35S ......... 2-118
TC74VHC157FS ........... 2-104 WS57C45-35T .............. 2-118
TC74VHC157FS(EL) .... 2-104 WS57C49C-35J ............ 2-115
TC74VHC21F ............... 2-110 WS57C49C-35S ........... 2-113
TC74VHC21F(EL) ........ 2-110
TC74VHC244F ................. 2-7 ZA4041 ......................... 2-118
TC74VHC244F(EL) .......... 2-7
TC74VHC245F ................. 2-7
TC74VHC245F(EL) .......... 2-7
TC74VHC245FS(EL) ........ 2-7
TC74VHC245FS(EL) ........ 2-7
TC74VHC273F ............. 2-105
TC74VHC273F(EL) ...... 2-105
TC74VHC32F ................... 2-6
TC74VHC32F(EL) ............ 2-6
TC74VHC367F ............. 2-110
TC74VHC367F(EL) ...... 2-110
TC74VHC368FS ........... 2-110
TC74VHC368FS(EL) .... 2-110
TC74VHC540F ................. 2-7
TC74VHC540F(EL) .......... 2-7
TC74VHC541F ................. 2-7
TC74VHC541F(EL) .......... 2-7
TC74VHC541FS(EL) ........ 2-7
TC74VHC574F ................. 2-8
TC74VHC574F(EL) .......... 2-8
TC74VHC574FS(EL) ........ 2-8
TC74VHC74F ................... 2-8
TC74VHC74F(EL) ............ 2-8
TC74VHC86F ................... 2-8
TC74VHC86FS(EL) .......... 2-8
TC7S04F-TE85L ........... 2-103
TD62104F ..................... 2-111
TL082CPS-E05 ............. 2-111
TL082M ......................... 2-111
TL084CNS .................... 2-111
TL084CNS-E05 ............ 2-111
TL431CM ...................... 2-105
TL7705CPS-B ............... 2-111
TL7705CPS-B-E05 ....... 2-111
TMS27C512-15JL ......... 2-111
TMS320C31PQL .......... 2-112
TMS418160-60DZ ........ 2-113
TMS44400P-70DJ ........ 2-113
TMS44400P-70DJ-E10
....................................... 2-113
TMS4C2970-28DT ........ 2-114
TMS4C2970-28DTR ..... 2-114

DME-3000/7000 2-3
IC
Diode, Transistor

DIODE TRANSISTOR
TC001-04
IL00
10E-2 2SA1150 -TOP VIEW- DTA114EK
*****
1SS119 GP1A13R DTA114EK-T146
ERC81-004
ERC84-009
10E-1 R1

1SS119-25
R2
ERB81-004TP1
ERC81-004L22
ERC84-009E
TC001-01 TC001-03
IL00 IL00
-TOP VIEW- ***** -TOP VIEW-
IL00 *****
-TOP VIEW- ***** 1S2836 2SA1162 DTC114EK
1S2835-T1 2SA812 DTC114EK-T146
2SA812-T1-M5M6
R1

R2

DC001-04
IL00
-TOP VIEW- *****
2SB810
RD3.9M-B TYPE No.
PRINTED 2SB810-F
DC001-01
IL00 NC
RD3.9M-T1B
-TOP VIEW- *****
1SS226 DTC114GL(R1=—, R2=10K)
1SS271
1SS226-TE85L
1SS271-TE85L

—TOP VIEW—
TLP624(BV)
1 4

2 3 2SB962
LC001-01
2SB962-Z-P
IL00
*****
1 4
CL-150PG-CD;GREEN MMSF3P03HD
CL-150PG-CD-T MMSF3P03HDR2
2 3 8
1 7
2 6
3 5
4

DC007-01
IL00 5 6 7 8
-TOP VIEW- ***** TLY123;YELLOW
TC001-02
EC10QS02L IL00
EC10QS02L-TE12L5 -TOP VIEW- *****
2SC1623
2SC2757 4

2SC3356 S

2SC1623-T1-L5L6
2SC2757-T1T33
2 3
2SC3356-T1R24

GL-6P202;RED
TC001-05
IL00
-TOP VIEW- *****
2SK508
2SK508-T1K51
2SK508-T1K53
S

2-4 DME-3000/7000
IC

74AC00SJ(NS)FLAT PACKAGE 74AC08SJ(NS)FLAT PACKAGE


74ACT00SJ(NS)FLAT PACKAGE MC74HC08AF(MOTOROLA)FLAT PACKAGE
SN74HC00ANS(TI)FLAT PACKAGE SN74HC08ANS(TI)FLAT PACKAGE
TC74AC00F(TOSHIBA)FLAT PACKAGE TC74VHC08F(TOSHIBA)FLAT PACKAGE
TC74VHC00FS(EL)(TOSHIBA)FLAT PACKAGE(SMALL) 74AC08SJX
SN74HC00ANS-E05 MC74HC08AF-T2
SN74HC08ANS-E05
C-MOS QUAD 2-INPUT NAND GATES
—TOP VIEW— TC74VHC08F(EL)
14 13 12 11 10 9 8 C-MOS QUAD 2-INPUT AND GATES
—TOP VIEW—
VDD
A A
Y = Y
B B 14 13 12 11 10 9 8
VDD
A A
Y=A•B=A+B Y = Y
B B
A B Y
0 0 1 Y=A•B=A+B
GND 0 1 1
1 2 3 4 5 6 7 A B Y
1 0 1 0 ; LOW LEVEL 0 0 0
1 1 0 1 ; HIGH LEVEL GND 0 1 0
1 2 3 4 5 6 7 1 0 0
NOTE: 0 ; LOW LEVEL
TYPE VDD 1 1 1 1 ; HIGH LEVEL
TC74AC00 TYPE
+2 to +5.5V NOTE:
TC74VHC00
TYPE VDD
MC74HCT00N +5V
TC74AC08 TYPE
74ACT00 TYPE +4.5 to +5.5V +2 to +5.5V
MC74ACT08M
OTHER TYPES +2 to +6V
TC40H +2 to +8V
OTHER TYPES +2 to +6V

SN74HC02ANS(TI)FLAT PACKAGE
TC74AC02F(TOSHIBA)FLAT PACKAGE 74AC11SJ(NS)FLAT PACKAGE
SN74HC02ANS-E05 SN74HC11ANS(TI)FLAT PACKAGE
TC74VHC11F(TOSHIBA)FLAT PACKAGE
C-MOS QUAD 2-INPUT NOR GATES 74AC11SJX
—TOP VIEW—
SN74HC11ANS-E05
14 13 12 11 10 9 8 TC74VHC11F(EL)
VDD
A A
Y = Y C-MOS 3-INPUT POSITIVE-AND GATE
B B
-TOP VIEW-
A A
Y=A+B=A•B 14 13 12 11 10 9 8 B Y = B Y
VDD C C
A B Y (+2 to +6V)
0 0 1 Y = A • B • C = A+B+C
GND 0 1 0
1 2 3 4 5 6 7 1 0 0 A B C Y
1 1 0 0 0 0 0
NOTE: 0 0 1 0
TYPE VDD 0 ; LOW LEVEL
GND 0 1 0 0
1 ; HIGH LEVEL
HC +2 to +6V 1 2 3 4 5 6 7 0 1 1 0
AC/VHC +2 to +5.5V 1 0 0 0
HCT/ACT +5V 1 0 1 0
1 1 0 0 0 ; LOW LEVEL
NOTE ; 1 1 1 1 1 ; HIGH LEVEL
TYPE VDD
TC74VHC11 +2V to +5.5V
OTHER TYPES +2V to +6V

74AC04SJ(NS)FLAT PACKAGE
SN74HC04ANS(TI)FLAT PACKAGE
SN74HCU04ANS(TI)FLAT PACKAGE
TC74AC04F(TOSHIBA)FLAT PACKAGE
TC74ACT04F(TOSHIBA)FLAT PACKAGE 74AC139SJ(NS)FLAT PACKAGE
TC74VHC04F(TOSHIBA)FLAT PACKAGE SN74HC139ANS(TI)FLAT PACKAGE
74AC04SJX SN74HC139ANS-E05
SN74HC04ANS-E05 C-MOS DUAL 2-TO-4 DECODER/DEMULTIPLEXER
SN74HCU04ANS-E05 - TOP VIEW -
TC74VHC04F(EL) 4 12
Y0 Y0
1EN IN 1 VDD 16 2 5 14 11
C-MOS HEX INVERTERS A Y1 A Y1
—TOP VIEW— 3 6 13 10
B Y2 B Y2
1A IN 2 15 2EN IN 7 9
Y3 Y3
14 13 12 11 10 9 8 EN EN
VDD 1B IN 3 14 2A IN 1 15
A Y = A Y
1Y0 OUT 4 13 2B IN
Y=A INPUTS OUTPUTS
A Y 1Y1 OUT 5 12 2Y0 OUT EN B A Y3 Y2 Y1 Y0
0 1 0 0 0 1 1 1 0
1 0 1Y2 OUT 6 11 2Y1 OUT 0 0 1 1 1 0 1
GND
0 ; LOW LEVEL 0 1 0 1 0 1 1
1 2 3 4 5 6 7
1 ; HIGH LEVEL 1Y3 OUT 7 10 2Y2 OUT 0 1 1 0 1 1 1
1 X X 1 1 1 1
8 GND 9 2Y3 OUT 0 ; LOW LEVEL
NOTE:
TYPE VDD 1 ; HIGH LEVEL
74HCT04 TYPE +5V X ; DON'T CARE
NOTE :
TC74AC04 TYPE
+2 to +5.5V TYPE V DD
TC74VHC04 TYPE
TC74AC/TC74VHC +2 to +5.5V
74ACT04 TYPE +4.5 to +5.5V
HCT/ACT +5V
OTHER TYPES +2 to +6V
OTHER TYPES +2 to +6V

DME-3000/7000 2-5
IC

74AC151SJ(NS)FLAT PACKAGE 74AC240SJ(NS)FLAT PACKAGE


SN74HC240ANS(TI)FLAT PACKAGE
C-MOS 8-LINE-TO-1-LINE DATA SELECTOR/MULTIPLEXER
—TOP VIEW— 74AC240SJX
SN74HC240ANS-E05
4 X0
X3 IN 1 VDD 16 3 X1 C-MOS 3-STATE INVERTER/LINE DRIVER
2 X2
—TOP VIEW—
X2 IN 2 15 X4 IN 1 X3 G2
15 X4 XC 5 G
20 19 18 17 16 15 14 13 12 11
X1 IN 3 14 X5 IN 14 X5 XC 6
VDD A Y
13 X6
X0 IN 4 13 X6 IN 12 X7
G A Y
0 0 1
XC OUT 5 12 X7 IN
0 1 0
A B C INH 1 X HI-Z
XC OUT 6 11 A IN
GND
11 10 9 7 0 ; LOW LEVEL
1 2 3 4 5 6 7 8 9 10 1 ; HIGH LEVEL
INH IN 7 10 B IN X ; DON'T CARE
G1
CONTROL INPUTS HI-Z; HIGH IMPEDANCE
ON
8 GND 9 C IN
CHANNEL 2 18
INH C B A
4 16
0 0 0 0 0 6 14
2 18
8 12 NOTE:
0 0 0 1 1
4 16
OR G TYPE VDD
0 0 1 0 2 6 14 1 74AC/74HC +2 to +6 V
0 0 1 1 3 8 12 74ACT/74HCT
OR
0 1 0 0 4 11 9 TC74BC240F +5 V
11 9
13 7 TC74BC240P
0 1 0 1 5 13 7
15 5 TC74AC240F
15 5
0 1 1 0 6 17 3 TC74AC240P +2 to +5.5 V
17 3
0 1 1 1 7 G1 G2 TC74VHC240
G
1 19 19
1 X X X GND
NOTE: 0 ; LOW LEVEL
TYPE VDD 1 ; HIGH LEVEL
HC +2V to +6V X ; DON'T CARE
AC/VHC +2V to +5.5V
HCT/ACT/FCT +5V

74AC241SJ(NS)FLAT PACKAGE
SN74HC241ANS(TI)FLAT PACKAGE
SN74HC241ANS-E05

74AC163SJ(NS)FLAT PACKAGE
74ACT163SJ(NS)FLAT PACKAGE
MC74HC163AF(MOTOROLA)FLAT PACKAGE
SN74HC163ANS(TI)FLAT PACKAGE
TC74AC163F(TOSHIBA)FLAT PACKAGE
SN74HC163ANS-E05
C-MOS PRESETTABLE SYNCHRONOUS 4-BIT BINARY COUNTER
—TOP VIEW—
MODE SELECTION
CONTROL INPUTS
MODE
RD IN 1 VDD 16 RD LD EN1 EN2
RESET
0 X X X
(SYNCHRONOUS)
CK IN 2 15 CO OUT
PRESET
1 0 X X
(SYNCHRONOUS)
A(DATA A) IN 3 14 QA OUT
1 1 0 X NO COUNT
B(DATA B) IN 4 13 QB OUT 1 1 X 0 NO COUNT
1 1 1 1 COUNT
C(DATA C) IN 5 12 QC OUT
CARRY OUTPUT "CO"
D(DATA D) IN 6 11 QD OUT QA
QB
QC CO
QD
EN1 IN 7 10 EN2 IN EN2

CO IS HIGH WHEN EN2 INPUT IS


8 GND 9 LD IN HIGH AND COUNT IS "15".

NOTE: COUNT SEQUENCE 74AC32SJ(NS)FLAT PACKAGE


TYPE VDD COUNT
OUTPUTS SN74HC32ANS(TI)FLAT PACKAGE
HC +2 to +6V QD QC QB QA
0 0 0 0 0
TC74VHC32F(TOSHIBA)FLAT PACKAGE
AC/VHC +2 to +5.5V
HCT/ACT/FCT +5V
1 0 0 0 1 74AC32SJX
2 0 0 1 0 SN74HC32ANS-E05
3 0 0 1 1
9
4 0 1 0 0
TC74VHC32F(EL)
3 LD 14
A QA 5 0 1 0 1
4
B QB
13
6 0 1 1 0 C-MOS QUAD 2-INPUT OR GATES
5 12 —TOP VIEW—
C QC 7 0 1 1 1
6 11
D QD 8 1 0 0 0
14 13 12 11 10 9 8
9 1 0 0 1
2 VDD
10 1 0 1 0 A A
Y = Y
11 1 0 1 1 B B
7 15
EN1 CO 12 1 1 0 0
10
EN2 13 1 1 0 1 Y=A+B=A•B
RD
14 1 1 1 0 A B Y
1
15 1 1 1 1 0 0 0
GND 0 1 1
1 2 3 4 5 6 7 1 0 1
1 1 1
NOTE:
TYPE VDD 0 ; LOW LEVEL
1 ; HIGH LEVEL
AC/VHC +2 to +5.5V
HC +2 to +6V

2-6 DME-3000/7000
IC

74AC244SJ(NS)FLAT PACKAGE 74AC540SJ(NS)FLAT PACKAGE


SN74HC244ANS(TI)FLAT PACKAGE SN74HC540ANS(TI)FLAT PACKAGE
TC74VHC244F(TOSHIBA)FLAT PACKAGE TC74HC540AF(TOSHIBA)FLAT PACKAGE
74AC244SJX TC74VHC540F(TOSHIBA)FLAT PACKAGE
SN74HC244ANS-E05 SN74HC540ANS-E05
TC74VHC244F(EL) TC74VHC540F(EL)
C-MOS BUS BUFFER WITH 3-STATE OUTPUTS C-MOS 3-STATE OCTAL INVERTING BUFFERS/DRIVERS
—TOP VIEW— - TOP VIEW -

G2 G2 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8
20 19 18 17 16 15 14 13 12 11 20 19 18 17 16 15 14 13 12 11 A Y
A Y = A Y V DD G1
VDD G2
G G
G1 G2 A Y
0 0 0 1
G A Y 0 0 1 0
0 0 0 1 X X HI-Z
0 1 1 GND
GND X 1 X HI-Z
X X HI-Z 1 2 3 4 5 6 7 8 9 10
1 2 3 4 5 6 7 8 9 10 G1 A1 A2 A3 A4 A5 A6 A7 A8 0 ; LOW LEVEL
0 ; LOW LEVEL 1 ; HIGH LEVEL
G1
1 ; HIGH LEVEL
2 18 X ; DON'T CARE
X ; DON'T CARE
HI-Z ; HIGH IMPEDANCE 3 17 NOTE : HI-Z ; HIGH IMPEDANCE
2 18 4 16 TYPE V DD
4 16 5 15 TC74AC/TC74VHC +2 to +5.5V
6 14 6 14 HCT/ACT +5V
NOTE:
8 12 7 13 OTHER TYPES +2 to +6V
2 18 TYPE VDD
G 8 12
4 16 AC
9 11
6 14 1 HC +2 to +6V
G1 G2
8 12 40H
1 19
11 9 ACT
OR
13 7 BCT
+5V
15 5 FCT
17 3 HCT
11 9
G1 G2 TC74AC244 TYPE
13 7 +2 to +5.5V
TC74VHC244
1 19 15 5 74AC541SJ(NS)FLAT PACKAGE
17 3
G
MC74HC541AFEL(MOTOROLA)FLAT PACKAGE
SN74HC541ANS(TI)FLAT PACKAGE
19
TC74AC541F(TOSHIBA)FLAT PACKAGE
TC74VHC541F(TOSHIBA)FLAT PACKAGE
TC74VHC541FS(EL)(TOSHIBA)FLAT PACKAGE(SMALL)
SN74HC541ANS-E05
TC74VHC541F(EL)
74AC245SJ(NS)FLAT PACKAGE C-MOS BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
MC74HC245AF(MOTOROLA)FLAT PACKAGE - TOP VIEW -

SN74HC245ANS(TI)FLAT PACKAGE G2 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8
A Y
TC74VHC245F(TOSHIBA)FLAT PACKAGE 20 19 18 17 16 15 14 13 12 11
V DD G1
TC74VHC245FS(EL)(TOSHIBA)FLAT PACKAGE(SMALL) G2
74AC245SJX
MC74HC245AF-T2 G1 G2 A Y
SN74HC245ANS-E05 0 0 0 1
0 0 1 0
TC74VHC245F(EL) GND 1 X X HI-Z
TC74VHC245FS(EL) 1 2 3 4 5 6 7 8 9 10 X 1 X HI-Z
G1 A1 A2 A3 A4 A5 A6 A7 A8
0 ; LOW LEVEL
C-MOS BILATERAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
2 18 1 ; HIGH LEVEL
-TOP VIEW-
3 17 X ; DON'T CARE
NOTE :
2 18 4 16 HI-Z ; HIGH IMPEDANCE
TYPE V DD
DIR IN 1 VDD 20 3 DIR 17 5 15 TC74AC/TC74VHC +2 to +5.5V
EN DIR OPERATION
4 16 6 14 ABT/ACT/BCT/HCT/VHCT +5V
0 0 B to A
A1 2 19 EN IN 5 15 7 13 OTHER TYPES +2 to +6V
A B 0 1 A to B
6 14 8 12
1 X HI-Z
A2 3 18 B1 7 13 9 11
8 DIR 12 0 : LOW LEVEL G1 G2
A3 4 17 B2 9 11 1 : HIGH LEVEL 1 19
DIR EN X : DON'T CARE
A4 5 16 B3 1 19 HI-Z : HIGH IMPEDANCE

A5 6 15 B4 NOTE:
TYPE VDD
A6 7 14 B5 AC
+2 to +6V
HC
A7 8 13 B6 ABT
ACT
+5V
A8 9 12 B7 BCT
HCT
10 GND 11 B8 TC74AC245F
TC74AC245P +2 to +5.5V
TC74VHC245
74LVT +2.7 to +3.6V

B1 B2 B3 B4 B5 B6 B7 B8
18 17 16 15 14 13 12 11
19
EN
1
DIR

2 3 4 5 6 7 8 9
A1 A2 A3 A4 A5 A6 A7 A8

DME-3000/7000 2-7
IC

74AC574SJ(NS)FLAT PACKAGE 74AC86SJ(NS)FLAT PACKAGE


MC74HC574AF(MOTOROLA)FLAT PACKAGE TC74HC86AF(TOSHIBA)FLAT PACKAGE
SN74HC574ANS(TI)FLAT PACKAGE TC74VHC86F(TOSHIBA)FLAT PACKAGE
TC74AC574F(TOSHIBA)FLAT PACKAGE 74AC86SJX
TC74ACT574F(TOSHIBA)FLAT PACKAGE SN74HC86ANS-E05
TC74VHC574F(TOSHIBA)FLAT PACKAGE TC74VHC86FS(EL)
TC74VHC574FS(EL)(TOSHIBA)FLAT PACKAGE(SMALL)
C-MOS QUAD EXCLUSIVE OR GATES
74AC574SJX —TOP VIEW—
SN74HC574ANS-E05
14 13 12 11 10 9 8 A
TC74VHC574F(EL) B
Y
VDD
C OS 3 S OU U OC O Y=A•B+A•B
- TOP VIEW -

2 19 EACH FLIP-FLOP A B Y
D1 Q1 0 0 0
EN IN 1 V DD 20 3 18 INPUTS OUT
D2 Q2 0 1 1
4 17 EN CK D Q
D3 Q3 1 0 1 0 ; LOW LEVEL
D1 IN 2 19 Q1 OUT 5 16 0 1 1 GND
D4 Q4 1 1 0 1 ; HIGH LEVEL
6 15 0 0 0 1 2 3 4 5 6 7
D5 Q5
D2 IN 3 18 Q2 OUT 7 14 0 X Q0
D6 Q6
8 13 1 X X HI-Z
D7 Q7
D3 IN 4 17 Q3 OUT 9 12 NOTE :
D8 Q8
11 0 ; LOW LEVEL TYPE VDD
D4 IN 5 16 Q4 OUT EN 1 ; HIGH LEVEL TC74AC/VHC +2V to +5.5V
1 X ; DON'T CARE TC74HCT +5V
D5 IN 6 15 Q5 OUT
HI-Z ; HIGH IMPEDANCE OTHER TYPES +2V to +6V
Q0 ; NO CHANGE
D6 IN 7 14 Q6 OUT

D7 IN 8 13 Q7 OUT

D8 IN 9 12 Q8 OUT
74AC02SJ(NS)FLAT PACKAGE
74F02SJ(NS)FLAT PACKAGE
10 GND 11 CK IN
74AC02SJX
TTL 2-INPUT POSITIVE-NOR GATES
D1 Q1 D2 Q2 D3 Q3 D4 Q4 D5 Q5 D6 Q6 D7 Q7 D8 Q8 –TOP VIEW–
2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12
Y A =Y A
14 13 12 11 10 9 8 B B
VCC
D Q D Q (+5V) Y=A+B=A•B

A B Y
Q Q 0 0 1
EN EN 0 1 0
11 1 0 0
CK GND 1 1 0
1 2 3 4 5 6 7
1 0 ; LOW LEVEL
EN 1 ; HIGH LEVEL

NOTE:
TYPE V DD
HC +2 to +6V
AC/VHC +2 to +5.5V
ACT/FCT/HCT/VHCT +5V
74F283SJ(NS)FLAT PACKAGE

74AC74SJ(NS)FLAT PACKAGE
SN74HC74ANS(TI)FLAT PACKAGE
TC74ACT74F(TOSHIBA)FLAT PACKAGE
TC74VHC74F(TOSHIBA)FLAT PACKAGE
74AC74SJX
SN74HC74ANS-E05
TC74VHC74F(EL)

C-MOS DUAL D-TYPE FLIP-FLOPS WITH DIRECT SET/RESET


—TOP VIEW—

14 13 12 11 10 9 8
INPUTS OUTPUTS
VDD
SD RD CK D Qn+1 Qn+1
Q

RD Q
SD

0 1 X X 1 0
D

1 0 X X 0 1
0 0 X X 1 1
Q

Q
RD
SD

1 1 1 1 0
D

1 1 0 0 1
GND 1 1 0 X Qn Qn
1 2 3 4 5 6 7
0 ; LOW LEVEL
1 ; HIGH LEVEL
X ; DON'T CARE

NOTE:
4 10
TYPE VDD
2 SD 5 12 SD 9
D Q D Q HCT/ACT +5V
TC74AC/VHC +2 to +5.5V 74F86SJ(NS)FLAT PACKAGE
3 11
OTHERS +2 to +6V
TTL EXCLUSIVE OR GATE
6 8 -TOP VIEW-
Q Q
RD RD
A
14 13 12 11 10 9 8 Y
1 13 B
VCC
(+5V)
Y=A•B+A•B
A B Y
0 0 0
0 1 1
GND 1 0 1
0 ; LOW LEVEL
1 2 3 4 5 6 7 1 1 0 1 ; HIGH LEVEL

2-8 DME-3000/7000
IC

AM26LS30PC(ADVANCED MICRO DEVICES) IL00 AM29C821ASC(AMD)FLAT PACKAGE


LINE DRIVER C-MOS BUS INTERFACE LATCHES
—TOP VIEW— -TOP VIEW-

16 2 23
SR A D0 Y0
1 VCC 16 SR A IN 2 15 OE 1 VDD
(+5 V) 24 3 22
(+5V) AI AO D1 Y1
4 21
D0 2 23 Y0 D2 Y2
A IN 2 15 A OUT 13 5 20
SR B D3 Y3
3
BO
14 D1 3 22 Y1 6 19
BI D4 Y4
B IN 3 14 B OUT 7 18
D2 4 21 Y2 D5 Y5
12 8 17
SR C D6 Y6
MC IN 4 13 SR B IN 6 11 D3 5 20 Y3 9 16
CI CO D7 Y7
10 15
D4 6 19 Y4 D8 Y8
5 GND 12 SR C IN 9 11 14
SR D D9 Y9
7
DI DO
10 D5 7 18 Y5 13
C IN 6 11 C OUT OE
D6 8 17 Y6
MC 1
D IN 7 10 D OUT 4 D7 9 16 Y7

D8 10 15 Y8
8 VEE 9 SR D IN
(–5V or GND)
D9 11 14 Y9 CK ; CLOCK
D0 - D9 ; DATA INPUTS
MC ; MODE CONTROL 12 GND 13 CK OE ; OUTPUT ENABLE
SR ; SLEW RATE CONTROL Y0 - Y9 ; DATA OUTPUTS

MC = 1 VCC (+5V) MC = 0
4 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9
MC 2 3 4 5 6 7 8 9 10 11
16 16 SR
16 16 SR SR A D
SR A
15 15
2 15 2 15 2 AO 2
AI AO AI Q
14 14
BO 13
(AO) CK
3 3
3 14 3 14 BI
BI BO STROBE 1
(STROBE A) OE
13 13 SR
SR B 13 13 SR
SR B
12 SR 23 22 21 20 19 18 17 16 15 14
SR C 12 SR C
12 12 SR
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9
6 11 6 11 6 6 STROBE
CI CO CI
(STROBE D)
11 11 INPUTS OUT FUNC
7 10 7 10 7 CO 7
DI DO DI 10 10 OE D CK Y TION
9 9 SR DO
SR D 9 (CO) 9 SR 1 0 HI-Z
SR D HI-Z
1 1 HI-Z 0 ; LOW LEVEL
MC
4 0 0 0 1 ; HIGH LEVEL
LOAD
INPUTS OUTPUTS 0 1 1 HI-Z ; HIGH IMPEDANCE
INPUTS OUTPUTS
MC A TO D A TO D MC STROBE A & D A & D B & C
1 0 0 0 0 0 0 1
1 1 1 0 0 1 1 0 AT28C64B-15SC(ATMEL)FLAT PACKAGE
0 ; LOW LEVEL X; DON'T CARE 0 1 X HI-Z HI-Z
1 ; HIGH LEVEL HI-Z; HIGH IMPEDANCE
C-MOS 64K (8K X 8) ELECTRICALLY ERASABLE PROM
-TOP VIEW-

10 11
RDY / BUSY VCC A0 I/O 0
1 (+5V)
28 9 12
OUT A1 I/O 1
13
AM26LS32ACNS(TI)FLAT PACKAGE 8
A2 I/O 2
A12 IN 2 27 WE IN 7 15
AM26LS32PC(ADVANCED MICRO DEVICES) 6
A3 I/O 3
16
A4 I/O 4
AM26LS32ACNS-E05 A7 IN 3 NC 26 5
A5 I/O 5
17
4 18
HIGH SPEED DIFFERENTIAL LINE RECEIVER A6 IN 4 25 A8 IN 3
A6 I/O 6
19
—TOP VIEW— A7 I/O 7
25
A8
EN2 A5 IN 5 24 A9 IN 26
A9
21 1
16 15 14 13 12 11 10 9 FUNCTION TABLE A10 RDY / BUSY
A4 IN 6 23 A11 IN 23
Vcc EN2 EN1 OUTPUT A11
(+5v) + – – + 2
0 0 ENABLE A12
A3 IN 7 22 OE IN
0 1 ENABLE
WE CE OE
1 0 HI-Z
A2 IN 8 21 A10 IN 27 20 22
1 1 ENABLE
– + + – 0 ; LOW LEVEL
A1 IN 9 20 CE IN
GND 1 ; HIGH LEVEL
A0 - A12 ; ADDRESS INPUTS
1 2 3 4 5 6 7 8 HI-Z ; HIGH IMPEDANCE
A0 IN 10 19 I/O 7 I/O0 - I/O7 ; DATA INPUTS / OUTPUTS
CE ; CHIP INABLE INPUT
OE ; OUTPUT ENABLE, INPUT
I/O 0 11 18 I/O 6 WE ; WRITE ENABLE INPUT
SENSE INPUT VOLT RDY / BUSY ; READY / BUSY OUTPUT
C32/LS32 ±200mV ±7V I/O 1 12 17 I/O 5
LS33 ±500mV ±15V
I/O2 13 16 I/O 4

14 GND 15 I/O 3

AN78L04(MATSUSHITA)+4V(100mA)
NJM78L05A(JRC)+5V(100mA)
2
NJM78L12A(JRC)+12V(100mA) A12
23
A11
NJM78L12A-T3 21
A10
26
POSITIVE VOLTAGE REGULATOR A9
25
65, 536 BIT
A8 MEMORY
3 ARRAY
A7 ADDRESS
4 LATCH
A6
5 AND
A5
6 BUFFER
A4
7
A3
8
A2
9
A1 COLUMN
10 GATE
A0

OUT GND IN
1 2 3

22 DATA LATCH
OE
27 OE, WE, CE AND
WE
20 LOGIC INPUT / OUTPUT
CE BUFFER
3 1
IN OUT
GND 1 11 12 13 15 16 17 18 19
2
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7

RDY / BUSY

DME-3000/7000 2-9
IC

AM29F010-70JC(AMD) AM29F010-70PC(AMD)

C-MOS 1M (131072x8)-BIT FLASH EEPROM C-MOS 1M (131072X8) -BIT FLASH MEMORY


— TOP VIEW — —TOP VIEW—

4 3 2 1 32 31 30 12 12
A0 VDD A0
NC

VDD (+5 V)

NC
11 1 NC (+5V) 32 11
A1 A1
10 10
5 29 A2 A2
9 A16 IN 2 31 WE (W) IN 9
A3 A3
6 28 8 8
A4 A4
7 27 7
A5 A15 IN 3 NC 30 7
A5
6 6
A6 A6
8 26 5 13 A12 IN 4 29 A14 IN 5 13
A7 DQ0 A7 DQ0
27 14 27 14
9 25 A8 DQ1 A8 DQ1
26
A9 DQ2
15 A7 IN 5 28 A13 IN 26
A9 DQ2
15
10 24 23 17 23 17
A10 DQ3 A10 DQ3
11 23 25
A11 DQ4
18 A6 IN 6 27 A8 IN 25
A11 DQ4
18
4 19 4 19
A12 DQ5 A12 DQ5
12 22 28 20 A5 IN 7 26 A9 IN 28 20
A13 DQ6 A13 DQ6
29 21 29 21
13 21 A14 DQ7 A14 DQ7
GND

3
A15
A4 IN 8 25 A11 IN 3
A15
2 2
A16 A16
14 15 16 17 18 19 20 A3 IN 9 24 OE (G) IN
22 22
CE (E) CE (E)
24 A2 IN 10 23 A10 IN 24
OE (G) OE (G)
(VDD = +5 V) 31 31
WE (W) WE (W)
PIN PIN A1 IN 11 22 CE (E) IN
I/O SIGNAL I/O SIGNAL
No. No.
1 — NC 17 I/O DQ3 A0 IN 12 21 DQ7 I/O
2 I A16 18 I/O DQ4
3 I A15 19 I/O DQ5 DQ0 I/O 13 20 DQ6 I/O
4 I A12 20 I/O DQ6
5 I A7 21 I/O DQ7 DQ1 I/O 14 19 DQ5 I/O
6 I A6 22 I CE (E)
7 I A5 23 I A10 DQ2 I/O 15 18 DQ4 I/O
8 I A4 24 I OE (G)
9 I A3 25 I A11 16 GND 17 DQ3 I/O
10 I A2 26 I A9
11 I A1 27 I A8
12 I A0 28 I A13
13 I/O DQ0 29 I A14
14 I/O DQ1 30 — NC
15 I/O DQ2 31 I WE (W)
16 — GND 32 — VDD INPUT
A0–A16 ; ADDRESS (0–16)
CE ; CHIP ENABLE
OE ; OUTPUT ENABLE
WE ; WRITE ENABLE
OUTPUT
INPUT DQ0–DQ7 ; DATA (0–7)
A0-A16 ; ADDRESS (0-16)
CE ; CHIP ENABLE
OE ; OUTPUT ENABLE OPERATION CE OE WE A0 A1 A9 I/O
WE ; WRITE ENABLE AUTO-SELECT MANUFACTURER CODE (1) 0 0 1 0 0 VID CODE
AUTO-SELECT DEVICE CODE (1) 0 0 1 1 0 VID CODE
OUTPUT
DQ0-DQ7 ; DATA (0-7) READ 0 0 1 A0 A1 A9 DOUT
STANDBY 1 X X X X X HI-Z
OPERATION CE OE WE A0 A1 A9 I/O OUTPUT DISABLE 0 1 1 X X X HI-Z
AUTO-SELECT MANUFACTURER CODE (1) 0 0 1 0 0 VID CODE WRITE 0 1 0 A0 A1 A9 DIN (2)
AUTO-SELECT DEVICE CODE (1) 0 0 1 1 0 VID CODE ENABLE SECTOR PROTECT 0 VID 0 X X VID X
READ 0 0 1 A0 A1 A9 DOUT vERIFY SECTOR PROTECT (3) 0 0 1 0 1 VID CODE
STANDBY 1 X X X X X HI-Z
OUTPUT DISABLE 0 1 1 X X X HI-Z 0 : LOW LEVEL
1 : HIGH LEVEL
WRITE 0 1 0 A0 A1 A9 DIN (2)
X : DON'T CARE
ENABLE SECTOR PROTECT 0 VID 0 X X VID X HI-Z : HIGH IMPEDANCE
VERIFY SECTOR PROTECT (3) 0 0 1 0 1 VID CODE
0 ; LOW LEVEL 13–15
1 ; HIGH LEVEL 31 ERASE INPUT 17–21
WE
X ; DON'T CARE STATE VOLTAGE OUTPUT DQ0–
SWITCH BUFFERS DQ7
HI-Z ; HIGH IMPEDANCE CONTROL

13-15
31 ERASE INPUT 17-21
WE COMMAND
STATE VOLTAGE OUTPUT DQ0-DQ7 PROGRAM
REGISTER VOLTAGE
CONTROL SWITCH BUFFERS
SWITCH
22 CHIP ENABLE
CE DATA
24 OUTPUT ENABLE
COMMAND PROGRAM OE LATCH
LOGIC
REGISTER VOLTAGE
SWITCH
22 CHIP ENABLE
CE DATA
24 OUTPUT ENABLE
OE LATCH
LOGIC
EMBEDDED
ALGORITHMS Y-DECODER Y-GATING
ADDRESS LATCH

EMBEDDED Y-DECODER Y-GATING


LOW VDD DETECTOR 1, 048, 576
ALGORITHMS PROGRAM/ BIT
ADDRESS LATCH

12–5 ERASE PULSE X-DECODER


27, 26, 23 CELL
25, 4, 28
TIMER MATRIX
29, 3, 2
LOW VDD DETECTOR PROGRAM/ 1, 048, 576
ERASE PULSE BIT A0–A16
12-5 X-DECODER
27, 26, 23 TIMER CELL
25, 4, 28 MATRIX
29, 3, 2
A0–A16

2-10 DME-3000/7000
IC

AM29F040-90JC(AMD) AV9107C-10CS8T(INTEGRATED CIRCUIT SYSTEMS)FLAT PACKAGE

C-MOS 4M(524,288x8)-BIT SECTOR ERASE FLASH MEMORY C-MOS CPU FREQUENCY GENERATOR
-TOP VIEW- - TOP VIEW -

1 6
FS0 CLK1
4 3 2 1 32 31 30 FS0 IN 1 8 REFCLK OUT
12

V DD (+5V)
A0 5 8
11 V DD FS1 REFCLK
A1 2 GND 7
5 29 10 (+5V)
A2 3 4
9 X1/ICLK X2
A3 X1/ICLK IN 3 6 CLK1 OUT
6 28 8
A4
7
A5 X2 OUT 4 5 FS1 IN
7 27 6
A6
5 13
A7 DQ0
8 26 27 14
A8 DQ1
26 15 INPUT
A9 DQ2
9 25 23 17 FS0 ; FREQUENCY SELECT 0
A10 DQ3
25 18 FS1 ; FREQUENCY SELECT 1
A11 DQ4
10 24 4 19 X1/ICLK ; CRYSTAL INPUT / INPUT CLOCK
A12 DQ5
28 20
A13 DQ6
11 23 29 21 OUTPUT
A14 DQ7
3 CLK1 ; CLOCK 1 OUTPUT
A15
12 22 2 REFCLK ; REFERENCE CLOCK
A16
30 X2 ; CRYSTAL
A17
13 21 1
A18
GND

22
14 15 16 17 18 19 20 CE LOOP 6
24 PHASE CHARGE OUTPUT
FILTER CLK1
OE DETECTOR PUMP BUFFER
31 & VCO
WE

(V DD =+5V)
1 FREQUENCY STORE/
PIN PIN INPUT FS0 PHASE LOCK LOOP +2
I/O SIGNAL I/O SIGNAL 5
No. No. A0-A18 ;ADDRESS INPUTS FS1 CONTROL LOGIC
1 I A18 17 I/O DQ3 CE ;CHIP ENABLE
2 I A16 18 I/O DQ4 OE ;OUTPUT ENABLE 3
3 I A15 19 I/O DQ5 WE ;WRITE ENABLE X1/ICLK OUTPUT 8
4 OSCILLATOR MUX REFCLK
X2 BUFFER
4 I A12 20 I/O DQ6
5 I A7 21 I/O DQ7 INPUT/OUTPUT
6 I A6 22 I CE DQ0-DQ7 ;DATA INPUT/OUTPUT
7 I A5 23 I A10
8 I A4 24 I OE
9 I A3 25 I A11
10 I A2 26 I A9
11 I A1 27 I A8
12 I A0 28 I A13 CAT35C104K(CATALYST SEMICONDUCTOR)FLAT PACKAGE
13 I/O DQ0 29 I A14 CAT35C104K-RE10
14 I/O DQ1 30 I A17
15 I/O DQ2 31 I WE C-MOS 4K-BIT SERIAL EEPROM
16 - GND 32 - V DD — TOP VIEW —

VDD
CS IN 1 (+5 V) 8 3 4
DI DO

13-15 CK IN 2 NC 7 2
CK
31 ERASE INPUT 17-21
WE
STATE VOLTAGE OUTPUT DQ0-DQ7 DI IN 3 6 ORG IN CS ORG
CONTROL GENERATOR BUFFERS 1 6
DO OUT 4 GND 5

COMMAND PGM CK ; CLOCK INPUT


REGISTER VOLTAGE CS ; CHIP SELECT
DI ; SERIAL DATA INPUT
GENERATOR
DO ; SERIAL DATA OUTPUT
22 CHIP ENABLE ORG ; MEMORY ORGANIZATION (256x16/512x8)
CE DATA
24 OUTPUT ENABLE
OE LATCH
LOGIC

MEMORY ARRAY
6 256x16 ADDRESS
ORG
OR DECODER
Y-DECODER Y-GATING 512x8
ADDRESS LATCH

BITS
V DD DETECTOR TIMER

CELL
X-DECODER DATA
MATRIX REGISTER
1-12,23 3
DI OUTPUT 4
25-30 DO
A0-A18
BUFFER
MODE
1 DECODE LOGIC
CS

CK
2 CLOCK
GENERATOR

DME-3000/7000 2-11
IC

CX20158(SONY)FLAT PACKAGE CXA1432M(SONY)FLAT PACKAGE


CX20158-TH
VIDEO SIGNAL CLAMPER
— TOP VIEW —
VIDEO SWITCHER AND BUFFER
— TOP VIEW —
CP
TP12 IN PEDE SENS 1 2
V IN E OUT
6
VEE VCC A IN 4 14 13 12 11 10 9 8
1 (–5 V) (+5 V) 14 8 X2 SW OUT
B IN VCC NC VEE 3
FV IN
(+5 V) (–5 V)
9
2 NC 13 BUFF OUT PEDE 7
8 V OUT
SENS
VCC 11 9 10
BUFF IN 3 12 SW SW CP IN
(+5 V)
3 13
BUFF IN BUFFER BUFF OUT
SW OUT 4 11 SW
NC NC
1 2 3 4 5 6 7
5 GND GND 10
V E FV TP5 V
SW SW INPUT IN OUT IN OUT
A IN 6 9 SW 0 0 —
0 1 B
CP IN ; CLAMP PULSE INPUT
7 GND 8 B IN 1 0 A E OUT ; BUFFER AMP OUTPUT
1 1 — FV IN ; FLOATING VIDEO SIGNAL INPUT
PEDE ; CLAMP LEVEL DC INPUT
0 ; LOW LEVEL
SENS ; CLAMP POINT SIGNAL INPUT
1 ; HIGH LEVEL
TP5, TP12 ; FOR TEST
— ; INDEFINITE
V IN ; VIDEO SIGNAL INPUT
V OUT ; VIDEO SIGNAL OUTPUT

1 2
V IN E. F E OUT

CX22029(SONY)
3 7
TTL-TO-ECL TRANSLATOR
FV IN + E. F V OUT

— TOP VIEW —
9 SAMPLE
28 27 26 25 24 23 22 21 20 19 18 17 16 15 PEDE +
8 &
VCC1 GND NC VEE1 SENS – HOLD
(+5 V) (–5 V)

CP IN
10 MODE
SELECTOR
VEE2 VCC2
(–5 V) NC GND (+5 V)

1 2 3 4 5 6 7 8 9 10 11 12 13 14

CXA1451M(SONY)
WIDEBAND VIDEO SWITCH
- TOP VIEW -
CX23065A(SONY)
2 16
N-MOS PHASE COMPARATOR WITH INVERSION AMPLIFIER IN1 SW OUT
-PRINTED SIDE VIEW- 1 V CC1
(+4Vto+6V) 16 SW OUT 4
IN2
13
VCC2 OUT1
EN OUT IN1 2 (+4Vto+6V) 15 11
OUT2
INV PHASE 1 ACTIVE 6
SWIN1
AMP COMP 0 HIGH IMPEDANCE 3 GND 14 CONT1 7
SWIN2
VDD 1 ; HIGH LEVEL
(+5 V) GND IN2 4 13 OUT1
0 ; LOW LEVEL
1 2 3 4 5 6 7 8
AMP AMP OUT EN IN1 IN2 5 GND GND 12 CONT1 CONT2
OUT IN
14 10
SWIN1 6 11 OUT2
TIMING CHART
SWIN2 7 10 CONT2
IN1
8 V EE1
(–4Vto–6V)
VEE2
(–4Vto–6V) 9
IN2

EN
INPUT
OUT HI-Z HI-Z CONT1, 2 ; POWER SAVE CONTROL PIN OF DRV. 1 AND DRV. 2
INT1, 2 ; 1/2-CHANNEL INPUT PIN
HI-Z ; HI-IMPEDANCE SWIN1, 2 ; IN1/IN2 PINS SWITCH CONTROL PIN

OUTPUT
OUT1, 2 ; OUTPUT PIN OF DRV. 1/2
SWOUT ; OUTPUTS IN1 PIN OR IN2 PIN WHICH HAS BEEN
SELECTED BY SWITCH

2
IN1 16
4 X2 SW OUT
IN2
13
DRV OUT1

14
CONT1
6
SWIN1 +
7
SWIN2 – 11
DRV OUT2

10
CONT2

2-12 DME-3000/7000
IC

CXA1577R-9(SONY) CXD2343S(SONY)

TTL 10-BIT 20MSPS A/D CONVERTER N-MOS SYNCHRONOUS 10-BIT BINARY COUNTER
— TOP VIEW — - TOP VIEW -
36
35
34
33
32
31
30
29
28
27
26
25
3 26 ENT ENP LD FUNCTION
VDD D0 Q0
39 12 ENT IN 1 28 4 25 1 1 1 COUNT
VINL D9 (+5 V) D1 Q1
40 11 ENT 5 24 0 X 1 NO COUNT
NC

NC
NC
DGND3
DGND4
VINH D8
D2 Q2
D7
10 ENP IN 2 ENP 27 CO OUT 6 23 X 0 1 NO COUNT
37 NC 24 C0' D3 Q3
21
MINV D6
9 7 22 X X 0 LOAD
38 NC 23 D4 Q4
20 8 D0 IN 3 D0 Q0' 26 Q0 OUT 8 21
LINV D5
39 22 D5 Q5
5 9 20 OE Q0 to Q9 OUTPUT
D4
40 21 D6 Q6
4 D1 IN 4 D1 Q1' 25 Q1 OUT 10 19 0 Q0' to Q9'
D3
41 NC 20 D7 Q7
23 3 11 18 1 HI-IMPEDANCE
ENABLE D2
42 AGND NC 19 D8 Q8
2 D2 IN 5 D2 Q2' 24 Q2 OUT 12 17
D1

10-BIT BINARY COUNTER


43 NC DGND2 18 D9 Q9
24 1
44 AVEE (–5 V) DVEE (–5 V) 17 PS D0
13 27
0 ; LOW LEVEL
D3 IN 6 D3 Q3' 23 Q3 OUT LD CO 1 ; HIGH LEVEL
45 DVCC2 (+5 V) DGND1 16 16
22 46
46 15 CLK UNDER OE X ; DON'T CARE
DVCC1 (+5 V) 15
OVER
47 D4 IN 7 D4 Q4' 22 Q4 OUT
47 NC 14
NC ENT ENP
48 NC 13
NC
NC

D5 IN 8 D5 Q5' 21 Q5 OUT 1 2

D6 IN 9 D6 Q6' 20 Q6 OUT
1
2
3
4
5
6
7
8
9
10
11
12

Q0 - Q9 ; OUTPUTS
DVCC1, DVCC2 = +5 V Q0' - Q9' ; COUNTER OUTPUTS
D7 IN 10 D7 Q7' 19 Q7 OUT
AVEE1, DVEE = –5 V D0 - D9 ; INPUTS DATA
CO ; CARRY OUTPUT
PIN PIN PIN PIN D8 IN 11 D8 Q8' 18 Q8 OUT OE ; OUTPUT ENABLE INPUT
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL
No. No. No. No. LD ; INPUT DATA LOAD
1 O D0 (LSB) 13 — NC 25 — DGND4 37 — NC D9 IN 12 D9 Q9' 17 Q9 OUT ENT ; CLOCK & CARRY OUT ENABLE
2 O D1 14 — NC 26 — DGND3 38 — NC ENP ; CLOCK ENABLE
CK ; CLOCK INPUT
3 O D2 15 — DVCC1 27 — NC 39 I VINL LD IN 13 LD 16 OE IN
4 O D3 16 — DGND1 28 — NC 40 I VINH
5 O D4 17 — DVEE 29 — VREFTS 41 — NC 14 GND 15 CK IN
6 — NC 18 — DGND2 30 I VREFT 42 — AGND ( ) CARRY OUTPUT "CO"
7 — NC 19 — NC 31 — VREF1 43 — NC
Q0'
8 O D5 20 I LINV 32 — VREF2 44 — AVEE
Q1'
9 O D6 21 I MINV 33 — VREF3 45 — DVCC2
Q9'
10 O D7 22 I CLK 34 I VREFB 46 O UNDER
LD CO'
11 O D8 23 I ENABLE 35 — VREFBS 47 O OVER
12 O D9 (MSB) 24 I PS 36 — NC 48 — NC D0 CO
D1
INPUT OUTPUT D9
CLK ; SYSTEM CLOCK D0 (LSB)-D9 (MSB) ; DIGITAL LD
ENABLE ; 3 STAGE CONTROL (L: ENABLE) UNDER ; UNDER FLOW
ENT
LINV ; D0 (LSB)-D8 INVERSE OVER ; OVER FLOW
MINV ; D9 (MSB) INVERSE
PS ; POWER SAVE (H: POWER SAVE MODE)
VINL, VINH ; ANALOG

VREFBS VREFB VREF3 VREF2 VREF1 VREFT VREFTS


35 34 33 32 31 30 29

L- L-
39
VINL COMPARATOR ENCODER
MATRIX

40 CLK 22
VINH H-COMPARATOR BUFFER
CLK

H-ENCODER

23
ENABLE
20
LINV

CORRECTION

46 OVER/UNDER
UNDER FINE OUTPUT
47 OUTPUT BUFFER
COURSE
OVER 21
BUFFER OUTPUT BUFFER MINV

12
D9 (MSB)
11
24 D8
PS 10
D7
9
D6
8
D5
5
D4
4
D3
3
D2
2
D1
1
D0 (LSB)

DME-3000/7000 2-13
IC

CXD1312Q(SONY)FLAT PACKAGE
C-MOS VIDEO CLOCK GENERATOR
—TOP VIEW—

51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 59
CP1
d/dt 60
GND CP2
52 32
52 SYNC WIDTH
SY1
DET 62
HR
53 31
54 30 53 FH CYCLE NOISE 61
SY2 GH
PULSE DET ELMINATOR
55 29
FH WINDOW PRESET
56 28 PULSE 17
M3
RESET GEN
57 GND 27
56 908, 909, 910 63
VDD2 VDD1 HCK CNTH
58 (+5V) (+5V) 26 1135COUNTER
14
59 GND 25 M1 FIELD 54
FLDO
16
M2 DET
60 24 V SYNC 1
VR
61 23 DET
9
62 22 –8 4FSC
15 8
8FSC PHASE FSC
63 21 SHIFT 7
FSCB
64 20 44
GND SCR 49
51 LALTI
RSIH
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 COLOR
41 4
REFH FRAME NIO
DET 34
RESET SHIN
38 35
CFI PULSE CFEN
36
GEN CF IH
3
1 CF INV CF IV
11
52 2fsc DET PH0 to PH10
SY1 PIN SC
53 1 SIGNAL DESCRIPTION SHIFT 909, 910 6
SY2 VR NO. 33 RZ
NICK RZ 1
62 GEN 1135COUNTER
HR
18 1. VR out V SYNC PULSE output 50 45
PH0 FLDI M5
VR is derived from the SY1(pin 52) input. 37
19 61 M6
PH1 GH 5
RZ 2
20 43
PH2 2. TES1 in TEST MODE input SCH
39
21 DLH SCH 12
PH3 40 WIN
22 59 ADH DET 11
PH4 CP1 0 : Low level 48 ADV
27 60 TES1 MODE REFB
PH5 CP2 (0) : Low level or open
28 47 23
PH6 0 TEST 1 : High level ADB BURST PHASE BPHN
29 46 24
PH7 (1) NORMAL (1) : High level or open DLB GATE DET BPHP
30 54
PH8 FLDO 55
31 PDIH
PH9 3. CFIV out TEST SIGNAL output FSCB
32 9
PH10 4FSC LALT 13
LALT
FSC
8 4. NIO out 1/2 NI CLOCK output GEN
15 7 The frequency of NIO is a half of the NICK(pin 2 64
8FSC FSCB TES1 SABS
33 33) input.
NICK
38 43
CFI SCH 5. RZ2 out READ ZERO 2 output
63 RZ2 is derived from the REFH(pin 41) input and
CNTH
34 shows the starting timing of each line.
SHIH
35
CFEN
36 6. RZ1 out READ ZERO 1 output 14. M1 in HCK FREQUENCY SELECT input
CFIH
RZ1 is derived from RZ2(pin 5). RZ1 is delayed Set M1 and M2(pin 16) as follows according as
by PH0 to PH10 inputs. See the description of the frequency of the HCK(pin 56) input.
41 4
REFH NIO the PH0(pin 18) input.
48 6
REFB RZ1 FREQ.
44 5 7. FSCB out FSCB PULSE output M1 M2
SCR RZ2 OF HCK
50 FSCB is derived from FSC(pin 8) and its phase
FLDI
is shifted by the LALTI(pin 49) input. The 908 FH 0 0
39 13
DLH LALT amount of shift is one clock length of the 4FSC 910 FH 0 (1)
40 12
ADH WIN (pin-9) input. 909 FH (1) 0
46 11
DLB ADV 1135 FH (1) (1)
47 8. FSC out FSC CLOCK output
ADB FH : Frequency of the H sync signal that
9. 4FSC out 4FSC CLOCK output composes the SY2(pin 53) input.
49 23 These are derived from the 8FSC(pin 15) input.
LALTI BPHN
51 24 15. 8FSC in 8FSC CLOCK input
RSIH BPHP 10. GND GND
55 The rising edge is active.
PDIH
56
4FSC(pin 9) , FSC(pin 8) and FSCB(pin 7) are
64 11. ADV out SC-H ADVANCE output
HCK SABS derived from 8FSC.
CFIV
3 12. WIN out SC-H IN PHASE output
2 These signals shows the SC-H phase. See the 16. M2 in HCK FREQUENCY SELECT input
TES1
description of the DLH(pin 39) input. See the description of the M1(pin 14) input.

13. LALT out PAL PULSE output 17. M3 in NOISE ELIMINATOR ON/OFF SELECT input
14
M1 The LALT output is derived from the REFB(pin M3 sets the noise eliminator for the GH(pin
16 48) burst signal in the pal system.
M2 61) output derived from the SY2(pin 53) input
17
M3 on or off.

45
M5
NOISE
M3
37
M6
ELIMINATION
0 OFF
(1) ON

18. PH0 in DELAY CONTROL INPUT FOR RZ1


19. PH1 in DELAY CONTROL INPUT FOR RZ1
20. PH2 in DELAY CONTROL INPUT FOR RZ1
21. PH3 in DELAY CONTROL INPUT FOR RZ1
22. PH4 in DELAY CONTROL INPUT FOR RZ1
These inputs control the delay time of the RZ1
(pin 6) output as follows:

PH10 to PH0 INPUTS


DELAY TIME OF RZ1
10 9 8 —— 2 1 0
0 0 0 —— 0 0 0 1/(4 Fsc) x 2047
0 0 0 —— 0 0 1 1/(4 Fsc) x 2046
0 0 0 —— 0 1 0 1/(4 Fsc) x 2045
0 0 0 —— 0 1 1 1/(4 Fsc) x 2044

1 1 1 —— 1 0 0 1/(4 Fsc) x 3
1 1 1 —— 1 0 1 1/(4 Fsc) x 2
1 1 1 —— 1 1 0 1/(4 Fsc) x 1
1 1 1 —— 1 1 1 1/(4 Fsc) x 0

2-14 DME-3000/7000
IC

23. BPHN out BURST PHASE-N output 46. DLB in DELAY BURST input
24. BPHP out BURST PHASE-P output 47. ADB in ADVANCE BURST input
These are the outputs of the phase comparator These burst signals are used for phase
between the DLB(pin 46) /ADB(pin 47) inputs and comparison with the internal SC.
the internal SC that is equivalent to the FSCB The usual connection is as follows:
(pin 7) output.
The PDIH(pin 55) input inhibits the BPHN and CXD1312Q
BPHP outputs. 47 ADB

BPHN/BPHP 48 REFB
PDIH
OUTPUTS
(0) INHIBIT BURST 46 DLB
1 ENABLE DELAY DELAY

25. GND GND


26. VDD1 +5V input 48. REFB in REFERENCE BURST input
REFB is used for resetting the divide-by-8
27. PH5 in DELAY CONTROL INPUT FOR RZ1 counter. RSIH(pin 51) inhibits the resetting
28. PH6 in DELAY CONTROL INPUT FOR RZ1 as follows:
29. PH7 in DELAY CONTROL INPUT FOR RZ1
30. PH8 in DELAY CONTROL INPUT FOR RZ1 RESET BY
31. PH9 in DELAY CONTROL INPUT FOR RZ1 RSIH
BY REFB
32. PH10 in DELAY CONTROL INPUT FOR RZ1
These inputs control the delay time of the RZ1 (0) INHIBIT
(pin 6) output. See the description of PH0(pin 1 ENABLE
18) input.
49. LALTI in PAL PULSE input
33. NICK in NI CLOCK input The PAL pulse should be input to this terminal
NICK is the clock pulse to generate the NI for the PAL system, but this terminal should be
(normal/invert) pulse to be used internally. kept open for the NTSC system.
Usually, CNTH(pin 63) for the NTSC system or
LALT(pin 13) for the PAL system is input to 50. FLDI in PAL FIELD PULSE input
this terminal. Phase alternating pulse by field.
The rising edge is active. The FLDO(pin 54) output is usually input to this
terminal for the PAL system, but this terminal
34. SHIH in MODE SELECT (COLOR FRAMING DET./RZ GEN) input should be kept open for the NTSC system.
35. CFEN in MODE SELECT (COLOR FRAMING DET./RZ GEN) input
36. CFIH in MODE SELECT (COLOR FRAMING DET./RZ GEN) input 51. RSIH in RESET INHIBIT input
These inputs set CXD1312Q to the color framing This signal inhibits for the REFB(pin 48) input
detector mode or the read zero generator mode to reset the divide-by-8 counter of 8FSC(pin 15)
as follows: input.
See the description of the REFB(pin 48) input.
SHIH CFEN CFIH MODE
52. SY1 in ROUGH SYNC PULSE input (negative pulse)
0 (0) 1 COLOR FRAMING DETECTOR VR(pin 1) , CP1(pin 59) , CP2(pin 60) and the
internal gate pulse are derived from SY1.
(1) (0) (0) RZ GENERATOR
53. SY2 in SYNC PULSE input (negative pulse)
37. M6 in SIGNAL SYSTEM SELECT input This sync pulse generates GH(pin 61) , and GH is
Set M5(pin 45) and M6 as follows according as input to the SC-H phase detection circuit. See
the video signal to be used. the description of DLH(pin 39) and ADH(pin 40).

54. FLDO out FIELD PULSE output


MODE & VIDEO SIGNAL M5 M6
Phase altering pulse by field.
TEST 0 0
0 (1) 55. PDIH in BPHN/BPHP OUTPUT INHIBIT input
4FSC/FH=909 : PALM
This signal inhibits the BPHN(pin 23) and BPHP
4FSC/FH=910 : NTSC (1) 0
(pin 24) outputs. See the description of BPHN
4FSC/FH=1135: PAL (1) (1) and BPHP.

56. HCK in nH CLOCK input


38. CFI in COLOR FRAME PULSE input
The frequency of the HCK input has the
This pulse is used for resetting the internal
specified relation with that of the H sync
LALT signal in the RZ GENERATOR mode.
signal that composes the SY2(pin 53) input. See
the description of the M1(pin 14) input.
39. DLH in DELAY H input
40. ADH in ADVANCE H input
57. GND GND
These H signals are used for the SC-H phase
58. VDD2 +5V input
detection. The SC-H phase detector outputs
ADV(pin 11) and WIN (pin 12) according as the
59. CP1 out LEADING EDGE OF SY1(pin 52) output
phase relation between DLH/ADH and the internal
60. CP2 out TRAILING EDGE OF SY1(pin 52) output
SC that is equivalent to FSC(pin 8).
If the internal SC is between ADH and DLH, the
61. GH out GATED H PULSE output
WIN output goes to LOW.
62. HR out H PULSE output
If the internal SC is in advance of ADH, the
GH and HR are derived from the SY2(pin 53) sync
ADV output goes to LOW. pulse input. Both signals consist of H pulses
The usual connection is as follows: but not of a half H pulse.
GH is processed by the noise eliminator and
CXD1312Q loses nine pulses in the V sync interval.

61 GH 63. CNTH out COUNT H output


DELAY DELAY CNTH is a H pulse signal that is divided from
the HCK(pin 56) input . the divider is reset by
40 ADH
the SY1(pin 52) input.
41 REFH See the description of the M1(pin 14) input.
39 DLH
64. SABS out TEST output

41. REFH in REFERENCE H PULSE input


REFH is used for the color framing detector and
the RZ generator. GH(pin 61) or HR(pin 62) is
usually input to this terminal.

42. GND GND

43. SCH out SC-H PHASE output


This signal shows the phase difference between
REFH(pin 41) and internal SC. When they are in
phase, the SCH output is as folows:

Hi-z Hi-z

L 1
2Fsc

44. SCR in DIRECT RESET INPUT FOR DIVIDE-BY-8 COUNTER


This signal resets the divide-by-8 counter of
8FSC(pin 15) input directly.

DIVIDE-BY-8
SCR
COUNTER
(0) RESET
1 COUNT

45. M5 in SIGNAL SYSTEM SELECT input


See the description of the M6(pin 37) input.

DME-3000/7000 2-15
IC

CXD1095Q(SONY)FLAT PACKAGE

C-MOS I/O PORT EXPANDER


—TOP VIEW—

D0-D7 8 8 8
51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 (DATA BUS)
GND LATCH
52 32 8 PA0-PA7
(PORT A)
53 31
8 8
54 30 LATCH
8 PB0-PB7
55 29 (PORT B)

56 28 8 8

57 GND 27 LATCH
VDD1 26 8 PC0-PC7
58 VDD2 (+5 V) (PORT C)
(+5 V)
59 GND 25 8 8
LATCH
60 24
8 PD0-PD7
61 23 (PORT D)

62 22 4 4
LATCH
63 21
4 PX0-PX3
(PORT X)
64 20 40
CLR
GND
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
DATA
PIN PIN PIN PIN SELECT
IN OUT SYMBOL IN OUT SYMBOL IN OUT SYMBOL IN OUT SYMBOL
No. No. No. No.
1 NC 17 PC6 33 NC 49 PX0
48
2 NC 18 PC7 34 NC 50 PX1 A2
47
3 PB1 19 NC 35 D3 51 NC A1 CONTROL
46
4 A0
PB2 20 PD0 36 D4 52 PX2
5 PB3 21 PD1 37 D5 53 PX3 43
WR
6 PB4 22 PD2 38 D6 54 PA0 44
RD
7 PB5 23 PD3 39 D7 55 PA1 45
CS
8 PB6 24 PD4 40 CLR 56 PA2 41
RST
9 PB7 25 GND 41 RST 57 GND
10 GND 26 VDD (+5 V) 42 GND 58 VDD (+5 V)
11 PC0 27 PD5 43 WR 59 PA3
12 PC1 28 PD6 44 RD 60 PA4
13 PC2 29 PD7 45 CS 61 PA5
14 PC3 30 D0 46 A0 62 PA6
15 PC4 31 D1 47 A1 63 PA7
16 PC5 32 D2 48 A2 64 PB0

PA0
54 CS RD WR A2 A1 A0 MODE
55 0 0 1 0 0 0 PORT A DATA BUS
PA1
56
PA2 0 0 1 0 0 1 PORT B DATA BUS
59
PA3 0 0 1 0 1 0 PORT C DATA BUS
60
PA4
61
0 0 1 0 1 1 PORT D DATA BUS
PA5
30 62 0 0 1 1 0 0 PORT X DATA BUS
D0 PA6
31
D1 PA7
63 0 0 1 1 0 1
32 0 0 1 1 1 0
D2
35 64
D3 PB0 0 0 1 1 1 1
36 3
D4 PB1 0 1 0 0 0 0 DATA BUS PORT A
37 4
D5 PB2
38 5
0 1 0 0 0 1 DATA BUS PORT B
D6 PB3
39 6 0 1 0 0 1 0 DATA BUS PORT C
D7 PB4
PB5
7 0 1 0 0 1 1 DATA BUS PORT D
49 8 0 1 0 1 0 0 DATA BUS PORT X
PX0 PB6
50 9
PX1 PB7 0 1 0 1 0 1
52
PX2 0 1 0 1 1 0 DATA BUS CTL REG. 1
53 11
PX3 PC0
0 1 0 1 1 1 DATA BUS CTL REG. 2
12
PC1
46 13 1 X X X X X DATA BUS ; HI-Z
A0 PC2
47 14 0 ; LOW LEVEL
A1 PC3
48 15 1 ; HIGH LEVEL
A2 PC4
16 X ; DON'T CARE
PC5
45 17 HI-Z ; HIGH IMPEDANCE
CS PC6
44 18
RD PC7
43
WR
20
PD0
41 21 D0-D7 ; DATA BUS INPUTS/OUTPUTS
RST PD1
40 22 CS ; CHIP SELECT INPUT
CLR PD2
23 RD ; READ STROBE INPUT
PD3
24 WR ; WRITE STROBE INPUT
PD4
27 A0-A2 ; ADDRESS INPUT
PD5
28 RST ; RESET INPUT
PD6
29 CLR ; CLEAR INPUT
PD7
PA0-PA7 ; PORT A INPUTS/OUTPUTS
PB0-PB7 ; PORT B INPUTS/OUTPUTS
PC0-PC7 ; PORT C INPUTS/OUTPUTS
PD0-PD7 ; PORT D INPUTS/OUTPUTS
PX0-PX3 ; PORT X INPUTS/OUTPUTS

2-16 DME-3000/7000
IC

CXD2029Q(SONY)FLAT PACKAGE

C-MOS Y/C SEPARATOR


—TOP VIEW—

INPUT
80

75

70

65

60

55

51
2 32
FV28 DC9
4 31 BGP ; BURST GATE PULSE
FV27 DC8
5 30 CKI1 ; SYSTEM CLOCK
VDD (+4V)

GND

VDD (+4V)
FV26 DC7
81 50 6 29 CKI2 ; CXD2029Q MASTER CLOCK (=CKO)
FV25 DC6
7
FV24 DC5
27 CVRF ; ANALOG CHROMA V REFERENCE
8 26 FV11 - FV18 ; FRAME DELAY (525H)
85 FV23 DC4
45 9 25 FV20 - FV28 ; FRAME DELAY (526H)
YVDD (+5V) FV22 DC3
10 24 MDF1, MDF2 ; TEMPORAL FILTER
FV21 DC2
11 23
FV20 DC1 MI0, MI1 ; CHROMA 2 FRAME DELAY
90 GND Y GND 22
GND 40 DC0 POR ; IIC BUS POWER ON RESET
94
FV18 SCL ; IIC BUS CLOCK
95 49
CVDD (+5V) FV17 DY9 SDA ; IIC BUS DATA
95 96 50
FV16 DY8 TST1 - TST4 ; TEST PIN (NORMAL USE IS LOW)
35

VDD (+5V)
97 51
FV15 DY7 VIN0 - VIN8 ; DIGITAL COMPOSITE VIDEO
C GND
VDD(+4V)

98 52
FV14 DY6 VP ; V PULSE
54
GND

99
100 31 FV13 DY5
YVRF ; ANALOG LUMINANCE V REFERENCE
100 55
FV12 DY4
1 56
FV11 DY3
57 OUTPUT
1

10

15

20

25

30 DY2
64 58 ACO ; ANALOG CHROMA
VIN8 DY1
66 59 AYO ; ANALOG LUMINANCE
VIN7 DY0
(VDD = +4V/CVDD, YVDD =+5V) 67 CIRF ; CONNECT 16 TIMES OUTPUT
VIN6
PIN PIN PIN PIN PIN 68 84 RESISTANCE
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL VIN5 LVO8
No. No. No. No. No. 69 85 CKO ; SYSTEM CLOCK
1 I 21 I 41 — 61 I 81 O VIN4 LVO7
FV11 TST2 Y GND SCL VRR1 86
70 CVB, CVG ; CONNECT ABOUT 0.1µF
2 I 22 O 42 O 62 I 82 O VIN3 LVO6
FV28 DC0 AYO SDA VRR2 87
71 DC0 - DC9 ; DIGITAL CHROMA
3 — 23 O 43 O 63 I 83 O VIN2 LVO5
VDD DC1 YVG VP VRR3 88
72 DY0 - DY9 ; DIGITAL LUMINANCE
4 I FV27 24 O DC2 44 I YVRF 64 I VIN8 84 O LVO8 VIN1 LVO4
73 89
5 I FV26 25 O DC3 45 — YVDD 65 — GND 85 O LVO7 VIN0 LVO3 LVO0 - LVO8 ; 2H DELEY
91
6 I FV25 26 O DC4 46 O YIRF 66 I VIN7 86 O LVO6 LVO2 MDO ; TEMPORAL FILTER
14 92
7 I FV24 27 O DC5 47 O YVB 67 I VIN6 87 O LVO5 MI1 LVO1 MO0, MO1 ; CHROMA 1 FRAME DELAY
16 93
8 I FV23 28 — VDD 48 I POR 68 I VIN5 88 O LVO4 MI0 LVO0 VRR1 - VRR3 ; V READ RESET
9 I FV22 29 O DC6 49 O DY9 69 I VIN4 89 O LVO3 VRW ; V WIGHT RESET
62 34
10 I FV21 30 O DC7 50 O DY8 70 I VIN3 90 — GND SDA ACO YIRF ; CONNECT 16 TIMES OUTPUT
61 42
11 I FV20 31 O DC8 51 O DY7 71 I VIN2 91 O LVO2 SCL AYO RESISTANCE
12 O MO1 32 O DC9 52 O DY6 72 I VIN1 92 O LVO1 YVB, YVG ; CONNECT ABOUT 0.1µF
77 12
13 O MO0 33 — C GND 53 — VDD 73 I VIN0 93 O LVO0 CKI1 MO1
75 13
14 I MI1 34 O ACO 54 O DY5 74 I TST4 94 I FV18 CKI2 MO0
17
15 — GND 35 O CVG 55 O DY4 75 I CKI2 95 I FV17 MDO
18
16 I MI0 36 I CVRF 56 O DY3 76 O CKO 96 I FV16 MDF1
19 35
17 O MDO 37 — CVDD 57 O DY2 77 I CKI1 97 I FV15 MDF2 CVG
38
18 I MDF1 38 O CIRF 58 O DY1 78 — VDD 98 I FV14 CIRF
20 39
19 I MDF2 39 O CVB 59 O DY0 79 I BGP 99 I FV13 TST1 CVB
21 43
20 I TST1 40 — GND 60 I TST3 80 O VRW 100 I FV12 TST2 YVG
60 46
TST3 YIRF
74 47
TST4 YVB

48 76
POR CKO
63 80
VP VRW
79 81
BGP VRR1
36 82
CVRF VRR2
44 83
YVRF VRR3

16, 14
MI0, MI1
11-4, 2 –
FV20-FV28
– + 62
SDA
MOTION
+ DETECTOR
1, 100-94 – IIC BUS I/F
FV11-FV18
+ 61
SCL
93-91
9 89-84
LVO0-LVO8

73-66
64 8
VIN0-VIN8 1H 1H STILL PICTURE C

34
MIX CDAC ACO
DL
22-27
10 29-32
DC0-DC9

B.P.F. B.P.F. B.P.F. –


+ 42
YDAC AYO
– + + –
59-54
SELECTOR 10 52-49
DY0-DY9
A MOTION PICTURE C
B
X
C

B.P.F. D
S

LOGICAL OPERATION

DME-3000/7000 2-17
IC

CXD8031Q(SONY)FLAT PACKAGE CXD8033Q(SONY)FLAT PACKAGE


C-MOS GATE ARRAY C-MOS GATE ARRAY
-TOP VIEW- -TOP VIEW-
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41

51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
GND

GND

GND
52

N.C.

N.C.

GND

N.C.
65 40 53 32
66 39 54 31
67 38 55 30
68 37 56 29
69 36 57 GND 28
70 35 58 VDD (+5V) 27
71 34 59 VDD (+5V) 26
72 VDD(+5V) 33 60 GND 25
73 VDD(+5V) 32 61 24
74 31 62 23
75 30 63 22

GND
76 29 21

N.C.
64
77 28 20
78 27
79 26

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
GND

GND

GND

80 NC 25

PIN PIN PIN


I/O SYMBOL I/O SYMBOL I/O SYMBOL
NO. NO. NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

1 – N.C. 23 I A03 45 O Y09


2 O X05 24 I XCK 46 O Y08
PIN PIN PIN PIN 3 O X04 25 – GND 47 O Y07
I/O SYMBOL I/O SYMBOL I/O SYMBOL I/O SYMBOL
NO. NO. NO. NO. 4 O X03 26 – VDD (+5V) 48 O Y06
1 O Q2 21 O Q11 41 O Q18 61 I OE 5 O X02 27 I LDS 49 – N.C.
2 — GND 22 O Q12 42 — GND 62 I CLK 6 O X01 28 I UDS 50 – N.C.
3 O Q3 23 — GND 43 O Q19 63 — GND 7 O X00 29 I WE0 51 O Y05
4 O Q4 24 I CLR 44 O Q20 64 O E2 8 I D00 30 I WE1 52 O Y04
5 I D4 25 — NC 45 I D20 65 O E3 9 I D01 31 O AR0 53 O Y03
6 I D5 26 O Q13 46 I D21 66 O E4 10 – GND 32 O AR1 54 O Y02
7 I D6 27 O Q14 47 I D22 67 I C4 11 I D02 33 O LN0 55 O Y01
8 I D7 28 O Q15 48 I D23 68 I C5 12 I D03 34 O LN1 56 O Y00
9 O Q5 29 I D13 49 O Q21 69 I CE 13 I D04 35 O WKEY 57 – GND
10 O Q6 30 I D14 50 O Q22 70 I A0 14 I D05 36 – N.C. 58 – VDD (+5V)
11 O Q7 31 I D15 51 O Q23 71 I A1 15 I D06 37 I XLD 59 O X11
12 — GND 32 I DS1 52 — GND 72 I WE 16 I D07 38 I YLD 60 O X10
13 O Q8 33 — VDD(+5V) 53 I MODE 73 — VDD(+5V) 17 I D08 39 I YMD 61 O X09
14 O Q9 34 I DS2 54 I TEST 74 I DS0 18 I D09 40 I YCK 62 O X08
15 I D8 35 I D16 55 I C0 75 I D0 19 I D10 41 I TEST 63 O X07
16 I D9 36 I D17 56 O E0 76 I D1 20 I D11 42 – GND 64 O X06
17 I D10 37 I D18 57 I C1 77 I D2 21 I A01 43 O Y11
18 I D11 38 I D19 58 I C2 78 I D3 22 I A02 44 O Y10
19 I D12 39 O Q16 59 O E1 79 O Q0
20 O Q10 40 O Q17 60 I C3 80 O Q1

21 31 A01 - A03 ; ADDRESS 01 - 03


A01 AR0 AR0, 1 ; VALID AREA 0, 1
22 32
70 79 A0, 1 ; ADDRESS A02 AR1 D00 - D11 ; DATA INPUT 00 - 11
A0 Q0 C0 - C5 ; COMMAND 23
71 80 A03 LDS ; LOWER DATA STROBE
A1 Q1 CE ; COMMAND ENABLE 7 LN0, 1 ; VALID LINE 0, 1
1 X00
Q2 CLK ; CLOCK 6 UDS ; UPPER DATA STROBE
75 3 CLR ; CLEAR X01
D0 Q3 8 5 TEST ; TEST PIN
76 4 D0 - D23 ; DATA INPUT D00 X02
D1 Q4 9 4 WE0, 1 ; WRITE ENABLE 0, 1
77 9 DS0 - DS2 ; DATA STROBE D01 X03 X00 - X11 ; X CONVERTER OUTPUT
D2 Q5 E0 - E4 ; EXPONENT OUTPUT 11 3
78 10 D02 X04 XCK ; X CLOCK
D3 Q6 MODE ; OUTPUT MODE 12
D03 X05
2 WKEY ; WIPE KEY
5 11
D4 Q7 OE ; OUTPUT ENABLE 13 64 XLD ; X LOAD
6 13 D04 X06
D5 Q8 Q0 - Q23 ; DATA OUTPUT 14 63 Y00 - Y11 ; Y COUNTER OUTPUT 00 - 11
7 14 TEST ; TEST PIN D05 X07
D6 Q9 15 62 YCK ; Y CLOCK
8 20 WE ; WRITE ENABLE D06 X08 YLD ; Y LOAD
D7 Q10 16 61
15 21 D07 X09 YMD ; Y MODE
D8 Q11 17 60
16 22 D08 X10
D9 Q12 18 59
17 26 D09 X11
D10 Q13 19
18 27 D10
D11 Q14 20 33
19 28 D11 LN0
D12 Q15 34
29 39 LN1
D13 Q16 29
30 40 WE0
D14 Q17 30 35
31 41 WE1 WKEY
D15 Q18
35 43
D16 Q19 27
36 44 LDS
D17 Q20 28
37 49 UDS
D18 Q21 41
38 50 TEST
D19 Q22
45 51
D20 Q23 24 56
46 XCK Y00
D21 55
47 56 Y01
D22 E0 37 54
48 59 XLD Y02
D23 E1 53
64 Y03
E2 40 52
74 65 YCK Y04
DS0 E3 38 51
32 66 YLD Y05
DS1 E4 39 48
34 YMD Y06
DS2 47
Y07
46
55 Y08
C0 45
57 Y09
C1 44
58 Y10
C2 43
60 Y11
C3
67
C4
68
C5

69
CE
62
CLK
24
CLR

53
MODE
61
OE
54
TEST
72
WE

2-18 DME-3000/7000
IC

CXD8053Q(SONY)FLAT PACKAGE

C-MOS BOX GENERATOR


—TOP VIEW—
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
INPUT
ADR ; SERIAL ADDRESS
16 3
MXIB SOLB CHAR ; CHARACTER
GND

GND

GND
17 4 CK ; SYSTEM CLOCK (MAX. 20 MHz)
MXIA SOLA
65 40
18
MXI9 SOL9
5 CKD ; SERIAL INTERFACE CLOCK
66 39 CKX ; SWITCHING TIMING PULSE (HIGH ACTIVE)
19 6
MXI8 SOL8
67 38 CS ; CHIP SELECT
20 7
MXI7 SOL7 EXFR ; EXTERNAL FRINGE PULSE
68 37
21 8
36 MXI6 SOL6 EXT ; EXTERNAL FRINGE MODE
69 22 9
MXI5 SOL5 FLOE ; FIELD ODD/EVEN
70 35 HD ; HORIZONTAL DRIVE PULSE
24 10
MXI4 SOL4
71 34 MIXB-MIX0 ; MODE 0
25
MXI3 SOL3
11 NOT USED
72 VDD (+5 V) 33 MODE 1 VIDEO DATA
26 13
MXI2 SOL2
73 VDD (+5 V) 32 MODE 2
27 14 MULTIPLEXED SINE DATA
MXI1 SOL1
74 31 MODE 3
28 15
30 MXI0 SOL0
75
MOD1, 2 ; MODE SET
76 29
37 65 MOD1 MOD0 MODE FUNCTION
28 OCM MXGB
77
1
OCS MXGA
64 BOX MASK SOLID
78 27 0 MODE0
51 62 GENERATOR
79 26 OCG MXG9 0
SAFE TITLE GENERATOR/
GND

GND

GND
61 1 MODE1
25 MXG8
80 INSERTER
29 60
EXT MXG7 WIPE FRINGE
30 59 0 MODE2
EXFR MXG6 MODULATION OSCILLATOR
31 58 1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
HD MXG5 WIPE H-V MODULATION
32 57 1 MODE3
VD MXG4 OSCILLATOR
PIN PIN PIN PIN 34 56
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL FLOE MXG3 0 ; LOW LEVEL 1 ; HIGH LEVEL
No. No. No. No.
55
1 I OCS 21 I MXI6 41 O MXO3 61 O MXG8
MXG2 OCG ; OUTPUT ENABLE OF MXGB-MXG0 (LOW: ENABLE)
67 54 OCM ; OUTPUT ENABLE OF MXOB-MXO0 (LOW: ENABLE)
CHAR MXG1
2 — GND 22 I MXI5 42 — GND 62 O MXG9 68 53 OCS ; OUTPUT ENABLE OF SOLB-SOL0 (LOW: ENABLE)
TST1 MXG0
3 O SOLB 23 — GND 43 O MXO4 63 — GND 69 RST ; SERIAL CONTROL RESET
TST0
4 O SOLA 24 I MXI4 44 O MXO5 64 O MXGA TRCK ; FRINGE DATA READ PULSE
70 50
5 O SOL9 25 I MXI3 45 O MXO6 65 O MXGB MOD1 MXOB TST0 ; OUTPUT SWITCH
71 49 TST1 ; TEST/NORMAL
MOD2 MXOA
6 O SOL8 26 I MXI2 46 O MXO7 66 O TITL
79
TRCK MXO9
48 VD ; VERTICAL DRIVE PULSE
7 O SOL7 27 I MXI1 47 O MXO8 67 I CHAR
47 OUTPUT
8 O SOL6 28 I MXI0 48 O MXO9 68 I TST1 MXO8
72
RST MXO7
46 DCTL ; MXO OUT CONTROL PULSE
9 O SOL5 29 I EXT 49 O MXOA 69 I TST0 GCTL ; MXG OUT CONTROL PULSE
74 45
10 O SOL4 30 I EXFR 50 O MXOB 70 I MOD1 CKX MXO6
75 44
MXGB-MXG0 ; MODE 0 COUNTER OUTPUT
11 O SOL3 31 I HD 51 I OCG 71 I MOD0 CS MXO5
76 43 MODE 1 COUNTER OUTPUT
12 — GND 32 I VD 52 — GND 72 I RST DIO MXO4
77 41 MODE 2 FRINGE MOD. GAIN
13 O SOL2 33 — VDD 53 O MXG0 73 — VDD ADR MXO3
MODE 3 H-V MOD. MULTIPLEXED GAIN
78 40
14 O SOL1 34 I FLOE 54 O MXG1 74 I CKX CKD MXO2
80 39 MXOB-MXO0 ; MODE 0 SOLID DATA
15 O SOL0 35 O GCTL 55 O MXG2 75 I CS MXO1
38 MODE 1 SOLID DATA
16 I MXIB 36 O DCTL 56 O MXG3 76 I/O DIO MXO0
MODE 2 FRINGE MOD. ADDRESS
17 I MXIA 37 I OCM 57 O MXG4 77 I ADR MODE 3 H-V MOD. MULTIPLEXED ADDRESS
36
18 I MXI9 38 O MXO0 58 O MXG5 78 I CKD DCTL
35 SOLB-SOL0 ; MODE 0 SOLID DATA
19 I MXI8 39 O MXO1 59 O MXG6 79 I TRCK GCTL
66 MODE 1 SAFETITLED DATA
20 I MXI7 40 O MXO2 60 O MXG7 80 I CK TITL
MODE 2 FRINGE DATA
MODE 3 H MOD. DATA
TITL ; SAFE TITLE
INPUT/OUTPUT
DIO ; SERIAL DATA

BOX SOLID 3-11


13-15 SOLB, SOLA
12.4 BIT SOL9-SOL0
INTEGRATOR
H. DIRECT
SINE DATA 79
TRCK
12 DEMULTIPLEXER
16-22
12 24-28 MXIB, MXIA
POSITIVE/ POSITIVE/ 12 MXI9-MXI0
NEGATIVE NEGATIVE
12.4 BIT 12 NAM NAM
INTEGRATOR CURSUR TITLE
H. DIRECT LEVEL LEVEL

67
CHAR
CURSOR 66
TITL
12.4 BIT GENERATOR
INTEGRATOR
V. DIRECT

12
12
POSITIVE/ POSITIVE/ 12 V (F) MOD GAIN 65-64
GAIN DATA 62-53 MXGB, MXGA
NEGATIVE 12 NEGATIVE MXG9-MXG0
12.4 BIT NAM NAM 12 MULTIPLEXER
12 H MOD GAIN
INTEGRATOR
V. DIRECT
V (F) MOD. ADDRESS 12
ADDRESS 50-43
41-38 MXOB, MXOA
DATA MXO9-MXO0
H MOD. ADDRESS 12 MULTIPLEXER

DME-3000/7000 2-19
IC

CXD8052Q(SONY)FLAT PACKAGE

C-MOS SERIAL CONTROLLER


— TOP VIEW —
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
24 INPUT
D15
21 56 AO ; REGISTER SELECT
D14 DO
LOW : DATA REGISTER ACTIVE
GND

GND

GND
20
D13
65 40 19 HIGH: ADDRESS REGISTER ACTIVE
D12
66 39 18 CKD ; SERIAL INTERFACE CLOCK
D11
67 38 17 CS ; CHIP SELECT (LOW: ACTIVE)
D10
68 37 16 DIN ; SERIAL DATA
D9
69 36 15 11
MODE ; CPU/VIDEO BOARD MODE SELECT
D8 ADR
70 35 14
LOW: CPU MODE
D7
71 34 10
RD ; READ ENABLE (LOW: ACTIVE)
D6
72 VDD (+5 V) 33 9
RST ; RESET PULSE
D5
73 VDD (+5 V) 32 8 35
WR ; WRITE ENABLE (LOW: ACTIVE)
D4 ER
74 31 7 34
D3 RF
75 30 OUTPUT
6 32
D2 RB
76 29 ADR ; SERIAL ADDRESS
5 31
D1 RW
77 28 CKDO1,
4 30
D0 WW CKDO2 ; SERIAL INTERFACE CLOCK
78 27 29
WF DO ; SERIAL DATA
79 26 58
GND

GND

GND

MODE ER ; READ ERROR (HIGH: ERROR)


80 25
RB ; READ BUSY (HIGH: BUSY)
25
AO RF ; READ BUFFER FULL OUT
26
RD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

HIGH: READ REGISTERS ARE FULL


27
WR LOW : READ REGISTERS ARE EMPTY
<CPU MODE> (VDD = +5 V) 28
CS RW ; READ WINDOW
PIN PIN PIN PIN HIGH: READ DATA ARE RECEIVING AT DIN TERMINAL
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL 64
CKD CKDO1
22
No. No. No. No. WF HIGH: WRITE REGISTERS ARE FULL
51 3
1 — NC 21 I/O D14 41 — NC 61 — NC RST CKDO2 LOW : WRITE REGISTERS ARE EMPTY
54
2 — GND 22 O CKDO1 42 — GND 62 — NC DIN WW ; WRITE WINDOW
3 O CKDO2 23 I GND 43 — NC 63 — GND HIGH: SERIAL DATA OR ADDRESS ARE SENDING FROM D OUT
4 I/O D0 24 I/O D15 44 — NC 64 I CKD OR ADR (SERIAL ADDRESS) TERMINALS
5 I/O D1 25 I AO 45 — NC 65 — NC
6 I/O D2 26 I RD 46 — NC 66 — NC
7 I/O D3 27 I WR 47 — NC 67 — NC
8 I/O D4 28 I CS 48 — NC 68 — NC
9 I/O D5 29 O WF 49 — NC 69 — NC 21-BIT
10 I/O D6 30 O WW 50 — NC 70 — NC READ DATA 16 SERIAL 54
16-BIT TO DIN
11 O ADR 31 O RW 51 I RST 71 — NC REGISTER PARALLEL
CONVERTER
12 — GND 32 O RB 52 — GND 72 — NC
13 — NC 33 — VDD 53 — NC 73 — VDD
14 I/O D7 34 O RF 54 I DIN 74 — NC READ STATUS
16 16 GENERATOR
15 I/O D8 35 O ER 55 — NC 75 — NC STATUS
&
REGISTERS
16 I/O D9 36 — NC 56 O DO 76 — NC WRITE STATUS
SEQUENSER
17 I/O D10 37 — NC 57 — NC 77 — NC 29-32
4-10
18 I/O D11 38 — NC 58 I MODE 78 — NC 14-21, 24 34, 35
WF, WW, RW
19 I/O D12 39 — NC 59 — NC 79 — NC D0-D15
RB, RF, ER
16 6
20 I/O D13 40 — NC 60 — NC 80 — NC
20-BIT
16 16-BIT 16 PARALLEL 56
DATA TO DO
LATCH SERIAL
CONVERTER

20-BIT
16 16-BIT 16 PARALLEL 11
26
RD ADDRESS TO ADR
28 LATCH SERIAL
CS
CONVERTER
27
WR
25
AO
51
RST CONTROL
58
MODE
64
CKD

2-20 DME-3000/7000
IC

<VIDEO BOARD MODE>


(VDD = +5 V)

Y04
41 PIN PIN PIN PIN
I/O SYMBOL I/O SYMBOL I/O SYMBOL I/O SYMBOL
40 No. No. No. No.
Y05
39 1 O Y28 21 I/O Y19 41 O Y04 61 O ROMCK
Y06
58 38 2 — GND 22 O CKDO1 42 — GND 62 O ROMCS
MODE Y07
37 3 O CKDO2 23 — GND 43 O THMO 63 — GND
Y08
36 4 I/O Y27 24 I/O Y18 44 O CS 64 I CKDI
Y09
35 5 I/O Y26 25 I/O Y17 45 O CSXP 65 O Y3B/RCS
Y0A
64 34 6 I/O Y25 26 I/O Y16 46 I CA4 66 O Y3A/WCS
CXDI Y0B
32 7 I/O Y24 27 I/O Y15 47 I CA3 67 O Y39/IA5
Y0C
53 31 8 I/O Y23 28 I/O Y14 48 I CA2 68 O Y38/IA4
ADRI Y0D
30 9 I/O Y22 29 O Y0F 49 I CA1 69 O Y37/IA3
Y0E
29 10 I/O Y21 30 O Y0E 50 I CA0 70 O Y36/IA2
Y0F
11 O ADRO 31 O Y0D 51 I RST 71 O Y35/IA1
28 12 — GND 32 O Y0C 52 — GND 72 O Y34/IA0
Y14
27 13 I/O DIO 33 — VDD 53 I ADRI 73 — VDD
Y15
26 14 I/O Y20 34 O Y0B 54 I DIN 74 O Y33
Y16
25 15 I/O Y1F 35 O Y0A 55 O OEH 75 O Y32
Y17
54 24 16 I/O Y1E 36 O Y09 56 O DO 76 O Y31
DIN Y18
21 17 I/O Y1D 37 O Y08 57 O GENO 77 O Y30
Y19
20 18 I/O Y1C 38 O Y07 58 I MODE 78 O Y2B
Y1A
19 19 I/O Y1B 39 O Y06 59 I ROMI 79 O Y2A
Y1B
18
20 I/O Y1A 40 O Y05 60 O ROMO 80 O Y29
Y1C
17
Y1D
16
Y1E INPUT
15 ADRI ; SERIAL ADDRESS
Y1F
46
CA4 CA0-CA4 ; CARD ADDRESS (5-BIT)
47 14 CKDI ; SERIAL INTERFACE CLOCK
CA3 Y20
48 10 DIN ; SERIAL DATA
CA2 Y21
MODE ; CPU/VIDEO BOARD MODE SELECT
49 9
CA1 Y22 H: VIDEO MODE
50 8
CA0 Y23 ROMI ; READ DATA IN FOR EEPROM
7 RST ; RESET PULSE (L: RESET)
Y24
6
Y25
5 OUTPUT
Y26
4
ADRO ; SERIAL ADDRESS
Y27 CKDO1, CKDO2 ; SERIAL INTERFACE CLOCK
1
Y28 CSXP ; CHIP SELECT OUT FOR 20-BIT CROSS POINT ICS
80 DO ; SERIAL DATA
Y29
Y2A
79 GENO ; UNIVERSAL CONTROL
59 78 OEH ; ENABLE OUT FOR DRIVER
ROMI Y2B
ROM CK ; CLOCK OUT FOR EEPROM
ROM CS ; CHIP SELECT OUT FOR EEPROM
77
Y30 ROMD ; WRITE DATA OUT FOR EEPROM
76
Y31 THMO ; THERMISTOR CONTROL
75 Y04-Y3B ; IC ADDRESS DECODER
Y32
74
Y33
72 INPUT/OUTPUT
IA0/Y34
71
DIO ; SERIAL DATA
IA1/Y35
70
IA2/Y36
69
IA3/Y37
68
IA4/Y38
67
IA5/Y39
66
WCS/Y3A
65
RCS/Y3B

22
CKDO1
3
CKDO2

11
ADRO
13
DIO
51 44
RST CS
45
CSXP
57
GENO
43
THMO
55
OEH
56
DO
60
ROMD
61
ROMCK
62
ROMCS

11
ADRO

21-BIT 16 45
SERIAL 6 IC CSXP
53 48
ADRI TO ADDRESS
PARALLEL DECODER
CONVERTER
4 SYNC 44
16-BIT CS
DETECT ADDRESS 55
LATCH OEH
5 TIMING 41-34, 32-24
PULSE 21-14, 10-4, 1
CARD GEN 80-74, 72-65
ADDRESS 12 Y04-Y33
MATCHING 48 Y34/IA0-Y39/IA5
DETECTOR Y3A/WCS, Y3B/RCS
50-46 5
CA0-CA4

51 4
RST
58 61
MODE I/O ROMCK
DATA 62
64 ADDRESS
CKDI REGISTER ROMCS
DECODER 60
22 E2 ROM ROMD
CKDO1 INTERFACE
3 43
CKDO2 THMO
16 4 57
16-BIT GENO
54 SERIAL
DIN TO
PARALLEL 13
DIO
CONVERTER

56
59 20-BIT DO
ROMI SHIFT
REGISTER

DME-3000/7000 2-21
IC

CXD8058Q(SONY)FLAT PACKAGE
IL00
C-MOS MEMORY CONTROL
— TOP VIEW —
36
35
34
33
32
31
30
29
28
27
26
25
MODE* FUNCTION
GND

MOD 0 4 CHANNEL (CH1 TO CH4) CYCLIC PULSE GENERATORS


37 24
2 CHANNEL (CH1 AND CH2) CYCLIC PULSE GENERATORS
38 23 MOD 1
1 CHANNEL (CH3) CLOCK FREQUENCY COUNTER
39 22
2 CHANNEL (CH1 AND CH2) CYCLIC PULSE GENERATORS
40 21 MOD 2
2 CHANNEL (CHC AND CHD) 8-BIT SERIAL TO PARALLEL CONVERTOR
41 20
42 GND VDD (+5 V) 19 MOD 3 4 CHANNEL (CHA TO CHD) 8-BIT SERIAL TO PARALLEL CONVERTOR
43 VDD (+5 V) GND 18
* THESE 4 MODE CONTROLS ARE DETERMINED AT MODE REGISTER.
44 17
45 16
MODE 0 MODE 1 MODE 2 MODE 3
46 15
37 33 37 33 35 33 1 20
47 14 CK1 PLS1 CK1 PLS1 LD1 PLS1 D7 B7
34 34 29 34 29 2 21
48 13 EN1 EN1 PLS2 EN1 PLS2 D6 B6
GND

35 29 35 37 3 22
LD1 PLS2 LD1 CK1 D5 B5
38 38 32 1 4 23
CK2 CK2 LD2 D7 D4 B4
30 26 30 30 2 5 24
EN2 PLS3 EN2 EN2 D6 D3 B3
1
2
3
4
5
6
7
8
9
10
11
12

32 32 38 3 7 25
LD2 LD2 CK2 D5 D2 B2
39 21 4 8 26
CK3 PLS4 D4 D1 B1
PIN PIN PIN PIN 27 44 5 9 27
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL EN3 RST D3 D0 B0
No. No. No. No. 28 20 48 7 10 28
LD3 TEST CS D2 C7 A7
1 I/O D7/PA4 13 I/O C4/PD4 25 O B2 37 I CK1 40 8 11 29
CK4 D1 C6 A6
2 I/O D6/PA3 14 I/O C3/PD3 26 O B1/PLS3 38 I CK2 22 47 9 12 30
EN4 ADR D0 C5 A5
3 I/O D5/PA2 15 I/O C2/PD2 27 I/O B0/EN3 39 I CK3 23 46 13 32
LD4 DIO C4 A4
4 I/O D4/PA1 16 I/O C1/PD1 28 I/O A7/LD3 40 I CK4 45 10 14 33
CKD C7 C3 A3
5 I/O D3/PDB 17 I/O C0/PD0 29 O A6/PLS2 41 I CKX 41 41 41 11 15 34
CKX CKX CKX C6 C2 A2
6 — GND 18 — GND 30 I/O A5/EN2 42 — GND 44 44 12 16 35
RST RST C5 C1 A1
7 I/O D2/PDA 19 — VDD 31 — GND 43 — VDD 45 45 13 17 36
CKD CKD C4 C0 A0
8 I/O D1/PD9 20 I/O B7/TEST 32 I/O A4/LD2 44 I RST 46 46 14
DIO DIO C3
9 I/O D0/PD8 21 O B6/PLS4 33 O A3/PLS1 45 I CKD 47 47 15 41 37
ADR ADR C2 CKX CK1
10 I/O C7/PD7 22 I/O B5/EN4 34 I/O A2/EN1 46 I/O DIO 48 48 16 44 38
CS CS C1 RST CK2
11 I/O C6/PD6 23 I/O B4/LD4 35 I/O A1/LD1 47 I ADR 17 45 39
C0 CKD CK3
12 I/O C5/PD5 24 O B3 36 O A0 48 I CS 46 40
DIO CK4
47
ADR
48
CS

<COMMON TERMINALS FOR ALL FUNCTION>

INPUT
ADR ; SERIAL ADDRESS
CKD ; SERIAL INTERFACE CLOCK
CKX ; SWITCHING TIMING PULSE
CS ; CHIP SELECT (LOW: ACTIVE)
RST ; RESET PULSE (LOW: RESET REGISTERS)

INPUT/OUTPUT
DIO ; SERIAL DATA
(MODE CONTROL DATA, REGISTER DATA IN
CH3 CLOCK FREQUENCY COUNTER DATA OUT)

<TERMINALS FOR CYCLIC PULSE GENERATORS>

INPUT
CK1-CK4 ; SYSTEM CLOCK FOR 12-BIT COUNTER OF CH1-CH4
EN1-EN4 ; ENABLE IN FOR 12-BIT COUNTER OF CH1-CH4
LD1-LD4 ; LOAD IN FOR 12-BIT COUNTER OF CH1-CH4

OUTPUT
PLS1-PLS4 ; PULSE OUT (CARRY OUTPUT) OF CH1-CH4

<TERMINALS FOR 8-BIT SERIAL TO PARALLEL CONVERTORS>

OUTPUT
A7-A0 ; 8-BIT PARALLEL DATA OUT OF CHA
B7-B0 ; 8-BIT PARALLEL DATA OUT OF CHB
C7-C0 ; 8-BIT PARALLEL DATA OUT OF CHC
D7-D0 ; 8-BIT PARALLEL DATA OUT OF CHD

2-22 DME-3000/7000
IC

36-32
8 8 30-28 A0-A7
LD1, EN1, PLS1, LD2,
EN2, PLS2, LD3

8 8 27-20 B0-B7
EN3, PLS3, LD4, EN4,
PLS4

8 8 17-10 C0-C7
MODE3 (PD0-PD7)
2
MODE MODE2 9-7
REGISTER 8 8 5-1 D0-D7
MODE1 PD8, PD9, PDA, PDB,
PA1-PA4

LD1
46 SERIAL IN 12 12 12
DIO TO CH1 (A) DATA
LATCH
PARALLEL OUT REGISTER
12-BIT COUNTER
MACRO CELL PLS1
EN1
FOR
8
CH1 CONTROL 8 CYCLIC PULSE
LATCH (CH1)
REGISTER
CK1
PARALLEL IN 12
TO
SERIAL OUT
LD2
12 12
CH2 (B) DATA
LATCH
REGISTER
12-BIT COUNTER
MACRO CELL PLS2
EN2
FOR
7
CH2 CONTROL 7 CYCLIC PULSE
LATCH (CH2)
REGISTER
CK2

LD3
12 12
CH3 (C) DATA
LATCH
REGISTER
12-BIT COUNTER
MACRO CELL PLS3
EN3
FOR
8
CH3 CONTROL 8 CYCLIC PULSE
LATCH (CH3)
REGISTER
CK3 12
48
CS
47
ADR
LD4
45 SERIAL 12
CKD 12 12
INTERFACE CH4 (D) DATA
41 12 LATCH
CKX REGISTER
12-BIT COUNTER
44
RST MODE1 MACRO CELL PLS4
EN4
FOR
7
CH4 CONTROL 7 CYCLIC PULSE
LATCH (CH4)
REGISTER
CK4
37-40
CK1-CK4

DME-3000/7000 2-23
IC

CXD8059(SONY)FLAT PACKAGE
C-MOS XY ADDRESS GENERATOR
-TOP VIEW-
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
34 48 INPUT
XY AD10 ACLR ; ADDRESS CLEAR TIMING PULSE
GND
33 47
52 32 MON AD9 X MODE HD INPUT ( )
46
53 31 AD8 Y MODE VD INPUT ( )
1 45 ADR ; SERIAL ADDRESS
54 30 MD9 AD7
32 44 AINC ; ADDRESS INCREMENT TIMING PULSE
55 29 MD8 AD6
31 43 X MODE HIGH OR LOW (FIXED)
56 28 MD7 AD5
30 41 Y MODE HD INPUT ( )
57 GND 27 MD6 AD4 CK ; SYSTEM CLOCK
29 40
58 VDD (+5V) VDD (+5V) 26 MD5 AD3 CKD ; SERIAL INTERFACE CLOCK
28 39 CKX ; SWITCHING TIMING PULSE
59 GND 25 MD4 AD2
27
MD3 AD1
38 CS ; CHIP SELECT (LOW : ACTIVE)
60 24 FCLR ; FIELD CLEAR TIMING PULSE (FOR PAL)
24 37
61 23 MD2 AD0
23 X MODE FIELD RESET PULSE
62 22 MD1 Y MODE HIGH OR LOW (FIXED)
22 36
63 21 MD0 ADM1 FLOE ; FIELD ADD / EVEN PULSE
35
HIGH : EVEN FIELD
GND

64 20 ADM2
NC
NC
NC
NC
NC
NC

NC

21 MD0 - MD9 ; 9.2 BIT DIGITAL MODULATION DATA IN


MDM1
20 52 (2'S COMPLEMENT)
MDM2 TST05
53 MDM1, MDM2 ; 9.2 BIT DIGITAL MODULATION DATA IN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

TST04 (2'S COMPLEMENT)


61 54
TST TST03 MON ; MODULATION ON / OFF CONTROL
(VDD = +5V) 8 55
ACLR TST02 LOW : MODULATION ON
9 59 MSFI ; MULTI-SHIFT FLAG IN (LOW : ACTIVE)
PIN PIN PIN PIN AINC TST01
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL 11 60
NO. NO. NO. NO. FCLR TST00
Y MODE IC PULL UP
1 I MD9 17 I CS 33 I MON 49 I OE 12 X MODE IC CONNECT MSFO OUT
FLOE
2 – 18 I 34 I 50 O 63 51 OF Y MODE IC TO MSFI
NC CXK XY STFO MSFI MSFO
50
OF X MODE IC
3 – NC 19 I CXD 35 O ADM2 51 O MSFO 64
STFI STFO OE ; OUTPUT ENABLE
4 – NC 20 I MDM2 36 O ADM1 52 O TSO5 (LOW : ENABLE, HIGH : DISABLE)
5 – NC 21 I MDM1 37 O AD0 53 O TSO4 PAL ; NTSC / PAL SELECT
6 – NC 22 I MD0 38 O AD1 54 O TSO3 RCS ; READ CHIP SELECT (LOW : ACTIVE)
7 – NC 23 I MD1 39 O AD2 55 O TSO2 49 15 STFI ; STREAM FLAG IN (LOW : ACTIVE)
OE DIO
62 Y MODE IC PULL UP
8 I ACLR 24 I MD2 40 O AD3 56 I CK PAL X MODE IC CONNECT STFO OUT
9 I AINC 25 – GND 41 O AD4 57 – GND 14
ADR OF Y MODE IC TO STFI
10 – GND 26 – VDD 42 – GND 58 – VDD 16 OF X MODE IC
RCS
11 I FCLR 27 I MD3 43 O AD5 59 O TSO1 17
CS
XY ; X (HORIZONTAL) / Y (VERTICAL)
12 I FLOE 28 I MD4 44 O AD6 60 O TSO0 19 SELECT
CKD
13 – 29 I 45 O 61 I 18 LOW : X (HORIZONTAL)
NC MD5 AD7 TST CKX
56
ADDRESS GENERATION MODE
14 I ADR 30 I MD6 46 O AD8 62 I PAL HIGH : Y (VERTICAL)
15 I/O DIO 31 I MD7 47 O AD9 63 I MSFI ADDRESS GENERATION MODE
16 I RCS 32 I MD8 48 O AD10 64 I STFI
OUTPUT
AD0 - AD10 ; 11.2 BIT ADDRESS OUT
ADM1, ADM2 ; 11.2 BIT ADDRESS OUT
MSFO ; MULTI-SHIFT FLAG OUT (LOW : ACTIVE)
TSTO ; TEST
STFO ; STREAM FLAG OUT (LOW : ACTIVE)

INPUT / OUTPUT
DIO ; SERIAL DATA

6 60, 59, 55-52


TS00-TS05
51
MSF0
50
STF0

61
TSTH
8
ACLR
9 WAVEFORM
AINC GENERATOR
12
FLOE
63
MSFI
64
STFI
37-41, 43-48
36, 35
MULTI-GAIN MODULATION 13 AD0-AD10,
ADDER ADM1, ADM2

49
19 OE
CKD
14
ADR
18 22, 24, 27-32
CKX SERIAL WAVEFORM 12 1, 21, 20
56 MD0-MD9,
CK INTERFACE GENERATOR MDM1, MDM2
17
CS &
16 CONTROL 33
RCS MON
34
XY
15
DIO

11
FCLR
62
PAL

2-24 DME-3000/7000
IC

CXD8060Q(SONY)FLAT PACKAGE
C-MOS POLAR COORDINATE
—TOP VIEW—
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
PIN PIN PIN PIN
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL
No. No. No. No.

GND

VDD (+5 V)

GND

GND
91 GND 60 1 — GND 31 — GND 61 — GND 91 — GND
92 59 2 I Y1 32 O P4 62 I/O TIO0 92 I XC
93 VDD (+5 V) 58 3 I Y0 33 O P5 63 I/O TIO1 93 I XB
94 57 4 I OB2S 34 O P6 64 I/O TIO2 94 I XA
95 56 5 I CKX 35 O P7 65 I/O TIO3 95 I X9
96 55 6 I RST 36 O P8 66 I/O TIO4 96 I X8
97 54 7 I ADR 37 O P9 67 I/O TIO5 97 I X7
98 53 8 I/O DIO 38 O PA 68 I/O TIO6 98 I X6
99 52 9 I CS 39 O PB 69 I/O TIO7 99 I X5
100 GND 51 10 I CKD 40 O PC 70 I/O TIO8 100 I X4
101 GND 50 11 — GND 41 — GND 71 — GND 101 — GND
102 49 12 I TST0 42 O PD 72 I/O TIO9 102 I X3
103 48 13 I TST1 43 O ML 73 I/O TIOA 103 I X2
104 47 14 I TST2 44 O M0 74 I/O TIOB 104 I X1
105 VDD (+5 V) 46 15 I TST3 45 O M1 75 I/O TIOC 105 I X0
106 VDD (+5 V) 45 16 — VDD 46 — VDD 76 — VDD 106 — VDD
107 44 17 I RCL0 47 O M2 77 I/O TIOD 107 I CK
108 43 18 I RCL1 48 O M3 78 I/O TIOE 108 I YC
109 42 19 I RDP0 49 O M4 79 I/O TIOF 109 I YB
110 GND 41 20 I RDP1 50 O M5 80 I/O TIOG 110 I YA
111 GND 40 21 — GND 51 — GND 81 — GND 111 — GND
112 39 22 I OEP 52 O M6 82 I/O TIOH 112 I Y9
113 38 23 I RDM 53 O M7 83 I/O TIOI 113 I Y8
114 37 24 I MDL 54 O M8 84 I/O TIOJ 114 I Y7
115 36 25 I OEM 55 O M9 85 I/O TIOK 115 I Y6
116 35 26 O PL 56 O MA 86 I/O TIOL 116 I Y5
117 34 27 O P0 57 O MB 87 I/O TIOM 117 I Y4
28 O P1 58 O MC 88 I/O TION 118 I Y3
VDD (+5 V)

118 VDD (+5 V) 33


119 32 29 O P2 59 O MD 89 I/O TIOO 119 I Y2
GND

GND

GND

120 GND 31 30 O P3 60 — VDD 90 I/O TIOP 120 — VDD

INPUT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

ADR ; SERIAL ADDRESS


CK ; SYSTEM CLOCK
CKD ; SERIAL INTERFACE CLOCK
CKX ; SWITCHING TIMING PULSE
CS ; CHIP SELECT
MDL ; M OUTPUT DELAY CONTROL
(HIGH: NORMAL, LOW: 2CK DELAY MODE)
62 63 64 65 66 67 68 69 70 72 73 74 75 77 78 79 80 82 83 84 85 86 87 88 89 90 OB2S ; OFFSET BINARY/2'S COMPLEMENT SELECT
(HIGH: 2'S COMPLEMENT, LOW: OFFSET BINARY)
TIO0
TIO1
TIO2
TIO3
TIO4
TIO5
TIO6
TIO7
TIO8
TIO9
TIOA
TIOB
TIOC
TIOD
TIOE
TIOF
TIOG
TIOH
TIOI
TIOJ
TIOK
TIOL
TIOM
TION
TIOO
TIOP

92 59 OEM ; M OUT ENABLE


XC MD
93 58 (LOW: ENABLE)
XB MC OEP ; P OUT ENABLE
94 57
XA MB (LOW: ENABLE)
95 56 RCL0 ; REGISTER CLEAR
X9 MA
96 55 (HIGH: NORMAL, LOW: SET A AND B DATA TO 0)
X8 M9
97 54 RCL1 ; REGISTER CLEAR
X7 M8
98 53 (HIGH: NORMAL, LOW: SET C DATA TO 0)
X6 M7
99 52
RDM ; ROUNDING M OUT (HIGH)/DISCARD M OUT SELECT (LOW)
X5 M6 RDP0, RDP1 ; ROUNDING P OUT (HIGH)/DISCARD P OUT SELECT (LOW)
100 50
X4 M5 RST ; RESET PULSE
102 49 (LOW: SET DIO TERMINAL TO FIXED INPUT MODE0)
X3 M4
103
X2 M3
48 TST0-TST3 ; FUNCTION MODE SELECT
104 47 TST3 TST2 TST1 TST0 FUNCTION MODE TIO TERMINAL I/O STATUS
X1 M2
105 45 0 Y–B OUTPUT : (X–A)2 + (Y–B)2
X0 M1 M = (X–A)2 + (Y–B)2, P = tan–1 +C
1 1 1 X–A OUTPUT : X–A / Y–B ,
44 1
M0 A, B, C : SERIAL DATA Y–B / X–A
108 43
YC ML 2 2 –1 Y–B
109 M = (X–A) + (Y–B) , P = tan +C
YB 0 0 0 X X–A INPUT (A AND B DATA)
110 42 A, B : TIO INPUT, C : SERIAL DATA
YA PD
112 40 Y–B
Y9 PC M = (X–A)2 + (Y–B)2, P = tan–1 +C
113 39 0 1 1 X X–A INPUT (C DATA)
Y8 PB A, B : SERIAL DATA, C : TIO INPUT
114 38
Y7 PA 0 0 1 X M= R R : TIO INPUT INPUT (R)
115 37 1 1 0 X M = tan–1 D D : TIO INPUT INPUT (D)
Y6 P9
116 36 X ; DON'T CARE
Y5 P8
117 35
Y4 P7
118 34 X0-X9, XA-XC ; 11.2 BIT DIGITAL IN
Y3 P6
119
Y2 P5
33 Y0-Y9, YA-YC ; 11.2 BIT DIGITAL IN
2 32
Y1 P4
3 30
OUTPUT
Y0 P3 ML, M0-M9, MA-MD ; 11.4 BIT DIGITAL OUT (RADIUS DATA)
29
P2 PL, P0-P9, PA-PD ; 15 BIT DIGITAL OUT (ANGLE DATA)
4 28
OB2S P1
8
DIO P0
27 INPUT/OUTPUT
7 26 DIO ; SERIAL DATA
ADR PL
9 TIO0-TIO9, TIOA-TIOP ; TEST
CS 62-70
10 105-102 72-75
CKD 77-80
100-92 12
5 X0-X9 + 82-90 TIO0-TIO9
CKX XA-XC LATCH LIMIT X X2
6 11.2 TIOA-TIOP
RST – 26
107 13 (USB) 24
43-45
RDP0
RDP1
RCL0
RCL1

TST0
TST1
TST2
TST3

47-50
OEM

RDM
OEP

MDL

26 15 52-59
PEG1 + 25 SQRT RND LATCH ML, M0-M9
(A DATA) 11.4 25 MA-MD
25 22 23 17 18 19 20 12 13 14 15 24 OEM
+ 23
RDM
SIF 24 24
3, 2 MDL
119-112
110-108 12
Y0-Y9 +
YA-YC LATCH LIMIT Y Y2
11.2 –
7
ADR
8 13 (LSB)
DIO
9 12
CS PEG2
10 SIF (B DATA)
CKD 26-30
5 12 15 32-40, 42
CKX 13 ROM ROT 15 PL, P0-P9
6 SIF 15 22 PA-PD
DIV
RST + OEP
+ 19
17 RDP0
RCL0 12 20
18 RDP1
RCL1
4
OB2C PEG3
107 (C DATA)
CK
12-15
TST0-
TST3 4 CONTROL
SIF

DME-3000/7000 2-25
IC

CXD8061(SONY)FLAT PACKAGE
IL00
C-MOS SOLID GENERATOR
-TOP VIEW-
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
44 INPUT
SEL2 A0, AM1 - AM13 ; MANTISSA OF FLOWTING-POINT
43 3
SEL1 P11 REPRESENTATION
GND

GND

GND
41 4
SEL0 P10 ADR ; SERIAL ADDRESS
65 40 5
P9 AE0, AEM1 - AEM3 ; EXPONENT OF FLOWTING-POINT
66 39 62 6 REPRESENTATION
67 38 AEM3 P8
64 7 B0 - B13 ; FIXED-POINT REPRESENTATION
68 37 AEM2 P7
65 8 CK ; SYSTEM CLOCK
69 36 AEM1 P6 CKD ; SERIAL INTERFACE CLOCK
66 9
70 35 AE0 P5 CKX ; SWITCHING TIMING PULSE
10 CS ; CHIP SELECT (LOW : ACTIVE)
71 34 P4
61 11 DCTL ; DELAY CONTROL OF B0 - B13 INPUT
72 VDD (+5V) 33 A0 P3
67 59 (LOW : ACTIVE)
73 VDD (+5V) 32 AM1 P2
68 58 OE ; OUTPUT ENABLE (LOW : ENABLE)
74 31 AM2 P1 RNDL ; MULTIPLIXER ROUNDING CONTROL (LOW : ACTIVE)
69 57
75 30 AM3 P0 SEL0, SEL1 ; SEL (0, 1) = (0, 0) BYPASS A (A IN P OUT)
70
AM4 = (0, 1) BYPASS B (B IN P OUT)
76 29 71
AM5 PM1
56 = (1, 0) P = A X B
77 28 72 55 = (1, 1) P = A X B
78 27 AM6 PM2
74 54 SEL2 ; DELAY CONTROL OF P2 - PM12 OUTPUT
79 26 AM7 PM3 (HIGH : ACTIVE)
75 53
GND

GND

GND

80 25 AM8 PM4 SRIL ; SERIAL CONTROL ENABLE (LOW : ACTIVE)


NC
NC

76 51
AM9 PM5
77 50 OUTPUT
AM10 PM6
78 49 P0 - P11, PM1 - PM12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

AM11 PM7
79 48 ; MULTIPLIXER OUTPUT
AM12 PM8
80 47 (SOLID DATA : P2 - P0, PM1 - PM12)
(VDD = +5V) AM13 PM9
46
PIN PIN PIN PIN PM10 INPUT / OUTPUT
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL 25 45
NO. NO. NO. NO. B13 PM11 DIO ; SERIAL DATA
26 13
1 I CK 21 I CS 41 I SEL0 61 I A0 B12 PM12
27
2 – GND 22 I CKX 42 – GND 62 I AEM3 B11
28
3 O P11 23 – GND 43 I SEL1 63 – GND B10
29
4 O P10 24 I CKD 44 I SEL2 64 I AEM2 B9
30
5 O P9 25 I B13 45 O PM11 65 I AEM1 B8
31
6 O P8 26 I B12 46 O PM10 66 I AE0 B7
32
7 O P7 27 I B11 47 O PM9 67 I AM1 B6
34
8 O P6 28 I B10 48 O PM8 68 I AM2 B5
35
9 O P5 29 I B9 49 O PM7 69 I AM3 B4
36
10 O P4 30 I B8 50 O PM6 70 I AM4 B3
37
11 O P3 31 I B7 51 O PM5 71 I AM5 B2
38
12 – GND 32 I B6 52 – GND 72 I AM6 B1
39
13 O PM12 33 – VDD 53 O PM4 73 – VDD B0
18
14 – NC 34 I B5 54 O PM3 74 I AM7 ADR
60
15 – NC 35 I B4 55 O PM2 75 I AM8 OE
40
16 I SRIL 36 I B3 56 O PM1 76 I AM9 DCTL
16
17 I RNDL 37 I B2 57 O P0 77 I AM10 SRIL
17
18 I ADR 38 I B1 58 O P1 78 I AM11 RNDL
19
19 I/O DIO 39 I B0 59 O P2 79 I AM12 DIO
20
20 I RCS 40 I DCTL 60 I OE 80 I AM13 RCS
21
CS
24
CKD
22
CKX
1

44
SEL 2

43
SEL 1

DECODER
SEL 0 41

62, 64-66 4
AEM3-AEM1,
AE0 +11
61, 67-72,
A0 74, 80 14
AM1-AM13

+1.0
59-53,
6CK 51-45,
DELAY 13 P2-P0,
17 14 BIT ABS LIMITER
RNDL PM1-PM12
SHIFTER
40
DCTL

25-32,
34-39
B13-B0
3-11
P11-P3
2CK
DELAY 60
OE

18
ADR
19
DIO
21
CS
20
RCS SERIAL
24 CONTROL
CKD
1
CK
22
CKX
16
SPIL

2-26 DME-3000/7000
IC

CXD8065(SONY)FLAT PACKAGE
C-MOS KEY PROCESSOR
-TOP VIEW-
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
118
INPUT
SIB ADR ; SERIAL ADDRESS
119 92
DIBD OEYL CK ; SYSTEM CLOCK

GND

VDD (+5V)

GND
91 GND 60 2 90 CKD ; SERIAL INTERFACE CLOCK
DIBC DOYC
92 GND 59 3 89 CKX ; SWITCHING TIMING PULSE
DIBB DOYB
93 58 4 88 CS ; CHIP SELECT (LOW : ACTIVE)
VDD (+5V) DIBA DOYA
DIAA-DIAD,
94 57 5 87
DIB9 DOY9 DIA0-DIA9 ; DATA A IN
95 56 6 86
DIB8 DOY8 DIBA-DIBD,
96 55 7 85
DIB7 DOY7 DIB0-DIB9 ; DATA B IN
97 54 8 84 RST ; RESET
DIB6 DOY6
98 53 9 83 ID0-ID5 ; IC ADDRESS SELECT
DIB5 DOY5
99 52 10 82 SIA, SIB ; SIGN BIT OF "A", "B" IN
DIB4 DOY4 OEXL, OEYL ; ENABLE CONTROL OF "X", "Y" OUT (LOW : ENABLE)
100 GND 51 12 80
DIB3 DOY3 TA-TF,
101 GND 50 13 79
DIB2 DOY2 T0-T9 ; TEST TERMINAL
102 49 14 78 W0-W2 ; MODE SELECT FOR TEST
DIB1 DOY1
103 48 15 77
DIB0 DOY0
104 47 OUTPUT
VDD (+5V) 17 DOXA-DOXC,
105 46 SIA OEXL
59
DOX0-DOX9 ; DATA X OUT
106 VDD (+5V) 45 18 75
DIAD DOXC DOYA-DOYC,
107 44 19 74
DIAC DOXB DOY0-DOY9 ; DATA Y OUT
108 43 20 73
DIAB DOXA
109 42 22 72 INPUT/OUTPUT
DIAA DOX9
110 GND 41 23 70 DIO ; SERIAL DATA
DIA9 DOX8
111 GND 40 24 69
DIA8 DOX7
112 NC 39 25 68
DIA7 DOX6
113 NC NC 38 26
DIA6 DOX5
67
114 NC NC 37 27
DIA5 DOX4
66
115 NC NC 36 28
DIA4
65
DOX3
116 NC NC 35 29
DIA3
64
DOX2
117 NC NC 34 30
DIA2
63
DOX1
VDD (+5V)

118 VDD (+5V) 33 32 62


DIA1 DOX0
119 32 33
GND

GND

GND DIA0
120 GND 31
49
ID5
48
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

ID4
47
ID3
45
ID2
44
ID1
43
ID0

53
RST
PIN PIN PIN PIN 58
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL DIO
NO. NO. NO. NO. 57
ADR
1 — GND 31 — GND 61 — GND 91 — GND 52
CKD
2 I DIBC 32 I DIA1 62 O DOX0 92 I OEYL 56
CKX
3 I DIBB 33 I DIA0 63 O DOX1 93 I TF 55
CS
4 I DIBA 34 — NC 64 O DOX2 94 I TE 50
5 I DIB9 35 — NC 65 O DOX3 95 I TD
6 I DIB8 36 — NC 66 O DOX4 96 I TC 93
TF
7 I DIB7 37 — NC 67 O DOX5 97 I TB 94
TE
8 I DIB6 38 — NC 68 O DOX6 98 I TA 95
TD
9 I DIB5 39 I WA0 69 O DOX7 99 I T9 96
TC
10 I DIB4 40 I WA1 70 O DOX8 100 I T8 97
TB
11 — GND 41 — GND 71 — GND 101 — GND 98
TA
12 I DIB3 42 I WA2 72 O DOX9 102 I T7 99
T9
13 I DIB2 43 I ID0 73 O DOXA 103 I T6 100
T8
14 I DIB1 44 I ID1 74 O DOXB 104 I T5 102
T7
15 I DIB0 45 I ID2 75 O DOXC 105 I T4 103
T6
16 — VDD 46 — VDD 76 — VDD 106 — VDD 104
T5
17 I SIA 47 I ID3 77 O DOY0 107 I T3 105
T4
18 I DIAD 48 I ID4 78 O DOY1 108 I T2 107
T3
19 I DIAC 49 I ID5 79 O DOY2 109 I T1 108
T2
20 I DIAB 50 I CK 80 O DOY3 110 I T0 109
T1
21 — GND 51 — GND 81 — GND 111 — GND 110
T0
22 I DIAA 52 I CKD 82 O DOY4 112 — NC 54
TEST
23 I DIA9 53 I CLR 83 O DOY5 113 — NC 39
W0
24 I DIA8 54 I TEST 84 O DOY6 114 — NC 40
W1
25 I DIA7 55 I CS 85 O DOY7 115 — NC 42
W2
26 I DIA6 56 I CKX 86 O DOY8 116 — NC
27 I DIA5 57 I ADR 87 O DOY9 117 — NC
28 I DIA4 58 I/O DIO 88 O DOYA 118 I SIB
29 I DIA3 59 I OEXL 89 O DOYB 119 I DIBD
30 I DIA2 60 — VDD 90 O DOYC 120 — VDD

SIA CLIP GAIN


15 (1) 13
DIAA-DIAD 1X1 DOXA-DOXC
DIA0-DIA9
(ABSOLUTE) LIMITER INVERTER LPF DOX0-DOX9
17, 22-18,
( 33, 32, 30-23 ) (2) (3) ( 73-75,
62-70, 72 )

REGISTER REGISTER
NAM
SERIAL DATA MODE
(REG. VALUE) CONTROL

SIB CLIP GAIN


15 13
DIBA-DIBD 1X1 DOYA-DOYC
DIB0-DIB9 (ABSOLUTE) LIMITER INVERTER LPF DOY0-DOY9
4-2, 118, 119,
( 15, 12, 10-5 ) ( 88-90,
77-80, 82-87 )

REGISTER REGISTER

DME-3000/7000 2-27
IC

CXD8062Q(SONY)FLAT PACKAGE
********** IL00
C-MOS WIPE MIXER
— TOP VIEW —
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
INPUT
41 A0-A14 ; 15-BIT DIGITAL IN A (2'S COMPLEMENT)
MOD2
42 B0-B14 ; 15-BIT DIGITAL IN B (2'S COMPLEMENT)

VDD (+5 V)
GND
MOD1
65 40 43 62 CK ; SYSTEM CLOCK
MOD0 P16
39 61 CKD ; SERIAL INTERFACE CLOCK
66 P15
64
A14 P14
60 CKX ; SWITCHING TIMING PULSE
67 38
65
A13 P13
59 DIN ; SERIAL DATA
68 37 66 58 MOD0-MOD2 ; MODE SELECT 0-2
A12 P12
69 36 67 57 OE ; OUTPUT ENALBE (LOW: ENABLE)
A11 P11
70 35 68
A10 P10
56 WCS ; WRITE CHIP SELECT (LOW: WRITE)
34 69 55
71 A9 P9
70 54 OUTPUT
72 VDD (+5 V) 33 A8 P8
71
A7 P7
51 P0-P16 ; 17-BIT DIGITAL OUT (2'S COMPLEMENT)
73 VDD (+5 V) GND 32 75 50 TSTO ; TEST OUT
A6 P6
74 GND 31 76 49
A5 P5
75 30 77
A4 P4
48 INPUT/OUTPUT
76 29 78
A3 P3
47 K0-K14 ; 15-BIT DIGITAL IN/OUT
28
79 46 (2'S COMPLEMENT)
77 A2 P2
80 45
78 27 A1 P1
VDD (+5 V)

1 44
A0 P0
79 26
GND

80 25 24
B14 K14
2
25 3
B13 K13
26 4
B12 K12
27 5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

B11 K11
28 6
B10 K10
PIN PIN PIN PIN 29 7
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL B9 K9
No. No. No. No. 30 8
B8 K8
31 9
1 I A0 21 I WCS 41 I MOD2 61 O P15 B7 K7
34 10
2 I/O K14 22 I CKX 42 I MOD1 62 O P16 B6 K6
35 11
B5 K5
3 I/O K13 23 I CKD 43 I MOD0 63 I OE 36 14
B4 K4
4 I/O K12 24 I B14 44 O P0 64 I A14 37
B3 K3
15
5 I/O K11 25 I B13 45 O P1 65 I A13 38 16
B2 K2
39 17
6 I/O K10 26 I B12 46 O P2 66 I A12 B1 K1
40 18
7 I/O K9 27 I B11 47 O P3 67 I A11 B0 K0
8 I/O K8 28 I B10 48 O P4 68 I A10 20 19
DIN TSTO
9 I/O K7 29 I B9 49 O P5 69 I A9 21
WCS
10 I/O K6 30 I B8 50 O P6 70 I A8 23
CKD
11 I/O K5 31 I B7 51 O P7 71 I A7 22
CKX
12 — VDD 32 — GND 52 — GND 72 I CK
72
13 — GND 33 — VDD 53 — VDD 73 — VDD CK

14 I/O K4 34 I B6 54 O P8 74 — GND OE
15 I/O K3 35 I B5 55 O P9 75 I A6 63
16 I/O K2 36 I B4 56 O P10 76 I A5
17 I/O K1 37 I B3 57 O P11 77 I A4
18 I/O K0 38 I B2 58 O P12 78 I A3
19 O TST0 39 I B1 59 O P13 79 I A2
20 I DIN 40 I B0 60 O P14 80 I A1

2-28 DME-3000/7000
IC

MOD2 MOD1 MOD0 SFG2 SFG1 SFG0 FUNCTION S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14
0 0 0 — — — MIXER (REAL TIME K), P = KA + (1–K) B 3 2 — 0 1 1 0 0 0 0 0 1 1 1
0 0 1 — — — MIXER (SERIAL k), P = kA + (1–k) B 3 2 — 2 1 1 0 0 0 0 0 1 1 1
K–1–K FILTER,
0 1 0 — — — P (Z) = (K + Z –1 + KZ –2 ) · Z –3 · A 1 0 — 0 1 1 0 0 0 0 0 1 1 0
0 ASPECT A, P = k · A, K = B 0 2 — 2 1 0 0 0 0 0 0 0 1 0
0 1 1 — —
1 ASPECT B, P = A, K = k · B 2 1 — 2 0 0 1 1 0 0 0 0 1 0
1 0 0 — — — FILTER I, P = A + B + K 2 3 — 1 1 1 0 0 0 0 0 1 1 0
1 0 1 — — — FILTER II, P = k · (A + B) + K 2 3 — 2 1 1 0 0 0 0 0 1 1 0
0 0 0 0
0 1 ADD MODE, P = A + B + k 0 1
0 (SFG2 ON : A INPUT ABSOLUTE 2 3 — 1 1 2 0 1 0 0 0 0
1 0 1 0
SFG1 ON : B INPUT ABSOLUTE)
1 1 1 1
1 1 0
0 0 POSI NAM, P = MAX (A, B) 0 0
1
0 1 (SFG1 ON : A, B INPUTS ABSOLUTE) 1 1
1 3 or — 2 1 1 0 1 1 0 0 0
1 0 NEGA NAM, P = MIN (A, B) 0 0
2
1 1 (SFG1 ON : A, B INPUTS ABSOLUTE) 1 1
1 1 1 — — — 4 CLOCK DELAY, P = A, K = B 0 2 — 1 1 0 0 0 0 0 0 0 1 0

0 ; LOW LEVEL
1 ; HIGH LEVEL

NOTE: K15 K0
SERIAL DATA (DIN)
SFG2 SFG1 SFG0

1,
80-75
71-64 15
A0-A14
S5
SIGN BIT
(A14) S10 CARRIER S9
1: ABSOLUTE Ci=S14 S7
MODE 16 17 44-51
S1 0 17 54-62
1 LIMIT P0-P16
0 63
40-34 OE
1
31-24 15 +213 2,12 15
B0-B14 2 S8
S13
15 0
3
1
SIGN BIT
(B14) S11 S2 15
1: ABSOLUTE S6
MODE 0
0
1 15
1
2
2
3

S12

18-14 S4
15
11-2 15
0
K0-K14 43
2,12
1 MOD0
+1.0 42
2 MOD1
K 41
CONTROL MOD2
20 S/P 23
DIN CKD
CONV 72
CK
21
WCS
22 NOTE: D FLIP FLOP 19
CKX TSTO

DME-3000/7000 2-29
IC

CXD8063Q(SONY)FLAT PACKAGE

2-30 DME-3000/7000
IC

DME-3000/7000 2-31
IC

CXD8156Q(SONY)
16-BIT ADDER MULTIPLIER
-TOP VIEW-
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
VDD(+5V)
GND

VDD(+5V)
GND

GND
VDD(+5V)
81 50
82 49
83 48
84 47
85 46
86 45
87 44
88 43
89 VDD(+5V) 42
90 GND VDD(+5V) 41
91 GND 40
92 NC 39
93 38
94 37
95 36
96 35
97 34
98 33
VDD(+5V)

VDD(+5V)

99 VDD(+5V) 32
GND

GND

GND

100 31
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

PIN PIN PIN PIN


I/O SYMBOL I/O SYMBOL I/O SYMBOL I/O SYMBOL
NO. NO. NO. NO.
1 I A DATA 00 26 I/O B DATA 05 51 I K DATA 06 76 O Y DATA 11
2 I A DATA 01 27 — GND 52 I K DATA 07 77 — GND
3 — VDD(+5V) 28 — VDD(+5V) 53 — VDD(+5V) 78 — VDD(+5V)
4 — GND 29 I/O B DATA 06 54 — GND 79 O Y DATA 12
5 I A DATA 02 30 I/O B DATA 07 55 I K DATA 08 80 O Y DATA 13
6 I A DATA 03 31 I/O B DATA 08 56 I K DATA 09 81 O Y DATA 14
7 I A DATA 04 32 I/O B DATA 09 57 I K DATA 10 82 O Y DATA 15
8 I A DATA 05 33 I/O B DATA 10 58 I K DATA 11 83 O Y DATA 16
9 I A DATA 06 34 I/O B DATA 11 59 I K DATA 12 84 O Y DATA 17
10 I A DATA 07 35 I/O B DATA 12 60 I K DATA 13 85 O Y DATA 18
11 I A DATA 08 36 I/O B DATA 13 61 I K DATA 14 86 O Y DATA 19
12 I A DATA 09 37 I/O B DATA 14 62 I K DATA 15 87 O CARRY OUT
13 I A DATA 10 38 I/O B DATA 15 63 O Y DATA 00 88 I DIR
14 — VDD(+5V) 39 I/O B DATA 16 64 O Y DATA 01 89 — VDD(+5V)
15 — GND 40 — GND 65 — GND 90 — GND
16 I A DATA 11 41 — VDD(+5V) 66 — VDD(+5V) 91 I CLK B
17 I A DATA 12 42 I B DATA 17 67 O Y DATA 02 92 — NC
18 I A DATA 13 43 I B DATA 18 68 O Y DATA 03 93 I CLK A
19 I A DATA 14 44 I B DATA 19 69 O Y DATA 04 94 I CONT 1
20 I A DATA 15 45 I K DATA 00 70 O Y DATA 05 95 I CONT 2
21 I/O B DATA 00 46 I K DATA 01 71 O Y DATA 06 96 I CONT 3
22 I/O B DATA 01 47 I K DATA 02 72 O Y DATA 07 97 I CONT 4
23 I/O B DATA 02 48 I K DATA 03 73 O Y DATA 08 98 I CIN 1
24 I/O B DATA 03 49 I K DATA 04 74 O Y DATA 09 99 I CIN 2
25 I/O B DATA 04 50 I K DATA 05 75 O Y DATA 10 100 O TEST OUT

R 87
C OUT
E
G

1, 2, 5, 13, C OUT
16-20 6 16
ADATA00-15 A0-15

SEL16
16 A 16
21-26,
29-39, SEL20 Z 16 M0 P16 16 22 SEL20
42-44 20 A R R A0-21 A A

BDATA00-19 Z 16 B E M15 P31 E 67-76,


Z 16 S0-15 DSL G G Z Z 20 79-86
B0-15 R YDATA00-19
B 20 6 20 B E 20 B
DSL S0-19 DSL G DSL
16 N0 P0 16
20 R R

88
DIR E N15 P15 E
16 G G B0-21
C IN

98
C IN 1

94
CONT1
45-52,
55-62 16
KDATA00-15

91
CLKB

93
CLKA
SEL20
20 A
Z 20
R R
20 B E E
DSL G G

97
CONT4

99
C IN 2

95
CONT2

96
CONT3

2-32 DME-3000/7000
IC

CXD8190Q(SONY)FLAT PACKAGE
C-MOS SUPER MULTIPLEX-DEMULTIPLEXER
—TOP VIEW— BLOCK DIAGRAM
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
P-S I/O DATA
CONV. SERIAL REED
OUTPUT
GND

GND

GND
65 40
66 39
DATA
67 38 INPUT/OUTPUT
68 37 A-F
69 36
70 35 DELAY
OUTPUT
71 34 SELECTOR
INITIAL
72 VDD (+5 V) 33 DATA
73 VDD (+5 V) 32 REGISTER

74 31
75 30
76 29
77 28
CONTROL
78 27 INPUTS CONTROL

79 26
GND

GND

GND
80 25

FUNCTION OF MODE 0-MODE 12


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
MODE 0: D1 Y, U, V MULTIPLEXER

PIN PIN PIN PIN CK1 (27 MHz)


I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL
No. No. No. No.
1 I OE 21 I/O B7 41 I RST 61 I/O E7 CK2 (6.75 MHz)
2 — GND 22 I/O B8 42 — GND 62 I/O E8
3 I/O A0 23 — GND 43 I/O D0 63 — GND
Y INPUT Y0 Y1 Y2 Y3 Y4
4 I/O A1 24 I/O B9 44 I/O D1 64 I/O E9
5 I/O A2 25 I/O C0 45 I/O D2 65 I/O F0
U INPUT U0 U2 U4
6 I/O A3 26 I/O C1 46 I/O D3 66 I/O F1
7 I/O A4 27 I/O C2 47 I/O D4 67 I/O F2
V INPUT V0 V2 V4
8 I/O A5 28 I/O C3 48 I/O D5 68 I/O F3
9 I/O A6 29 I C4 49 I/O D6 69 I F4
Y/U/V OUTPUT U0 Y0 V0 Y1 U2 Y2 V2 Y3 U4 Y4
10 I/O A7 30 I C5 50 I/O D7 70 I F5
11 I/O A8 31 I C6 51 I/O D8 71 I F6
12 — GND 32 I C7 52 — GND 72 I F7
13 I/O A9 33 — VDD 53 I/O D9 73 — VDD MANUAL SIF
14 I/O B0 34 I C8 54 I/O E0 74 I F8
10 10
15 I/O B1 35 I C9 55 I/O E1 75 I F9 Y/U/V OUT A0-A9 D0-D9 Y/U/V OUT A0-A9 D0-D9
10 NOT USED 10 NOT USED
16 I/O B2 36 I/O DIO/M3 56 I/O E2 76 I CK1 Y IN B0-B9 E0-E9 Y IN B0-B9 E0-E9
10 10 10 10
17 I/O B3 37 I CS/M2 57 I/O E3 77 I SMPL/OFS U IN C0-C9 F0-F9 V IN U IN C0-C9 F0-F9 V IN
18 I/O B4 38 I ADR/M1 58 I/O E4 78 I CK2
40 77 40 77
19 I/O B5 39 I CKD/M0 59 I/O E5 79 I SIFM MSB INVERT MIV OFS CKX SMPL
39 80 39 80
20 I/O B6 40 I CKX/MIV 60 I/O E6 80 I CURSOR M0 CURSOR CKD CURSOR
38 76 SIF 38 76
M1 CK1 27 MHz ADR CK1 27 MHz
37 78 37 78
M2 CK2 6.75 MHz CS CK2 6.75 MHz
36 1 36 1
M3 OE DIO OE
79 41 79 41
OPEN SIFM RST SIFM RST

COMMON TERMINALS
3 43 A0-A9 ; CHA 10-BIT DIGITAL INPUT/OUTPUT
A0 D0
4 44 B0-B9 ; CHB 10-BIT DIGITAL INPUT/OUTPUT
A1 D1 MODE 1: D1 Y, U/V MULTIPLEXER (2CH)
5 45 C0-C9 ; CHC 10-BIT DIGITAL INPUT/OUTPUT
A2 D2
6 46 CK1 ; SYSTEM CLOCK INPUT
A3 D3 CK1 (27 MHz)
7
A4
47 CK2 ; SUB-CLOCK INPUT
D4
8
A5
48 CURSOR ; CURSOR INPUT
D5
9 49 D0-D9 ; CHD 10-BIT DIGITAL INPUT/OUTPUT CK2 (13.5 MHz)
A6 D6
10
A7 D7
50 E0-E9 ; CHE 10-BIT DIGITAL INPUT/OUTPUT
11
A8 D8
51 F0-F9 ; CHF 10-BIT DIGITAL INPUT/OUTPUT Y INPUT Y0 Y1 Y2 Y3 Y4
13
A9 D9
53 OE ; OUTPUT ENABLE INPUT (LOW : ENABLE)
RST ; RESET PULSE INPUT (LOW : RESET)
U/V INPUT U0 V0 U2 V2 U4
14
B0 E0
54 SIFM ; SERIAL INTERFACE MODE (SIF)/
15
B1 E1
55 MANUAL MODE SELECT INPUT
16 56 (LOW : SERIAL INTERFACE MODE, Y/U/V OUTPUT U0 Y0 V0 Y1 U2 Y2 V2 Y3 U4 Y4
B2 E2
17
B3 E3
57 HIGH : MANUAL MODE)
MANUAL SIF
18 58
B4 E4
19
B5 E5
59 TERMINALS OF MANUAL MODE 10 10 10 10
CH1 Y/U/V OUT A0-A9 D0-D9 CH2 Y/U/V OUT CH1 Y/U/V OUT A0-A9 D0-D9 CH2 Y/U/V OUT
20
B6 E6
60 M0-M3 ; MODE SELECT INPUT (4-BIT) 10 10 10 10
CH1 Y IN B0-B9 E0-E9 CH2 Y IN CH1 Y IN B0-B9 E0-E9 CH2 Y IN
21
B7 E7
61 MIV ; MSB INVERT CONTROL INPUT 10 10 10 10
22 62 (HIGH : INVERT MSB) CH1 U/V IN C0-C9 F0-F9 CH2 U/V IN CH1 U/V IN C0-C9 F0-F9 CH2 U/V IN
B8 E8
24
B9 E9
64 OFS ; CURSOR MSB INVERT CONTROL INPUT
40 77 40 77
MIV OFS CKX SMPL
25
C0 F0
65 TERMINALS OF SIF MODE OPEN
39
M0 CURSOR
80 39
CKD CURSOR
80
26 66 ADR ; SERIAL ADDRESS INPUT 38 76 38 76
C1 F1 M1 CK1 27 MHz SIF ADR CK1 27 MHz
27 67 CKD ; SERIAL INTERFACE CLOCK INPUT
C2 F2 37 78 37 78
28 68 CKX ; SWITCHING TIMING PULSE INPUT M2 CK2 13.5 MHz CS CK2 13.5 MHz
C3 F3 36 1 36 1
29 69 CS ; CHIP SELECT INPUT (LOW: ACTIVE) M3 OE DIO OE
C4 F4
30 70 DIO ; SERIAL DATA INPUT/OUTPUT 79 41 79 41
C5 F5 OPEN SIFM RST SIFM RST
31 71 SMPL ; SAMPLING PULSE INPUT
C6 F6
32 72
C7 F7 MODE 2 : D1 Y, U/V DEMULTIPLEXER (2CH)
34 74
C8 F8
35 75
C9 F9 CK1 (27 MHz)

40 77
CKX/MIV SMPL/OFS
39 80 CK2 (13.5 MHz)
CKD/M0 CURSOR
38 76
ADR/M1 CK1
37 78 Y/U/V INPUT U0 Y0 V0 Y1 U2 Y2 V2 Y3 U4 Y4 V4
CS/M2 CK2
36 1
DIO/M3 OE
79 41
SIFM RST Y0 Y1 Y2 Y3
Y OUTPUT

U/V OUTPUT U0 V0 U2 V2

MANUAL SIF
10 10 10 10
CH1 Y OUT A0-A9 D0-D9 CH2 Y OUT CH1 Y OUT A0-A9 D0-D9 CH2 Y OUT
10 10 10 10
CH1 U/V OUT B0-B9 E0-E9 CH2 U/V OUT CH1 U/V OUT B0-B9 E0-E9 CH2 U/V OUT
10 10 10 10
CH1 Y/U/V IN C0-C9 F0-F9 CH2 Y/U/V IN CH1 Y/U/V IN C0-C9 F0-F9 CH2 Y/U/V IN

40 77 40 77
MIV OFS CKX SMPL
39 80 OPEN 39 80
M0 CURSOR CKD CURSOR OPEN
38 76 SIF 38 76
OPEN M1 CK1 27 MHz ADR CK1 27 MHz
37 78 37 78
M2 CK2 13.5 MHz CS CK2 13.5 MHz
36 1 36 1
M3 OE DIO OE
79 41 79 41
OPEN SIFM RST SIFM RST

DME-3000/7000 2-33
IC

MODE 3 : D1 Y, U, V DEMULTIPLEXER (WITH 0 INSERT FUNCTION) MODE 6 : D2 MATTE GENERATOR (2CH)

CK1 (27 MHz) CK1 (4 fsc)

CK2 (6.75 MHz) CK2 (fsc)

Y, U, V INPUT U0 Y0 V0 Y1 U2 Y2 V2 Y3 U4 Y4 LALT

Y OUTPUT Y0 Y1 Y2 Y3 MATTE OUTPUT Y+1 Y+Q Y–1 Y–Q Y+1 Y+Q Y+1 Y–Q Y–1 Y+Q Y+1

U/0 OUTPUT U0 0 U2 0

V/0 OUTPUT V0 0 V2 0

10 10
MANUAL SIF CH1 MATTE OUT A0-A9 D0-D9 CH2 MATTE OUT
2 2
10 10 C0, C1 F0, F1
Y OUT A0-A9 D0-D9 NOT USED Y OUT A0-A9 D0-D9 NOT USED
10 10 10 10
U OUT B0-B9 E0-E9 V OUT U OUT B0-B9 E0-E9 V OUT
10 10
Y/U/V IN C0-C9 F0-F9 NOT USED Y/U/V IN C0-C9 F0-F9 NOT USED 10 10
CH1 MATTE OUT B0-B9 E0-E9 CH2 MATTE OUT
2 2
40 77 40 77 C2, C3 F2, F3
MIV OFS CKX SMPL
39 80 39 80
OPEN M0 CURSOR OPEN CKD CURSOR OPEN
38 76 SIF 38 76
M1 CK1 27 MHz ADR CK1 27 MHz
37 78 37 78
M2 CK2 6.75 MHz CS CK2 6.75 MHz
36 1 36 1
M3 OE DIO OE
79 41 79 41
OPEN SIFM RST SIFM RST
40 77
CKX SMPL
39 80
CKD CURSOR BLANKING
MODE 4 : D1 Y, U, V DEMULTIPLEXER SIF 38 76
ADR CK1 4 fsc
37 78
CK1 (27 MHz) CS CK2 SC
36 1
DIO OE
79 41
CK2 (6.75 MHz) SIFM RST

Y, U, V INPUT U0 Y0 V0 Y1 U2 Y2 V2 Y3 U4 Y4

REGISTER
Y OUTPUT Y0 Y1 Y2 Y3 SIF
I (U+V)
+ MATTE OUTPUT
(CH1, CH2)
U OUTPUT U0 U2 +
REGISTER
Q (U–V) CK1 SC
V OUTPUT V0 V2

MANUAL SIF
REGISTER
10 10 Y
Y OUT A0-A9 D0-D9 NOT USED Y OUT A0-A9 D0-D9 NOT USED
10 10 10 10
U OUT B0-B9 E0-E9 V OUT U OUT B0-B9 E0-E9 V OUT
10 10
Y/U/V IN C0-C9 F0-F9 NOT USED Y/U/V IN C0-C9 F0-F9 NOT USED

40 77 40 77
MIV OFS CKX SMPL
39 80 39 80
M0 CURSOR OPEN CKD CURSOR OPEN
38 76 38 76
MODE 7 : WIPE/MIX TRANSITION CONTROLLER (3CH OUTPUTS)
M1 CK1 27 MHz SIF ADR CK1 27 MHz
37 78 37 78
OPEN M2 CK2 6.75 MHz CS CK2 6.75 MHz
10 43
36 1 36 1 CH1 OUTPUT A0-A9 D0 CH1 OUTPUT
M3 OE DIO OE
79 41 79 41 44
OPEN SIFM RST SIFM RST D1
10 45
CH2 OUTPUT B0-B9 D2 CH2 OUTPUT
46
D3

10 51
CH3 OUTPUT E0-E9 D8 CH3 OUTPUT
53
D9

MODE 5 : ABSOLUTE OR INVERT VALUE OPERATION (2CH)


65
F0 INPUT
INVERT/ 10 66
ABSOLUTE INPUT C0-C9 F1
X Y
14 OPERATION
40 77
CKX SMPL
Y = X OR X OR X OR X 39 80
CKD CURSOR
SIF 38 76
ADR CK1 13.5 MHz
37 78
CS CK2 OPEN
36 1
DIO OE
MANUAL SIF
79 41
SIFM RST
10 10 10 10
CH1 OUT A0-A9 D0-D9 CH2 OUT CH1 OUT A0-A9 D0-D9 CH2 OUT
4 4 4 4
B0-B3 E0-E3 B0-B3 E0-E3
18 58 OPEN 18 58
CH1 ABS ON/OFF B4 E4 CH2 ABS ON/OFF B4 E4 OPEN
19 59 19 59
CH1 INVERT ON/OFF B5 E5 CH2 INVERT ON/OFF B5 E5
4 4 4 4
CH1 IN B6-B9 E6-E9 CH2 IN CH1 IN B6-B9 E6-E9 CH2 IN CH1 OUTPUT
10 10 10 10
C0-C9 F0-F9 C0-C9 F0-F9 REGISTER
40 77 40 77
OPEN MIV OFS OPEN CKX SMPL
39 80 39 80 INPUT
M0 CURSOR CKD CURSOR OPEN
SIF CH2 OUTPUT
38 76 38 76
M1 CK1 13.5 MHz ADR CK1 13.5 MHz REGISTER
37 78 37 78
OPEN M2 CK2 OPEN CS CK2 OPEN
36 1 36 1
M3 OE DIO OE
CH3 OUTPUT
79 41 79 41
OPEN SIFM RST SIFM RST REGISTER

2-34 DME-3000/7000
IC

MODE 8 : D1 MATTE GENERATOR (2CH) MODE 11 : 1 OF 3 SELECTOR


SELECT 1 SELECT 0 OUTPUT
CH1 INPUT
CK2 0 0 CH1
CH2 INPUT D-FF OUTPUT
CH3 INPUT
0 1 CH2
U/V OUTPUT U V U V U V U V 1 0 CH3
OE
2 1 1 0 OUT
SELECT 0, SELECT 1
0 ; LOW LEVEL
1 ; HIGH LEVEL

CH1 MATTE 10 10 CH2 MATTE MANUAL


A0-A9 D0-D9
Y OUTPUT 2 2 Y OUTPUT 10
C0, C1 F0, F1 OUT A0-A9 D0-D9 NOT USED
10 54
CH1 IN B0-B9 E0 SELECT 0
CH1 MATTE 10 10 CH2 MATTE 10 54
B0-B9 E0-E9 CH2 IN C0-C9 E1 SELECT 1
U/V OUTPUT 2 2 U/V OUTPUT 10
C2, C3 F2, F3 F0-F9 CH3 IN
40 77
MIV OFS
OPEN 39 80 OPEN
M0 CURSOR
38 76
M1 CK1 13.5 MHz
37 78
M2 CK2 OPEN
36 1
M3 OE
OPEN 79 41
SIFM RST
40 77
CKX SMPL
39 80
CKD CURSOR BLANKING
SIF 38 76
ADR CK1 13.5 MHz
37
CS CK2
78
6.75 MHz
MODE 12 : 1 TO 3 DISTRIBUTER
36 1
DIO OE
79 41 A OUTPUT
SIFM RST D-FF

INPUT D-FF B OUTPUT


CH1 MATTE CH2 MATTE
SIF REGISTER SIF REGISTER
Y OUTPUT Y OUTPUT
D-FF C OUTPUT

U U OE
SIF REGISTER SIF REGISTER

MULTI- CH1 MATTE MULTI- CH2 MATTE


PLEX U/V OUTPUT PLEX U/V OUTPUT
MANUAL
V V
SIF REGISTER SIF REGISTER
10
CHA OUT A0-A9 D0-D9 NOT USED
10 10
CHB OUT B0-B9 E0-E9 CHC OUT
10
IN C0-C9 F0-F9 NOT USED

40 77
OPEN MIV OFS
39 80 OPEN
M0 CURSOR
38 76
MODE 9 : 1 OF 2 SELECTOR (2CH) M1 CK1 13.5 MHz
37 78
M2 CK2 OPEN
CH1 A CH2 A OPEN 36 1
INPUT INPUT M3 OE
CH1 CH2
D-FF OUTPUT D-FF OUTPUT 79 41
CH1 B CH2 B SIFM RST
INPUT INPUT
OE OE
CH1 OE CH2 OE
CH1 SEL CH2 SEL

MANUAL
10 10
CH1 OUT A0-A9 D0-D9 CH2 OUT
10 10
CH1 A IN B0-B9 E0-E9 CH2 A IN
10 10
CH1 B IN C0-C9 F0-F9 CH2 B IN

40 77
CH1 OE MIV OFS CH2 SEL
39 80
OPEN M0 CURSOR CH1 SEL
38 76
M1 CK1 13.5 MHz
37 78
M2 CK2 CH2 OE
36 1
OPEN M3 OE
79 41
OPEN SIFM RST

MODE 10 : 1 TO 2 DISTRIBUTER (2CH)

D-FF CH1 A OUTPUT D-FF CH2 A OUTPUT


CH1 CH2
INPUT INPUT
D-FF CH1 B OUTPUT D-FF CH2 B OUTPUT

OE OE

MANUAL
10 10
CH1 A OUT A0-A9 D0-D9 CH2 A OUT
10 10
CH1 B OUT B0-B9 E0-E9 CH2 B OUT
10 10
CH1 IN C0-C9 F0-F9 CH2 IN

40 77
OPEN MIV OFS
39 80 OPEN
M0 CURSOR
38 76
OPEN M1 CK1 13.5 MHz
37 78
M2 CK2 OPEN
36 1
M3 OE
OPEN 79 41
SIFM RST

DME-3000/7000 2-35
IC

CXD8264Q(SONY) CXD8267Q(SONY)
C-MOS CONTROLLED TO ADDRESS ARITHMETIC C-MOS MEMORY DATA BUS CONTROL
-TOP VIEW- -TOP VIEW-
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33

64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
GND

GND

GND
NC

NC

NC

NC
GND
52 32 65 NC 40
53 31 66 39
54 30 67 38
55 29 68 37
56 28 69 36
57 GND 27 70 35
58 V DD V DD 26 71 34
(+5V) (+5V)
59 NC GND 25 72 V DD (+5V) 33
60 24 73 VDD (+5V) 32
61 23 74 31
62 22 75 30
NC
63 21 76 29
NC

77 28
GND

64 20
NC

78 27
79 26
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

80 NC 25

GND

GND

GND
NC

NC

NC
(V DD=+5V)

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
PIN I/O SIGNAL PIN I/O SIGNAL PIN I/O SIGANL PIN I/O SIGNAL
No. No. No. No.
(V DD=+5V)
1 - NC 17 I MD3 33 I MD11 49 I S0
2 I AR0 18 I MD4 34 I MD12 50 I S1 PIN I/O SIGNAL PIN I/O SIGNAL PIN I/O SIGANL PIN I/O SIGNAL
3 I AR1 19 I MD5 35 I MD13 51 I S2 No. No. No. No.
4 I LN0 20 I MD6 36 I MD14 52 I S3 1 O SD00 21 O SD06 41 O SD10 61 O SD16
5 I LN1 21 O MA6 37 I MD15 53 I S4 2 - GND 22 - NC 42 - GND 62 - NC
6 - NC 22 O MA7 38 O C0 54 I S5 3 - NC 23 - GND 43 - NC 63 - GND
7 O MA0 23 O MA8 39 O C1 55 I S6 4 O SD01 24 - NC 44 O SD11 64 - NC
8 O MA1 24 I OE 40 O C2 56 I CK 5 I/O RD20 25 - NC 45 I/O RD30 65 - NC
9 O MA2 25 - GND 41 O C3 57 - GND 6 I/O RD21 26 O SD07 46 I/O RD31 66 O SD17
10 - GND 26 - V DD 42 - GND 58 - V DD 7 I/O RD22 27 I/O SD25 47 I/O RD32 67 I/O RD35
11 O MA3 27 O MA9 43 O C4 59 - NC 8 I/O RD03 28 I/O SD26 48 I/O RD13 68 I/O RD36
12 O MA4 28 O MA10 44 O C5 60 I BS 9 I/O RD04 29 I/O SD27 49 I/O RD14 69 I/O RD37
13 O MA5 29 I MD7 45 O C6 61 I B0 10 O SD02 30 I WD0 50 O SD12 70 I WD4
14 I MD0 30 I MD8 46 O C7 62 I B1 11 O SD03 31 I WD1 51 O SD13 71 I WD5
15 I MD1 31 I MD9 47 O CE 63 I B2 12 - GND 32 I WD2 52 - GND 72 I WD6
16 I MD2 32 I MD10 48 I SS 64 - NC 13 O SD04 33 - V DD 53 O SD14 73 - V DD
14 O SD05 34 I WD3 54 O SD15 74 I WD7
15 I/O RD23 35 I RCK 55 I/O RD33 75 I WCK
16 I/O RD24 36 I RENB 56 I/O RD34 76 I WENB
17 I MODE 37 I SEL0 57 - NC 77 I SEL1
18 I/O RD05 38 I/O RD10 58 I/O RD15 78 I/O RD00
63 46 INPUT 19 I/O RD06 39 I/O RD11 59 I/O RD16 79 I/O RD01
B2 C7
62 45 AR0,AR1,LN0,LN1; 20 I/O RD07 40 I/O RD12 60 I/O RD17 80 I/O RD02
B1 C6
61 44 ARITHMETIC AREA SIGNAL PORT
BO C5
60 43 B0-B2 ; ADDRESS BANK REGISTER DATA PORT
BS C4
41 BS ; ADDRESS BANK STROBE
55 C3
S6 40 CK ; CLOCK
54 C2
S5 39 MD0-MD15 ; MEMORY DATA PORT
53 C1
S4 38 OE ; OUTPUT ENABLE FOR MEMORY ADDRESS 78 1
52 C0 RD00 SD00 INPUT
S3 S0-S6 ; START ADDRESS REGISTER 79 4
51 47 RD01 SD01 MODE ; DATA BUS CONTROLLER/SELECTOR CHANGE
S2 CE SS ; WRITE STROBE FOR START ADDRESS REGISTER 80 10
50 RD02 SD02 (0:DATA BUS CONTROLLER, 1:2 TO 1 SELECTOR)
S1 8 11
49 RD03 SD03 RCK ; CLOCK FOR READ SYSTEM
S0 OUTPUT 9 13
48 RD04 SD04 RENB ; LATCH ENABLE FOR SD00-SD07,SD10-SD17
SS C0-C7 ; CONTROL PORT FOR ADDRESS ARITHMETIC IC 18 14
RD05 SD05 SEL0 ; READ/WRITE CHANGE (DATA BUS CONTROLLER MODE)
5 CE ; CHIP ENABLE 19 21
LN1 RD06 SD06
4 MA0-MA10 ; MEMORY ADDRESS PORT 20 26 RD0,RD1 RD2,RD3
LN0 RD07 SD07
3 0 READ WRITE
AR1 38 41
2 RD10 SD10 1 WRITE READ
AR0 39 44
37 RD11 SD11 SD0 OUTPUT DATA SELECT (SELECTOR MODE)
MD15 40 50
36 RD12 SD12 (0:RD1, 1:RD3)
MD14 48 51
35 RD13 SD13 SEL1 ; SD1 OUTPUT DATA SELECT (SELECTOR MODE)
MD13 49 53
34 RD14 SD14 WCK ; CLOCK FOR WRITE SYSTEM
MD12 58 54
33 RD15 SD15 WD0-WD7 ; MEMORY WRITE DATA
MD11 59 61
32 28 RD16 SD16 WENB ; LATCH ENABLE FOR WD0-WD7
MD10 MA10 60 66
31 27 RD17 SD17
MD9 MA9 5
30 23 RD20 17 OUTPUT
MD8 MA8 6 MODE
27 22 RD21 37 SD00-SD07,SD10-SD17 ;
MD7 MA7 7 SEL0
20 21 RD22 77 READ DATA OUT FROM MEMORY
MD6 MA6 15 SEL1
19 13 RD23 36
MD5 MA5 16 RENB
18 12 RD24 35 INPUT/OUTPUT
MD4 MA4 27 RCK
17 11 RD25 RD00-RD07,RD10-RD17,RD20-RD27,RD30-RD37 ;
MD3 MA3 28 76
16 9 RD26 WENB READ DATA IN/WRITE DATA OUT
MD2 MA2 29 75
15 8 RD27 WCK
MD1 MA1
14 7 45 30
MD0 MA0 RD30 WD0
24 46 31
OE RD31 WD1
56 47 32
RD32 WD2
55 34
RD33 WD3
56 70
RD34 WD4
67 71
RD35 WD5
68 72
RD36 WD6
69 74
RD37 WD7

2-36 DME-3000/7000
IC

CXD8274Q(SONY)FLAT PACKAGE

C-MOS DIGITAL CLOCK GENERATOR


— TOP VIEW —
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
CONTROL METHODS

1. I/O ADDRESS MAP


GND

GND

GND
65 40
66 39
ADDRESS FUNCTION
0 WRITE ZERO PHASE (COLOR)
67 38
1 WRITE ZERO PHASE (MONO)
68 37
2 SC-H PHASE ADJUST
69 36
3 SAMPLING PHASE (sin 0s)
70 35
4 SAMPLING PHASE (sin < 0s + /4 >)
71 34
5 PEDESTAL CLAMP VALUE
72 VDD (+5V) 33
6 FORCED MONO MODE
73 VDD (+5V) 32
74 31
2. DETAIL OF FUNCTION
75 30
76 29 (A) ADDRESS = 0
77 28 1LSB = 1 CLOCK WIDTH (CLOCK = 4FSC)
D D D D D D D D D D D D D D D D
78 27 DATA
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
79 26 NTSC … 0 - 909
… 0 - 1134
GND

GND

GND
80 25 PHASE PAL
RANGE D1 525 … 0 - 857
D1 625 … 0 - 863
PHASE (D15 = MSB)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

(B) ADDRESS = 1
<CPU (MASTER) MODE> (VDD = +5 V) 1LSB = 1/2 CLOCK WIDTH
D D D D D D D D D D D D D D D D
DATA (CLOCK = nFH : n IS DESIDED BY SYSTEM)
PIN PIN PIN PIN 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
No.
I/O SIGNAL
No.
I/O SIGNAL
No.
I/O SIGNAL
No.
I/O SIGNAL NTSC … 910
x x x x PAL … 1135
1 I M2 21 O CNTH 41 O WIN2 61 O WZ1 n
D1 525 … 858
2 — GND 22 O LALT 42 — GND 62 I M0
D1 625 … 864
3 I CKIN 23 — GND 43 O 4FSCA 63 — GND
PHASE (D15 = MSB)
4 I TEST 24 I NICK 44 O 4FSCB 64 I M1
5 I MONO 25 I CKD 45 O WIN1 65 I P4
(C) ADDRESS = 2
6 I SYIN 26 O ADV 46 O O9 66 I P3
7 I NTSC 27 I ADR 47 O O8 67 I P2 1LSB = 1/64 CLOCK WIDTH
D D D D D D D D
DATA
8 I CPDEN 28 I/O DIO 48 O O7 68 I P1 7 6 5 4 3 2 1 0
9 I DI 29 I CS 49 O O6 69 I P0
10 O WZ2 30 I OE 50 O O5 70 I D9
11 O FSC 31 I RST 51 O O4 71 I D8
12 — GND 32 — NC 52 — GND 72 I D7 SC-H PHASE
13 O HER 33 — VDD 53 O O3 73 — VDD
14 O BER 34 — NC 54 O O2 74 I D6
(D) ADDRESS = 3 OR 4 (SET BOTH sin 0s AND sin 0s + /4)
15 O CM 35 I SHIFT 55 O O1 75 I D5
PHASE = 511 *sin 0s (2's COMPLEMENT)
16 O CML 36 I RST2 56 O O0 76 I D4 D D D D D D D D D D
DATA
17 I FLDI 37 I INT 57 O NIO 77 I D3 9 8 7 6 5 4 3 2 1 0
18 I TIN 38 O PER2 58 O CFP2 78 I D2
19 I RSIHBT 39 O PER1 59 O CFP1 79 I D1
20 O TOUT 40 I PINV 60 O CFP0 80 I D0
PHASE (D9 = MSB)

80 56
INPUT
D0 O0 ADR ; SERIAL ADDRESS
79 55 CKIN ; SYSTEM CLOCK FROM VCO (8FSC) (E) ADDRESS = 5
D1 O1
78 54 CKD ; SERIAL INTERFACE CLOCK
D2 O2 D D D D D D D D D D + 511
77 53 CPDEN ; ENABLE INPUT OF PEDESTAL CLAMP FUNCTION DATA
D3 O3 (OPEN OR HIGH : ENABLE) 9 8 7 6 5 4 3 2 1 0
76 51
D4 O4 CS ; CHIP SELECT
75 50 0
D5 O5
D0 - D9 ; VIDEO DATA IN (MSB = D9) P
74 49 DI ; COMPOSITE/COMPONENT SELECT (HIGH : COMPONENT)
D6 O6 FLDI ; CONNECT TO "CFPQ" IN THE PAL SYSTEM
72 48 – 512
D7 O7 INT ; TEST PIN. (NORMAL USE IS OPEN OR HIGH) PEDESTAL (D9 = MSB)
71 47 P = 272 (NTSC) (2's COMPLEMENT)
D8 O8 M0 - M2 ; TEST PIN. (NORMAL USE IS OPEN OR LOW)
70 46 MONO ; WHEN "MONO" BECOMES HIGH, THEN INTERNAL H-PLL
D9 O9
COUNTER MAKE "WZ2" SIGNAL, AND "CM" BECOMES (F) ADDRESS = 6
LOW, WHETHER "D0 - D9" INPUT HAS BURST SIGNAL OR
69 26
P0 ADV NOT.
68 14 NICK ; NTSC SYSTEM : CONNECT TO CNTH D0
P1 BER
67 13 PAL SYSTEM : CONNECT TO "LALTO"
P2 HER NTSC ; 525/625 SYSTEM SELECT (HIGH : 525)
66
P3 OE ; OUTPUT ENABLE INPUT FOR "O0 - O9"
65 60 P0 - P4 ; DELAY CONTROL FOR BURST GATE PULSE
P4 CFP0 H : FORCED MONO MODE
59 PINV ; POLARITY OF "PER1" AND "PER2" L : AUTO (DECIDED BY BURST PRESENCE OF INPUT)
CFP1
27 58 RSIHBT ; RESET ENABLE FOR INTERNAL H-PLL COUNTER
ADR CFP2 (LOW : ENABLE)
29 15
CS CM RST ; RESET
25 16 RST2 ; TEST PIN. (NORMAL USE IS OPEN OR HIGH)
CKD CML
3 21 SHIFT ; TEST PIN. (NORMAL USE IS OPEN OR LOW)
CKIN CNTH SYIN ; COMPOSITE SYNC
8
CPDEN TIN ; TEST PIN. (NORMAL USE IS OPEN OR LOW)
9 11
DI FSC TEST ; TEST PIN. (NORMAL USE IS OPEN OR LOW)
28 43
DIO 4FSCA
17 44 OUTPUT
FLDI 4FSCB ADV ; THIS SIGNAL SHOWS SC-H PHASE IS ADVANCE
5
MONO (HIGH : ADVANCE)
24 39 BER ; BURST PHASE COMPARATOR
NICK PER1
7 38 CFP0 ; FIELD PULSE
NTSC PER2
40 CFP1 ; COLOR FRAME PULSE
PINV CFP2 ; PAL COLOR FRAME PULSE
19 22
RSIHBT LALT CM ; WHEN "MONO" IS TO HIGH, "CM" IS DERIVED TO LOW.
31 57 THIS SIGNAL SHOWS BURST PRESENCE IN "D0 - D9"
RST NIO
30 45 (HIGH : PRESENCE)
OE WIN1 CML ; INVERTED OUTPUT OF "CM"
6 41
SYIN WIN2 CNTH ; HORIZONTAL PULSE
61 FSC ; FSC PULSE
WZ1
37 10 4FSCA ; 4FSC PULSE
INT WZ2
62 4FSCB ; 4FSC PULSE INVERTED
M0 HER ; H-PHASE COMPARATOR OUTPUT
64 20
M1 T OUT LALT ; LINE ALTERNATIVE PULSE OUTPUT IN THE PAL SYSTEM.
1 NIO ; NI PULSE
M2
36 O0 - O9 ; VIDEO DATA OUT
RST2 PER1, PER2 ; PEDESTAL DIFFERENCE COMPARATOR OUTPUT
35
SHIFT WIN1 ; THIS SIGNAL SHOWS SC-H PHASE CENTER POSITION
18 (HIGH : CENTER)
T IN
4 WIN2 ; THIS SIGNAL SHOWS SC-H PHASE IS WITHIN ± 45°
TEST
(HIGH : IN)
WZ1 ; TEST OUTPUT
WZ2 ; HORIZONTAL PULSE OUTPUT WHICH IS SYNCHRONIZED BY
FSC
TOUT ; TEST OUTPUT

INPUT/OUTPUT
DIO ; SERIAL DATA

DME-3000/7000 2-37
IC

CXD8331Q(SONY)
43
4 FSC A
C-MOS VIDEO MODIFIER
44 -TOP VIEW-
4 FSC B
6 V-SYNC 60

120

115

110

105

100
SY IN TIMING CFP 0

95

90

85

81
69-65 FIELD 59
P0-P4 PULSE CFP 1
18 DETECTOR
T IN GENERATOR H-SYNC 58
CFP 2

NC

VDD(+5V)
GND
GND

NC
NC
121 80

VDD(+5V) VDD(+5V)
LALT VAR PHASE 13
125
HER
GENERATOR DELAY COMPARATOR 75

3 4 FSC H - PLL 21 130


CK IN COUNTER CNTH 70
COUNTER 16
CML
SC 15
CM
135
61 65
COLOR FRAME FLY WHEEL WZ1
VDD(+5V)
24 62
NICK DETECTOR COUNTER WZ2
17 VDD(+5V) GND
FLDI
35 SC - H 57 140 NC GND
SHIFT NIO GND 60
DETECTOR 45
WIN1 GND GND
41
SC GENERATOR W. ZERO WIN2
26
GENERATOR ADV 145
55
80-70
10
D0-D9 BPF PHASE PULSE-WIDTH 14
BER
COMPARATOR MODULATION 150
50
PEDESTAL
39
PULSE-WIDTH PER 1
DELAY 38 155
MODULATION PER 2 45

VDD(+5V)
VDD(+5V) VDD(+5V)
56-53,

GND
GND
51-46 160 41

NC
CLAMP LIMITER O0-O9

27
ADR TEST 1

10

15

20

25

30

35

40
25
CKD
29 18 20
CS TEST IN T OUT
9
DI
28
DIO
37 CONTROL
INT CONTROL
62,64,1 SIGNAL
M0-M2
7
NTSC
31
RST
35
RST2
4
TEST

2-38 DME-3000/7000
IC

(VDD = +5V)
133 149 PIN PIN PIN PIN
IN0 0 OUT0 0
NO. I/O SIGNAL NO. I/O SIGNAL NO. I/O SIGNAL NO. I/O SIGNAL
132 148
IN0 1 OUT0 1
131 147 1 — VDD 41 — VDD 81 — VDD 121 — VDD
IN0 2 OUT0 2
130 146 2 I IN1 1 42 I IN3 3 82 I DT1I 122 I IN0 B
IN0 3 OUT0 3
129 145 3 I IN1 0 43 I IN3 2 83 I DT2I 123 I IN0 A
IN0 4 OUT0 4
128 144 4 I IN2 B 44 I IN3 1 84 I LD1 124 I IN0 9
IN0 5 OUT0 5
127 143 5 I IN2 A 45 I IN3 0 85 I EN1 125 I IN0 8
IN0 6 OUT0 6
126 138 6 I IN2 9 46 I IN4 B 86 I LD2 126 I IN0 7
IN0 7 OUT0 7
125 137 7 I IN2 8 47 I IN4 A 87 I EN2 127 I IN0 6
IN0 8 OUT0 8
124 136 8 I IN2 7 48 I IN4 9 88 I TN IN 128 I IN0 5
IN0 9 OUT0 9
123 135 9 I IN2 6 49 I IN4 8 89 — NC 129 I IN0 4
IN0 A OUT0 A
122 134 10 I IN2 5 50 I IN4 7 90 — NC 130 I IN0 3
IN0 B OUT0 B
11 I IN2 4 51 I IN4 6 91 O DT1CO 131 I IN0 2
3 28 12 I IN2 3 52 I IN4 5 92 O DT1YO 132 I IN0 1
IN1 0 OUT1 0
2 27 13 O OUT1 B 53 O OUT2 B 93 O DT2O 133 I IN0 0
IN1 1 OUT1 1
159 26 14 O OUT1 A 54 O OUT2 A 94 O OUT3 B 134 O OUT0 B
IN1 2 OUT1 2
158 25 15 O OUT1 9 55 O OUT2 9 95 O OUT3 A 135 O OUT0 A
IN1 3 OUT1 3
157 24 16 O OUT1 8 56 O OUT2 8 96 O OUT3 9 136 O OUT0 9
IN1 4 OUT1 4
156 23 17 O OUT1 7 57 O OUT2 7 97 O OUT3 8 137 O OUT0 8
IN1 5 OUT1 5
155 22 18 — VDD 58 O OUT2 6 98 O OUT3 7 138 O OUT0 7
IN1 6 OUT1 6
154 17 19 — NC 59 — GND 99 — GND 139 — VDD
IN1 7 OUT1 7
153 16 20 — GND 60 I CK 100 I CKD 140 — NC
IN1 8 OUT1 8
152 15 21 — GND 61 — GND 101 — GND 141 — GND
IN1 9 OUT1 9
151 14 22 O OUT1 6 62 — GND 102 I/O SDAT 142 — GND
IN1 A OUT1 A
150 13 23 O OUT1 5 63 I CKS 103 — VDD 143 O OUT0 6
IN1 B OUT1 B
24 O OUT1 4 64 — VDD 104 O OUT3 6 144 O OUT0 5
31 70 25 O OUT1 3 65 O OUT2 5 105 O OUT3 5 145 O OUT0 4
IN2 0 OUT2 0
30 89 26 O OUT1 2 66 O OUT2 4 106 O OUT3 4 146 O OUT0 3
IN2 1 OUT2 1
29 88 27 O OUT1 1 67 O OUT2 3 107 O OUT3 3 147 O OUT0 2
IN2 2 OUT2 2
12 87 28 O OUT1 0 68 O OUT2 2 108 O OUT3 2 148 O OUT0 1
IN2 3 OUT2 3
11 86 29 I IN2 2 69 O OUT2 1 109 O OUT3 1 149 O OUT0 0
IN2 4 OUT2 4
10 85 30 I IN2 1 70 O OUT2 0 110 O OUT3 0 150 I IN1 B
IN2 5 OUT2 5
9 58 31 I IN2 0 71 I IN4 4 111 — NC 151 I IN1 A
IN2 6 OUT2 6
8 57 32 I IN3 B 72 I IN4 3 112 I SADD 152 I IN1 9
IN2 7 OUT2 7
7 56 33 I IN3 A 73 I IN4 2 113 I CKX 153 I IN1 8
IN2 8 OUT2 8
6 55 34 I IN3 9 74 I IN4 1 114 I CS2 154 I IN1 7
IN2 9 OUT2 9
5 54 35 I IN3 8 75 I IN4 0 115 I CS1 155 I IN1 6
IN2 A OUT2 A
4 53 36 I IN3 7 76 I OE0 116 I CS0 156 I IN1 5
IN2 B OUT2 B
37 I IN3 6 77 I OE1 117 I CTIM 157 I IN1 4
45 110 38 I IN3 5 78 I OE2 118 O TSTO 158 I IN1 3
IN3 0 OUT3 0
44 109 39 I IN3 4 79 I OE3 119 I RST 159 I IN1 2
IN3 1 OUT3 1
43 108 40 — VDD 80 — VDD 120 — VDD 160 — VDD
IN3 2 OUT3 2
42 107
IN3 3 OUT3 3
39 106
IN3 4 OUT3 4 INPUT
38 105
IN3 5 OUT3 5 CK ; SYSTEM CLOCK
37 104 CKD ; CLOCK FOR CS0, CS1, CS2, SADD, SDAT
IN3 6 OUT3 6
36 98 CKS ; CLOCK FOR SAMPLE AND HOLD CIRCUIT IN OUT1
IN3 7 OUT3 7
35 97 CKX ; TIMING SIGNAL FOR SERIAL CONTROL EXECUTION
IN3 8 OUT3 8
34 96 CS0-CS2 ; CHIP SELECT
IN3 9 OUT3 9 CTIM ; COLOR TIMING SPECIFIED
33 95
IN3 A OUT3 A DT1I, DT2I ; SAMPLE PULSE FOR SAMPLE AND HOLD CIRCUIT IN OUT1, OUT2
32 94
IN3 B OUT3 B EN1, EN2 ; NAMADD1, NAMADD2 CIRCUIT ENABLE (IN COUNTER MODE)
IN0 0-IN0 B, IN1 0-IN1 B, IN2 0-IN2 B, IN3 0-IN3 B, IN4 0-IN4 B
75 92 ; DATA
IN4 0 DT1YO
74 91 LD1, LD2 ; NAMADD1, NAMADD2 CIRCUIT LOAD PIN (IN COUNTER MODE)
IN4 1 DT1CO OE0-OE3 ; OUTPUT ENABLE FOR OUT0, OUT1, OUT2, OUT3
73 93
IN4 2 DT2O SADD ; SERIAL ADDRESS
72
IN4 3 RST ; POWER RESET
71 76 TN IN ; TEST TERMINAL
IN4 4 OE0
52 77
IN4 5 OE1
51 78 OUTPUT
IN4 6 OE2
50 79 DT1YO, DT1CO, DT2O
IN4 7 OE3 ; SAMPLE PULSE
49
IN4 8 OUT0 0-OUTO B, OUT1 0-OUT1 B, OUT2 0-OUT2 B, OUT3 0-OUT3 B
48 82
IN4 9 DT1I ; DATA
47 83 TSTO ; TEST TERMINAL
IN4 A DT2I
46
IN4 B
88 INPUT/OUTPUT
TN IN SDAT ; SERIAL DATA
117 118
CTIM TSTO

102
SDAT
112 IN0 0-IN0 B IN1 0-IN1 B IN2 0-IN2 B IN3 0-IN3 B IN4 0-IN4 B CTIM
SADD
133-122 2, 3, 31-29, 45-42, 75-71, 117
159-150, 12-4 39-32 52-46
CKD
CKS

CKX

RST
CK

CS0
CS1
CS2

EN1
EN2
LD1
LD2

12 12 12 12 12 COLOR
SEQUENCE
100
113

119

116
115
114
60
63

84
86

85
87

MAT1
MAT2
3/4

0 1 2 3
DL3/4
0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
(1) 4 0
A MIX1
2 O
B 1
3
4
A MIX2
5 O
B 2
6
7
A
8 O
B 3
9

NAM/
A ADD2
10 O
B 4
11

FILTER& 5
12
VAR.DELAY 6

13
(14) 3 7

12
12
12 (LSB) 1
12
2 2

1 S/H S/H D/DT D/DT D/DT 1

149-143, 28-22, 70-65, 110-104,


84, 85 86, 87 76 138-134 77 17-13 82 78 58-53 83 92 91 93 79 98-94
LD1, EN1 LD2, EN2 OE0 OUT0 0-OUT0 B OE1 OUT1 0-OUT1 B DT1I OE2 OUT2 0-OUT2 B DT2I DT1YO DT1CO DT2O OE3 OUT3 0-OUT3 B

DME-3000/7000 2-39
IC

CXD8332Q(SONY)FLAT PACKAGE
C-MOS 2 X 2 INTERPOLATOR
-TOP VIEW-
CXD8332Q (2/3)

20
63
64
72
92
93
94
108

105

100

95

90

85

80

75
73
(VDD = +5V)

H1
SW
SAMPUL
ADR
TEST
FLOE
SMP
122 37 PIN PIN PIN PIN
A9 D9 I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL
NC
NC

GND

GND
VDD(+5V)

GND

VDD(+5V)
123 38 NO. NO. NO. NO.
A8 D8
109 72 124 39 1 — VDD 37 I D9 73 — VDD 109 I HM0
110 A7 D7
70 125 40 2 I E9 38 I D8 74 I BG0 110 I HM1
A6 D6
128 41 3 I E8 39 I D7 75 I BG1 111 I HM2
A5 D5
129 42 4 I E7 40 I D6 76 I BG2 112 I HM3
A4 D4
115 GND 130 43 5 I E6 41 I D5 77 I BG3 113 I HM4
65 A3 D3
131 44 6 I E5 42 I D4 78 I BG4 114 I HM5
GND A2 D2
132 46 7 I E4 43 I D3 79 I BG5 115 I VM0
A1 D1
NC 133 47 8 I E3 44 I D2 80 I RST 116 I VM1
120 NC A0 D0
NC 60 9 — GND 45 — GND 81 — GND 117 — GND
134 2 10 I E2 46 I D1 82 I BG6 118 I VM2
B9 E9
135 3 11 I E1 47 I D0 83 I BG7 119 I VM3
B8 E8
125 136 4 12 I E0 48 I C9 84 I BG8 120 I VM4
VDD(+5V) GND 55 B7 E7
137 5 13 I KE0 49 I C8 85 I BG9 121 I VM5
GND VDD(+5V) B6 E6
139 6 14 I KE1 50 I C7 86 I PA1 122 I A9
B5 E5
140 7 15 I KE2 51 I C6 87 I PA2 123 I A8
130 B4 E4
50 141 8 16 I KE3 52 I C5 88 I PA3 124 I A7
B3 E3
142 10 17 I KE4 53 I C4 89 I PA4 125 I A6
B2 E2
143 11 18 — VDD 54 — VDD 90 — VDD 126 — VDD
B1 E1
135 144 12 19 — GND 55 — GND 91 — GND 127 — GND
GND 45 B0 E0
20 I H1 56 I C3 92 I TEST 128 I A5
GND 48 26 21 I KF0 57 I C2 93 I FLOE 129 I A4
C9 F9
49 27 22 I KF1 58 I C1 94 I SMP 130 I A3
140 41 C8 F8
50 28 23 I KF2 59 I C0 95 I OE 131 I A2
C7 F7
51 29 24 I KF3 60 — NC 96 O IP0 132 I A1
VDD(+5V)

VDD(+5V)

C6 F6
144 37 52 31 25 I KF4 61 — NC 97 O IP1 133 I A0
GND

GND

GND

C5 F5
53 32 26 I F9 62 — NC 98 O IP2 134 I B9
C4 F4
56 33 27 I F8 63 I SW 99 O IP3 135 I B8
C3 F3
57 34 28 I F7 64 I SAMPUL 100 O IP4 136 I B7
1

10

15

20

25

30

35
36

C2 F2
58 35 29 I F6 65 I CK3 101 O IP5 137 I B6
C1 F1
59 36 30 — GND 66 — GND 102 — GND 138 — GND
C0 F0
31 I F5 67 I CK1 103 O IP6 139 I B5
85 106 32 I F4 68 I CKX 104 O IP7 140 I B4
BG9 IP9
84 105 33 I F3 69 I CS 105 O IP8 141 I B3
BG8 IP8
83 104 34 I F2 70 I CKD 106 O IP9 142 I B2
BG7 IP7
82 103 35 I F1 71 I/O DIO 107 — NC 143 I B1
BG6 IP6
79 101 36 I F0 72 I ADR 108 — NC 144 I B0
BG5 IP5
78 100
BG4 IP4
77 99 INPUT OUTPUT
BG3 IP3
76 98 A0-A9 ; VIDEO DATA (A) IP0-IP9 ; VIDEO OUT
BG2 IP2
75 97 ADR ; SERIAL ADDRESS
BG1 IP1 B0-B9 ; VIDEO DATA (B) INPUT/OUTPUT
74 96
BG0 IP0 BG0-BG9 ; BACK GROUND VIDEO DIO ; SERIAL DATA I/O
C0-C9 ; VIDEO DATA (C)
17 114 CK1 ; 27.0 MHz/28.6 MHz
KE4 HM5
16 113 CK3 ; 6.75 MHz/7.15 MHz
KE3 HM4
15 112 CKD ; SERIAL CLOCK
KE2 HM3 CKX ; SERIAL SET TIMING
14 111
KE1 HM2 CS ; SERIAL TIMING PULSE
13 110
KE0 HM1 D0-D9 ; VIDEO DATA (D)
109 E0-E9 ; VIDEO DATA (E)
HM0
25 F0-F9 ; VIDEO DATA (F)
KF4
24 121 FLOE ; FIELD ODD/EVEN
KF3 VM5
23 120 H1 ; H-ADDRESS
KF2 VM4 HM0-HM5 ; H-ADDRESS
22 119
KF1 VM3 KE0- KE4 ; MOTION-IN (A-B SIDE)
21 118
KF0 VM2 KF0-KF4 ; MOTION-IN (C-D SIDE)
116 OE ; OUTPUT ENABLE
VM1
89 115 PA1-PA4 ; PARALLEL ADDRESS
PA4 VM0
88 RST ; RESET
PA3 SAMPUL ; INPUT SAMPLING
87
PA2 SMP ; SAMPLING PULSE
86
PA1 SW ; ACTIVE VIDEO AREA
TEST ; TEST
VM0-VM5 ; V-ADDRESS
CKD
CKX

RST
CK1
CK3

DIO
OE
CS
67
65
68
69
70

71
80
95

2-40 DME-3000/7000
IC

CK1 67
70, 72, 71,
CKD, ADR, DIO, 69, 80, 92
CS, RST, TEST SERIAL CONTROL
SERIAL
FLOE 93 DECODER
PHCTL SW S&H PHASE
CKX 68 FLOE JADGE CK3 GEN
CK3 65 PHASE PHCTL V, H ADD S&M PHASE

10 CONTROL PHCTL KE, KF S&H PHASE


BG0-BG9 74-79, 82-85
PHCTL V, H ADD +1/–1 OFFSET PHASE
Y/U/V
REGISTER
SERIAL

63
SW SWO
VARIABLE DELAY E, F POINT CALCULATION Q1, Q2 POINT CALCULATION IP POINT CALCULATION

2-8, 10-12 10 2D SELV SELH


E9-E0 2D
+ + – Q1
+ E +
+ –
122-125, –
>>1
128-133 10 + MSB
A9-A0 2D
4D >>1
B
134-137,
139-144 10
B9-B0 2D
4D A
48-53,
56-59,
10
C9-C0 D + + –
2D Q2
4D –
37-44, >>1
48, 47, C MSB
10
D9-D0
+ F
+ +
>>1 + 1
64 – MSB
SAMPUL 2D
4D

26-29,
31-38 10 2D
F9-F0 2D
6 5
FIELD 5V 5
PROCEED
FRAME
13-17 5 PROCEED
KE0-KE4 KEY/MOTION MIX OUTPUT DELAY 95
OE
SERIAL
MAX / MIN 96-101,
DECODE 103-106,
10
IP0-IP9
V OFFSET
5 2
21-25
KF0-KF5
115, 116,
118-121 6 4 COMPA-
VM0-VM5 SWO SMP DATA
RATOR
FORCED FIELD/
FRAME PROCEED MEAN BIT 94
AVERAGE <<5 SAMPLE
H OFFSET CONTROL (SAMPLE)
109-114 6 HADD CALCULATION
HM0-HM5
+1/–1 6
>>1 REGISTER 7
CK3 CNTL

DME-3000/7000 2-41
IC

CXD8334Q(LSI)
IL00
C-MOS COMBINER PROCESSOR
-TOP VIEW-
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
35 57
KA0 KOUT0
36 58
KA1 KOUT1
37 59

GND
VDD (+5V)

GND
KA2 KOUT2
121 80 38 62
122 VDD (+5V) 79 KA3 KOUT3
VDD (+5V) 39 63
123 78 KA4 KOUT4
124 77 42 64
KA5 KOUT5
125 76 43 65
126 75 KA6 KOUT6
127 74 44 66
KA7 KOUT7
128 73 45 67
129 GND GND 72 KA8 KOUT8
46 68
130 71 KA9 KOUT9
131 70 47
KA10 KOUT10
69
132 69 48 70
133 68 KA11 KOUT11
134 67 73 71
KA12 KOUT12
135 66
136 65
137 64 74 22
KB0 KAB0
138 63 75 23
KB1 KAB1
139 62
VDD (+5V) 76 24
140 VDD (+5V) 61 KB2 KAB2
141 GND GND 60 77 25
KB3 KAB3
142 59 78 26
143 58 KB4 KAB4
144 57 79 27
KB5 KAB5
145 56 82 50
146 55 KB6 KAB6
147 54 83 51
KB7 KAB7
148 53 84 52
KB8 KAB8
149 52
85 53
150 51 KB9 KAB9
151 50 86
KB10 KAB10
54
152 GND GND 49 55
87
153 48 KB11 KAB11
154 47 88 56
VDD (+5V)

KB12 KAB12
155 46
VDD (+5V)

156 45
157 44 107 90
ZA0 GZ0
VDD (+5V)

158 43 108 91
ZA1 GZ1
159 42
GND

GND

GND

109 92
160 41 ZA2 GZ2
110 93
ZA3 GZ3
111 94
ZA4 GZ4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

112 95
ZA5 GZ5
113 96
ZA6 GZ6
114 97
ZA7 GZ7
115 98
ZA8 GZ8
(VDD = +5V) 116
ZA9 GZ9
100
117 102
PIN PIN PIN PIN PIN ZA10 GZ10
No. I/O SIGNAL No. I/O SIGNAL No. I/O SIGNAL No. I/O SIGNAL No. I/O SIGNAL 118 103
ZA11 GZ11
1 — VDD 33 I CKD 65 O KOUT6 97 I/O GZ7 129 — GND 119 104
ZA12 GZ12
2 O ZOUT20 34 I RST 66 O KOUT7 98 I/O GZ8 130 O ZOUT0 122
ZA13
3 I ZB7 35 I KA0 67 O KOUT8 99 — VDD 131 O ZOUT1 123 130
ZA14 ZOUT0
4 I ZB8 36 I KA1 68 O KOUT9 100 I/O GZ9 132 O ZOUT2 124 131
ZA15 ZOUT1
5 I ZB9 37 I KA2 69 O KOUT10 101 — GND 133 O ZOUT3 125 132
ZA16 ZOUT2
6 I ZB10 38 I KA3 70 O KOUT11 102 I/O GZ10 134 O ZOUT4 126 133
ZA17 ZOUT3
7 I ZB11 39 I KA4 71 O KOUT12 103 I/O GZ11 135 O ZOUT5 127 134
ZA18 ZOUT4
8 I ZB12 40 — VDD 72 — GND 104 I/O GZ12 136 O ZOUT6 128 135
ZA19 ZOUT5
9 I ZB13 41 — VDD 73 I KA12 105 O TOUT 137 O ZOUT7 136
ZOUT6
10 I ZB14 42 I KA5 74 I KB0 106 I TNCON 138 O ZOUT8 153 137
ZB0 ZOUT7
11 I ZB15 43 I KA6 75 I KB1 107 I ZA0 139 O ZOUT9 154 138
ZB1 ZOUT8
12 I ZB16 44 I KA7 76 I KB2 108 I ZA1 140 — VDD 155 139
ZB2 ZOUT9
13 I ZB17 45 I KA8 77 I KB3 109 I ZA2 141 — GND 156 142
ZB3 ZOUT10
14 I ZB18 46 I KA9 78 I KB4 110 I ZA3 142 O ZOUT10 157 143
ZB4 ZOUT11
15 I ZB19 47 I KA10 79 I KB5 111 I ZA4 143 O ZOUT11 158 144
ZB5 ZOUT12
16 I ZB20 48 I KA11 80 — VDD 112 I ZA5 144 O ZOUT12 159 145
ZB6 ZOUT13
17 — VDD 49 — GND 81 — VDD 113 I ZA6 145 O ZOUT13 3 146
ZB7 ZOUT14
18 I CKH 50 O KAB6 82 I KB6 114 I ZA7 146 O ZOUT14 4 147
ZB8 ZOUT15
19 — GND 51 O KAB7 83 I KB7 115 I ZA8 147 O ZOUT15 5 148
ZB9 ZOUT16
20 I CLK 52 O KAB8 84 I KB8 116 I ZA9 148 O ZOUT16 6 149
ZB10 ZOUT17
21 — GND 53 O KAB9 85 I KB9 117 I ZA10 149 O ZOUT17 7 150
ZB11 ZOUT18
22 O KAB0 54 O KAB10 86 I KB10 118 I ZA11 150 O ZOUT18 8 151
ZB12 ZOUT19
23 O KAB1 55 O KAB11 87 I KB11 119 I ZA12 151 O ZOUT19 9 2
ZB13 ZOUT20
24 O KAB2 56 O KAB12 88 I KB12 120 — VDD 152 — GND 10
ZB14
25 O KAB3 57 O KOUT0 89 — GND 121 — VDD 153 I ZB0 11 29
ZB15 SADRS
26 O KAB4 58 O KOUT1 90 I/O GZ0 122 I ZA13 154 I ZB1 12 30
ZB16 SDATA
27 O KAB5 59 O KOUT2 91 I/O GZ1 123 I ZA14 155 I ZB2 13 31
ZB17 CS
28 — GND 60 — GND 92 I/O GZ2 124 I ZA15 156 I ZB3 14 32
ZB18 CKX
29 I SADRS 61 — VDD 93 I/O GZ3 125 I ZA16 157 I ZB4 15 33
ZB19 CKD
30 I/O SDATA 62 O KOUT3 94 I/O GZ4 126 I ZA17 158 I ZB5 16 34
ZB20 RST
31 I CS 63 O KOUT4 95 I/O GZ5 127 I ZA18 159 I ZB6 106
TNCON
32 I CKX 64 O KOUT5 96 I/O GZ6 128 I ZA19 160 — VDD 18 105
CKH TOUT
20

2-42 DME-3000/7000
IC

INPUT OUTPUT
CKD ; CLOCK FOR SEROAL INTERFACE KAB0 - KAB12 ; KOUT MUX MODE = 0
CKX ; REGISTER EXECUTE CLOCK CMB MODE : MIX GAIN OUTPUT
CLK ; SYSTEM CLOCK INPUT OVL MODE : MIX GAIN OUTPUT
CS ; CHIP SELECTER FADE MODE : NOT USE
KA0 - KA12 ; KA MUX MODE = 0 DIM MODE : DIMMED CHROMINANCE OUTPUT
CMB MODE : INTERNAL KEY INPUT KOUT MUX MODE = 1
OVL MODE : OVER KEY INPUT NOT USE
FADE MODE : KEY INPUT KOUT0 - KOUT12 ; KOUT MUX MODE = 0
DIM MODE : LUMINANCE (Y) INPUT CMB MODE : OUTPUT KEY
KA MUX MODE = 1 OVL MODE : OUTPUT KEY
MULTIPLEXED SIGNAL OF KA AND KB INPUT FADE MODE : FADED OUTPUT KEY
KB0 - KB12 ; KB MUX MODE = 0 DIM MODE : DIMMED LUMINANCE
CMB MODE : EXTERNAL KEY INPUT KOUT MUX MODE = 1
OVL MODE : UNDER KEY INPUT KOUT AND KAB MULTIPLEXED SIGNAL
FADE MODE : NOT USE TOUT ; TEST OUT
DIM MODE : CHROMINANCE (C) INPUT ZOUT0 - ZOUT20 ; ZOUT MUX MODE = 00
KB MUX MODE = 1 CMB MODE : Z OUTPUT
NOT USE OVL MODE : Z OUTPUT
RST ; REGISTER RESET FADE MODE : NOT USE
SADRS ; SERIAL ADDRESS DIM MODE : NOT USE
TNCON ; TEST PIN (FIX HIGH LEVEL) ZB MUX MODE = 01
ZA0 - ZA19 ; ZA MUX MODE = 00 ZA - ZB & ZOUT MULTIPLEXED SIGNAL OUTPUT
CMB MODE : INTERNAL Z INPUT ZB MUX MODE = 10
OVL MODE : OVER Z INPUT UPPER 11 BITS : ZA - ZB MULTIPLEXED SIGNAL
FADE MODE : Z INPUT UNDER 10 BITS : ZOUT MULTIPLEXED SIGNAL
DIM MODE : Z INPUT INPUT/OUTPUT
ZA MUX MODE = 01 GZ0 - GZ12 ; CMB MODE : PRIORITY INPUT / OUTPUT
MULTIPLEXED SIGNAL OF ZA ZB OVL MODE : KEY SOFTNESS INPUT / OUTPUT
ZA MUX MODE = 10 FADE MODE : FADE GAIN INPUT / OUTPUT
UPPER 10 BITS : ZA MULTIPLEXED SIGNAL INPUT DIM MODE : DIM GAIN INPUT / OUTPUT
UNDER 10 BITS : ZB MULTIPLEXED SIGNAL INPUT SDATA ; SERIAL DATA
ZB0 - ZB19 ; ZB MUX MODE = 00
CMB MODE : INTERNAL Z INPUT
OVL MODE : UNDER Z INPUT
FADE MODE : KEY OFFSET INPUT
DIM MODE : Y OFFSET AND C OFFSET INPUT
ZB MUX MODE = 01
MULTIPLEXED SIGNAL OF DELAYED ZA - ZB AND Z
GAIN INPUT
ZB MUX MODE = 10
UPPER 11 BITS : ZA - ZB MULTIPLEXED SIGNAL
UNDER 10 BITS : Z GAIN MULTIPLEXED SIGNAL

13 13 57-59, 62-71
KOUT KOUT0-KOUT12
ENC
35-39, 42-48, 73
25
KA0-KA12 KA DEC
13 Y KOUT MODE
13
X 13 13 22-27, 50-56
13 + KAB
O MIX X/Y KAB0-KAB12
KA MODE 25 ENC
DET 25 – 25 25
13
74-79, 82-88 KAB MODE
13 25 13
KB0-KB12 KB DEC
13 13

KB MODE O
DET S CURVE
OVF
107-119, 122-128 + 14 14 13
FLOAT 90-98, 100,
ZA0-ZA19 ZA DEC LIMITTER LPF 102-104
20
– 21 MPY 13
20 GZ0-GZ12
13
ZA MASK
ZA MODE 12 13
5
GZ 10 CTL
17
Z INHIBIT
153-159, 3-16 Z GAIN
ZB0-ZB20 ZB DEC
20
21 20
ZB MASK
ZB MODE 130-139,
142-151, 2
20 20
POSI ZOUT ZOUT0-ZOUT20
NAM ENC
21
20
ZO MODE

DME-3000/7000 2-43
IC

CXD8335AQ(SONY)

2-44 DME-3000/7000
IC

DME-3000/7000 2-45
IC

CXD8337Q(SONY)

INPUT
525 / 625 ; 525 / 625 SELECT (CONTROL REGISTER PARALLEL DATA)
BLK GATE ; BLANKING SIGNAL
BLK MODE (0-2) ; BLANKING MODE (0-2) (CONTROL REGISTER PARALLEL DATA)
CFP ; SYSTEM CFP (COLOR FRAME PULSE)
CKD ; CONTROL REGISTER SERIAL CLOCK
CKX ; CONTROL REGISTER OPERATION TIMING
CS ; CHIP SELECTOR
D1 / D2 ; D1 / D2 SELECT (CONTROL REGISTER PARALLEL DATA)
DBLK / ABLK ; DIGITAL / ANALOG BLANKING SELECT (CONTROL REGISTER PARALLEL
DATA)
DEMUX MODE (0-1) ; DEMULTIPLEX MODE (0-1) (CONTROL REGISTER PARALLEL DATA)
DIAG MODE (0-1) ; SELF DIAGNOSIS MODE (0-1) (CONTROL REGISTER PARALLEL DATA)
DIAGSMPL ; SELF DIAGNOSIS SAMPLE PULSE
DRCLR ; DYNAMIC ROUNDING RESET
DR ON ; DYNAMIC ROUNDING ON/OFF (CONTROL REGISTER PARALLEL DATA)
FD ; SYSTEM FD
FW CTL ; FLYWHEEL ON / OFF (CONTROL REGISTER PARALLEL DATA)
HD ; SYSTEM HD
HSFTAT ; AUTO COLOR MATCH (CONTROL REGISTER PARALLEL DATA)
HSFTFC ; FORCED 2CLK DELAY OF TRS (CONTROL REGISTER PARALLEL DATA)
IN (0-9) ; VIDEO SIGNAL (0-9)
MJ CTL ; MEMORY JUMP ON/OFF (CONTROL REGISTER PARALLEL DATA)
PARA / SERI ; PARALLEL SERIAL SELECT
RCK ; FIFO READ CLOCK
SADRS ; CONTROL REGISTER SIGNAL ADDRESS
TRS CUT ; TRS CANCELLATION (CONTROL REGISTER PARALLEL DATA)
V BLK FIX ; FIXED V BLANKING (CONTROL REGISTER PARALLEL DATA)
VD ; SYSTEM VD
WCK ; FIFO WRITE CLOCK

OUTPUT
DATA PHS (0-1) ; VIDEO PHASE INFORMATION (0-1)
T OUT ; TEST OUT (SET OPEN)
VIDEO EXT ; VIDEO CHECK FLAG
VINV ; V INVERT (D2 PAL)
WCF (0-1) ; DETECTED CF (0-1)
WFD ; DETECTED FD
WH ; DETECTED HD
WRST ; FIFO RESET PULSE
WV ; DETECTED VD

INPUT/OUTPUT
SDATA ; CONTROL REGISTER SERIAL DATA

2-46 DME-3000/7000
IC

DME-3000/7000 2-47
IC

CXD8333Q(SONY)FLAT PACKAGE
C-MOS ANTI-ALIAS FILTER & DEFOCUS FILTER
-TOP VIEW-
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
9 21 49 51 52 64 92
INPUT

SMP
OE
ADR
TEST
AREA
RST
EDGE
77 10
VI9 VO9 ADR ; SERIAL ADDRESS
GND
VDD(+5V)

GND

NC
GND
VDD(+5V)
76 11
81 50 VI8 VO8 AREA ; DEFOCUS-FILTER AREA
75 12
VI7 VO7 CI0 - CI9 ; COMPENSATER RATE IN
82 49 74 13
VI6 VO6 CK1 - CK3 ; SYSTEM CLOCK
83 48 73 14 CKD ; SERIAL CLOCK
VI5 VO5
84 47 72 16 CKX ; SERIAL SET TIMING
VI4 VO4
85 46 71 17 CS ; SERIAL TIMING PULSE
VI3 VO3 DEN0 - DEN7 ; DEFOCUS DENOMINATOR
86 45 70 18
87 44 VI2 VO2 EDGE ; ANTI-FILTER AREA
69 19 FI0 - FI9 ; RECURSIVE VIDEO IN
VI1 VO1
88 43 68 20
VI0 VO0
MFM1 - MFM8 ; FILTER DEPTH IN
89 42 MI0, MI1 ; FILTER DEPTH IN
90 GND 41 23 35 OE ; OUTPUT ENABLE
FI9 FO9 RST ; RESET
91 40 24 36
92 39 FI8 FO8 SMP ; SAMPLING PULSE
25 37
FI7 FO7 TEST ; TEST
93 NC 38 26 38
FI6 FO6 VI0 - VI9 ; VIDEO INPUT
94 NC 37 27 39
FI5 FO5
95 NC 36 30 41 OUTPUT
FI4 FO4
96 NC 35 31 42 FO0 - FO9 ; FILTER VIDEO OUT
FI3 FO3 VO0 - VO9 ; VIDEO OUT
97 34 32 43
FI2 FO2
98 33 33 44
INPUT/OUTPUT
VDD(+5V)

VDD(+5V)
FI1 FO1
99 32 34 45 DIO ; SERIAL DATA I/O
GND

GND

GND
FI0 FO0
100 31
NC

97 48
CI9 DIO
98
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

CI8
99
CI7
100
(VDD = +5V) CI6
1
PIN PIN PIN PIN PIN CI5
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL 2
NO. NO. NO. NO. NO. CI4
5
1 I CI5 21 I OE 41 O FO4 61 I MFM3 81 I DEN6 CI3
6
2 I CI4 22 — NC 42 O FO3 62 I MFM2 82 I DEN5 CI2
7
3 — VDD 23 I FI9 43 O FO2 63 I MFM1 83 I DEN4 CI1
8
4 — GND 24 I FI8 44 O FO1 64 I RST 84 I DEN3 CI0
5 I CI3 25 I FI7 45 O FO0 65 — GND 85 I DEN2
80
6 I CI2 26 I FI6 46 I CKX 66 I MI0 86 I DEN1 DEN7
81
7 I CI1 27 I FI5 47 I CKD 67 I MI1 87 I DEN0 DEN6
82
8 I CI0 28 — VDD 48 I/O DIO 68 I VI0 88 I CK3 DEN5
83
9 I SMP 29 — GND 49 I ADR 69 I VI1 89 I CK2 DEN4
84
10 O VO9 30 I FI4 50 I CS 70 I VI2 90 — GND DEN3
85
11 O VO8 31 I FI3 51 I TEST 71 I VI3 91 I CK1 DEN2
86
12 O VO7 32 I FI2 52 I AREA 72 I VI4 92 I EDGE DEN1
87
13 O VO6 33 I FI1 53 — VDD 73 I VI5 93 — NC DEN0
56
14 O VO5 34 I FI0 54 — GND 74 I VI6 94 — NC MFM8
57
15 — GND 35 O FO9 55 — NC 75 I VI7 95 — NC MFM7
58
16 O VO4 36 O FO8 56 I MFM8 76 I VI8 96 — NC MFM6
59
17 O VO3 37 O FO7 57 I MFM7 77 I VI9 97 I CI9 MFM5
60
18 O VO2 38 O FO6 58 I MFM6 78 — VDD 98 I CI8 MFM4
61
19 O VO1 39 O FO5 59 I MFM5 79 — GND 99 I CI7 MFM3
62
20 O VO0 40 — GND 60 I MFM4 80 I DEN7 100 I CI6 MFM2
63
MFM1
CKD
CKX
CK1
CK2
CK3
MI0
MI1

CS

66 67 91 89 88 46 47 50

2-48 DME-3000/7000
IC

CXD8838Q(NEC)

26
P SW 54
29 CK P
CK A
1 1 28
99-92, 0 OE P
A P 0
89-81 0 0 31-39, 42-49
A0-A16 REG 1 REG 1 P0-P16
100 17 17
SMPL A 27
OUT SW P
50
78 SMPL P
DIR
1
Q SW
1 1
B 0 Q 0
56-64, 69-74, 0 REG 0 REG 24-17, 14-6
B0-B16 1 1 Q0-Q16
75 17 17
SMPL B 3
OE Q
79 2
CK B OUT SW Q
4
51 CK Q
OP IN 25
SMPL Q
76
53 OP GATE
OP CK 77
52 OP OUT
OP CTL

DME-3000/7000 2-49
IC

CXD8839Q(SONY)
C-MOS ADDRESS ARITHMETIC
-TOP VIEW-
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
116 67 INPUT
N0 Q0

V DD(+5V)
GND

GND

GND
117 68 A1-A3 ; INTERNAL REGISTER ADDRESS
91 GND V DD (+5V) 60 N1 Q1
118 69 CK ; CLOCK
92 59 N2 Q2
119 70 CLR ; INTERNAL REGISTER CLEAR
93 58 N3 Q3
2 72 D0-D15 ; INTERNAL REGISTER DATA
94 57 N4 Q4
3 73 IR0 ; ORQ ORR OUTPUT CONTROL AT PACE-PECTIVE MODE
95 56 N5 Q5
4 74 IR1 ; ORQ ORR OUTPUT CONTROL AT TURN OVER PAGE MODE
96 55 N6 Q6
5 75 LDS ; LOWER DATA STROBE
97 54 N7 Q7
6 77 MODE ; MODE SELECT
98 53 N8 Q8
7 78 (0:PACE-PECTIVE MODE, 1:TURN OVER PAGE MODE)
99 52 N9 Q9
8 79 N0-N15 ; N DATA PORT
100 GND 51 N10 Q10
9 80 OVFL ; OVERFLOW
101 GND 50 N11 Q11
10 82 S0-S3 ; SHIFT NUMERICAL PORT
102 49 N12 Q12
12 83 SM ; SHIFT MODE SELECT
103 48 N13 Q13
13 84 (0:RIGHT SHIFT MODE, 1:LEFT SHIFT MODE)
104 47 N14 Q14
14 85 SN/N16 ; PACE-PECTIVE MODE: N DATA CODE
105 V DD (+5V) 46 N15 Q15
17 87 TURN OVER PAGE MODE: N DATA (MSB)
106 VDD (+5V) 45 T0 R0
18 88 ST ; PACE-PECTIVE MODE: T DATA CODE
107 44 T1 R1
19 89 TURN OVER PAGE MODE: DON'T CARE
108 43 T2 R2
20 90 T0-T15 ; T DATA PORT
109 42 T3 R3
22 92 TEST ; TEST TERMINAL
110 GND 41 T4 R4
23 93 UDS ; UPPER DATA STROBE
111 GND 40 T5 R5
24 94 WE ; WRITE ENABLE
112 39 T6 R6
113 38 25 95
T7 R7 OUTPUT
114 37 26 96
T8 R8 ORQ ; Q DATA CLIPPING SIGNAL
115 36 27 97
T9 R9 ORR ; R DATA CLIPPING SIGNAL
116 35 28 98
T10 R10 Q0-Q15 ; Q DATA PORT
117 34 29 99
T11 R11 R0-R15 ; R DATA PORT
118 30 100
VDD (+5V)

33 T12 R12
119 V DD (+5V) 32 32 102
T13 R13
33 103
GND

GND

GND

120 GND 31 T14 R14


34 104
T15 R15
48 86
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

D0 ORQ
49 105
D1 ORR
50
D2
52 40
D3 WE
53 43
D4 UDS
54 42
D5 LDS
(VDD =+5V) 55
D6 109
56 S0
PIN PIN PIN PIN D7 110
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL 57 S1
No. No. No. No. D8 113
58 S2
1 - GND 31 - GND 61 - GND 91 - GND D9 114
59 S3
2 I N4 32 I T13 62 I D11 92 O R4 D10 115
62 SM
3 I N5 33 I T14 63 I D12 93 O R5 D11 15
63 SN/N16
4 I N6 34 I T15 64 I D13 94 O R6 D12 35
64 ST
5 I N7 35 I ST 65 I D14 95 O R7 D13
65 107
6 I N8 36 I MODE 66 I D15 96 O R8 D14 IR0
66 108
7 I N9 37 I OVFL 67 O Q0 97 O R9 D15 IR1
36
8 I N10 38 I TEST 68 O Q1 98 O R10 44 MODE
A1 37
9 I N11 39 I CLR 69 O Q2 99 O R11 45 OVFL
A2
10 I N12 40 I WE 70 O Q3 100 O R12 47
A3 38
11 - GND 41 - GND 71 - GND 101 - GND TEST
112 39
12 I N13 42 I LDS 72 O Q4 102 O R13 CLR
13 I N14 43 I UDS 73 O Q5 103 O R14
14 I N15 44 I A1 74 O Q6 104 O R15
15 I SN/N16 45 I A2 75 O Q7 105 O ORR
16 - V DD 46 - V DD 76 - V DD 106 - V DD
17 I T0 47 I A3 77 O Q8 107 I IR0
18 I T1 48 I D0 78 O Q9 108 I IR1
19 I T2 49 I D1 79 O Q10 109 I S0
20 I T3 50 I D2 80 O Q11 110 I S1
21 - GND 51 - GND 81 - GND 111 - GND
22 I T4 52 I D3 82 O Q12 112 I CK
23 I T5 53 I D4 83 O Q13 113 I S2
24 I T6 54 I D5 84 O Q14 114 I S3
25 I T7 55 I D6 85 O Q15 115 I SM
26 I T8 56 I D7 86 O ORQ 116 I N0
27 I T9 57 I D8 87 O R0 117 I N1
28 I T10 58 I D9 88 O R1 118 I N2
29 I T11 59 I D10 89 O R2 119 I N3
30 I T12 60 - V DD 90 O R3 120 - V DD

2-50 DME-3000/7000
IC

CXD8840Q(SONY)FLAT PACKAGE
C-MOS DRAM ADDRESS GENERATOR
-TOP VIEW-
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
1 INPUT
RADD8 ABSELC ; ABSEL FOR C-IN
2

GND
RADD7 ABSELY ; ABSEL FOR Y-IN
52 32 15 3
VDN RADD6 CK1 ; 27.0 MHZ / 28.6 MHZ
53 31 4 CK2 ; 13.5 MHZ / 14.3 MHZ
RADD5
54 30 62 5 CK3 ; CK3 IN
HDN RADD4
55 29 6 CK3DLY ; CK3 DELAY
RADD3
7 CK3INV ; CK3 INVERT
56 28 RADD2 COLTEST ; COLUMN ADD TEST
57 GND 27 8
RADD1 FLOE ; FIELD ODD / EVEN
58 VDD(+5V) VDD(+5V) 26 63 9 HDN ; H-SCAN SYNC
PSHDNR RADD0
59 GND 25 64
PSHDNC
INVFLD ; ABSEL INVERT
60 24 33 PSHDNC ; V-SCAN SYNC
WADD8
61 23 34 PSHDNR ; V-SCAN SYNC
WADD7 RCLRN ; READ ADD CLEAR
62 22 35
WADD6 ROWTEST ; ROW ADD TEST
63 21 21 36
INVFLD WADD5 TWTESTR ; READ ADD TEST
GND

64 20 37 TWTESTW ; WRITE ADD TEST


WADD4
38 VDN ; FIELD CLEAR
WADD3
14 39 WCLRN ; WRITE ADD CLEAR
FLOE WADD2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

40
WADD1 OUTPUT
41
(VDD = +5V) WADD0 ABSELOC ; ABSEL FOR C-OUT
ABSELOY ; ABSEL FOR Y-OUT
PIN PIN PIN PIN 22 47
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL ABSELY WRAS4
CK3O ; CK3 OUT
NO. NO. NO. NO. 23 46 F1N ; FIELD1-LOW
1 O RADD8 17 O F2N 33 O WADD8 49 O WCAS1 ABSELC WRAS3
45 F2N ; FIELD2-LOW
2 O RADD7 18 I CK3DLY 34 O WADD7 50 O WCAS2 WRAS2 PSHDTW ; PSHDN ODD / EVEN
44
3 O RADD6 19 I CK3INV 35 O WADD6 51 O WCAS3 WRAS1 RADD0 - RADD8 ; READ ADDRESS
60 43
4 O RADD5 20 I CK3 36 O WADD5 52 O WCAS4 WCLRN WRAS0 RCASW ; READ ADDRESS-CAS
61 ROWOE ; ROW-ADD ODD / EVEN
5 O RADD4 21 I INVFLD 37 O WADD4 53 O WSW RCLRN
52 RRASN ; READ ADDRESS-RAS
6 O RADD3 22 I ABSELY 38 O WADD3 54 O CK3O WCAS4
51 RSW ; READ ADD SWITCHING
7 O RADD2 23 I ABSELC 39 O WADD2 55 O ABSELOY WCAS3
29 50 WADD0 - WADD8 ; WRITE ADDRESS
8 O RADD1 24 I CK2 40 O WADD1 56 O ABSELOC ROWTEST WCAS2 WCAS0 - WCAS4 ; WRITE ADDRESS-CAS
30 49
9 O RADD0 25 — GND 41 O WADD0 57 — GND COLTEST WCAS1 WRAS0 - WRAS4 ; WRITE ADDRESS-RAS
48
WCAS0 WSW ; WRITE ADD SWITCHNG
10 — GND 26 — VDD 42 — GND 58 — VDD 31
11 O RRASN 27 O ROWOE 43 O WRAS0 59 I CK1 TWTESTW
32 11
12 O RCASN 28 O PSHDTW 44 O WRAS1 60 I WCLRN TWTESTR RRASN
12
13 O RSW 29 I ROWTEST 45 O WRAS2 61 I RCLRN RCASN

14 I FLOE 30 I COLTEST 46 O WRAS3 62 I HDN 18 53


15 I VDN 31 I TWTESTW 47 O WRAS4 63 I PSHDNR CK3DLY WSW
19 13
16 O F1N 32 I TWTESTR 48 O WCAS0 64 I PSHDNC CK3INV RSW

59 16
CK1 F1N
24 17
CK2 F2N
20
CK3
55
ABSELOY
56
ABSELOC

27
ROWOE
28
PSHDTW
54
CK3O

DME-3000/7000 2-51
IC

CXD8841Q(SONY)FLAT PACKAGE

C-MOS 23-BITS INTERPOLATOR


-TOP VIEW-
(VDD = +5V)
120

115

110

105

100

95

90

85

81
PIN PIN PIN PIN PIN
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL
NO. NO. NO. NO. NO.

GND
VDD(+5V)
1 — VDD 33 — NC 65 I/O D28 97 O POT1 129 I OE1
121 GND GND 80

NC
VDD(+5V)

VDD(+5V)
GND GND 2 — NC 34 — NC 66 I/O D27 98 O POT0 130 O O22
3 — NC 35 — NC 67 I/O D26 99 I CKW 131 O O21
125 4 — NC 36 — NC 68 I/O D25 100 — VDD 132 O O20
75 5 — NC 37 — NC 69 I/O D24 101 — GND 133 O O19
6 — NC 38 — NC 70 I/O D23 102 I RST 134 O O18
7 — NC 39 — NC 71 I/O D22 103 — NC 135 O O17
130 8 — NC 40 — VDD 72 I/O D21 104 — NC 136 O O16
70
9 — NC 41 — GND 73 I/O D20 105 — NC 137 O O15
10 — NC 42 — GND 74 I/O D19 106 — NC 138 O O14
135 11 — NC 43 — NC 75 I/O D18 107 I CKX 139 O O13
65 12 I I12 44 — NC 76 I/O D17 108 O FLGO 140 O O12
13 I I11 45 — NC 77 I/O D16 109 O POT2 141 O O11
NC
14 I I10 46 — NC 78 I/O D15 110 O RM1 142 O O10
140 15 I I09 47 — NC 79 — GND 111 O RM0 143 O O09
60
16 I I08 48 — NC 80 — GND 112 I OE3 144 O O08
17 I I07 49 I MODE 81 — VDD 113 O W12 145 O O07
145 18 I I06 50 — NC 82 I/O D14 114 O W11 146 O O06
55 19 I I05 51 — NC 83 I/O D13 115 O W10 147 O O05
GND 20 — VDD 52 — NC 84 I/O D12 116 O W09 148 O O04
21 — GND 53 — NC 85 I/O D11 117 O W08 149 O O03
150 NC
22 — NC 54 — GND 86 I/O D10 118 O W07 150 O O02
50
23 I I04 55 I ADD3 87 I/O D09 119 O W06 151 O O01
24 I I03 56 I ADD2 88 I/O D08 120 — VDD 152 O O00
155 25 I I02 57 I ADD1 89 I/O D07 121 — GND 153 — NC
NC NC 45 26 I I01 58 I ADD0 90 I/O D06 122 — GND 154 — NC
VDD(+5V)

VDD(+5V)

27 I I00 59 I CS 91 I/O D05 123 O W05 155 — NC


VDD(+5V)

GND GND 28 — GND 60 I RW 92 I/O D04 124 O W04 156 — NC


NC

NC

160 GND GND 41


GND

GND

29 — NC 61 I STRB 93 I/O D03 125 O W03 157 — NC


NC

30 — NC 62 I STRT 94 I/O D02 126 O W02 158 — NC


31 — NC 63 — NC 95 I/O D01 127 O W01 159 — GND
1

10

15

20

25

30

35

40

32 — NC 64 I/O D29 96 I/O D00 128 O W00 160 — GND

64 INPUT
D29 ADD0-ADD3 ; PARALLEL ADDRESS
65
D28 CS ; CHIP SELECT
66 130
D27 O22 CKW ; SYSTEM CLOCK
67 131 CKX ; COMAND EXECUTION CLOCK
D26 O21
68 132 I00-I12 ; INTERPOLATION RATIO INPUTS
D25 O20
69 133 MODE ; LOW : NORMAL
D24 O19
70 134 OE1 ; O00-O22 OUTPUT ENABLE
D23 O18 OE3 ; W00-W12 OUTPUT ENABLE
71 135
D22 O17 RST ; RESET SIGNAL
72 136 RW ; READ / WRITE SIGNAL
D21 O16
73
D20 O15
137 STRB ; STROBE SIGNAL
74 138 STRT ; INTERPOLATION TIMING SIGNAL
D19 O14
75 139
D18 O13 OUTPUT
76 140
D17 O12 FLGO ; INTERNAL TIMING FLAG
77 141
D16 O11 O00-O22 ; INTERPOLATED OUTPUT DATA
78 142 POT0-POT2 ; PARALLEL OUTPUT PORTS
D15 O10
82 143 RM0,RM1 ; INTERNAL TIMING FLAGS
D14 O09
83 144 W00-W12 ; EXTERNAL RAM WRITE ADDRESS
D13 O08
84 145
D12 O07 INPUT/OUTPUT
85 146
D11 O06 D00-D29 ; PARALLEL DATA
86 147
D10 O05
87 148
D09 O04
88 149
D08 O03
89 150
D07 O02
90 151
D06 O01
91 152
D05 O00
92
D04
93 113
D03 W12
94 114
D02 W11
95 115
D01 W10
96 116
D00 W09
117
W08
12 118
I12 W07
13 119
I11 W06
14 123
I10 W05
15 124
I09 W04
16 125
I08 W03
17 126
I07 W02
18 127
I06 W01
19 128
I05 W00
23
I04
24 109
I03 POT2
25 97
I02 POT1
26 98
I01 POT0
27
I00
110
RM1
55 111
ADD3 RM0
56
ADD2
57 108
ADD1 FLGO
58
ADD0
MODE

STRB
STRT
CKW

CKK
RST

OE3
OE1
RW
CS

102
107
112
129
49
59
60
61
62
99

2-52 DME-3000/7000
IC

CXD8847Q(SONY)FLAT PACKAGE
C-MOS SRAM ADDRESS GENERATOR
-TOP VIEW-
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
72 75 74 76 1 3 26 27 28 29 30 31
INPUT

YPH0
YPH1
YPH0N
YPH1N
YCO
YUVOUT
YAXEN
YBXEN
YCXEN
YDXEN
YUVTW
YCOLOE
GND

GND

GND
CCK ; CLOCK FOR C
65 40 CCYC ; CYCLIC MODE (C)
66 39 CMODE ; MODE SEL FOR C
67 38 CPSHDN ; PSHDN FOR C
68 37 CRSTN ; CYCLIC RESET (C)
44 CTRIGN ; FIELD TRIGGER (C)
69 36 CADD15
45 CVDN ; VD FOR C
70 35 CADD14
TCLR ; TEST
61 46
71 34 CVDN CADD13 TEST1 ; TEST
62 47
72 VDD(+5V) 33 CPSHDN CADD12 YCK ; CLOCK FOR Y
64 48 YCYC ; CYCLIC MODE (Y)
73 VDD(+5V) 32 CCK CADD11
65 49 YMODE ; MODE SEL FOR Y
74 31 CMODE CADD10
67 50 YPSHDN ; PSHDN FOR Y
75 30 CTRIGN CADD09
69 51 YRSTN ; CYCLIC RESET (Y)
76 29 CRSTN CADD08 YTRIGN ; FIELD TRIGGER (Y)
71 53
77 28 CCYC CADD07 YVDN ; VD FOR Y
54
78 27 CADD06
55 OUTPUT
79 26 CADD05
56 CADD00 - CADD15 ; C ADDRESS
GND

GND

GND
80 25 CADD04
21 57 CAXEN ; C A-BANK ENABLE
YVDN CADD03
22 58 CBXEN ; C B-BANK ENABLE
YPSHDN CADD02 CCO ; C COLUMN
24 59
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
YCK CADD01 CCOLOE ; C-COLUMN ODD / EVEN
25 60
YMODE CADD00 CCXEN ; C C-BANK ENABLE
66 CDXEN ; C D-BANK ENABLE
YTRIGN
(VDD = +5V) 68 4 CPH0 ; 3/4 FIELD COUNTER (C)
YRSTN YADD15
PIN PIN PIN PIN 70 5 CPH0N ; 3/4 FIELD COUNTER (C)
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL YCYC YADD14 CPH1 ; 3/4 FIELD COUNTER (C)
NO. NO. NO. NO. 6
YADD13 CPH1N ; 3/4 FIELD COUNTER (C)
1 O YCO 21 I YVDN 41 O CCO 61 I CVDN YADD12
7
CUVOUT ; CPSHDN COUNTER
2 — GND 22 I YPSHDN 42 — GND 62 I CPSHDN YADD11
8 CUVTW ; CPSHDN COUNTER
3 O YUVOUT 23 — GND 43 O CUVOUT 63 — GND 39 9 YADD00 - YADD15 ; Y ADDRESS
TEST1 YADD10
4 O YADD15 24 I YCK 44 O CADD15 64 I CCK 40 10 YAXEN ; Y A-BANK ENABLE
TCLR YADD09
5 O YADD14 25 I YMODE 45 O CADD14 65 I CMODE 11 YBXEN ; Y B-BANK ENABLE
YADD08 YCO ; Y COLUMN
6 O YADD13 26 O YAXEN 46 O CADD13 66 I YTRIGN 13
YADD07 YCOLOE ; Y COLUMN ODD / EVEN
7 O YADD12 27 O YBXEN 47 O CADD12 67 I CTRIGN 14
YADD06 YCXEN ; Y C-BANK ENABLE
8 O YADD11 28 O YCXEN 48 O CADD11 68 I YRSTN 15 YDXEN ; Y D-BANK ENABLE
YADD05
9 O YADD10 29 O YDXEN 49 O CADD10 69 I CRSTN 16 YPH0 ; 3/4 FIELD COUNTER (Y)
YADD04
10 O YADD09 30 O YUVTW 50 O CADD09 70 I YCYC 17 YPH0N ; 3/4 FIELD COUNTER (Y)
YADD03 YPH1 ; 3/4 FIELD COUNTER (Y)
11 O YADD08 31 O YCOLOE 51 O CADD08 71 I CCYC 18
YADD02 YPH1N ; 3/4 FIELD COUNTER (Y)
12 — GND 32 O CAXEN 52 — GND 72 O YPH0 19
YADD01 YUVOUT ; YPSHDN COUNTER
13 O YADD07 33 — VDD 53 O CADD07 73 — VDD 20 YUVTW ; YPSHDN COUNTER
YADD00
14 O YADD06 34 O CBXEN 54 O CADD06 74 O YPH0N
15 O YADD05 35 O CCXEN 55 O CADD05 75 O YPH1
16 O YADD04 36 O CDXEN 56 O CADD04 76 O YPH1N
CUVOUT

CCOLOE
17 O YADD03 37 O CUVTW 57 O CADD03 77 O CPH0

CUVTW
CCXEN
CDXEN
CAXEN
CBXEN
CPH0N
CPH1N
CPH0
CPH1

CCO

18 O YADD02 38 O CCOLOE 58 O CADD02 78 O CPH0N


19 O YADD01 39 I TEST1 59 O CADD01 79 O CPH1
20 O YADD00 40 I TCLR 60 O CADD00 80 O CPH1N 77 79 78 80 41 43 32 34 35 36 37 38

DME-3000/7000 2-53
IC

CXD8846Q(SONY)FLAT PACKAGE
C-MOS SRAM READ ADDRESS ENCODER
-TOP VIEW-
80

75

70

65

60

55

51
64 24 INPUT
V8 OUT17 CALMODE ; CALCULATOR MODE
63 23
V7 OUT16 CK1 ; SYSTEM CLOCK
GND
VDD(+5V)

GND

GND
VDD(+5V)
62 22
81 50 V6 OUT15 D0-D2 ; DELAY LINE-IN
61 21 D2SW ; DELAY PARAMETER
V5 OUT14
60 20 D4SW ; DELAY PARAMETER
V4 OUT13
59 19 D8SW ; DELAY PARAMETER
V3 OUT12 D1SWP ; DELEY PARAMETER
58 18
85 V2 OUT11 D2SWP ; DELEY PARAMETER
57 17
45 V1 OUT10 FI0-FI8 ; FIELD SUBTRACT
56 16 FICANCEL ; FI-INPUT CANCEL
V0 OUT9
OUT8
14 FILTERSW ; FILTER SWITCH
76 13 FLDSW ; ALL-H SWITCH
HFL8 OUT7
75 12 HFL0-HFL8 ; FRAME SUB/H-ADD
90 GND HFL7 OUT6 HFLCI ; HFL CARRY-IN
74 11
GND 40 HFL6 OUT5 HFLDLY ; HFL DELAY
73 10
HFL5 OUT4 HFLONLY ; HFL ONLY
72 9 LIM9-LIM12 ; LIMITER SWITCH
HFL4 OUT3
71 8 MUL0-MUL9 ; MULTIPLE RATE
HFL3 OUT2
70 7 MULDLY ; MUL DELAY
95 HFL2 OUT1 SW ; ALL-H SWITCH
69 6
35 HFL1 OUT0 TEST ; TEST
68
HFL0 V0-V8 ; V-ADDRESS
VCI ; V-ADDRESS CARRY-IN
VDD(+5V)

VDD(+5V)
88
FI8 D2OUT
43 VDLY ; V DELAY
87 42 VMOVE0-VMOVE3 ; V-SUBTRACT
GND

GND

100 GND 31 FI7 D1OUT


VMOVEDLY ; VMOVE-IN DELAY
86 41
FI6 D0OUT
85
FI5 OUTPUT
84
1

10

15

20

25

30

FI4 D0OUT-D2OUT ; DELAY LINE-OUT


83 OUT0-OUT17 ; OUTPUT
FI3
82
FI2
81
FI1
80
FI0
(VDD = +5V)
PIN PIN PIN 100
I/O SIGNAL I/O SIGNAL I/O SIGNAL MUL9
NO. NO. NO. 99
MUL8
1 I CK1 35 I D1SWP 69 I HFL1 98 37
MUL7 D2SW
2 I CALMODE 36 I D2SWP 70 I HFL2 97 38
MUL6 D4SW
3 — VDD 37 I D2SW 71 I HFL3 96 39
MUL5 D8SW
4 — GND 38 I D4SW 72 I HFL4 95
MUL4
5 O FILTERSW 39 I D8SW 73 I HFL5 94 2
MUL3 CALMODE
6 O OUT0 40 — GND 74 I HFL6 93 5
MUL2 FILTERSW
7 O OUT1 41 O D0OUT 75 I HFL7 92 25
MUL1 TEST
8 O OUT2 42 O D1OUT 76 I HFL8 91 44
MUL0 SW
9 O OUT3 43 O D2OUT 77 I FICANCEL 45
FLDSW
10 O OUT4 44 I SW 78 — VDD 34 46
D2 VMOVEDLY
11 O OUT5 45 I FLDSW 79 — GND 33 51
D1 HFLONLY
12 O OUT6 46 I VMOVEDLY 80 I FI0 32 52
D0 VDLY
13 O OUT7 47 I VMOVE0 81 I FI1 55
VCI
14 O OUT8 48 I VMOVE1 82 I FI2 50 66
VMOVE3 HFLDLY
15 O GND 49 I VMOVE2 83 I FI3 49 67
VMOVE2 HFLCI
16 O OUT9 50 I VMOVE3 84 I FI4 48 77
VMOVE1 FICANCEL
17 O OUT10 51 I HFLONLY 85 I FI5 47 89
VMOVE0 MULDLY
18 O OUT11 52 I VDLY 86 I FI6
19 O OUT12 53 — VDD 87 I FI7
D1SWP
D2SWP
LIM10
LIM11
LIM12

20 O OUT13 54 — GND 88 I FI8


LIM9
CK1

21 O OUT14 55 I VCI 89 I MULDLY


26
27
30
31
35
36

22 O OUT15 56 I V0 90 — GND
1

23 O OUT16 57 I V1 91 I MUL0
24 O OUT17 58 I V2 92 I MUL1
25 I TEST 59 I V3 93 I MUL2
26 I LIM9 60 I V4 94 I MUL3
27 I LIM10 61 I V5 95 I MUL4
28 — VDD 62 I V6 96 I MUL5
29 — GND 63 I V7 97 I MUL6
30 I LIM11 64 I V8 98 I MUL7
31 I LIM12 65 — GND 99 I MUL8
32 I D0 66 I HFLDLY 100 I MUL9
33 I D1 67 I HFLCI
34 I D2 68 I HFL0

2-54 DME-3000/7000
IC

DME-3000/7000 2-55
IC

CXD8848Q(SONY)
C-MOS WIPE/BOX/MATTE/WASH
-TOP VIEW-
156

150

140

130

120

110

105
36 111
MPXCTL 1 MPXCTL 2
35 136 INPUT
MOD1 11 MOD2 11
34 135 (WASH-CHANNEL-1)

V DD (+3V)

GND
GND

GND

GND

GND
157 104 MOD1 10 MOD2 10
33 134 CS1(1,0) ;CHIP SELECT
MOD1 9 MOD2 9

V DD (+3V)
VDD (+3V)

32 133
160 MOD1 8 MOD2 8 FLOE1 ;FIELD ODD/EVEN INPUT
V DD (+3V) 100 31 132
MOD1 7 MOD2 7 HD1 ;H DRIVE INPUT
30 129
MOD1 6 MOD2 6
GND 29 128 MOD1(11-0) ;MODULATION INPUT
GND MOD1 5 MOD2 5
28 127 MODW1 ;WIPE/MATTE MODE INPUT(L=MATTE,H=WIPE)
MOD1 4 MOD2 4
25 126
MOD1 3 MOD2 3 MPX CTL 1 ;MODULATION H/V SWITCH PULSE INPUT
V DD(+3V) 24 125
170 MOD1 2 MOD2 2 OEBL1 ;OUTPUT ENABLE INPUT FOR BXWP1
90 23 124
MOD1 1 MOD2 1
22 123 OEWL1 ;OUTPUT ENABLE INPUT FOR WASH1
MOD1 0 MOD2 0
64 94 SC1 ;SUB CARRIER INPUT
GND
K/X1 11 K/X2 11
GND 63 93 VBLK1 ;BLANKING PULSE INPUT
K/X1 10 K/X2 10
62 92 VD1 ;V DRIVE INPUT
K/X1 9 K/X2 9
59 91
180 K/X1 8 K/X2 8 (WASH-CHANNEL-2)
80 58 90
V DD (+3V) K/X1 7 K/X2 7 CS2(1,0) ;CHIP SELECT
V DD (+3V) 57 89
K/X1 6 K/X2 6
56 88 FLOE2 ;FIELD ODD/EVEN INPUT
K/X1 5 K/X2 5
55 87 HD2 ;H DRIVE INPUT
K/X1 4 K/X2 4
54 86
K/X1 3 K/X2 3 MOD2(11-0) ;MODULATION INPUT
GND GND 53 84
190 K/X1 2 K/X2 2 MODW2 ;WIPE/MATTE MODE INPUT(L=MATTE,H=WIPE)
70 52 83
K/X1 1 K/X2 1
51 82 MPX CTL 2 ;MODULATION H/V SWITCH PULSE INPUT
K/X1 0 K/X2 0
49 81 OEBL2 ;OUTPUT ENABLE INPUT FOR BXWP1
V DD (+3V) K/X1 M1 K/X2 M1
48 80
K/X1 M2 K/X2 M2 OEWL2 ;OUTPUT ENABLE INPUT FOR WASH1
78 110 SC2 ;SUB CARRIER INPUT
V/Y1 11 V/Y2 11
77 109
200 GND V/Y1 10 V/Y2 10 VBLK2 ;BLANKING PULSE INPUT
60 76 108
V DD (+3V)

V DD (+3V) GND
V/Y1 9 V/Y2 9 VD2 ;V DRIVE INPUT
75 106
V/Y1 8 V/Y2 8
74 105
V DD (+3V)

V DD (+3V)

V/Y1 7 V/Y2 7 (COMMON)


73 104 CK ;27 MHz CLOCK INPUT
V/Y1 6 V/Y2 6
GND

GND

GND

GND

GND

71 103
208 53 V/Y1 5 V/Y2 5 CKD ;CLOCK INPUT FOR SERIAL CONTROL
70 102
V/Y1 4 V/Y2 4 CKX ;SWITCHING TIMING PULSE INPUT
69 101
V/Y1 3 V/Y2 3
68 100
1

10

20

30

40

50
52

V/Y1 2 V/Y2 2 CS/CP ;COMPOSITE/COMPONENT MODE(L=COMPOSITE,H=COMPONENT)


67 99 D1/D2 ;D1/D2 MODE(L=D1,H=D2)
V/Y1 1 V/Y2 1
66 98
V/Y1 0 V/Y2 0 RST ;RESET INPUT FOR CHIP(L=RESET)
65 95
V/Y1 M1 V/Y2 M1 SADD ;ADDRESS INPUT FOR SERIAL CONTROL
173 174
MODW 1 MODW 2 SDAT ;DATA INPUT FOR SERIAL CONTROL
(V DD =+3V) 6 137 (TEST PIN FOR IC CHECK)
BXWP1 11 BXWP2 11
7 138
PIN PIN PIN PIN PIN BXWP1 10 BXWP2 10 TMODE ;TEST MODE(H=TEST MODE)
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL 8 139
NO. NO. NO. NO. NO. BXWP1 9 BXWP2 9 TSCK ;CLOCK FOR TEST
9 140
BXWP1 8 BXWP2 8
1 O WASH13 43 - V DD 85 - GND 127 I MOD24 169 I SADD 11 141 TSI(3-0) ;INPUT FOR TEST
BXWP1 7 BXWP2 7
2 O WASH12 44 I SC1 86 I/O K/X23 128 I MOD25 170 I XMM 12 143 TSM(4-0) ;INPUT FOR MULTIPLIER CHECK
BXWP1 6 BXWP2 6
13 144
3 - GND 45 I VBLK1 87 I/O K/X24 129 I MOD26 171 I CKD BXWP1 5 BXWP2 5 XMM ;MULTIPLIER CHECK MODE(H=CHECK)
14 145
4 O WASH11 46 I CS10 88 I/O K/X25 130 - GND 172 I CKX BXWP1 4 BXWP2 4
16 146
BXWP1 3 BXWP2 3
5 O WASH10 47 I CS11 89 I/O K/X26 131 - V DD 173 I MODW1 17 148 OUTPUT
BXWP1 2 BXWP2 2
6 O BXWP111 48 I/O K/X1M2 90 I/O K/X27 132 I MOD27 174 I MODW2 18 149 (WASH-CHANNEL-1)
BXWP1 1 BXWP2 1
19 150
7 O BXWP110 49 I/O K/X1M1 91 I/O K/X28 133 I MOD28 175 I CK BXWP1 0 BXWP2 0 BXWP1(11-0) ;BOX/WIPE KEY OUTPUT
20 151
8 O BXWP19 50 - GND 92 I/O K/X29 134 I MOD29 176 - GND BXWP1 M1 BXWP2 M1 WASH1(11-0) ;WASH VIDEO OUTPUT
21 152
BXWP1 M2 BXWP2 M2
9 O BXWP18 51 I/O K/X10 93 I/O K/X210 135 I MOD210 177 I RST (WASH-CHANNEL-1)
37 112
10 - V DD 52 I/O K/X11 94 I/O K/X211 136 I MOD211 178 I TSI0 OEBL 1 OEBL 2 BXWP2(11-0) ;BOX/WIPE KEY OUTPUT
199 153
11 O BXWP17 53 I/O K/X12 95 I/O V/Y2M1 137 O BXWP211 179 I TSI1 WASH1 11 WASH2 11 WASH2(11-0) ;WASH VIDEO OUTPUT
202 155
12 O BXWP16 54 I/O K/X13 96 - GND 138 O BXWP210 180 I TSI2 WASH1 10 WASH2 10 (COMMON)
203 156
WASH1 9 WASH2 9
13 O BXWP15 55 I/O K/X14 97 - V DD 139 O BXWP29 181 I TSI3 204 157 TSO(5-0) ;OUTPUT FOR TEST
WASH1 8 WASH2 8
14 O BXWP14 56 I/O K/X15 98 I/O V/Y20 140 O BXWP28 182 I TSM0 205 158
WASH1 7 WASH2 7
206 159
15 - GND 57 I/O K/X16 99 I/O V/Y21 141 O BXWP27 183 - V DD WASH1 6 WASH2 6 INPUT/OUTPUT
207 160
16 O BXWP13 58 I/O K/X17 100 I/O V/Y22 142 - GND 184 I TSM1 WASH1 5 WASH2 5 (WASH-CHANNEL-1)
208 161
WASH1 4 WASH2 4
17 O BXWP12 59 I/O K/X18 101 I/O V/Y23 143 O BXWP26 185 I TSM2 1 162 K/X1(11-M2) ;KEY INPUT/X ADDRESS OUTPUT
WASH1 3 WASH2 3
18 O BXWP11 60 - GND 102 I/O V/Y24 144 O BXWP25 186 I TSM3 2 163 (MODW1:L=KEY INPUT)
WASH1 2 WASH2 2
4 166
19 O BXWP10 61 - V DD 103 I/O V/Y25 145 O BXWP24 187 I TSM4 WASH1 1 WASH2 1 V/Y1(11-M1) ;VIDEO INPUT/Y ADDRESS OUTPUT
5 167
20 O BXWP1M1 62 I/O K/X19 104 I/O V/Y26 146 O BXWP23 188 I TSCK WASH1 0 WASH2 0 (MODW1:L=VIDEO INPUT)
39 113
21 O BXWP1M2 63 I/O K/X110 105 I/O V/Y27 147 - V DD 189 - GND OEWL 1 OEWL 2 (WASH-CHANNEL-2)
22 I MOD10 64 I/O K/X111 106 I/O V/Y28 148 O BXWP22 190 I D1/D2 40 115 K/X2(11-M2) ;KEY INPUT/X ADDRESS OUTPUT
HD1 HD2
41 116
23 I MOD11 65 I/O V/Y1M1 107 - GND 149 O BXWP21 191 I CS/CP VD1 VD2 (MODW2:L=KEY INPUT)
42 117
24 I MOD12 66 I/O V/Y10 108 I/O V/Y29 150 O BXWP20 192 I TMODE FLOE1 FLOE2 V/Y2(11-M1) ;VIDEO INPUT/Y ADDRESS OUTPUT
44 118
SC1 SC2
25 I MOD13 67 I/O V/Y11 109 I/O V/Y210 151 O BXWP2M1 193 O TSO5 45 120 (MODW2:L=VIDEO INPUT)
VBLK1 VBLK2
26 - GND 68 I/O V/Y12 110 I/O V/Y211 152 O BXWP2M2 194 O TSO4 46 192
CS10 TMODE
27 - V DD 69 I/O V/Y13 111 I MPXCTL2 153 O WASH211 195 O TSO3 47 178
CS11 TSI 0
28 I MOD14 70 I/O V/Y14 112 I OEBL2 154 - GND 196 O TSO2 179
177 TSI 1
RST 180
29 I MOD15 71 I/O V/Y15 113 I OEWL2 155 O WASH210 197 O TSO1 169 TSI 2
SADD 181
30 I MOD16 72 - GND 114 - V DD 156 O WASH29 198 O TSO0 168 TSI 3
SDAT 182
171 TSM 0
31 I MOD17 73 I/O V/Y16 115 I HD2 157 O WASH28 199 O WASH111 CKD 184
172 TSM 1
32 I MOD18 74 I/O V/Y17 116 I VD2 158 O WASH27 200 - GND CKX 185
175 TSM 2
186
33 I MOD19 75 I/O V/Y18 117 I FLOE2 159 O WASH26 201 - V DD TSM 3
190 187
34 I MOD110 76 I/O V/Y19 118 I SC2 160 O WASH25 202 O WASH110 D1/D2 TSM 4
191 193
CS/CP TSO 5
35 I MOD111 77 I/O V/Y110 119 - GND 161 O WASH24 203 O WASH19 194
170 TSO 4
36 I MPXCTL1 78 I/O V/Y111 120 I VBLK2 162 O WASH23 204 O WASH18 XMM 195
188 TSO 3
TSCK 196
37 I OEBL1 79 - V DD 121 I CS20 163 O WASH22 205 O WASH17 TSO 2
121 197
38 - GND 80 I/O K/X2M2 122 I CS21 164 - GND 206 O WASH16 CS20 TSO 1
122 198
CS21 TSO 0
39 I OEWL1 81 I/O K/X2M1 123 I MOD20 165 - V DD 207 O WASH15
40 I HD1 82 I/O K/X20 124 I MOD21 166 O WASH21 208 O WASH14
41 I VD1 83 I/O K/X21 125 I MOD22 167 O WASH20
42 I FLOE1 84 I/O K/X22 126 I MOD23 168 I/O SDAT

2-56 DME-3000/7000
IC

21,20,
22-25, 19-16,
28-35 12 14 14-11,9-6 BXWP1M(1,2)
MOD1(0-11) SAW GEN. SOLID GEN. DL BXWP1(0-11)
36 CLIP/GAIN
MPXCTL1 (MLT/ROT) (BOX/WIPE) 37
OEBL1

13
48,49, 1 0
51-59,
K/X1M(1,2) 62-64 14 14
K/X1(0-11)

1
DL
173
MODW1
MPX
LPF
13
K
65-71, MAT 11 A 5,4,2,1
V/Y1M1 73-78 13 12 208-202,
VIDEO 12
V/Y1(0-11) 199
40 MIX DL WASH1(0-11)
HD1
41 MAT 12 B AK+B(1-K) 39
VD1 OEWL1
42
FLOE1
44
SC1
45
VBLK1

115
HD2
116
VD2
117
FLOE2
118
SC2 B 167,166,
120 163-155,
VBLK2 MAT 22 VIDEO 12
95, 153
13 12
MIX DL WASH2(0-11)
V/Y2M1 98-110
V/Y2(0-11) A AK+B(1-K) 113
OEWL2
13
MAT 21
K

LPF
174 MPX
MODW2
48,49, DL
51-59,
K/X2M(2,1) 62-64 14 14
K/X2(0-11)
13 1 0

152-151,
150-148,
111 146-143,
MPXCTL2
123-129, SAW GEN. SOLID GEN. CLIP/GAIN 14 141-137 BXWP2M(1,2)
12
DL BXWP2(0-11)
132-136 (MLT/ROT) (BOX/WIPE)
MOD2(0-11) 112
OEBL2

DME-3000/7000 2-57
IC

CXD8852Q(SONY)
C-MOS CROSS POINT
-TOP VIEW-
120

110

100
INPUT

90

81
A4-A0 :ADDRESS BUS
CK ;SYSTEM CLOCK
V DD (+3 to +5V)

V DD (+3 to +5V)
GND

GND

GND
CKD ;SERIAL CONTROL CLOCK
121 GND 80
V DD (+3 to +5v) CKX ;SWITCHING TIMING PULSE
CS ;CHIP SELECT
DI15-DI10 ;INPUT DATA BUS 1
DI25-DI20 ;INPUT DATA BUS 2
130 GND DI35-DI30 ;INPUT DATA BUS 3
GND 70
DI45-DI40 ;INPUT DATA BUS 4
DI55-DI50 ;INPUT DATA BUS 5
DI65-DI60 ;INPUT DATA BUS 6
DI75-DI70 ;INPUT DATA BUS 7
GND
140 V DD (+3 to +5V) DI85-DI80 ;INPUT DATA BUS 8
V DD (+3 to +5V) 60
GND DI95-DI90 ;INPUT DATA BUS 9
DI105-DI100 ;INPUT DATA BUS 10
MOD1 ;(LOW=L,HIGH=M)
MOD2 ;(LOW=C,HIGH=Y)
V DD (+3 to +5V)

150 GND RST ;RESET PULSE


GND 50
V DD (+3 to +5V)

SADD ;SERIAL ADDRESS


SMPL ;SAMPLE PULSE
V DD (+3 to +5V)
OUTPUT
GND

160 GND 41 DOA5-DOA0 ;OUTPUT DATA BUS A


GND

GND

DOB5-DOB0 ;OUTPUT DATA BUS B


DOC5-DOC0 ;OUTPUT DATA BUS C
1

10

20

30

40

DOD5-DOD0 ;OUTPUT DATA BUS D


DOE5-DOE0 ;OUTPUT DATA BUS E
DOF5-DOF0 ;OUTPUT DATA BUS F
DOG5-DOG0 ;OUTPUT DATA BUS G
DOH5-DOH0 ;OUTPUT DATA BUS H
(VDD =+3 to +5V) DOI5-DOI0 ;OUTPUT DATA BUS I
PIN PIN PIN PIN OEA-OEI ;OUTPUT ENABLE
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL
NO. NO. NO. NO.
1 - GND 41 - GND 81 - GND 121 - GND INPUT/OUTPUT
2 O DOA0 42 O DOD0 82 O DOG0 122 I SADD SDAT ;SERIAL DATA
3 O DOA1 43 O DOD1 83 O DOG1 123 I DI33
4 O DOA2 44 O OEA 84 O DOG2 124 I DI34
5 I DI83 45 I A0 85 I SMPL 125 I DI35
6 I DI84 46 I A1 86 I CS 126 I DI40
7 O DOA3 47 O OEB 87 O DOG3 127 I DI41
8 O DOA4 48 O DOD2 88 O DOG4 128 I DI42
9 O DOA5 49 O DOD3 89 O DOG5 129 I CK
10 - GND 50 - GND 90 - GND 130 - GND
11 O DOB0 51 O DOD4 91 O DOH0 131 I/O SDAT
12 O DOB1 52 O DOD5 92 O DOH1 132 I DI43
13 O DOB2 53 O OEC 93 O DOH2 133 I DI44
14 I DI85 54 O OED 94 I DI10 134 I DI45
15 I DI90 55 I A2 95 I DI11 135 I DI50
16 I DI91 56 O OEE 96 I DI12 136 I DI51
17 I DI92 57 O DOE0 97 I DI13 137 I DI52
18 I DI93 58 O DOE1 98 I DI14 138 I CKD
19 I DI94 59 - GND 99 I DI15 139 - GND
20 - VDD 60 - VDD 100 - VDD 140 - V DD
21 I DI95 61 O DOE2 101 I DI20 141 I DI53
22 I DI100 62 O DOE3 102 I DI21 142 I DI54
23 I DI101 63 O OEF 103 I DI22 143 I DI55
24 I DI102 64 O OEG 104 I DI23 144 I DI60
25 I DI103 65 I A3 105 I DI24 145 I DI61
26 I DI104 66 O OEH 106 I DI25 146 I DI62
27 O DOB3 67 O OEI 107 O DOH3 147 I DI63
28 O DOB4 68 O DOE4 108 O DOH4 148 I DI64
29 O DOB5 69 O DOE5 109 O DOH5 149 I DI65
30 - GND 70 - GND 110 - GND 150 - GND
31 O DOC0 71 O DOF0 111 O DOI0 151 I DI70
32 O DOC1 72 O DOF1 112 O DOI1 152 I DI71
33 O DOC2 73 O D0F2 113 O DOI2 153 I DI72
34 I DI105 74 I A4 114 I DI30 154 I DI73
35 I MOD1 75 I CKX 115 I DI31 155 I DI74
36 I MOD2 76 I RST 116 I DI32 156 I DI75
37 O DOC3 77 O DOF3 117 O DOI3 157 I DI80
38 O DOC4 78 O DOF4 118 O DOI4 158 I DI81
39 O DOC5 79 O DOF5 119 O DOI5 159 I DI82
40 - V DD 80 - V DD 120 - V DD 160 - V DD

2-58 DME-3000/7000
IC

DI10 0-5
DI1 0-5

DI2 0-5

DI3 0-5

DI4 0-5

DI5 0-5

DI6 0-5

DI7 0-5

DI8 0-5

DI9 0-5
6 6 6 6 6 6 6 6 6 6
BLACK

131 6
SDAT
122
SADD 6 6 DFF 6 6
75 4 STEP DOA 0-5
CONTROL

CKX
138 VARIABLE DL OE
CKD (0/1/2/3 CK)
86 OE-CONT DFF
CS 44
35 RST OEA
MOD1 6
36
MOD2
5 SAMPLE
A0-A4
REG.

6 6 DFF 6 6
4 STEP DOB 0-5
VARIABLE DL OE
OE-CONT (0/1/2/3 CK)
DFF 47
RST OEB
129 6
CK CK
SAMPLE
REG.
76
RST RST
6 6 DFF 6 6
4 STEP DOC 0-5
VARIABLE DL OE
OE-CONT (0/1/2/3 CK)
DFF 53
RST OEC
6

SAMPLE
REG.

6 6 DFF 6 6
4 STEP DOD 0-5
VARIABLE DL OE
OE-CONT (0/1/2/3 CK)
DFF 54
RST OED
6

SAMPLE
REG.
SAMPL READ

6 6 DFF 6 6
4 STEP DOE 0-5
VARIABLE DL OE
OE-CONT (0/1/2/3 CK)
DFF 56
RST OEE
6

SAMPLE
REG.

6 6 DFF 6 6
4 STEP DOF 0-5
VARIABLE DL OE
OE-CONT (0/1/2/3 CK)
DFF 63
RST OEF
6

SAMPLE
REG.

6 6 DFF 6 6
4 STEP DOG 0-5
VARIABLE DL OE
OE-CONT (0/1/2/3 CK)
DFF 64
RST OEG
6

SAMPLE
REG.

6 6 DFF 6 6
4 STEP DOH 0-5
VARIABLE DL OE
OE-CONT (0/1/2/3 CK)
DFF 66
RST OEH
6

SAMPLE
REG.

6 6 DFF 6 6
4 STEP DOI 0-5
VARIABLE DL OE
OE-CONT (0/1/2/3 CK)
DFF 67
RST OEI
6

SAMPLE
REG.
SAMPUL
85 PULSE
SMPL
GEN.

SCL=1.15

DME-3000/7000 2-59
IC

CXD8873Q(SONY)FLAT PACKAGE
C-MOS ADDRESS-KEY SIGNAL GENERATOR
-TOP VIEW-
80

75

70

65

60

55

51
84 19 INPUT
X15 MX15 CK ; SYSTEM CLOCK
85 18
X14 MX14 CKD ; SERIAL INTERFACE CLOCK
GND
VDD (+5V)

GND
VDD (+5V)
86 17
81 50 X13 MX13 CKX ; SWITCHING TIMING PLUS
87 16 CS ; CHIP SELECT (LOW ACTIVE)
X12 MX12
88 15 FLD, FL0 ; FIELD-OFFSET CONTROL FOR MY OUTPUT
X11 MX11
89 14 INH ; SET ADDRESS-KEY TO 0 (HIGH TO 0)
85 X10 MX10
45 90 13 OEK ; OUTPUT ENABLE OF ADDRESS-KEY
X9 MX9 (LOW ENABLE)
91 12
X8 MX8 OEM ; OUTPUT ENABLE OF MX, MY OUTPUT
92 11 (LOW ENABLE)
X7 MX7
90 10
GND 40
93
X6 MX6
PRL ; SET PARALLEL MODE FOR REGISTER
94 9 SADD ; SERIAL ADDRESS
X5 MX5
95 8 SDAT ; SERIAL DATA
X4 MX4 TGL ; SWITCH INTERNAL REGISTER
95 96 7
X3 MX3 REG (0, 4) <=> REG (1, 5)
35 97 6
X2 MX2 TST1, TST0 ; SET TEST MODE ((0, 0) FOR NORMAL)
98 5 X15 - X0 ; X ADDRESS
VDD (+5V)

VDD (+5V)

X1 MX1
99 4 Y15 - Y0 ; Y ADDRESS
GND

GND

X0 MX0
100 31
71 50 OUTPUT
Y15 MY15 CLIP ; ADDRESS-KEY = 0 AREA FLAG
70 49
K9 - K0 ; ADDRESS-KEY SIGNAL
1

10

15

20

25

30

Y14 MY14
69 48 OVF ; OVERFLOW FLAG
Y13 MY13
68 47 MX15 - MX0 ; X ADDRESS
Y12 MY12
(VDD = +5V) 67 46 MY15 - MY0 ; Y ADDRESS
Y11 MY11
66 45
PIN PIN PIN PIN PIN Y10 MY10
No. I/O SIGNAL No.
I/O SIGNAL
No.
I/O SIGNAL
No.
I/O SIGNAL
No.
I/O SIGNAL 65 44
Y9 MY9
64 43
1 — GND 21 O K1 41 O MY6 61 I Y5 81 I CKD Y8 MY8
63 42
2 — VDD 22 O K2 42 O MY7 62 I Y6 82 I TGL Y7 MY7
62 41
3 I OEM 23 O K3 43 O MY8 63 I Y7 83 I INH Y6 MY6
61 39
4 O MX0 24 O K4 44 O MY9 64 I Y8 84 I X15 Y5 MY5
60 38
5 O MX1 25 O K5 45 O MY10 65 I Y9 85 I X14 Y4 MY4
59 37
6 O MX2 26 O K6 46 O MY11 66 I Y10 86 I X13 Y3 MY3
58 36
7 O MX3 27 I OEK 47 O MY12 67 I Y11 87 I X12 Y2 MY2
57 35
8 O MX4 28 — GND 48 O MY13 68 I Y12 88 I X11 Y1 MY1
56 34
9 O MX5 29 — VDD 49 O MY14 69 I Y13 89 I X10 Y0 MY0
10 O MX6 30 O K7 50 O MY15 70 I Y14 90 I X9
82 3
11 O MX7 31 O K8 51 O OVF 71 I Y15 91 I X8 TGL OEM
55 51
12 O MX8 32 O K9 52 — VDD 72 I TST0 92 I X7 FL0 OVF
54 33
13 O MX9 33 O CLIP 53. — GND 73 I TST1 93 I X6 FLD CLIP
83
14 O MX10 34 O MY0 54 I FLD 74 I PRL 94 I X5 INH
32
15 O MX11 35 O MY1 55 I FL0 75 I CS 95 I X4 K9
75 31
16 O MX12 36 O MY2 56 I Y0 76 I SDAT 96 I X3 CS K8
30
17 O MX13 37 O MY3 57 I Y1 77 I SADD 97 I X2 K7
76 26
18 O MX14 38 O MY4 58 I Y2 78 I CKX 98 I X1 SDAT K6
77 25
19 O MX15 39 O MY5 59 I Y3 79 — VDD 99 I X0 SADD K5
81 24
20 O K0 40 — GND 60 I Y4 80 — GND 100 I CK CKD K4
78 23
CKX K3
22
K2
100 21
CK K1
20
K0

27
OEK
72
TST0
73
TST1
74
PRL

2-60 DME-3000/7000
IC

CXD8875AR(SONY)FLAT PACKAGE

C-MOS VARIABLE DELAY CONTROLLER


-TOP VIEW-
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
63
D15 Q15
50 M0,M1
2 47
D14 Q14

V DD (+3to+5V)
3 46
49 GND GND 32
4
D13 Q13
45
LONG MODE
50 31 D12 Q12
5 44
51 30 D11 Q11 D0-11 12 12 Q0-11
6 43
(CK) 0-2024CK (CK)
52 29 D10 Q10
7 42
53 28 D9 Q9
9 41 CK
54 27 D8 Q8
10 39
55 26 D7 Q7
11 38 RST
56 V DD (+3to+5V) 25 D6 Q6 11 CTL
12 37 C0-10
57 V DD (+3to+5V) 24 D5 Q5
13 36
58 23 D4 Q4
14 35
59 22 D3 Q3
15 34
60 21 D2 Q2
V DD (+3to+5V)

18 31
61 20 D1 Q1
19 30 DOUBLE MODE
62 19 D0 Q0
63 18
25 29 12 Q0-11
64 GND GND 17 M2 OE D0-11 12 (CK)
23 (CK/2) 4-1012CK 4-1012CK
M1
22 62
M0 C10
61
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

C9
21 60 CK 1/2
(V DD =+3to+5V) G C8
20 59
CLR* C7
PIN PIN PIN PIN 27 58 CLR
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL RST C6
No. No. No. No. 28 57 RST
CK C5 10 CTL
1 - GND 17 - GND 33 - GND 49 - GND 55 C1-10
C4
2 I D14 18 I D1 34 O Q2 50 O Q15 26 54
TSTO C3
3 I D13 19 I D0 35 O Q3 51 I C0 53
C2
4 I D12 20 I CLR* 36 O Q4 52 I C1 52
C1
5 I D11 21 I G 37 O Q5 53 I C2 51
C0 WIDE MODE
6 I D10 22 I M0 38 O Q6 54 I C3
7 I D9 23 I M1 39 O Q7 55 I C4
D0-15 16 16 Q0-15
8 - V DD 24 - V DD 40 - V DD 56 - V DD (CK/2) 4-1012CK (CK/2)
9 I D8 25 I M2 41 O Q8 57 I C5
10 I D7 26 O TSTO 42 O Q9 58 I C6 *20 pin
11 I D6 27 I RST 43 O Q10 59 I C7 CXD8875AR CLR CK 1/2
12 I D5 28 I CK 44 O Q11 60 I C8 CXD8875R INV
13 I D4 29 I OE 45 O Q12 61 I C9 CLR
14 I D3 30 O Q0 46 O Q13 62 I C10 RST
10 CTL
15 I D2 31 O Q1 47 O Q14 63 I D15 C1-10
16 - GND 32 - GND 48 - GND 64 - GND

*20 pin
CXD8875AR CLR
CXD8875R INV

CXD8875AR(2/3)
INPUT
C10-C0 ;DELAY DIRECT CONTROL
TERMINAL DELAY TIME(CK)
C10 C9 C8 C7 C6 C5 C4 C3 C2 C1 C0 LONG DOUBLE WIDE
0 0 0 0 0 0 0 0 0 0 0 0 - -
0 0 0 0 0 0 0 0 0 0 1 1 - -
0 0 0 0 0 0 0 0 0 1 0 2 - -

0 0 0 0 0 0 0 0 1 1 1 7 - -
0 0 0 0 0 0 0 1 0 0 0 8 4/8 4
0 0 0 0 0 0 0 1 0 0 1 9 4/8 4
0 0 0 0 0 0 0 1 0 1 0 10 5/10 5
0 0 0 0 0 0 0 1 0 1 1 11 5/10 5

0 1 1 1 1 1 1 0 1 0 0 1012 506/1012 506

1 1 1 1 1 1 0 1 0 0 0 2024 1012/2024 1012

CK ;CLOCK
CLR* ;RESET PULSE FOR INTERNAL DIVIDED CLOCK(CXD8875AR)
D15-D0 ;DIGITAL INPUT SIGNAL
G ;LATCH PULSE OF DELAY DIRECT CONTROL
G LATCH PULSE
0 C11-C0 SAMPLE
1 C11-C0 HOLD

INV* ;CLOCK TURN OVER CONTROL(CXD8875R)


INV CLOCK
0 NOT INVERSION
1 INVERSION

M0,M1 ;MODE CONTROL


M1 M0 MODE
0 0 LONG:12BIT,0 to 2024CK DELAY LINE
0 1 DOUBLE:12BIT,4 to 1012CK AND x2 DELAY LINE
1 0 WIDE:16BIT,4 to 1012CK DELAY LINE
1 1

M2 ;MODE CONTROL
M2 MODE
0 DIRECT CONTROL(C EFFECTIVE)
1 PULSE CONTROL(RST EFFECTIVE)

OE ;TRY STATE CONTROL FOR Q15-Q0(0:ENABLE 1:DISABLE)


RST ;RESET PULSE

OUTPUT
Q15-Q0 ;DIGITAL OUTPUT SIGNAL
TSTO ;TEST TERMINAL

DME-3000/7000 2-61
IC

CXD8885Q(SONY)FLAT PACKAGE

C-MOS DIGITAL VIDEO OUTPUT PROCESSOR


-TOP VIEW-
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
INPUT 116 56
525 / 625 ; 525 / 625 SELECT Y9 O9
115 55
AUTO TRS ; AUTO TRS ADD MODE Y8 O8
NC

NC

NC

NC

GND

NC
VDD(+5V)

NC

NC
GND

NC
114 54
BLK GATE ; BLANKING SIGNAL Y7 O7
91 60 BLK MODE 0 - 2 ; BLANKING MODE 113 53
Y6 O6
92 GND GND 59 BURST EN ; BURST ADD ENABLE 112 52
Y5 O5
93 58 CKD ; SERIAL INTERFACE SERIAL DATA 111 51
Y4 O4
94 VDD(+5V) 57 CKINV ; CLOCK INVERT ENABLE 110 50
CKX ; CONTROL REGISTER OPERATION TIMING Y3 O3
95 56 109 48
CLIP ; WHITE CLIP AND DARK CLIP ENABLE Y2 O2
96 55 CLK ; SYSTEM CLOCK 108 47
Y1 O1
97 54 CFP ; SYSTEM CFP (D2 MODEL) 107 46
Y0 O0
98 53 CS ; CHIP SELECTOR
99 52 D1 / D2 ; CONTROL REGISTER PARALLEL DATA 13 58
DBLK ABLK ; DIGITAL / ANALOG BLANKING SELECT U9 CKO
100 VDD(+5V) 51 12
DIAG SMPL ; SELF DIAGNOSIS SAMPLE PULSE U8
101 50 11 61
DR ON ; ROUNDING ENABLE U7 DATA PHS1
102 NC 49 ERRST ; INPUT READ RESET PULSE 9 60
U6 DATA PHS2
103 NC 48 EWRST ; INPUT WRITE RESET PULSE 8 62
U5 TRS JST
104 47 FD ; SYSTEM FD (D1 MODEL) 6 63
U4 SEL STAT1
105 GND 46 HD ; SYSTEM HD 4 65
LIMIT ; LIMITER ENABLE U3 SEL STAT0
106 NC VDD(+5V) 45 3 75
MUX MODE 0, 1 ; MULTIPLEX MODE U2 TOUT
107 NC 44 PARA / SERI ; PARALLEL / SERIAL SELECT 2
U1
108 43 RDCLR ; CLEAR PULSE 1
U0
109 GND 42 SADRS ; CONTROL REGISTER SIGNAL ADDRESS 95
BLK MODE2
110 41 SYNC EN ; SYNC ADD ENABLE 31 94
TEST MODE 0 - 2 ; TEST POINT V9 BLK MODE1
111 40 30 93
TNCON ; TEST POINT V8 BLK MODE0
112 39 29 97
TRS EN ; TRS ADD ENABLE V7 MUX MODE1
113 38 TRS SEL 0, 1 ; MANUAL MODE TRS MIX 28 96
V6 MUX MODE0
114 37 V BLX FIX ; VERTICAL BLANKING LENGTH FIX 26 98
V5 525 / 625
115 36 U0 - U9, Y0 - Y9, V0 - V9 24 99
V4 D1 / D2
116 35 ; VIDEO SIGNAL 23 104
V3 TRS SEL1
117 VDD(+5V) 34 22 102
OUTPUT V2 TRS SEL0
118 33 20
CKO ; CLOCK V1
119 GND GND 32
VDD(+5V)

DATA PHS 0, 1 ; OUTPUT VIDEO DATA PHASE 19 77


V0 RDCLR
120 31 O0 - O9 ; VIDEO SIGNAL
GND

78
DR ON
NC

NC

NC

NC

NC

NC

NC

NC

SET STAT 0, 1 ; SYNC, TRS ADD TIMING 43 79


TOUT ; TEST POINT TRS EN
33 80
TRS JST ; TRS PHASE CHECK PULSE HD BURST EN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

34 81
FD SYNC EN
INPUT/OUTPUT 35 83
CFP AUTO TRS
SDATA ; CONTROL REGISTER SERIAL DATA 101
CKINV
85
BLK GATE
87
CLIP
39 88
SADRS LIMIT
41 89
(VDD = +5V) SDATA V BLK FIX
40 91
PIN PIN PIN CKD DBLK / ABLK
I/O SIGNAL I/O SIGNAL I/O SIGNAL 38
NO. NO. NO. CS
37 72
1 I U0 41 I/O SDATA 81 I SYNC EN CKX TNCON
36 71
2 I U1 42 — GND 82 — NC PARA / SERI TEST MODE2
16 69
3 I U2 43 I CLK 83 I AUTO TRS DIAG SMPL TEST MODE1
68
4 I U3 44 — NC 84 — NC TEST MODE0
118
5 — NC 45 — VDD 85 I CKINV EWRST
120
6 I U4 46 O O0 86 — NC ERRST

7 — NC 47 O O1 87 I CLIP
8 I U5 48 O O2 88 I LIMIT
9 I U6 49 — NC 89 I V BLK FIX
10 — NC 50 O O3 90 — NC
11 I U7 51 O O4 91 I DBLK / ABLK
12 I U8 52 O O5 92 — GND
13 I U9 53 O O6 93 I BLK MODE0
14 — NC 54 O O7 94 I BLK MODE1
15 — GND 55 O O8 95 I BLK MODE2
16 I DIAG SMPL 56 O O9 96 I MUX MODE0
17 — VDD 57 — VDD 97 I MUX MODE1
18 — NC 58 O CKO 98 I 525 / 625
19 I V0 59 — GND 99 I D1 / D2
20 I V1 60 O DATA PHS0 100 — VDD
21 — NC 61 O DATA PHS1 101 I BLK GATE
22 I V2 62 O TRS JST 102 I TRS SEL0
23 I V3 63 O SEL STAT1 103 — NC
24 I V4 64 — NC 104 I TRS SEL1
25 — NC 65 O SEL STAT0 105 — GND
26 I V5 66 — GND 106 — NC
27 — NC 67 — NC 107 I Y0
28 I V6 68 I TEST MODE0 108 I Y1
29 I V7 69 I TEST MODE1 109 I Y2
30 I V8 70 — NC 110 I Y3
31 I V9 71 I TEST MODE2 111 I Y4
32 — GND 72 I TNCON 112 I Y5
33 I HD 73 — VDD 113 I Y6
34 I FD 74 — NC 114 I Y7
35 I CFP 75 O TOUT 115 I Y8
36 I PARA / SERI 76 — GND 116 I Y9
37 I CKX 77 I RDCLR 117 — VDD
38 I CS 78 I DR ON 118 I EWRST
39 I SADRS 79 I TRS EN 119 — GND
40 I CKD 80 I BURST EN 120 I ERRST

2-62 DME-3000/7000
IC

CXD8886Q(SONY)FLAT PACKAGE

C-MOS VIDEO OUTPUT PROCESSOR


-TOP VIEW-
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
100 50
Y9 OUT9 INPUT
99 49
Y8 OUT8 525/625 ;525/625 SELECT
GND

GND

VDD(+5V)

GND

GND

VDD(+5V)
98 48
81 50 Y7 OUT7 AUTO TRS ;AUTO TRS ADD MODE
97 47
82 49 Y6 OUT6 BLK GATE ;BRANKING SIGNAL
96 46
83 48 Y5 OUT5 BLK MODE0-2 ;BRANKING MODE
95 45
84 47 Y4 OUT4 BURST EN ;BURST ADD ENABLE
94 44
85 46 Y3 OUT3 CKD ;SERIAL INTERFACE SERIAL DATA
93 43
86 VDD(+5V) 45 Y2 OUT2 CK INV ;CLOCK INVERT ENABLE
92 42
87 44 Y1 OUT1 CKX ;CONTROL REGISTER OPERATION TIMING
91 41
88 43 Y0 OUT0 CLIP ;WHITE CLIP AND DARK CLIP ENABLE
14 52
89 42 U9 CKO CLK ;SYSTEM CLOCK
13 87
90 GND 41 U8 BLK-GATE CPF ;SYSTEM CFP (D2 MODEL)
12 2
91 VDD(+5V) 40 U7 EWRST CS ;CHIP SELECTOR
11 4
92 39 U6 ERRST D1/D2 ;CONTROL REGISTER PARALLEL DATA
10 88
93 GND 38 U5 TRS-SEL0 DBLK ABLK ;DIGITAL/ANALOG BLANKING SELECT
9 89
94 37 U4 TRS-SEL1 DIAGSMPL ;SELF DIAGNOSIS SAMPLE PULS
8 56
95 36 U3 TRS JST DR ON ;ROUND ENABLE
7 85
96 35 U2 D1/D2 ERRST ;INPUT READ RESET PULSE
6 84
97 34 U1 525/625 EWRST ;INPUT WRITE RESET PULSE
5 82
98 33 U0 MUX-MODE0 FD ;SYSTEM FD (D1 MODEL)
VDD(+5V)

27 83
99 VDD(+5V) 32 V9 MUX-MODE1 HD ;SYSTEM HD
26 79
LIMIT ;LIMITER ENABLE
GND

GND

100 31 V8 BLK-MODE0
25 80
V7 BLK-MODE1 MUX MODE0,1 ;MULTIPLEX MODE
24 81
V6 BLK-MODE2 PARA/SERI ;PARALLEL/SERIAL SELECT
23 77
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30 V5 DBLK/ABLK RDCLR ;CLEAR PULSE
22 76
V4 V-BLK-FIX SADRS ;CONTROL REGISTER SIGNAL ADDRESS
21 75
V3 LIMIT SYNC EN ;SYNC ADD ENABLE
20 74
V2 CLIP TEST0-2 ;TEST POINT
19 73
PIN PIN PIN PIN V1 CKINV TNCON ;TEST POINT
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL 18 72
No. No. No. No. V0 AUTO-TRS TRS EN ;TRS ADD ENABLE
31 71
1 - VDD 26 I V8 51 - VDD 76 I V BLK FIX CFP SYNC-EN TRS SEL0,1 ;MANUAL MODE TRS MIX
30 70
2 I EWRST 27 I V9 52 O CKO 77 I DBLK ABLK FD BURST-EN V BLK FIX ;VERTICAL BLANKING LENGTH FIX
29 69
3 - GND 28 - GND 53 - GND 78 - GND HD TRS-EN U0-U9,Y0-Y9,V0-V9
39 68
4 I ERRST 29 I HD 54 O DATA PHS 79 I BLK MODE0 CLK DR-ON ;VIDEO SIGNAL
35 67
SADRS RDCLR
5 I U0 30 I FD 55 O DATA PHS 80 I BLK MODE1 37 65
6 I U1 31 I CFP 56 O TRS JST 81 I BLK MODE2 SDATA TOUT OUTPUT
34 60
7 I U2 32 I PARA/SERI 57 O SEL STAT 82 I MUX MODE0 CS TEST-MODE0 CKO ;CLOCK
33 61
8 I U3 33 I CKX 58 O SEL STAT 83 I MUX MODE1 CKX TEST-MODE1 DATA PHS ;OUTPUT VIDEO DATA PHASE
36 62
9 I U4 34 I CS 59 - GND 84 I 525/625 CKD TEST-MODE2 OUT0-9 ;VIDEO SIGNAL
32 63
10 I U5 35 I SADRS 60 I TEST MODE0 85 I D1/D2 PARA/SERI TNCON SEL START ;SYNC,TRS ADD TIMING
16
11 I U6 36 I CKD 61 I TEST MODE1 86 - VDD DIAGSMPL TOUT ;TEST POINT
12 I U7 37 I/O SDATA 62 I TEST MODE2 87 I BLK GATE TRS JST ;TRS PHASE CHECK PULSE
13 I U8 38 - GND 63 I TNCON 88 I TRS SEL0 INPUT/OUTPUT
14 I U9 39 I CLK 64 - VDD 89 I TRS SEL1 SDATA ;CONTROL REGISTER SERIAL DATA
15 - GND 40 - VDD 65 O TOUT 90 - GND
16 I DIAG SMPL 41 O OUT0 66 - GND 91 I Y0
17 - VDD 42 O OUT1 67 I RDCLR 92 I Y1
18 I V0 43 O OUT2 68 I DR ON 93 I Y2
19 I V1 44 O OUT3 69 I TRS EN 94 I Y3
20 I V2 45 O OUT4 70 I BURST EN 95 I Y4
21 I V3 46 O OUT5 71 I SYNC EN 96 I Y5
22 I V4 47 O OUT6 72 I AUTO TRS 97 I Y6
23 I V5 48 O OUT7 73 I CK INV 98 I Y7
24 I V6 49 O OUT8 74 I CLIP 99 I Y8
25 I V7 50 O OUT9 75 I LIMT 100 I Y9

88,89 2
TRS SEL
87
BLK GATE
67
RD CLR SEL STAT

WHITE 10 41-50
Y,Y/U/V OUT
& DINAMIC FF00 TRS
MULTI- DARK ROUNDING REJECT SYNC/BURST FIFO
U,U/V BLANKING
PLEXER CLIP ADD
WRST RRST
U,AUX

MUX MODE CLIP ON DR ON LIMIT ON BLK MODE AUT TRS PHASE 56


CLIP DATA etc TRS JST
CHECK

29,30,31 3 ADRS TRS ID SYNC DELAY


FD,CFP
GEN. GEN. & CONTROL
BURST
GEN.

39 CLOCK 52
CLK CKO
TRS DLY SYNC EN,BURST EN INV.

35 DLY CTL CK INV


SADRS
37 DIAG 16
SDATA DIAG SMPL
34 SAMPLE
CS SERIAL
36
CKD CONTROL
33
CKX REGISTER
32
PARA/SERI
85
D1,D2

DME-3000/7000 2-63
IC

CXD8947Q(SONY)FLAT PACKAGE

C-MOS ADDRESS BUS SW

2-64 DME-3000/7000
IC

CXD8948Q(SONY)

C-MOS DATA BUS CONTROL

DME-3000/7000 2-65
IC

CXD8950Q(SONY)

C-MOS INTERPOLATOR

2-66 DME-3000/7000
IC

CXD8951Q(SONY)

C-MOS FILTER

DME-3000/7000 2-67
IC

CXK1203AR(SONY)FLAT PACKAGE CXK48324Q(SONY)


CXK1203AR-T4
C-MOS 2.4M (960X306X8) BITS 3 PORTS VIDEO FIELD MEMORY
C-MOS DIGITAL LINE MEMORY -TOP VIEW-
—TOP VIEW—

51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
42 5
DIN0 DOUT10
36
35
34
33
32
31
30
29
28
27
26
25
41 4
1 36 DIN1 DOUT11
D0 DOT0

VDD (+5 V)
NC
40 3
2 35 DIN2 DOUT12
D1 DOT1 52 VDD (+5 V) 32 39 2
GND

3 34 DIN3 DOUT13
37 NC 24 D2 DOT2 53 GND 31 38 63
4 33 DIN4 DOUT14
38 NC 23 D3 DOT3 54 30 37 62
5 32 DIN5 DOUT15
39 22 D4 DOT4 55 29 36 61
7 31 DIN6 DOUT16
40 21 D5 DOT5 56 28 35 60
8 29 DIN7 DOUT17
41 20 D6 DOT6 57 27 31 7
9 28 WE OE1
42 VDD (+5V) 19 D7 DOT7 58 GND 26 32 6
10 27 NC CKW CKR1
43 VDD (+5V) 18 D8 DOT8 59 VDD (+5 V) 25 28 10
11 26 HCLR0 HCLR1
44 NC 17 D9 DOT9 60 24 30 8
61 23 VCLR0 VCLR1
45 NC 16 29 9
21 INC0 INC1
46 NC 15 PSW0 62 22
20 NC
47 NC 14 PSW1 63 21 14 57
18 25

GND
NC
ADD0 DOUT20
GND

48 NC 13 PSW2 OEN 64 GND 20

NC
13 56
17 VDD (+5 V) ADD1 DOUT21
PSW3
16 24 12 55
PSW4 PSB0 ADD2 DOUT22
15 23 11 54

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
1
2
3
4
5
6
7
8
9
10
11
12

PSW5 PSB1 ADD3 DOUT23


51
14
PSW6 PSB2
22 (VDD = +5V) DOUT24
13 50
PSW7 PIN PIN PIN DOUT25
I/O SIGNAL I/O SIGNAL I/O SIGNAL 15 49
No. No. No. APM DOUT26
42 48
1 — VDD 23 — NC 45 I VCLR2 DOUT27
27 46
SCLK

2 O DO13 24 I TE 46 I OE2 RM OE2


TINT
AEN
N/P

47
3 O DO12 25 — NC 47 I CKR2 CKR2
43
41 12 39 40 4 O DO11 26 — NC 48 O DO27 HCLR2
45
5 O DO10 27 I RM 49 O DO26 VCLR2
44
(VDD = +5V) 6 I CKR1 28 I HCLR0 50 O DO25 INC2
PIN PIN PIN PIN 7 I OE1 29 I INC0 51 O DO24
NO. I/O SIGNAL NO. I/O SIGNAL NO. I/O SIGNAL NO. I/O SIGNAL 8 I VCLR1 30 I VCLR0 52 — VDD
1 I D0 13 I PSW7 25 I OEN 37 — N.C 9 I INC1 31 I WE 53 — GND
2 I D1 14 I PSW6 26 O DOT9 38 — N.C 10 I HCLR1 32 I CKW 54 O DO23
3 I D2 15 I PSW5 27 O DOT8 39 I AEN 11 I ADD3 33 — NC 55 O DO22
4 I D3 16 I PSW4 28 O DOT7 40 I N/P 12 I ADD2 34 — VDD 56 O DO21
5 I D4 17 I PSW3 29 O DOT6 41 I SCLK 13 I ADD1 35 I DIN7 57 O DO20
6 — GND 18 I PSW2 30 — GND 42 I CLK 14 I ADD0 36 I DIN6 58 — GND
7 I D5 19 — VDD 31 O DOT5 43 — VDD 15 I APM 37 I DIN5 59 — VDD
8 I D6 20 I PSW1 32 O DOT4 44 — N.C 16 — NC 38 I DIN4 60 O DO17
9 I D7 21 I PSW0 33 O DOT3 45 — N.C 17 — NC 39 I DIN3 61 O DO16
10 I D8 22 I PSB2 34 O DOT2 46 — N.C 18 — GND 40 I DIN2 62 O DO15
11 I D9 23 I PSB1 35 O DOT1 47 — N.C 19 — NC 41 I DIN1 63 O DO14
12 I TINT 24 I PSB0 36 O DOT0 48 — N.C 20 — NC 42 I DIN0 64 — GND
21 — NC 43 I HCLR2
22 — NC 44 I INC2

AEN ; LINE MEMORY SELECT


CLK ; CLOCK
DIN0-DIN9 ; VIDEO DATA INPUT
DOT0-DOT9 ; VIDEO DATA OUTPUT INPUT
N/P ; NTSC/PAL/SECAM SELECT ADD - ADD3 ; ADDRESS INPUT
OEN ; OUTPUT ENABLE APM ; ADDRESS PRESET MODE ENABLE
PSB0-PSB2 ; DELAY STEP SELECT (1 BITxN) CKR1, CKR2 ; PORT 1 OR 2 SHIFT SIGNAL INPUT
PSW0-PSW7 ; DELAY STEP SELECT (8 BITxN) CKW ; PORT 0 SHIFT SIGNAL INPUT
SCLK ; CLOCK EDGE SELECT DIN0 - DIN7 ; PORT 0 DATA INPUT
TINT ; TEST HCLR0 - HCLR2 ; PORT 0 - 2 HORIZONTAL CLEAR
INC0 - INC2 ; PORT 0 - 2 LINE INCREMENT
RM ; RECURSIVE MODE ENABLE
TE ; TEST MODE ENABLE
VCLR0 - VCLR2 ; PORT 0 - 2 VERTICAL CLEAR
1-5 26-29 OE1, OE2 ; PORT 1 OR 2 OUTPUT ENABLE
7-11 31-36
DIN0
SMALL DELAY WE ; PORT 0 WRITE ENABLE
1 LINE MEMORY

BUFF BUFF DOT0


DIN9 (1138 x 10bit) CONTROLLER
OUTPUT

DOT9 DO10 - DO17 ; PORT 1 DATA OUTPUT


DO20 - DO27 ; PORT 2 DATA OUTPUT
25
OEN

22-24 PSB0

PSB2
42
ADDRESS TIMING CLK 10
41 H.V HCLR1
COUNTER CONTROLLER SCLK TRANSFER READ 8
VCLR1
13-18 CONTROL ADDRESS 9
12 INC1
PSW0
20, 21 COUNTER 1
ADDRESS TINT

PSW7 MULTIPLEXER
6
15 CKR1
APM 7
40 27 OUTPUT 1 OE1
N/P RM
39 BUFFER 5 - 2, 63 - 60
AEN (8) (60X8 BITS) (8) DOUT10 - DOUT17
42 - 35 INPUT
D-RAM CORE
DIN0 - DIN7 (8) BUFFER (8)
(960X306X8 BITS)
(60X8 BITS)
57 - 54, 51 - 48
(8) OUTPUT 2 (8) DOUT20 - DOUT27
31
WE BUFFER 47
32 (60X8 BITS) CKR2
CKW 46
OE2

28 H.V H.V 43
HCLR0 HCLR2
30 WRITING READ 45
VCLR0 VCLR2
29 ADDRESS ADDRESS 44
INC0 INC2
COUNTER COUNTER 2

(4)
14 - 11
ADD0 - ADD3

2-68 DME-3000/7000
IC

CXK581000AM-70LL(SONY)FLAT PACKAGE CXK5864CM-70LL(SONY)FLAT PACKAGE


CXK581000AM-70LL-TL LC3564SM-10(SANYO)
C-MOS 1M (131,072K x 8) -BIT STATIC RAM C-MOS 64k (8192X8)-BIT STATIC RAM
—TOP VIEW— -TOP VIEW-

13 12 10
VDD I/O1 A0 VDD A0
1 NC (+5V)
32 14 11 1 NC (+5 V) 28 9
I/O2 A1 A1
15 10 8 11
I/O3 A2 A2 I/O1
A16 IN 2 31 A15 IN 17 9 A12 2 27 WE 7 12
I/O4 A3 A3 I/O2
18 8 6 13
I/O5 A4 A4 I/O3
A14 IN 3 30 CE2 IN 19 7 A7 3 26 CE2 5 15
I/O6 A5 A5 I/O4
20 6 4 16
I/O7 A6 A6 I/O5
A12 IN 4 29 WE IN 21 5 A6 4 25 A8 3 17
I/O8 A7 A7 I/O6
27 25 18
A8 A8 I/O7
A7 IN 5 28 A13 IN 22 26 A5 5 24 A9 24 19
CE1 A9 A9 I/O8
30 23 21
CE2 A10 A10
A6 IN 6 27 A8 IN 25 A4 6 23 A11 23
A11 A11
24 4 2
OE A12 A12
A5 IN 7 26 A9 IN 29 28 A3 7 22 OE
WE A13
3 OE WE CE1 CE2
A14
A4 IN 8 25 A11 IN 31 A2 8 21 A10 22 27 20 26
A15
2
A16
A3 IN 9 24 OE IN A1 9 20 CE1
A0 - A12 ; ADDRESS INPUT
A2 IN 10 23 A10 IN A0 10 19 I/O8 CE1, CE2 ; CHIP ENABLE INPUT
A0 - A16 ; ADDRESS INPUTS I/O1 - I/O8 ; DATA INPUT/OUTPUT
CE1, CE2 ; CHIP ENABLE 1, 2 INPUTS I/O1 11 18 I/O7 OE ; OUTPUT ENABLE INPUT
A1 IN 11 22 CE1 IN WE ; WRITE ENABLE INPUT
I/O1 - I/O8 ; DATA INPUTS/OUTPUTS
A0 IN 12 21 I/O8 OE ; OUTPUT ENABLE INPUT I/O2 12 17 I/O6
WE ; WRITE ENABLE INPUT
I/O1 13 20 I/O7 I/O3 13 16 I/O5

I/O2 14 19 I/O6 14 GND 15 I/O4

I/O3 15 18 I/O5

16 GND 17 I/O4
CE1 CE2 OE WE MODE I/O TERMINAL
1 X X X NOT SELECT HIGH IMPEDANCE
X 0 X X NOT SELECT HIGH IMPEDANCE
0 1 1 1 OUTPUT DISABLE HIGH IMPEDANCE 0 ; LOW LEVEL
0 1 0 1 READ OUTPUT DATA 1 ; HIGH LEVEL
0 1 X 0 WRITE INPUT DATA X ; DON'T CARE
12
A0
11
A1
10
A2
MEMORY 9
CELL A3
LOW ADDRESS 8
A4
ARRAY
1048576 BITS
DECODER BUFFER 7 6
A5 A4
(512 X 2048) 6
A6 5
A5
5 4
A7 A6
4 3
A12 A7 MEMORY
ROW
25 BUFFER MATRIX
A8 DECODER
24 256X256
A9
23
A11
13 27 2
I/O 1 A8 A12
14 26
I/O 2 A9
15 23
I/O 3 A10
17 INPUT 25 10
I/O 4
DATA SENSE COLUMN ADDRESS A11 A0
18 28 9 19
I/O 5 CONTROL SWITCH DECODER BUFFER A13 A1 I/O8
19 3 I/O GATE 18
I/O 6 A14 8
A2 BUFFER COLUMN I/O7
20 31 7 17
I/O 7 A15 A3 DECODER I/O6
21 2 21 16
I/O 8 A16 A10 I/O5
I/O
15
BUFFER I/O4
13
I/O3
22 12
OE I/O2
OUTPUT 11
BUFFER I/O1
DATA 27
WE
CONTROL
20
CE1
26
CE2

22
CE 1
30
CE 2

24
OE
29
WE

MODE :
CE1 CE2 OE WE MODE DATA OUTPUT
1 X X X NO SELECTION
X 0 X X (POWER DOWN) HI - Z
0 1 1 1 OUTPUT DISABLE
0 1 0 1 READ D OUT
0 1 X 0 WRITE D IN

0 ; LOW LEVEL
1 ; HIGH LEVEL
X ; DON'T CARE
HI - Z ; HIGH IMPEDANCE

DME-3000/7000 2-69
IC

CY27H010-45JC(CYPRESS) CY7C185-25VC(CYPRESS)J-LEADED PACKAGE


C-MOS 1M(131,072X8)-BIT HIGH-SPEED UV EPROM C-MOS 8192-WORD X 8-BIT HIGH SPEED STATIC RAM
-TOP VIEW- -TOP VIEW-
VDD(+5V) 32
31

NC 30
21
4

A0
1 NC VDD(+5V) 28 23
A1
24
5 29 A2
2
A16 D7
21 A4 IN 2 27 WE IN 25 11
A3 I/O 0
3 20 2 12
6 28 A15 D6 A4 I/O 1
29
A14 D5
19 A5 IN 3 26 CE2 IN 3 13
7 27 A5 I/O 2
28 18 4 15
A13 D4 A6 I/O 3
8 26 4
A12 D3
17 A6 IN 4 25 A3 IN 5 16
A7 I/O 4
25 15 6 17
A11 D2 A8 I/O 5
9 25 23 14 A7 IN 5 24 A2 IN 7 18
A10 D1 A9 I/O 6
26 13 8 19
10 24 A9 D0 A10 I/O 7
27 A8 IN 6 23 A1 IN 9
A8 A11
11 23 5 10
A7 A12
6 A9 IN 7 22 OE IN
12 22 A6
7 OE WE CE1 CE2
A5
13 21 8 A10 IN 8 21 A0 IN 22 27 20 26
16 GND

A4
9
A3
10 A11 IN 9 20 CE1 IN
14

15

17

18

19

20

A2
11
A1
12 A12 IN 10 19 I/O 7
A0 A0 - A14 ; ADDRESS INPUTS
(VDD = +5V)
CE1, CE2 ; CHIP ENABLE INPUT
PIN PIN 22
CE I/O 0 11 18 I/O 6 I/O 0 - I/O 7 ; DATA INPUTS / OUTPUTS
I/O SIGNAL I/O SIGNAL
NO. NO. 24 OE ; OUTPUT ENABLE INPUT
OE
1 — VPP 17 O D3 31 I/O 1 12 17 I/O 5 WE ; WRITE ENABLE INPUT
PGM
2 I A16 18 O D4
3 I A15 19 O D5 I/O 2 13 16 I/O 4
4 I A12 20 O D6
5 I A7 21 O D7 14 GND 15 I/O 3
6 I A6 22 I CE
7 I A5 23 I A10
8 I A4 24 I OE
CE1 CE2 OE WE MODE I/O TERMINAL
9 I A3 25 I A11
1 X X X NOT SELECT HI-Z
10 I A2 26 I A9
X 0 X X NOT SELECT HI-Z
11 I A1 27 I A8 0 ; LOW LEVEL
0 1 1 1 OUTPUT DISABLE HI-Z
12 I A0 28 I A13 1 ; HIGH LEVEL
0 1 0 1 READ OUTPUT DATA
13 O D0 29 I A14 X ; DON'T CARE
0 1 X 0 WRITE INPUT DATA HI-Z ; HIGH IMPEDANCE
14 O D1 30 — NC
15 O D2 31 I PGM
16 — GND 32 — VDD

23 11
A1 I/O 0
24 12
2 21 A2 I/O 1
A16 D7 25
A3 13
3 I/O 2
A15 2 15
A14
29
20
A4 ROW 256 X 32 X 8 I/O I/O 3
PROGRAM- 3 16
28 D6 A5 DECODER ARRAY BUFFER I/O 4
A13 MABLE 4
A6 17
4 ARRAY I/O 5
A12 5
25 19 A7 SENSE 18
I/O 6
A11 D5
6 AMP 19
23 A8 I/O 7
A10
26 18
A9 D4
27 ADDRESS
A8 MULTI-
5 DECODER
A7 PLEXER
17 21
6 D3 A0
A6
7 7
A5 A9
8 8 COLUMN
POWER 15 A10
A4 D2 DECODER
9 DOWN 9
A3 A11
10 10
A2 A12
14
11 D1
A1
12
A0
13
D0 POWER
DOWN

20
CE CE1
OUTPUT ENABLE 26
DECODER CE2
OE 27
WE

22
OE

2-70 DME-3000/7000
IC

CY7C194-25VC(CYPRESS)CHIP CARRIER CY7C245A-25PC(CYPRESS)


CY7C245A-35PC(CYPRESS)
C-MOS 256K (65, 536 X 4)-BIT STATIC READ / WRITE RAM
-TOP VIEW-

18
A0
A6 IN 1 VDD(+5V) 24 19
A1
20
A2
A7 IN 2 23 A5 IN 21
A3
22
A4
A8 IN 3 22 A4 IN 23
A5
1 14
A6 I/O 0
A9 IN 4 21 A3 IN 2 15
A7 I/O 1
3 16
A8 I/O 2
A10 IN 5 20 A2 IN 4 17
A9 I/O 3
5
A10
A11 IN 6 19 A1 IN 6
A11
7
A12
A12 IN 7 18 A0 IN 8
A13
9
A14
A13 IN 8 17 I/O 3 10
A15

A14 IN 9 16 I/O 2 CE WE
11 13
A15 IN 10 15 I/O 1

CE 11 14 I/O 0 CE WE I/O MODE


1 X HI-Z DESELECT / POWER-DOWN
12 GND 13 WE 0 1 DATA OUT READ
0 0 DATA IN WRITE
0 ; LOW LEVEL
1 ; HIGH LEVEL
A0 - A15 ; ADDRESS INPUTS
CE ; CHIP ENABLE INPUT X ; DON'T CARE
I/O0 - I/O3 ; DATA INPUTS / OUTPUTS HI-Z ; HIGH IMPEDANCE
WE ; WRITE ENABLE INPUT

INPUT BUFFER
D050(SHOWADENSEN)(DELAY TIME=50ns)FLAT PACKAGE
D050-TP2
19
A1 17
20 I/O 3
A2
21
A3
ROW DECODER

SENSE AMPS

22 16
A4 I/O 2
23
A5 1024X64X4
1
A6 ARRAY
2 15
A7 I/O 1
3
A8
4
A9 14
5 I/O 0
A10

11
CE

COLUMN POWER
DECODER DOWN
13
WE
18

10
6
7
8
9
A0
A11
A12
A13
A14
A15

DME-3000/7000 2-71
IC

CY7C245A-25JC(CYPRESS) CY7C277-30PC(CYPRESS)
CY7C245A-35JC(CYPRESS)
C-MOS 256K (32K X 8)-BIT REGISTERED PROM
-TOP VIEW-

23 19
A14 O7
A9 IN 1 VDD(+5V) 28 24 18
A13 O6
25 17
A8 IN 2 27 A10 IN A12 O5
26 16
A11 O4
A7 IN 3 26 A11 IN 27 15
A10 O3
A6 IN 4 25 A12 IN 1 13
A9 O2
2 12
A5 IN 5 24 A13 IN A8 O1
3 11
A7 O0
A4 IN 6 23 A14 IN 4
A6
5
A3 IN 7 22 ALE IN A5
6
A4
A2 IN 8 21 CP IN 7
A3
A1 IN 9 20 E / ES IN 8
A2
9
A0 IN 10 19 O7 OUT A1
10
A0
O0 OUT 11 18 O6 OUT 21

O1 OUT 12 17 O5 OUT
ALE E / ES
O2 OUT 13 16 O4 OUT 22 20
14 GND 15 O3 OUT

A0 - A10 ; ADDRESS INPUTS


ALE ; ADDRESS LATCH ENABLE INPUT
CP ; CLOCK PULSE INPUT
O0 - O7 ; DATA OUTPUTS
E / ES ; CHIP ENABLE INPUT

23 19
A14 O7
24
A13 X
25 ADDRESS 256X1024
A12 POWER 8-BIT 18
26 DECODER PROGRAM 1 OF 128 O6
A11
27 1 OF 256 MABLE MUX
A10 ARRAY
1 17
A9 O5
2 16-BIT
A8
3 ADDRESS 8-BIT 16
A7 O4
4
TRANSPARENT EDGE-
A6 / LATCH TRIGGERED
5
A5 REGISTER 15
6 O3
A4 Y
7 ADDRESS
A3 COLUMN
8 13
A2 DECODER O2
9
A1 1 OF 32
10 12
A0 O1
ALE
24 11
INIT
PROGRAMMABLE O0
CP / ALE OPTIONS CP
25 20
A10 D7
26 22
A9 ALE
A8
27 ROW 128X128 8X1 OF 16 PROGRAMMABLE
19
2 DECODER PROGRAM MULTI- D6 20 MULTIPLEXER
A7 E / ES D Q
3 1 OF 128 MABLE PLEXER
A6 ARRAY
4 18 21
A5 D5 CP
5
PROGRAMMABLE
INITIALIZE WORD

A4
8-BIT 17
D4
EDGE-
TRIGGERED
6 REGISTER 16
A3 D3

A2
7 COLUMN *ABOVE DIAGRAM SHOWS CONDITIONS BEFORE PROGRAMMING.
8 DECODER 13
A1
1 OF 16 D2
9
A0

12
D1

PROGRAMMABLE 11
D0
23 MULTIPLEXER CK
E / ES D Q

22
CK

2-72 DME-3000/7000
IC

CY7C291A-25JC(CYPRESS) DS1000Z-25(DALLAS)FLAT PACKAGE


CY7C291A-25JC-TP DS1000Z-50(DALLAS SEMICONDUCTOR)
DS1000Z-25(TE2)
C-MOS 16K(2,048X8)-BIT PROGRAMMABLE ROM
-TOP VIEW- DS1000Z-50(TE2)
IL08

VDD(+5V) 28

27

26
25 20 C-MOS DELAY LINE
4

NC 1
A10 D7
26 19 - TOP VIEW -
A9 D6
27 18
5 25 A8 D5
1
A7
17 7
D4 TAP1
6 24 2
A6
16 INPUT 1 V DD(+5V) 8 2
D3 TAP2
3
A5
13 1 6
7 23 D2 INPUT TAP3
4
A4
12 TAP2 OUT 2 7 TAP1 OUT 3
D1 TAP4
8 22 5
A3
9 5
D0 TAP5
6
A2
TAP4 OUT 3 6 TAP3 OUT
9 NC 21
7
A1
10 NC 20 8 4 GND 5 TAP5 OUT
A0

11 19
14 GND

24
CS1
15 NC

23 1
CS2 INPUT 20% 20% 20% 20% 20%
12

13

16

17

18

22
CS3

(VDD = +5V) 7 2 6 3 5
PIN PIN TAP1 TAP2 TAP3 TAP4 TAP5
I/O SIGNAL I/O SIGNAL
NO. NO.
1 I A7 15 — —
DELAY TIME (ns)
2 I A6 16 O D3 TYPE. NO.
TAP1 TAP2 TAP3 TAP4 TAP5
3 I A5 17 O D4
DS1000M-50 10 20 30 40 50
4 I A4 18 O D5
DS1000M-60 12 24 36 48 60
5 I A3 19 O D6
DS1000M-75 15 30 45 60 75
6 I A2 20 O D7
DS1000M-100 20 40 60 80 100
7 I A1 21 — —
DS1000M-125 25 50 75 100 125
8 I A0 22 I CS3
DS1000M-150 30 60 90 120 150
9 O D0 23 I CS2
DS1000M-175 35 70 105 140 175
10 — — 24 I CS1
DS1000M-200 40 80 120 160 200
11 O D0 25 I A10
DS1000M-250 50 100 150 200 250
12 O D1 26 I A9
DS1000M-500 100 200 300 400 500
13 O D2 27 I A8
DS1000Z-100 20 40 60 80 100
14 — GND 28 — VDD

21
A10 D7
22
A9
23
A8
1 PROGRAM-
D6 GAL16V8B-25LP(LATTICE)
A7 ROW MULTI-
MABLE
2 ADDRESS PLEXER
A6 ARRAY D5 C-MOS ELECTRICALLY ERASABLE PROGRAMMABLE LOGIC DEVICE
3 —TOP VIEW—
A5
4
A4 ADDRESS D4
5 CK 1
A3 DECODER VDD
CK IN 1
A2
6
D3 (+5V) 20
7 CK
A1
8 IN 1 2 19 I/O 7 19
A0 COLUMN D2
ADDRESS
IN 2 3 18 I/O 6 18
D1

IN 3 4 17 I/O 5 17
D0
24 2
CS1
23 IN 4 5 16 I/O 4 3
CS2 16
4
22
CS3 5 AND/OR
IN 5 6 15 I/O 3 MACRO I/O
IN 6 LOGIC 15
CELL
7 ARRAY
IN 6 7 14 I/O 2 8
9 14

IN 7 8 13 I/O 1
13
IN 8 9 12 I/O 0
12
10 GND 11 OE IN

OE

11
OE

DME-3000/7000 2-73
IC

DP83932BVF-25(NATIONAL)FLAT PACKAGE

C-MOS SYSTEMS-ORIENTED NETWORK INTERFACE CONTROLLER (SONIC)


- TOP VIEW -

130

125

120
15

10

3 13
5

1 INPUT
X1 LBK
4 14 BG ; BUS GRANT (BMODE=1)
X2 TXD
GND

GND

GND
5 15 BMODE ; BUS MODE
115 EXT TXE
V DD (+5V)
20 6 16
V DD (+5V) PREJ TX– BRT ; BUS RETRY
22 17 BSCK ; BUS CLOCK
110
RX– TX+
25
23 26 CD (+, –) ; COLLISION (+, –) (EXT=1)
RX+ PCOMP
24 40 COLI ; COLLISION DETECT INPUT (EXT=1)
CD– SMACK
105
25 43 CRSI ; CARRLER SENSE INPUT (EXT=1)
30
CD+ BGACK
27 44 CS ; CHIP SELECT
SEL BR/HOLD
28 45 EXT ; EXTERNAL ENDEC SELECT
100
BRT INT/INT
35 GND
29 HLDA ; HOLD ACKNOWLEDGE (BMODE=0)
V DD (+5V)
RESET
30 48 MREO ; MEMORY REPUEST
SRW/SWR S2
95
49 PREJ ; PACKET REJECT
40
S1
31 50 RA0-RA5 ; REGISTER ADDRESS BUS
USR1 S0
32 RDYI ; READY INPUT (BMODE=0)
90
USR0
45
51 RESET ; RESET
V DD (+5V)
MRW/MWR
33 52
V DD (+5V)

V DD (+5V)

GND HLDA/BG DS RXCI ; RECEIVE CLOCK INPUT (EXT=1)


85
34 53 RXDI ; RECEIVE DATA INPUT (EXT=1)
BSCK ECS
GND

GND

50 35 54
BMODE AS/ADS RX (+, –) ; RECEIVE (+, –) (EXT=1)
36 SAS ; SLAVE ADDRESS STROBE
MRE0
55

60

65

70

75

80

37 55 SDS ; SLAVE DATA STROBE


CS A31
38 56 SEL ; MODE SELECT (EXT=0)
SAS A30
39 57 SRW ; SLAVE READ/WRITE STROBE (BMODE=1)
SDS A29
58 STERM ; SYNCHRONOUS TERMINATION (BMODE=1)
A28
41 59 SWR ; SLAVE READ/WRITE STROBE (BMODE=0)
DSACK1/RDYO A27
PIN PIN PIN PIN 42 60 TXCI ; TRANSMIT CLOCK INPUT (EXT=1)
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL DSACK0/RDYI A26
No. No. No. No. 61 X2 ; CRYSTAL FEEDBACK INPUT
A25
1 – GND 34 I BSCK 67 O A21 100 I/O D23 90 64
D31 A24
2 – ANGND 35 I BMODE 68 O A20 101 I/O D22 91 65 OUTPUT
D30 A23
3 I/O X1 36 I MREO 69 O A19 102 I/O D21 92 66 A1-A31 ; ADDRESS BUS
D29 A22
4 I X2 37 I CS 70 O A18 103 I/O D20 93 67 ADS ; ADDRESS STROBE (BMODE=0)
D28 A21
5 I EXT 38 I SAS 71 O A17 104 I/O D19 94 68 AS ; ADDRESS STROBE (BMODE=1)
D27 A20
6 I PREJ 39 I SDS 72 O A16 105 I/O D18 95 69 BGACK ; BUS GRANT ACKNOWLEDGE (BMODE=1)
D26 A19
7 I,O COLI/COLO 40 O SMACK 73 O A15 106 I/O D17 96 70 BR ; BUS REQUEST (BMODE=1)
D25 A18
8 I,O RXDI/RXDO 41 I/O DSACK1/RDYO 74 O A14 107 I/O D16 97 71 COLO ; COLLISION OUTPUT (EXT=0)
D24 A17
9 I,O RXCI/RXCO 42 I/O DSACK0/RDYI 75 O A13 108 I/O D15 100 72 CRSO ; CARRIER SENSE OUTPUT (EXT=1)
D23 A16
10 I,O CRSI/CRSO 43 O BGACK 76 O A12 109 I/O D14 101 73 DS ; DATA STROBE
D22 A15
11 – GND 44 O BR/HOLD 77 O A11 110 I/O D13 102 74 ECS ; EARLY CYCLE START
D21 A14
12 I,O TXCI/TXCO/STERM 45 O INT/INT 78 O A10 111 I/O D12 103 75 HOLD ; HOLD REQUEST (BMODE=0)
D20 A13
13 O LBK 46 – V DD 79 O A9 112 I/O D11 104 76 INT ; INTERRUPT (BMODE=0)
D19 A12
14 O TXD 47 – GND 80 – V DD 113 I/O D10 105 77 INT ; INTERRUPT (BMODE=1)
D18 A11
15 O TXE 48 O S2 81 – GND 114 I/O D9 106 78 LBK ; LOOPBACK
D17 A10
16 O TX– 49 O S1 82 O A8 115 I/O D8 107 79 MRW ; MEMORY READ / WRITE STROBE (BMODE=1)
D16 A9
17 O TX+ 50 O S0 83 O A7 116 – V DD 108 82 MWR ; MEMORY READ / WRITE STROBE (BMODE=0)
D15 A8
18 – TXGND 51 O MRW/MWR 84 O A6 117 – GND 109 83 PCOMP ; PACKET COMPRESSION
D14 A7
19 – TXV DD 52 O DS 85 O A5 118 I/O D7 110 84 RDYO ; READY OUTPUT (BMODE=0)
D13 A6
20 – PLLV DD 53 O ECS 86 O A4 119 I/O D6 111 85 RXDO ; RECEIVE DATA OUTPUT (EXT=0)
D12 A5
21 – RXV DD 54 O AS/ADS 87 O A3 120 I/O D5 112 86 RXCO ; RECEIVE CLOCK OUTPUT (EXT=0)
D11 A4
22 I RX– 55 O A31 88 O A2 121 I/O D4 113 87 S0-S2 ; BUS STATUS
D10 A3
23 I RX+ 56 O A30 89 O A1 122 I/O D3 114 88 SMACK ; SLAVE AND MEMORY ACKNOWLEDGE
D9 A2
24 I CD– 57 O A29 90 I/O D31 123 I/O D2 115 89 TXCO ; TRANSMIT CLOCK OUTPUT (EXT=0)
D8 A1
25 I CD+ 58 O A28 91 I/O D30 124 I/O D1 118 TXD ; TRANSMIT DATA
D7
26 O PCOMP 59 O A27 92 I/O D29 125 I/O D0 119 7 TXE ; TRANSMIT ENABLE
D6 COLI/COLO
27 I SEL 60 O A26 93 I/O D28 126 I RA5 120 8 TX (+, –) ; TRANSMIT (+, –) (EXT=1)
D5 RXDI/RXDO
28 I BRT 61 O A25 94 I/O D27 127 I RA4 121 9
D4 RXCI/RXCO
29 I RESET 62 – V DD 95 I/O D26 128 I RA3 122 10 INPUT/OUTPUT
D3 CRSI/CRSO
30 I SRW/SWR 63 – GND 96 I/O D25 129 I RA2 123 12 D0-D31 ; DATA BUS
D2 TXCI/TXCO/STERM
31 I/O USR1 64 O A24 97 I/O D24 130 I RA1 124 DSACK (0, 1) ; DATA AND SIZE ACKNOWLEDGE (0, 1) (BMODE=1)
D1
32 I/O USR0 65 O A23 98 – V DD 131 I RA0 125 USR (0, 1) ; USER DEFINABLE (0, 1)
D0
33 I HLDA/BG 66 O A22 99 – GND 132 – V DD X1 ; CRYSTAL DRIVE OR EXTERNAL OSCILLATOR INPUT
126
RA5
127
RA4
128
RA3
129
RA2
130
RA1
131
RA0

ENDEC UNIT MAC UNIT


(ENCODER/DECODER) (MEDIA ACCESS CONTROL)

DESERIALIZER
8 160R32 BUFFER
AND RECEIVE FIFO
MANAGEMENT
RECEIVE (32 BYTES)
ENGINE
ENGINE
ADDRESS

AUI MANCHESTER
INTERFACE ENCODER / SYSTEM
DATA
DECODER INTERFACE
REGISTER BUS
10Mb/s

BUS CONTROL
SERIALIZER
8
AND TRANSMIT FIFO
TRANSMIT (32 BYTES)
ENGINE

2-74 DME-3000/7000
IC

EPM7032LC44-12(ALTERA) EPM7032QC44-15(ALTERA)
EPM7032LC44-15(ALTERA) C-MOS ERASABLE PLD
-TOP VIEW-
C-MOS ERASABLE PLD
—TOP VIEW— 33 32 31 30 29 28 27 26 25 24 23 37
GCLK/IN
39
GCLR/IN

VDD (+5V)

GND
38
6 5 4 3 2 1 44 43 42 41 40 34 22 OE1/IN
40
35 21 OE2/IN
VDD(+5V)

GND
7 39 36 GND 20
42 18
37 19 I/O I/O
8 38 38 18
43
I/O I/O
19
44 20
9 37 39 VDD (+5V) 17 I/O I/O
1 21
40 GND 16 I/O I/O
10 GND 36 41 VDD (+5V) 15
2
I/O I/O
22
3 23
11 VDD(+5V) 35 42 14 I/O I/O

VDD (+5V)
5 25
43 13 I/O I/O
12 34 6 26

GND
44 12 I/O I/O
7 27
13 33 I/O I/O
8 28
I/O I/O
14 32 1 2 3 4 5 6 7 8 9 10 11 10
I/O I/O
30
11 31
15 VDD(+5V) 31 I/O I/O
12 32
I/O I/O
16 GND 30 13 33
VDD(+5V)

I/O I/O
14 34
GND

17 29 I/O I/O
15 35
I/O I/O

18 19 20 21 22 23 24 25 26 27 28
(VDD = +5V)

(VDD = +5V) PIN PIN PIN PIN


I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL
NO. NO. NO. NO.
PIN PIN PIN
I/O SIGNAL I/O SIGNAL I/O SIGNAL 1 I/O I/O 12 I/O I/O 23 I/O I/O 34 I/O I/O
No. No. No.
2 I/O I/O 13 I/O I/O 24 — GND 35 I/O I/O
1 I GCLR/IN 17 I/O I/O 33 I/O I/O
3 I/O I/O 14 I/O I/O 25 I/O I/O 36 — GND
2 I OE2/IN 18 I/O I/O 34 I/O I/O
4 — GND 15 I/O I/O 26 I/O I/O 37 I GCLK/IN
3 — VDD 19 I/O I/O 35 — VDD
5 I/O I/O 16 — GND 27 I/O I/O 38 I OE1/IN
4 I/O I/O 20 I/O I/O 36 I/O I/O
6 I/O I/O 17 — VDD 28 I/O I/O 39 I GCLR/IN
5 I/O I/O 21 I/O I/O 37 I/O I/O
7 I/O I/O 18 I/O I/O 29 — VDD 40 I OE2/IN
6 I/O I/O 22 — GND 38 I/O I/O
8 I/O I/O 19 I/O I/O 30 I/O I/O 41 — VDD
7 I/O I/O 23 — VDD 39 I/O I/O
9 — VDD 20 I/O I/O 31 I/O I/O 42 I/O I/O
8 I/O I/O 24 I/O I/O 40 I/O I/O
10 I/O I/O 21 I/O I/O 32 I/O I/O 43 I/O I/O
9 I/O I/O 25 I/O I/O 41 I/O I/O
11 I/O I/O 22 I/O I/O 33 I/O I/O 44 I/O I/O
10 — GND 26 I/O I/O 42 — GND
11 I/O I/O 27 I/O I/O 43 I GCLK/IN
12 I/O I/O 28 I/O I/O 44 I OE1/IN
13 I/O I/O 29 I/O I/O 37
GCLK/IN
14 I/O I/O 30 — GND 39
GCLR/IN
15 — VDD 31 I/O I/O 38
OE1/IN
16 I/O I/O 32 I/O I/O 40
OE2/IN

42-44,
1-3, 18-23,
5-8, 25-28,
10-15 16 30-35
43 I/O 16 36 36 I/O
GCLK MACROCELL MACROCELL
I/O CONTROL PIA CONTROL I/O
1 (1-16) (17-32)
GCLR/IN 16 BLOCK BLOCK 16
44
OE1/IN
2
OE2/IN
16 16
4 24 16 16
I/O I/O
5 25
I/O I/O
6 26
I/O I/O * ABOVE DIAGRAM SHOWS CONDITIONS BEFORE PROGRAMMING
7 27
I/O I/O
8 28
I/O I/O
9 29
I/O I/O
11 31
I/O I/O
12 32
I/O I/O
13 33
I/O I/O
14 34
I/O I/O
16 36
I/O I/O
17 37
I/O I/O
18 38
I/O I/O
19 39
I/O I/O
20 40
I/O I/O
21 41
I/O I/O

43
GCLK/IN
1
GCLR/IN
44
OE1/IN
2
OE2/IN

4-9 24-29
11-14 31-34
16-21 I/O I/O 36-41
CONTROL MACROCELL PIA MACROCELL CONTROL
I/O I/O
BLOCK (1-16) (17-32) BLOCK
16 16 16 16 16 16

16 16

*ABOVE DIAGRAM SHOWS CONDITIONS BEFORE PROGRAMMING

DME-3000/7000 2-75
IC

EPM7064LC68-15(ALTERA) GAL22V10B-15LP(LATTICE)
C-MOS FIELD PROGRAMMABLE LOGIC CIRCUIT GAL22V10B-25LP(LATTICE)
-TOP VIEW- IL00
C-MOS ELECTRICALLY ERASABLE PROGRAMMABLE LOGIC DEVICE
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 —TOP VIEW—
GND

VDD (+5V)

GND

VDD (+5V)
1
10 60 IN/CK
IN/CK IN 1 VDD 24
11 VDD (+5V) 59 (+5V)
14
IN 1 2 23 I/O 9
12 GND 58
15
13 57 IN 2 3 22 I/O 8

14 56 2
16
IN 3 4 21 I/O 7
3
15 55 4
17
IN 4 5 20 I/O 6
16 GND 54 5

MACRO CELL
6
18
17 VDD (+5V) 53 IN 5 6 19 I/O 5 AND/OR
7
IN LOGIC I/O
18 52 8
I/O 4 ARRAY 19
IN 6 7 18 9
19 51 10
20
IN 7 8 17 I/O 3
20 50 11
13
21
21 VDD (+5V) 49 IN 8 9 16 I/O 2

22 GND 48 22
IN 9 10 15 I/O 1
23 47
23
IN 10 11 14 I/O 0
24 46

25 45 12 GND 13 IN 11
VDD (+5V)

VDD (+5V)

VDD (+5V)

26 GND 44
GND

GND

27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 *ABOVE DIAGRAM SHOWS CONDITIONS BEFORE PROGRAMMING.

(VDD = +5V)
PIN PIN PIN PIN
I/O SYMBOL I/O SYMBOL I/O SYMBOL I/O SYMBOL
NO. NO. NO. NO.
1 I GCLRn 18 I/O I/O 35 – VDD 52 I/O I/O
2 I OE2n 19 I/O I/O 36 I/O I/O 53 – VDD
3 – VDD 20 I/O I/O 37 I/O I/O 54 I/O I/O
4 I/O I/O 21 – VDD 38 – GND 55 I/O I/O
5 I/O I/O 22 I/O I/O 39 I/O I/O 56 I/O I/O
6 – GND 23 I/O I/O 40 I/O I/O 57 I/O I/O
7 I/O I/O 24 I/O I/O 41 I/O I/O 58 – GND
8 I/O I/O 25 I/O I/O 42 I/O I/O 59 I/O I/O
9 I/O I/O 26 – GND 43 – VDD 60 I/O I/O
10 I/O I/O 27 I/O I/O 44 I/O I/O 61 I/O I/O
11 – VDD 28 I/O I/O 45 I/O I/O 62 I/O I/O
12 I/O I/O 29 I/O I/O 46 I/O I/O 63 – VDD
13 I/O I/O 30 I/O I/O 47 I/O I/O 64 I/O I/O
14 I/O I/O 31 – VDD 48 – GND 65 I/O I/O
15 I/O I/O 32 I/O I/O 49 I/O I/O 66 – GND
16 – GND 33 I/O I/O 50 I/O I/O 67 I GCLK
17 I/O I/O 34 – GND 51 I/O I/O 68 I OE1n

4
I/O
5
I/O
7
I/O
8
I/O
9
I/O
10
I/O
12
I/O
13 GCLK ; GLOBAL CLOCK
I/O
14 GCLRn ; GLOBAL CLEAR
I/O
15 I/O ; DATA INPUTS/OUTPUTS
I/O OE1n ; OUTPUT ENABLE 1 INPUT
17
I/O OE2n ; OUTPUT ENABLE 2 INPUT
18
I/O
19 67
I/O GCLK
22 1
I/O GCLRn
23 68
I/O OE1n
24 2
I/O OE2n
25
I/O
27 65
I/O I/O
28 64 LAB A LAB D
I/O
CONTROL BLOCK

CONTROL BLOCK

I/O
29 62
I/O I/O MACROCELLS MACROCELLS
30 61 16 36 36 16
I/O I/O 1 to 8 57 to 64 16
60 16
32
I/O

I/O

I/O I/O MACROCELLS MACROCELLS


33 59
I/O I/O 9 to 16 49 to 56
36 57 16 16
I/O I/O
37 56 16 16
I/O I/O
39 55
I/O I/O
40 54 PIA
I/O I/O
41 52 LAB B LAB C
I/O I/O
CONTROL BLOCK

CONTROL BLOCK

42 51
I/O I/O MACROCELLS MACROCELLS
44 50
I/O I/O 16 17 to 24 36 36 41 to 48 16
45 49 16 16
I/O
I/O

I/O

I/O
46 47 MACROCELLS MACROCELLS
I/O I/O
25 to 32 33 to 40
16 16
67
GCLK 16 16
1
GCLRn
68
OE1n
2
OE2n
*ABOVE DIAGRAM SHOWS CONDITIONS BEFORE PROGRAMMING.

2-76 DME-3000/7000
IC

EPM7064LC84-15(ALTERA) GAL22V10B-25LJ(LATTICE)
EPM7160ELC84-20
C-MOS ELECTRICALLY ERASABLE PROGRAMMABLE LOGIC DEVICE
-TOP VIEW-
C-MOS FIELD PROGRAMMABLE LOGIC CIRCUIT
—TOP VIEW— 4 3 2 1 28 27 26

NC

VDD (+5V)
11
10

84

80

75
5

1
5 25

6 24
GND

VDD(+5V)

GND

VDD(+5V)
12 74 IN/CK
2
VDD(+5V) 7 23
GND 8 NC NC 22 17
15
70 9 21

10 20 18

GND
GND 11 19

NC
20 VDD(+5V) 19

65 12 13 14 15 16 17 18
3
20
4
(VDD = +5V) 5
25 PIN PIN 6 21
I/O SYMBOL I/O SYMBOL
VDD(+5V) 60 NO. NO. 7 ADN/OR MACRO
GND 1 – – 15 – – 9
IN LOGIC CELL I/O
2 I IN/CK 16 I IN 23
10 ARRAY
3 I IN 17 I/O I/O 11
30 4 I IN 18 I/O I/O 12 24
VDD(+5V)

VDD(+5V)

VDD(+5V)

55 5 I IN 19 I/O I/O 13
GND

GND

32 GND 54 6 I IN 20 I/O I/O 16


7 I IN 21 I/O I/O 25
8 – – 22 – –
33

35

40

45

50

53

9 I IN 23 I/O I/O
26
10 I IN 24 I/O I/O
11 I IN 25 I/O I/O
(VDD = +5V)
12 I IN 26 I/O I/O 27
PIN PIN PIN PIN PIN 13 I 27 I/O
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL IN I/O
No. No. No. No. No. 14 – 28 – VDD
GND
1 I GCLRn 18 I/O I/O 35 I/O I/O 52 I/O I/O 69 I/O I/O
2 I OE2n 19 — GND 36 I/O I/O 53 — VDD 70 I/O I/O
3 — VDD 20 I/O I/O 37 I/O I/O 54 I/O I/O 71 I/O I/O
4 I/O I/O 21 I/O I/O 38 — VDD 55 I/O I/O 72 — GND
5 I/O I/O 22 I/O I/O 39 I/O I/O 56 I/O I/O 73 I/O I/O
6 I/O I/O 23 I/O I/O 40 I/O I/O 57 I/O I/O 74 I/O I/O
7 — GND 24 I/O I/O 41 I/O I/O 58 I/O I/O 75 I/O I/O
8 I/O I/O 25 I/O I/O 42 — GND 59 — GND 76 I/O I/O
9 I/O I/O 26 — VDD 43 — VDD 60 I/O I/O 77 I/O I/O
10 I/O I/O 27 I/O I/O 44 I/O I/O 61 I/O I/O 78 — VDD
11 I/O I/O 28 I/O I/O 45 I/O I/O 62 I/O I/O 79 I/O I/O
12 I/O I/O 29 I/O I/O 46 I/O I/O 63 I/O I/O 80 I/O I/O
13 — VDD 30 I/O I/O 47 — GND 64 I/O I/O 81 I/O I/O
14 I/O I/O 31 I/O I/O 48 I/O I/O 65 I/O I/O 82 — GND
15 I/O I/O 32 — GND 49 I/O I/O 66 — VDD 83 I GCLK
16 I/O I/O 33 I/O I/O 50 I/O I/O 67 I/O I/O 84 I OE1n
17 I/O I/O 34 I/O I/O 51 I/O I/O 68 I/O I/O

4 81
I/O I/O
5 80
I/O I/O
6 79
I/O I/O
8 77
I/O I/O
9 76
I/O I/O
10 75
I/O I/O
11 74
I/O I/O GCLK ; GLOBAL CLOCK
12 73
I/O I/O GCLRn ; GLOBAL CLEAR
14 71
I/O I/O I/O ; DATA INPUTS/OUTPUTS
15 70
I/O I/O OE1n ; OUTPUT ENABLE 1 INPUT
16 69 OE2n ; OUTPUT ENABLE 2 INPUT
I/O I/O
17 68
I/O I/O
18 67 83
I/O I/O GCLK
20 65 1
I/O I/O GCLRn
21 64 84
I/O I/O OE1n
63 2
22 OE2n
I/O I/O
23 62
I/O I/O
24 61
I/O I/O 4-6 LAB A LAB D 63-65
25 60
CONTROL BLOCK

CONTROL BLOCK

I/O I/O 8-12 67-71


27 58 14-18
MACROCELLS MACROCELLS 73-77
I/O I/O 36 36
28 57 16 1 to 8 57 to 64 16 79-81
20-22 16 16
I/O I/O
I/O

I/O

29 56 MACROCELLS MACROCELLS
I/O I/O
30 55 9 to 16 49 to 56
I/O I/O 16 16
31 54
I/O I/O
33 52 16 16
I/O I/O
34 51
I/O I/O PIA
35 50
I/O I/O 23-25 44-46
36 49 LAB B LAB C
CONTROL BLOCK

CONTROL BLOCK

I/O I/O 27-31 48-52


37 48 MACROCELLS MACROCELLS
I/O I/O 33-37 54-58
39 46 16 17 to 24 36 36 41 to 48 16
I/O I/O 39-41 16 16 60-62
40 45
I/O

I/O

I/O I/O MACROCELLS MACROCELLS


41 44
I/O I/O 25 to 32 33 to 40
16 16
83 16 16
GCLK
1
GCLRn
84
OE1n
2
OE2n
*ABOVE DIAGRAM SHOWS CONDITIONS BEFORE PROGRAMMING.

DME-3000/7000 2-77
IC

EPM7096LC84-12(ALTERA) HN58C65FP-25T(HITACHI)FLAT PACKAGE


C-MOS EPLD C-MOS 64K (8192 X 8)-BIT EEPROM
—TOP VIEW—
-TOP VIEW-
11
10

84

80

75
5

1
10 11
VDD A0 I/O 0
RDY/BUSY 1 (+5V) 28 9 12
GND

GND
VDD (+5V)

VDD (+5V)
A1 I/O 1
12 74 8 13
A12 IN 2 27 WE IN A2 I/O 2
VDD (+5V) 7 15
A3 I/O 3
GND A7 IN 3 NC 26 6 16
15 A4 I/O 4
A6 IN 4 25 A8 IN 5 17
70 A5 I/O 5
4 18
A5 IN 5 24 A9 IN A6 I/O 6
3 19
A7 I/O 7
GND A4 IN 6 23 A11 IN 25
20 VDD (+5V) A8
24
65 A3 IN 7 22 OE OUT A9
21
A10
A2 IN 8 21 A10 IN 23
A11
A1 IN 9 20 CE IN 2
25 A12
VDD (+5V) 60 A0 IN 10 19 I/O 7
GND 1
RDY/BUSY
I/O 0 11 18 I/O 6
CE OE WE
VDD (+5V)

VDD (+5V)

VDD (+5V)

30 I/O 1 12 17 I/O 5
55 20 22 27
I/O 2 13 16 I/O 4
GND

GND

32 GND 54
A0-A12 ; ADDRESS INPUTS
14 GND 15 I/O 3
CE ; CHIP ENABLE INPUT
I/O 0-I/O 7 ; DATA INPUTS / OUTPUTS
33

35

40

45

50

53

OE ; OUTPUT ENABLE
RDY/BUSY ; READY / BUSY OUTPUT
WE ; WRITE ENABLE INPUT
(VDD = +5V)
PIN PIN PIN PIN PIN
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL
No. No. No. No. No. OE
22
1 I GCLRn 18 I/O I/O 35 I/O I/O 52 I/O I/O 69 I/O I/O CONTROL LOGIC I/O
20
CE AND BUFFER
2 I OE2n 19 — GND 36 I/O I/O 53 — VDD 70 I/O I/O 27 I/O 0-I/O 7
WE TIMING AND
3 — VDD 20 I/O I/O 37 I/O I/O 54 I/O I/O 71 I/O I/O INPUT
4 I/O I/O 21 I/O I/O 38 — VDD 55 I/O I/O 72 — GND LATCH
5 I/O I/O 22 I/O I/O 39 — N.C. 56 I/O I/O 73 I/O I/O
6 — N.C. 23 I/O I/O 40 I/O I/O 57 I/O I/O 74 I/O I/O Y Y
A0-A4
DECODER GATING
7 — GND 24 I/O I/O 41 I/O I/O 58 I/O I/O 75 I/O I/O
8 I/O I/O 25 I/O I/O 42 — GND 59 — GND 76 I/O I/O ADDRESS
8129 X 8
9 I/O I/O 26 — VDD 43 — VDD 60 I/O I/O 77 I/O I/O BUFFER X
A5-A12 MEMORY
AND DECODER
10 I/O I/O 27 I/O I/O 44 I/O I/O 61 I/O I/O 78 — VDD ARRAY
LATCH
11 I/O I/O 28 I/O I/O 45 I/O I/O 62 I/O I/O 79 — N.C.
DATA
12 I/O I/O 29 I/O I/O 46 — N.C. 63 I/O I/O 80 I/O I/O
LATCH
13 — VDD 30 I/O I/O 47 — GND 64 I/O I/O 81 I/O I/O
14 I/O I/O 31 I/O I/O 48 I/O I/O 65 I/O I/O 82 — GND
15 I/O I/O 32 — GND 49 I/O I/O 66 — VDD 83 I GCLK
16 I/O I/O 33 I/O I/O 50 I/O I/O 67 I/O I/O 84 I OE1n
17 I/O I/O 34 I/O I/O 51 I/O I/O 68 I/O I/O CE OE WE RDY/BUSY I/O TERMINAL FUNCTION
0 0 1 HI-Z DOUT READ
1 X X HI-Z HI-Z STANDBY
0 1 0 HI-Z LOW DIN WRITE
GCLK ; GLOBAL CLOCK EPM7096LC84-15 1
0 (2/2) 1 HI-Z HI-Z DESELECT
4 81
I/O I/O GCLRn ; GLOBAL CLEAR X X 1 HI-Z — WRITE INH
5 80 I/O ; DATA INPUTS/OUTPUTS
I/O I/O X 0 X HI-Z — WRITE INH
8 77 OE1n ; OUTPUT ENABLE 1 INPUT
I/O I/O 0 0 1 LOW DATA OUT (I/O 7) DATA POLLING
9 76 OE2n ; OUTPUT ENABLE 2 INPUT
I/O I/O
10 75 0 ; LOW LEVEL
I/O I/O
11 74 1 ; HIGH LEVEL
I/O I/O
12 73 X ; DON'T CARE
I/O I/O
14 71 HI-Z ; HIGH IMPEDANCE
I/O I/O 83
15 GCLK
70 1
I/O I/O GCLRn
16 69 OE1n
84
I/O I/O 2
17 68 OE2n
I/O I/O
18 67
I/O I/O
20 65 4,5,8,9,10, LAB A LAB F
69,70,71,73,
I/O I/O 74,75,76,77,
CONTROL BLOCK
CONTROL BLOCK

21 64 11,12,14,
80,81
I/O I/O 15,16 10
MACROCELLS MACROCELLS
10
22 63 10 1 to 8 36 36 57 to 64 10
I/O I/O
I/O

23 62
I/O

I/O I/O MACROCELLS MACROCELLS


24 61 9 to 16 16 16 49 to 56
I/O I/O
25 60
I/O I/O
27 58
I/O I/O 10 10
28 57
I/O I/O 57,58,60,61,
29 56 17,18,20,21, LAB B LAB E
I/O I/O 62,63,64,65,
CONTROL BLOCK
CONTROL BLOCK

22,23,24,25,
30 55 27,28 MACROCELLS MACROCELLS 67,68
I/O I/O 10 17 to 24 36 36 41 to 48
10 10
31 54 10
I/O I/O PIA
I/O
I/O

33 52 MACROCELLS MACROCELLS
I/O I/O 25 to 32 33 to 40
34 51 16 16
I/O I/O
35 50
I/O I/O
36 49 10
I/O I/O 10
37 48
I/O I/O 29,30,31,33, 44,45,48,49,
LAB C LAB D
40 45 50,51,52,54,
CONTROL BLOCK
CONTROL BLOCK

I/O I/O 34,35,36,37,


41 MACROCELLS MACROCELLS 55,56
44 40,41 10 36 36 10 10
I/O I/O 10 17 to 24 41 to 48
I/O
I/O

83 MACROCELLS MACROCELLS
GCLK 25 to 32 16 16 33 to 40
1
GCLRn
84
OE1n
2 10 10
OE2n
* ABOVE DIAGRAM SHOWS CONDITIONS BEFORE PROGRAMMING.

2-78 DME-3000/7000
IC

EPM7160ELC84-20(ALTERA)CHIP CARRIER HM53461ZP-10(HITACHI)


EPM7160-DUSTV1
IL11
C-MOS FIELD PROGRAMMABLE LOGIC CIRCUIT
– TOP VIEW –
11
10

84

80

75
5

1
(+3.3 V or +5 V)
VDD2
GND

VDD1 (+5 V)

GND
12 74
VDD2 GND
(+3.3 V or +5 V)

15
70

GND
20 VDD2
(+3.3 V or +5 V)
65

25
VDD2 60
(+3.3 V or +5 V)
GND

30
VDD1 (+5 V)

55
GND

GND

32 GND (+3.3 V or +5 V) (+3.3 V or +5 V) 54


VDD2 VDD2
33

35

40

45

50

53

(VDD1 = +5 V)
(VDD2 = +3.3 V or +5 V)
PIN PIN PIN PIN PIN
I/O SYMBOL I/O SYMBOL I/O SYMBOL I/O SYMBOL I/O SYMBOL
No. No. No. No. No.
1 I INP/GCLRn 18 I/O I/O 35 I/O I/O 52 I/O I/O 69 I/O I/O
2 I INP/OE2/GCLK2 19 — GND 36 I/O I/O 53 — VDD2 70 I/O I/O
3 — VDD1 20 I/O I/O 37 I/O I/O 54 I/O I/O 71 I/O I/O
4 I/O I/O 21 I/O I/O 38 — VDD2 55 I/O I/O 72 — GND
5 I/O I/O 22 I/O I/O 39 — NC 56 I/O I/O 73 I/O I/O
6 — NC 23 I/O I/O 40 I/O I/O 57 I/O I/O 74 I/O I/O
7 — GND 24 I/O I/O 41 I/O I/O 58 I/O I/O 75 I/O I/O
8 I/O I/O 25 I/O I/O 42 — GND 59 — GND 76 I/O I/O
9 I/O I/O 26 — VDD2 43 — VDD1 60 I/O I/O 77 I/O I/O
10 I/O I/O 27 I/O I/O 44 I/O I/O 61 I/O I/O 78 — VDD2
11 I/O I/O 28 I/O I/O 45 I/O I/O 62 I/O I/O 79 — NC
12 I/O I/O 29 I/O I/O 46 — NC 63 I/O NC 80 I/O I/O
13 — VDD2 30 I/O I/O 47 — GND 64 I/O I/O 81 I/O I/O
14 I/O I/O 31 I/O I/O 48 I/O I/O 65 I/O I/O 82 — GND
15 I/O I/O 32 — GND 49 I/O I/O 66 — VDD2 83 I INP/GCLK1
16 I/O I/O 33 I/O I/O 50 I/O I/O 67 I/O I/O 84 I INP/OE1
17 I/O I/O 34 I/O I/O 51 I/O I/O 68 I/O I/O

4 81 GCLK1 ; GLOBAL CLOCK1 INPUT


I/O I/O GCLK2 ; GLOBAL CLOCK2 INPUT
5 80
I/O I/O GCLRn ; GLOBAL CLEAR INPUT
8 77
I/O I/O INP ; INPUT
9 76
I/O I/O OE1 ; OUTPUT ENABLE1 INPUT
10 75
I/O I/O OE2 ; OUTPUT ENABLE2 INPUT
11 74
I/O I/O I/O ; INPUT/OUTPUT
12 73
I/O I/O 83
14 71 INP/GCLK1
I/O I/O
15 70
I/O I/O INP/OE2/ 2
16 69 GCLK2
I/O I/O 84
17 68 INP/OE1
I/O I/O
18 67
I/O I/O
20 65
I/O I/O
21 64
I/O I/O
22 63
I/O I/O
23 62
I/O I/O
24 61 1
I/O I/O INP/GCLRn
25 60
I/O I/O
27 58 6 6
I/O I/O
28 57
I/O I/O
29 56
I/O I/O
30 55 6 LAB A LAB B 6
CONTROL BLOCK

CONTROL BLOCK

I/O I/O
31 54 11 - 8, MACROCELLS MACROCELLS
I/O I/O 18 - 14,
33 52 5, 4 1 to 8 17 to 24 12
6 36 36 6
I/O I/O I/O I/O
I/O

I/O

34 51
I/O I/O 6 MACROCELLS MACROCELLS 6
35 50 9 to 16 25 to 32
I/O I/O
36 49 16 16
I/O I/O
37 48 6 6
I/O I/O PIA
40 45 6 6
I/O I/O 25 - 23, 33,
41 44 20 - 22 36 36
I/O I/O 31 - 27
I/O LAB C 16 16 LAB D I/O
83 6 6 6 6
INP/GCLK1
6 6
41, 40, 44, 45,
2 37 - 34 36 36
48 - 51
INP/OE2/ I/O
LAB E 16 16 LAB F I/O
GCLK2
6 6 6 6
1
INP/GCLRn 6 6
52, 60 - 62,
84 54 - 58 36 36
65 - 63
INP/OE1 I/O 16 16 I/O
LAB G LAB H
6 6 6 6
6 6
67 - 71, 74 - 77,
73 36 36
80, 81
I/O LAB I 16 16 LAB J I/O
6 6 6 6

* ABOVE DIAGRAM SHOWS CONDITIONS BEFORE PROGRAMMING.

DME-3000/7000 2-79
IC

HD153108CP(HITACHI) CY7C199-20VC(CYPRESS)CHIP CARRIER


C-MOS 256K (32, 768 X 8)-BIT STATIC RAM
-TOP VIEW-

21 11
A0 D0
A5 1 VDD(+5V) 28 23 12
A1 D1
24 13
A2 D2
A6 2 27 WE 25 15
A3 D3
26 16
A4 D4
A7 3 26 A4 1 17
A5 D5
2 18
A6 D6
A8 4 25 A3 3 19
A7 D7
4
A8
A9 5 24 A2 5
A9
6
A10
A10 6 23 A1 7
A11
8
A12
A11 7 22 OE 9
A13
10
A14
A12 8 21 A0

A13 9 20 CE CE WE OE
20 27 22
A14 10 19 D7

D0 11 18 D6 A0 - A14 ; ADDRESS INPUTS


CE ; CHIP ENABLE
D1 12 17 D5 D0 - D7 ; DATA INPUTS / OUTPUTS
OE ; OUTPUT ENABLE
WE ; WRITE ENABLE
D2 13 16 D4

14 GND 15 D3

INPUT GATE

21
A0
23
A1 INPUT BUFFER
24
ROW DECODER

A2
25
A3
26
A4
1

OUTPUT GATE
SENSE AMPS
A5 11 - 13
2 15 - 19
A6
3 1024X32X8
A7 D0 - D7
4 ARRAY
A8
5
A9

20
CE
POWER
WE
27 COLUMN
DOWN
DECODER

22
OE
10
6
7
8
9
A10
A11
A12
A13
A14

MC10H125M(MOTOROLA)FLAT PACKAGE
ECL ECL-TO-TTL TRANSLATOR
—TOP VIEW—

16 15 14 13 12 11 10 9
GND VCC
(+5V)

VEE
VBB (–5.2V)

1 2 3 4 5 6 7 8

2-80 DME-3000/7000
IC

HD63266F(HITACHI)
C-MOS FDC (FLOPPY DISK CONTROLLER)
—TOP VIEW—
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
ROM SEEK
ADDRESS CONTROL
ALU TIMER
CONTROL

GND
GND
VDD (+5V)
VDD (+5V)
VDD (+5V)
NC

NC

NC
NC
49 GND 32
INTERNAL BUS
50 31
51 30 HOST FDD

52 29 PROM RAM
53 28 WRITE
54 GND CONTROL
27
55 26
56 VDD(+5V) 25 READ
VFO
57 24 CONTROL
HOST CLOCK
58 GND 23 INTERFACE GENERATOR
59 GND 22 I/O
60 21 PORT
61 20 DRIVER,
62 19 RECEIVER
63 18
64 GND
GND
GND

17 ALU; ARITHMETIC LOGIC UNIT


VFO; VARIABLE FREQUENCY OSCILLATOR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

(VDD = +5V)
PIN PIN PIN PIN
I/O
No. I/O SIGNAL
No.
I/O SIGNAL
No.
SIGNAL
No.
I/O SIGNAL

1 I 8" / 5" 17 I/O D5 33 I TRK0 49 — GND


2 I XTALSEL 18 I/O D6 34 I INDEX 50 O STEP
IDT74FCT827ASO(IDT)FLAT PACKAGE
3 I RESET 19 I/O D7 35 I RDATA 51 O HDIR IDT74FCT827ATSO(IDT)FLAT PACKAGE
4 I E, RD 20 O DREQ 36 I XTAL2 52 O HLOAD
5 I R/W, WR 21 O IRQ 37 — NC 53 O HSEL C-MOS 10-BIT BUFFERS AND DRIVERS WITH 3-STATE OUTPUT
6 I CS 22 I DEND 38 — NC 54 — GND -TOP VIEW-
7 I DACK 23 — GND 39 I XTAL1 55 O DS0
8 I RS0 24 O 1/2EX1 40 — NC 56 O DS1 2 23
D0 Y0
OE1 IN 1 VDD 24 3 22
9 I RS1 25 — VDD 41 — GND 57 O DS2 (+5V) D1 Y1
10 — GND 26 I NUM1 42 — GND 58 O DS3 4 21
D2 Y2
11 — GND 27 I NUM2 43 — NC 59 — GND D0 IN 2 23 Y0 OUT 5
D3 Y3
20

12 I/O D0 28 I IFS 44 — VDD 60 O MON0 6 19


D4 Y4
13 I/O D1 29 I SFORM 45 — VDD 61 O MON1 D1 IN 3 22 Y1 OUT 7
D5 Y5
18

14 I/O D2 30 I INP 46 — VDD 62 O MON2 8 17


D6 Y6
15 I/O D3 31 I READY 47 O WGATE 63 O MON3 D2 IN 4 21 Y2 OUT 9
D7 Y7
16

16 I/O D4 32 I WPRT 48 O WDATA 64 — GND 10 15


D8 Y8
D3 IN 5 20 Y3 OUT 11
D9 Y9
14
OE1 OE2
D4 IN 6 19 Y4 OUT 1 13

INPUT 12
D5 IN 7 18 Y5 OUT
8"/5" ; DATA TRANSFER RATE SELECT D0
13 21
CS ; CHIP SELECT D1 IRQ
D6 IN 8 17 Y6 OUT
DACK ; DMA ACKNOWLEDGE 14 FUNCTION TABLE
D2
DEND ; DMA END 15 20
INPUTS OUTPUTS
D3 DREQ
E, RD ; ENABLE, READ 16 D7 IN 9 16 Y7 OUT OE1 OE2 Dn Y
IFS ; INTERFACE SELECT D4
17 47
0 0 0 0
INDEX ; INDEX D5 WGATE
18 D8 IN 10 15 Y8 OUT 0 0 1 1
INP ; INPUT PORT D6 48
WDATA
NUM1, 2 ; NOT USER MODE 1, 2 19
D7 0 1 X HI-Z
R/W, WR ; READ/WRITE, WRITE D9 IN 11 14 Y9 OUT HI-Z
24 1 0 X
RDATA ; READ DATA 1/2 EX1
READY ; READY 3 1 1 X HI-Z
RESET
RESET ; RESET 4 12 GND 13 OE2 IN
E, RD 50
STEP
RS0, 1 ; REGISTER SELECT 0, 1 5 0 ; LOW LEVEL
R/W, WR
SFORM ; SELECT FORMAT DATA 6 1 ; HIGH LEVEL
CS 51
TRKO ; TRACK 00 HDIR X ; DON'T CARE
8
WPRT ; WRITE PROTECTED RS0 HLOAD
52 HI-Z ; HIGH IMPEDANCE
XTAL1, 2 ; XTAL 1, 2 9
RS1 53
HSEL
XTALSEL ; XTAL SELECT
7 55
OUTPUT DACK DS0
1/2EX1 ; 1/2 EXTAL1 22 56
DEND DS1
DREQ ; DMA REQUEST 57
DS0-DS3 ; DRIVE SELECT 0-3 DS2
35 58
HDIR ; HEAD DIRECTION RDATA DS3
34
HLOAD ; HEAD LOAD INDEX
HSEL ; HEAD SELECT 33
TRKO MON0
60 MC10H124M(MOTOROLA)FLAT PACKAGE
IRQ ; INTERRUPT REQUEST 61
MON1
MON0-MON3 ; MOTOR ON 0-3 2
STEP ; STEP XTALSEL MON2
62 ECL TTL-TO-ECL TRANSLATOR
26 63 —TOP VIEW—
WDATA ; WRITE DATA NUM1 MON3
27
WGATE ; WRITE GATE NUM2
16 15 14 13 12 11 10 9
INPUT/OUTPUT 30 GND VCC
D0-D7 ; DATA BUS 0-7 INP (+5 V)

32
WPRT

39
XTAL1
36 VEE
XTAL2
(–5.2 V)
1 1 2 3 4 5 6 7 8
8"/5"
28
IFS
29
SFORM
31
READY

DME-3000/7000 2-81
IC

HD647180X0CP6(HITACHI)(SYSTEM CLOCK:8MHZ)
C-MOS 8-BIT MICRO PROCESSING UNIT
- TOP VIEW -
11
10

84
83
GND 82
81
80
79
78
77
76
75
9
8
7
6
V DD (+5V) 5
4
3
2
NC 1
PIN MODE 0 MODE 1 MODE 2 PROM MODE
No. I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL
43 – NC – NC – NC – NC
12 74
44 I/O PF3 I/O D3 I/O D3 O O3
13 73 45 I/O PF4 I/O D4 I/O D4 O O4
14 72 46 I/O PF5 I/O D5 I/O D5 O O5
15 71 47 I/O PF6 I/O D6 I/O D6 O O6
48 I/O PF7 I/O D7 I/O D7 O O7
16 70
49 – GND – GND – GND – GND
17 69 50 I PG0/AN0 PG0/AN0 PG0/AN0
I I – NC
18 68 51 I PG1/AN1 I PG1/AN1 I PG1/AN1 – NC
19 GND 67 52 I PG2/AN2 I PG2/AN2 I PG2/AN2 – NC
53 I PG3/AN3 I PG3/AN3 I PG3/AN3 – NC
20 66
54 I PG4/AN4 I PG4/AN4 I PG4/AN4 – NC
21 65
55 I PG5/AN5 I PG5/AN5 I PG5/AN5 – NC
22 NC NC 64 56 O RTS0 O RTS0 O RTS0 – NC
23 63 57 I CTS0 I CTS0 I CTS0 – NC
58 I DCD0 I DCD0 I DCD0 – NC
24 62
59 O TXA0 O TXA0 O TXA0 – NC
25 61
60 I RXA0 I RXA0 I RXA0 – NC
26 60 61 I/O CKA0/DREQ0 I/O CKA0/DREQ0 I/O CKA0/DREQ0 – NC
27 59 62 O TOUT2 O TOUT2 O TOUT2 – NC
63 O TOUT3 O TOUT3 O TOUT3 – NC
28 58
64 – NC – NC – NC – NC
29 57
65 I IC I IC I IC – NC
30 56 66 I/O TXA1/PA0 I/O TXA1/PA0 I/O TXA1/PA0 – NC
31 55 67 I/O RXA1/PA1 I/O RXA1/PA1 I/O RXA1/PA1 – NC
37 V DD (+5V)

68 I/O CKA1/TEND0/PA2 I/O CKA1/TEND0/PA2 I/O CKA1/TEND0/PA2 – NC


32 54
39 GND

49 GND

69 I/O TXS/PA3 I/O TXS/PA3 I/O TXS/PA3 – NC


43 NC

70 I/O RXS/CTS1/PA4 I/O RXS/CTS1/PA4 I/O RXS/CTS1/PA4 – NC


33
34
35
36

38

40
41
42

44
45
46
47
48

50
51
52
53

71 I/O CKS/PA5 I/O CKS/PA5 I/O CKS/PA5 – NC


72 I/O DREQ1/PA6 I/O DREQ1/PA6 I/O DREQ1/PA6 – NC
73 I/O TEND1/PA7 I/O TEND1/PA7 I/O TEND1/PA7 – NC
74 I/O PB7 O HALT O HALT – NC
75 I/O PB6 O REF O REF – NC
PIN MODE 0 MODE 1 MODE 2 PROM MODE 76 I/O PB5 O IOE O IOE – NC
No. I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL 77 I/O PB4 O ME O ME – NC
1 – NC – NC – NC – NC 78 I/O PB3 O E O E – NC
2 I MP0 I MP0 I MP0 I MP0 79 I/O PB2 O LIR O LIR – NC
3 I XTAL I XTAL I XTAL I XTAL 80 I/O PB1 O WR O WR – NC
4 I EXTAL I EXTAL I EXTAL I EXTAL 81 I/O PB0 O RD O RD – NC
5 – V DD – V DD – V DD – V DD 82 – GND – GND – GND – GND
6 I/O PE7 I WAIT I WAIT – NC 83 O Ø O Ø O Ø – NC
7 I/O PE6 O BUSACK O BUSACK – NC 84 I MP1 I MP1 I MP1 I MP1
8 I/O PE5 I BUSREQ I BUSREQ – NC
9 I RESET I RESET I RESET – VPP
10 I NMI I NMI I NMI O A9
11 I INT0 I INT0 I INT0 – NC
12 I INT1 I INT1 I INT1 – NC MODE 0 MODE 1
13 I INT2 I INT2 I INT2 – NC 66 15 66 15
14 I/O PE4 O ST O ST – NC TAX1/PA0 PC0 TAX1/PA0 A0
67 16 67 16
15 I/O PC0 O A0 O A0 O A0 RXA1/PA1 PC1 RXA1/PA1 A1
68 17 68 17
16 I/O PC1 O A1 O A1 O A1 CKA1/TEND0/PA2 PC2 CKA1/TEND0/PA2 A2
69 18 69 18
17 I/O PC2 O A2 O A2 O A2 TXS/PA3 PC3 TXS/PA3 A3
70 20 70 20
18 I/O PC3 O A3 O A3 O A3 RXS/CTS1/PA4 PC4 RXS/CTS1/PA4 A4
71 21 71 21
19 – GND – GND – GND – GND CKS/PA5 PC5 CKS/PA5 A5
72 23 72 23
20 I/O PC4 O A4 O A4 O A4 DREQ1/PA6 PC6 DREQ1/PA6 A6
73 24 73 24
21 I/O PC5 O A5 O A5 O A5 TEND1/PA7 PC7 TEND1/PA7 A7
22 – NC – NC – NC – NC 81 25 40 25
23 I/O PC6 O A6 O A6 O A6 PB0 PD0 D0 A8
80 26 41 26
24 I/O PC7 O A7 O A7 O A7 PB1 PD1 D1 A9
79 27 42 27
25 I/O PD0 O A8 I/O A8/PD0 O A8 PB2 PD2 D2 A10
78 28 44 28
26 I/O PD1 O A9 I/O A9/PD1 – NC PB3 PD3 D3 A11
77 29 45 29
27 I/O PD2 O A10 I/O A10/PD2 O A10 PB4 PD4 D4 A12
76 30 46 30
28 I/O PD3 O A11 I/O A11/PD3 O A11 PB5 PD5 D5 A13
75 31 47 31
29 I/O PD4 O A12 I/O A12/PD4 O A12 PB6 PD6 D6 A14
74 32 48 32
30 I/O PD5 O A13 I/O A13/PD5 O A13 PB7 PD7 D7 A15
31 I/O PD6 O A14 I/O A14/PD6 O A14 50 33 50 33
32 I/O PD7 O A15 I/O A15/PD7 I OE PG0/AN0 PE0 PG0/AN0 A16
51 34 51 34
33 I/O PE0 O A16 I/O A16/PE0 I CE PG1/AN1 PE1 PG1/AN1 A17
52 35 52 35
34 I/O PE1 O A17 I/O A17/PE1 – NC PG2/AN2 PE2 PG2/AN2 A18
53 38 53 38
35 I/O PE2 O A18 I/O A18/PE2 – NC PG3/AN3 PE3 PG3/AN3 A19
54 14 54 14
36 O TOUT1 O TOUT1 O TOUT1 – NC PG4/AN4 PE4 PG4/AN4 ST
55 8 55
37 – V DD – V DD – V DD – V DD PG5/AN5 PE5 PG5/AN5
7 7
38 I/O PE3 O A19 I/O A19/PE3 – NC PE6 BUSACK
10 6 10
39 – GND – GND – GND – GND NMI PE7 NMI
11 11
40 I/O PF0 I/O D0 I/O D0 O O0 INT0 INT0
12 40 12 74
41 I/O PF1 I/O D1 I/O D1 O O1 INT1 PF0 INT1 HALT
13 41 13 75
42 I/O PF2 I/O D2 I/O D2 O O2 INT2 PF1 INT2 REF
2 42 2 76
MP0 PF2 MP0 IOE
84 44 84 77
MP1 PF3 MP1 ME
3 45 3 78
XTAL PF4 XTAL E
4 46 4 79
EXTAL PF5 EXTAL LIR
47 80
PF6 WR
9 48 9 81
RESET PF7 RESET RD
57 57
CTS0 CTS0
58 36 58 36
DCD0 TOUT1 DCD0 TOUT1
60 62 60 62
RXA0 TOUT2 RXA0 TOUT2
65 63 65 63
IC TOUT3 IC TOUT3

61 56 61 56
CKA0/DREQ0 RTS0 CKA0/DREQ0 RTS0
59 6 59
TXA0 WAIT TXA0
83 8 83
Ø BUSREQ Ø

2-82 DME-3000/7000
IC

23-35,38 PC0-PC7,PD0-PD7,
MODE 2 PROM MODE

PE0-PE3/A0-A19
66 15 32 15
TAX1/PA0 A0 OE A0
67 16 33 16

PG0/AN0
PG1/AN1
PG2/AN2
PG3/AN3
PG4/AN4
PG5/AN5

PF0-PF7
RXA1/PA1 A1 CE A1

TOUT 3

TOUT 2
/D0-D7
68 17 17
CKA1/TEND0/PA2 A2 A2
69 18 84 18

IC

Ø
15-18,20,21
TXS/PA3 A3 MP1 A3

50

52
53
54
55

63
65
62

83
51
70 20 2 20

20

8
RXS/CTS1/PA4 A4 MP0 A4

40-42
44-48
71 21 3 21
CKS/PA5 A5 XTAL A5
72 23 4 23
DREQ1/PA6 A6 EXTAL A6
73 24 24
TEND1/PA7 A7 A7
25
A8
40 25 10 3
D0 A8/PD0 A9 TIMING XTAL
41 26 27 ADDRESS GEN 4
D1 A9/PD1 A10 BUFFER EXTAL
42 27 28
D2 A10/PD2 A11
44 28 29
D3 A11/PD3 A12 2
45 29 30 ANALOG 16-BIT MP0
D4 A12/PD4 A13 COMPARATOR PROGRAMABLE 84
46 30 31 DATA ROM RAM MP1
D5 A13/PD5 A14 (6CH) MMU BUFFER TIMER (16KB) (512B) 14
47 31 PE4/ST
D6 A14/PD6 8
48 32 40 PE5/BUSREQ
D7 A15/PD7 O0 7
41 PE6/BUSACK
O1

BUS STATE CONTROL


6
50 33 42 PE7/WAIT
PG0/AN0 A16/PE0 O2 9
51 34 44 RESET
PG1/AN1 A17/PE1 O3 74
52 35 45 PB7/HALT
PG2/AN2 A18/PE2 O4 75
53 38 46 PORT G ADDRESS BUS (16-BIT)
PB6/REF
PG3/AN3 A19/PE3 O5 76

CPU
54 14 47 PORT F PB5/IOE
PG4/AN4 ST O6 77
55 48 PORT E DATA BUS (8-BIT)
PB4/ME
PG5/AN5 O7 78
7 PORT D PB3/E
BUSACK 79
10 PORT C PB2/LIR
NMI 80
11 PORT B PB1/WR
INT0 81
12 74 PORT A PB0/RD
INT1 HALT 10
13 75 NMI

INTERRUPT
INT2 REF CLOCKED 16BIT 11
2 76 RELOAD DMAC INT0
MP0 IOE SERIAL ASCI ASCI 12
84 77 I/O (CHANNEL 1) (CHANNEL 0) TIMER (2CH) INT1
MP1 ME (2CH) 13
3 78 BOARD INT2
XTAL E
4 79
EXTAL LIR
80
WR
9 81
RESET RD
57
CTS0
58 36
DCD0 TOUT1
60 62
RXA0 TOUT2
65 63

58
57
56
71
70
69

67
68
66

60
61
59

36

73
72
IC TOUT3

DCD0
CTS0
RTS0
PA5/CKS
PA4/RXS/CTS1
PA3/TXS

PA1/RXA1
PA2/CKA1/TEND0
PA0/TAX1

RXA0
CKA0/DREQ0
TXA0

TOUT1

PA7/TEND1
PA6/DREQ1
61 56
CKA0/DREQ0 RTS0
59
TXA0
6 83
WAIT Ø
8
BUSREQ

INPUT
AN0-AN5 ; ANALOG INPUT
BUSREQ ; BUS REQUEST
CTS0,1 ; CLEAR TO SEND FOR ASYNCHRONOUS SCI CHANNEL n (n=0 OR 1)
DCD0,1 ; DATA CARRIER DETECT FOR ASYNCHRONOUS SCI CHANNEL n (n=0 OR 1)
DREQ0,1 ; DMA REQUEST FOR CHANNEL n (n=0 OR 1)
EXTAL ; EXTERNAL CLOCK
IC ; INPUT CAPTURE
INT0-2 ; INTERRUPT
MP0,1 ; MOD PROGRAM
NMI ; NON-MASKABLE INTERRUPT
PG0-PG5 ; 6-BIT INPUT OF PORT G
RXA0,1 ; RECEIVE DATA FOR ASYNCHRONOUS SCI CHANNEL n (n=0 OR 1)
RXS ; RECEIVE DATA FOR SERIAL I/O PORT
XTAL ; CLOCK

OUTPUT
A0-A19 ; ADDRESS BUS
BUSACK ; BUS ACKNOWLEDGE
E ; ENABLE
IOE ; I/O ENABLE
LIR ; LOAD INSTRUCTION REGISTER
ME ; MEMORY ENABLE
RD ; READ
REF ; REFRESH
RTS0,1 ; REQUEST TO SEND FOR ASYNCHRONOUS SCI CHANNEL n (n=0 OR 1)
ST ; STATUS
TEND0,1 ; TRANSFER END FOR CHANNEL n (n=0 OR 1)
TOUT1-3 ; TIMER OUT
TXA0,1 ; TRANSFER DATA FOR ASYNCHRONOUS SCI CHANNEL n (n=0 OR 1)
TXS ; TRANSFER DATA FOR SERIAL I/O PORT
WR ; WRITE
Ø ; SYSTEM CLOCK

INPUT/OUTPUT
CKA0,1 ; CLOCK FOR ASYNCHRONOUS SCI CHANNEL n (n=0 OR 1)
CKS ; CLOCK FOR SERIAL I/O PORT
D0-D7 ; DATA BUS
PA0-PA7 ; 8-BIT INPUT/OUTPUT OF PORT A
PB0-PB7 ; 8-BIT INPUT/OUTPUT OF PORT B
PC0-PC7 ; 8-BIT INPUT/OUTPUT OF PORT C
PD0-PD7 ; 8-BIT INPUT/OUTPUT OF PORT D
PE0-PE7 ; 8-BIT INPUT/OUTPUT OF PORT E
PF0-PF7 ; 8-BIT INPUT/OUTPUT OF PORT F

DME-3000/7000 2-83
IC

HD647180XRFS6(HITACHI)
C-MOS 8-BIT MICRO PROCESSING UNIT
— TOP VIEW —
64
63
62
61
60
59
58
57
56
55
54
53
21
51
50
49
48
47
46
45
44
43
42
41
PIN MODE 0 MODE 1 MODE 2 PROM MODE
No. I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL
65 40 41 I PG2/AN2 I PG2/AN2 I PG2/AN2 — NC
66 39 42 I PG3/AN3 I PG3/AN3 I PG3/AN3 — NC
67 GND 38 43 I PG4/AN4 I PG4/AN4 I PG4/AN4 — NC
68 37 44 I PG5/AN5 I PG5/AN5 I PG5/AN5 — NC
69 36 45 O RTS0 O RTS0 O RTS0 — NC
46 I CTS0 I CTS0 I CTS0 — NC
70 GND 35
47 I DCD0 I DCD0 I DCD0 — NC
71 34
48 O TXA0 O TXA0 O TXA0 — NC
72 33
49 I RXA0 I RXA0 I RXA0 — NC
73 32
50 I/O CKA0/DREQ0 I/O CKA0/DREQ0 I/O CKA0/DREQ0 — NC
74 31
51 O TOUT2 O TOUT2 O TOUT2 — NC
75 30
52 O TOUT3 O TOUT3 O TOUT3 — NC
76 VDD(+5V) GND 29
53 I IC I IC I IC — NC
77 28 54 I/O TXA1/PA0 I/O TXA1/PA0 I/O TXA1/PA0 — NC
78 VDD(+5V) 27 55 I/O RXA1/PA1 I/O RXA1/PA1 I/O RXA1/PA1 — NC
79 26 56 I/O CKA1/TENDO/PA2 I/O CKA1/TENDO/PA2 I/O CKA1/TENDO/PA2 — NC
GND

80 25 57 I/O TXS/PA3 I/O TXS/PA3 I/O TXS/PA3 — NC


58 I/O RXS/CTS1/PA4 I/O RXS/CTS1/PA4 I/O RXS/CTS1/PA4 — NC
59 I/O CKS/PA5 I/O CKS/PA5 I/O CKS/PA5 — NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

60 I/O DREQ1/PA6 I/O DREQ1/PA6 I/O DREQ1/PA6 — NC


61 I/O TEND1/PA7 I/O TEND1/PA7 I/O TEND1/PA7 — NC
62 I/O PB7 O HALT O HALT — NC
63 I/O PB6 O REF O REF — NC
MODE 0 ; HD643180X,HD647180X 64 I/O PB5 O IOE O IOE — NC
MODE 1 ; HD641180XF6,HD643180X,HD647180X,HD641180X-8L-FP80B 65 I/O PB4 O ME O ME — NC
MODE 2 ; HD643180X,HD647180X 66 I/O PB3 O E O E — NC
PROM MODE ; HD647180X 67 I/O PB2 O LIR O LIR — NC
68 I/O PB1 O WR O WR — NC
PIN MODE 0 MODE 1 MODE 2 PROM MODE 69 I/O PB0 O RD O RD — NC
No. I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL 70 — GND — GND — GND — GND
1 I NMI I NMI I NMI O A9 71 O ø O Ø O Ø — NC
2 I INT0 I INT0 I INT0 — NC 72 I MP1 I MP1 I MP1 I MP1
3 I INT1 I INT1 I INT1 — NC 73 I MP0 I MP0 I MP0 I MP0
4 I INT2 I INT2 I INT2 — NC 74 I XTAL I XTAL I XTAL I XTAL
5 I/O PE4 O ST O ST — NC 75 I EXTAL I EXTAL I EXTAL I EXTAL
6 I/O PC0 O A0 O A0 O A0 76 — VDD — VDD — VDD — VDD
7 I/O PC1 O A1 O A1 O A1 77 I/O PE7 I WAIT I WAIT — NC
8 I/O PC2 O A2 O A2 O A2 78 I/O PE6 O BUSACK O BUSACK — NC
9 I/O PC3 O A3 O A3 O A3 79 I/O PE5 I BUSREQ I BUSREQ — NC
10 — GND — GND — GND — GND 80 I RESET I RESET I RESET — VPP
11 I/O PC4 O A4 O A4 O A4
12 I/O PC5 O A5 O A5 O A5
13 I/O PC6 O A6 O A6 O A6
14 I/O PC7 O A7 O A7 O A7
MODE 0 MODE 1
15 I/O PD0 O A8 I/O A8/PD0 O A8
16 I/O PD1 O A9 I/O A9/PD1 — NC 54 6 54 6
TAX1/PA0 PC0 TAX1/PA0 A0
17 I/O PD2 O A10 I/O A10/PD2 O A10 55 7 55 7
RXA1/PA1 PC1 RXA1/PA1 A1
18 I/O PD3 O A11 I/O A11/PD3 O A11 56 8 56 8
CKA1/TENDO/PA2 PC2 CKA1/TENDO/PA2 A2
19 I/O PD4 O A12 I/O A12/PD4 O A12 57 9 57 9
TXS/PA3 PC3 TXS/PA3 A3
20 I/O PD5 O A13 I/O A13/PD5 O A13 58 11 58 11
RXS/CTS1/PA4 PC4 RXS/CTS1/PA4 A4
21 I/O PD6 O A14 I/O A14/PD6 O A14 59 12 59 12
CKS/PA5 PC5 CKS/PA5 A5
22 I/O PD7 O A15 I/O A15/PD7 I OE 60 13 60 13
DREQ1/PA6 PC6 DREQ1/PA6 A6
23 I/O PE0 O A16 I/O A16/PE0 I CE 61 14 61 14
TEND1/PA7 PC7 TEND1/PA7 A7
24 I/O PE1 O A17 I/O A17/PE1 — NC
25 O PE2 O A18 I/O A18/PE2 — NC 69 15 30 15
PB0 PD0 D0 A8
26 — TOUT1 O TOUT1 O TOUT1 — NC 68 16 31 16
PB1 PD1 D1 A9
27 I/O VDD — VDD — VDD — VDD 67 17 32 17
PB2 PD2 D2 A10
28 PE3 O A19 I/O A19/PE3 — NC 66 18 33 18
PB3 PD3 D3 A11
29 — GND — GND — GND — GND 65 19 34
PB4 PD4 D4 19
A12
30 I/O PF0 I/O D0 I/O D0 O O0 64 20 35
PB5 PD5 D5 20
A13
31 I/O PF1 I/O D1 I/O D1 O O1 63 21
PB6 36 D6 21
PD6 A14
32 I/O PF2 I/O D2 I/O D2 O O2 62 22
PB7 37 D7 22
PD7 A15
33 I/O PF3 I/O D3 I/O D3 O O3
34 I/O PF4 I/O D4 I/O D4 O O4 39 23 39 23
PG0/AN0 PE0 PG0/AN0 A16
35 I/O PF5 I/O D5 I/O D5 O O5 40 24 40 24
PG1/AN1 PE1 PG1/AN1 A17
36 I/O PF6 I/O D6 I/O D6 O O6 41 25 41 25
37 PG2/AN2 PE2 PG2/AN2 A18
I/O PF7 I/O D7 I/O D7 O O7
42 28 42 28
38 — — — GND PG3/AN3 PE3 PG3/AN3 A19
— GND GND GND 43 5 43 5
39 I I — NC PG4/AN4 PE4 PG4/AN4 ST
I PG0/AN0 PG0/AN0 PG0/AN0 44 79 44
40 I I — NC PB5/AN5 PE5 PB5/AN5
I PG1/AN1 PG1/AN1 PG1/AN1
78 78
PE6 BUSACK
1 77 1
NM1 PE7 NM1
2 2
INT0 INT0
3 30 3 62
INT1 PF0 INT1 HALT
4 31 4 63
INT2 PF1 INT2 REF
73 32 73 64
MP0 PF2 MP0 IOE
72 33 72 65
MP1 PF3 MP1 ME
74 34 74 66
XTAL PF4 XTAL E
75 35 75 67
EXTAL PF5 EXTAL LIR
36 68
PF6 WR
80 37 80 69
RESET PF7 RESET RD
46 46
CTS0 CTS0
47 26 47 26
DCD0 TOUT1 DCD0 TOUT1
49 51 49 51
RXA0 TOUT2 RXA0 TPUT2
53 52 53 52
IC TOUT3 IC TOUT3

50 45 50 45
CKA0/DREQ0 RTS0 CKA0/DREQ0 RTS0
48 79 48
TXA0 WAIT TXA0
71 77 71
ø BUSREQ ø

2-84 DME-3000/7000
IC

MODE 2 PROM MODE *1


HD641180XF6 ;
HD641180X-8L -FP80B ;
54 6 22 6 HD643180X ; MASK ROM

PC0–PC7,PD0–PD7,
TAX1/PA0 A0 OE A0

PE0–PE3/A0–A19
55 7 23 7 HD647180X ; PROM (16kB)
RXA1/PA1 A1 CE A1
56 8 8
CKA1/TENDO/PA2 A2 A2

PF0–PF7
72

PG0/AN0
PG1/AN1
PG2/AN2
PG3/AN3
PG4/AN4
PG5/AN5
57 9 9
TXS/PA3 MP1

/D0–D7
A3 A3

TOUT3

TOUT2
58 11 73 11
RXS/CTS1/PA4 A4 MP0 A4

IC

ø
59 12 74 12
CKS/PA5 A5 XTAL A5

71
52
53
51
39
40
41
42
43
44

30–37
11-25,
60 13 75 13

6-9,
DREQ1/PA6 A6 EXTAL A6

28
61 14 14
TEND1/PA7 A7 A7
15
A8
30 15 1 74
D0 A8 A9 TIMING XTAL
31 16 17 ADDRESS GEN 76
D1 A9 A10 EXTAL
BUFFER
32 17 18
D2 A10 A11
33 18 19
D3 A11 A12
34 19 20 ANALOG 16-BIT 73
D4 A12 A13 PROGRAMABLE MP0
COMPARATOR
35 20 21 DATA TIMER RAM 72
D5 A13 A14 (6CH) MP1
MMU
BUFFER *1 (512B) 5
36 21 PE4/ST
D6 A14
79
37 22 30 PE5/BUSREQ
D7 A15 O0 78
31 PR6/BUSACK
O1 77

BUS STATE CONTROL


39 23 32 PE7/WAIT
PG0/AN0 A16 O2 80
40 24 33 RESET
PG1/AN1 A17 O3 62
PORT G ADDRESS BUS (16-BIT) PB7/HALT
41 25 34 63
PG2/AN2 A18 O4
PORT F PB6/REF

CPU
42 28 35 64
PG3/AN3 A19 O5 DATA BUS (8-BIT) PB5/IOE
PORT E
43 5 36 65
PG4/AN4 ST O6 PORT D PB4/ME
44 37 66
PB5/AN5 O7 PORT C PB3/E
67
78 PORT B PB2/LIR
BUSACK
68
1 PORT A PB1/WR
NM1 69
2 PB0/RD
INT0 1
3 62 16BIT NM1

INTERRUPT
INT1 HALT CLOCKED RELOAD DMAV 2
ASCI INT0
4 63 SERIAL (CHANNEL1) ASCI TIMER (2CH) 3
INT2 REF
I/O (CHANNEL 0) (2CH) INT1
73 64 4
MP0 IOE BOARD
INT2
72 65
MP1 ME
74 66
XTAL E
75 67
EXTAL LIR
68
WR
80 69
RESET RD

55
56
54
47
46
45
49
50
48
46

61
60
59
58
57

26
CTS0

PA7/TEND1
PA6/DREQ1
PA5/CKS
PA4/RXS/CTS1
PA3/TXS

PA1/RXA1
PA2/CKA1/TENDO
PA0/TXA1
DCD0
CTS0
RTS0
RXA0
CKA0/DREQ0
TXA0

TOUT1
47 26
DCD0 TOUT1
49 51
RXA0 TPUT2
53 52
IC TOUT3

50 45
CKA0/DREQ0 RTS0
79 48
WAIT TXA0
77 71
BUSREQ ø

INPUT
AN0—AN5 ; ANALOG INPUT
BUSREQ ; BUS REQUEST
CTS0,1 ; CLEAR TO SEND GOR ASYNCHRONOUS SCI CHANNEL n (n=0 OR 1)
DCD0,1 ; DATA VARRIER DETECT FOR ASYNCHRONOUS SCI CHANNEL n (n=0 OR 1)
DREQ0,1 ; DMA REQUEST FOR CHANNEL n (n=0 OR 1)
EXTAL ; EXTERNAL CLOCK
IC ; INPUT CAPTURE
INTO–2 ; INTERRUPT
MP0,1 ; MOD PROGRAM
NMO ; NON- MASKABLE INTERRUPT
PG0–PG5 ; 6-BIT INPUT OF PORT G
RXA0,1 ; RECEIVE DATA FOR ASYNCHRONOUS SCI CHANNEL n (n=0 OR 1)
RXS ; RECIEVE DATA FOR SERIAL I/O PORT
XTAL ; CLOCK

OUTPUT
A0–A19 ; ADDRESS BUS
BUSACK ; BUS ACKNOULEDGE
E ; ENABLE
IOE ; I/O ENABLE
LIR ; LOAD INSTRUCTION REGISTER
ME ; MEMORY ENABLE
RD ; READ
REF ; REFRESH
RTSO,1 ; REQUEST TO SEND FOR ASYNCHRONOUS SCI CHANNEL n (n=0 OR 1)
ST ; STATUS
TEND,1 ; TRANFER END FOR CHANNEL n (n=0 OR 1)
TOUT1–3 ; TIMER OUT
TXA0,1 ; TRANSFER DATA FOR ASYNCHRONOUS SCI CHANNEL n (n=0 OR 1)
TXS ; TRANSFER DATA FOR SERIAL I/O PORT
WR ; WRITE
ø ; SYSTEM CLOCK

INPUT/OUTPUT
CKA0,1 ; CLOCK FOR ASYNCHRONOUS SCI CHANNEL n (n=0 OR 1)
CKS ; CLOCK FOR SERIAL I/O PORT
D0–D7 ; DATA BUS
PA0–PA7 ; 8-BIT INPUT/OUTPUT OF PORT A
PB0–PB7 ; 8-BIT INPUT/OUTPUT OF PORT B
PC0–PC7 ; 8-BIT INPUT/OUTPUT OF PORT C
PD0–PD7 ; 8-BIT INPUT/OUTPUT OF PORT D
PE0–PE7 ; 8-BIT INPUT/OUTPUT OF PORT E
PF0–PF7 ; 8-BIT INPUT/OUTPUT OF PORT F

DME-3000/7000 2-85
IC

HM63021FP-28N(HITACHI)FLAT PACKAGE HN27C1024HCP-10(HITACHI)


HM63021FP28NZ
C-MOS 1M (65,536 X 16)-BIT ONE TIME EPROM
-TOP VIEW-
C-MOS 2048 WORD X 8-BIT LINE MEMORY
—TOP VIEW— 6 4 3 2 1 44 43 42 41 40
5 24 21
A0 I/O0

VPP

NC

VDD (+5V)
25 20
4 24 A1 I/O1
VCC (+5V) 28 DI0 DO0 7 39 26 19
MODE1 IN 1 5 23 A2 I/O2
DI1 DO1 27 18
6 22 8 38 A3 I/O3
DI2 DO2 28 17
CK/RCK IN 2 27 MODE2 IN 7 21 A4 I/O4
DI3 DO3 9 37 29 16
8 20 A5 I/O5
DI4 DO4 10 36 30 15
RES/RRES IN 3 26 MODE3 IN 9 19 A6 I/O6
DI5 DO5 31 14
RDEC/DEC2 OUT 10 18 11 35 A7 I/O7
DI6 DO6 32 11
DI0 IN 4 25 OE IN 11 17 A8 I/O8
DI7 DO7 12 GND GND 34 35 10
A9 I/O9
36 9
DI1 IN 5 24 DO0 OUT 2 13 13 NC NC 33 A10 I/O10
CK/RCK DEC1/WDEC 37 8
A11 I/O11
14 32 38 7
DI2 IN 6 23 DO1 OUT 1 A12 I/O12
MODE1 15 31 39 6
27 A13 I/O13
MODE2 40 5
DI3 IN 7 22 DO2 OUT 26 16 30 A14 I/O14
MODE3/RDEC/DEC2 41 4
A15 I/O15
17 29
DI4 IN 8 21 DO3 OUT

NC
3
RES/RRES CE OE PGM
16
DO4 OUT
WRES/DS/DEC3 18 19 20 21 22 23 24 25 26 27 28 3 22 43
DI5 IN 9 20 15
WCK/WT/DEC4

DI6 IN 10 19 DO5 OUT (VDD = +5V)


WE OE
PIN PIN PIN PIN
DO6 OUT I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL
DI7 IN 11 18 12 25 NO. NO. NO. NO.
1 — NC 12 — GND 23 — NC 34 — GND
WE IN 12 17 DO7 OUT 2 — VPP 13 — NC 24 I A0 35 I A9
MODE1, 2, 3 ; MODE SELECT INPUTS
RCK ; READ CLOCK INPUT 3 I CE 14 I/O I/O7 25 I A1 36 I A10
DEC1/WDEC 13 16 WRES/DS IN WCK ; WRITE CLOCK INPUT 4 I/O I/O15 15 I/O I/O6 26 I A2 37 I A11
/HI-Z OUT DEC3 OUT CK ; CLOCK INPUT 5 I/O I/O14 16 I/O I/O5 27 I A3 38 I A12
14 GND 15 WCK/WT IN RRES ; READ RESET INPUT 6 I/O I/O13 17 I/O I/O4 28 I A4 39 I A13
DEC4 OUT RES ; RESET INPUT 7 I/O 18 I/O 29 I 40 I
I/O12 I/O3 A5 A14
DI0-DI7 ; DATA INPUTS
8 I/O I/O11 19 I/O I/O2 30 I A6 41 I A15
WE ; WRITE ENABLE INPUT
HI-Z ; HIGH IMPEDANCE 9 I/O I/O10 20 I/O I/O1 31 I A7 42 — NC
WT ; WRITE TIMING INPUT 10 I/O I/O9 21 I/O I/O0 32 I A8 43 I PGM
DEC1, 2, 3, 4 ; DECODE PULSE OUTPUTS 11 I/O I/O8 22 I OE 33 — NC 44 — VDD
WDEC ; WRITE DECODE PULSE OUTPUT
MODE1 MODE2 MODE3 MODE
RDEC ; READ DECODE PULSE OUTPUT
TIME BASE COMPRESSING DS ; DELAY SELECT INPUT A0-A15 ; ADDRESS INPUTS
1 1 1
/EXPANDING DO0-DO7 ; DATA OUTPUTS CE ; CHIP ENABLE INPUT
1 1 0 DOUBLE SPEED EXCHANGE OE ; OUTPUT ENABLE INPUT I/O0-I/O15 ; DATA INPUTS/OUTPUTS
OE ; OUTPUT ENABLE INPUT
1 0 * TBC
PGM ; PROGRAM ENABLE INPUT
0 1 * 1H/2H DELAY VPP ; ROGRAM VOLTAGE INPUT
0 0 * DELAY LINE
0 ; LOW LEVEL
1 ; HIGH LEVEL
*; DEC OUTPUT SIGNAL
30
A6
MODE
31
PIN TIME BASE DOUBLE 1H/2H DELAY
A7
NO. COMPRESSING SPEED TBC 32
DELAY LINE A8
/EXPANDING EXCHANGE
1 MODE1 35
A9
X-DECODER

2 RCK CK 36
A10
3 RRES RES MEMORY MATRIX
4-11 DI0-DI7 37 1024 X 1024
A11
12 WE
38
13 HI-Z WDEC DEC1 A12

15 WCK WT DEC4 A13


39
16 WRES DS DEC3
40
17-24 DO0-DO7 A14
25 OE 41
A15
26 MODE3 RDEC DEC2
27 MODE2

21
I/O0
RRES/RES
WRES/DS

20
WCK/WT

I/O1
RCK/CK
MODE3
MODE2
MODE1

19
I/O2
WE DI0-DI7 18
I/O3
17
26 27 1 16 15 3 2 12 I/O4
16
INPUT DATA CONTROL

I/O5 Y-GATING
15
TIMING CONTROL WE INPUT I/O6
14
LOGIC LATCH LATCH I/O7
11
I/O8
10
I/O9
READ WRITE INPUT 9
I/O10
ADDRESS ADDRESS BUFFER 8
I/O11
CONTROL CONTROL 7
I/O12
6 Y-DECODER
I/O13
5
WRITE I/O14
4
ROW I/O15
DECODER
READ
COLUMN
DECODER A (128 x 64)
READ MEMORY WRITE
COLUMN COLUMN 3
CE
SWITCH MATRIX SWITCH
22
B (128 x 64) WRITE OE
COLUMN 43
DECODER PGM
44
READ VDD
24 25 26 27 28 29
2
OUTPUT ROW VPP A0 A1 A2 A3 A4 A5
H
LATCH DECODER 12, 34
GND
High Threshold Inverter

ADDRESS OUTPUT ADDRESS


DECODER BUFFER DECODER
26 13 26 16 15 25 13
RDEC
DEC1
DEC2
DEC3
DEC4

DO0-DO7 OE WDEC

2-86 DME-3000/7000
IC

IDT7164S20Y(IDT)SOP-J BEND IDT7210L55J(IDT)

C-MOS 64K (8K X 8)-BIT STATIC RAM


-TOP VIEW-

10 11
VDD A0 I/O 0
1 NC (+5V) 28 9 12
A1 I/O 1
8 13
A2 I/O 2
A12 2 27 WE 7 15
A3 I/O 3
6 16
A4 I/O 4
A7 3 26 CS2 5 17
A5 I/O 5
4 18
A6 I/O 6
A6 4 25 A8 3 19
A7 I/O 7
25
A8
A5 5 24 A9 24
A9
21
A10
A4 6 23 A11 23
A11
2
A12
A3 7 22 OE CS1 CS2 WE OE
20 26 27 22
A2 8 21 A10
INPUT
A1 9 20 CS1 A0 - A12 ; ADRESS
CS1, CS2 ; CHIP SELECT 1, 2
OE ; OUTPUT ENABLE
A0 10 19 I/O 7
WE ; WRITE ENABLE

I/O 0 11 18 I/O 6 INPUT/OUTPUT


I/O 0-I/O 7 ; DATA INPUTS/OUTPUTS
I/O 1 12 17 I/O 5

I/O 2 13 16 I/O 4

14 GND 15 I/O 3

WE CS1 CS2 OE I/O FUNCTION


X 1 X X HI-Z DESELECTED-STANDBY (ISB)
X X 0 X HI-Z DESELECTED-STANDBY (ISB)
VHC OR
X VHC X HI-Z DESELECTED-STANDBY (ISB1)
VLC
X X VLC X HI-Z DESELECTED-STANDBY (ISB1)
1 0 1 1 HI-Z OUTPUT DISABLED
1 0 1 0 DATA OUT READ DATA
0 0 1 X DATA IN WRITE DATA

0 ; LOW LEVEL
1 ; HIGH LEVEL
X ; DON'T CARE
HI-Z ; HIGH IMPEDANCE
VLC ; 0.2 V
VHC ; –0.2 V

10
A0
9
A1
8
A2
7
A3
6
A4
5
A5
4 ADDRESS 65,536 BIT
A6
3 DECODER MEMORY ARRAY
A7
25
A8
24
A9
21
A10
23
A11
2
A12

0 7
11
I/O 0
12
I/O 1
13
I/O 2
15
I/O 3
16 I/O CONTROL
I/O 4
17
I/O 5
18
I/O 6
19
I/O 7

20
CS1
26
CS2 CONTROL
22
OE LOGIC
27
WE

DME-3000/7000 2-87
IC

IDT79R3041-16J(IDT)
C-MOS RISC CPU
-TOP VIEW-

10 5 1 80 75 INPUT 36 19
ACK ADDR0
ACK ; ACKNOWLEDGE 18
GND
VDD(+5V)

VDD(+5V)
GND
ADDR1
BUSERROR ; BUS ERROR 37 51
BUS ERROR ADDR2
GND GND BUSREQ ; DMA ARBITER BUS REQUEST 34 52
BUS REQ ADDR3
VDD(+5V) VDD(+5V) CLK ; MASTER CLOCK
INT(3)-(5) ; PROCESSOR INTERRUPT 3-5 14 BURST/ 53
15 RDCEN ; READ BUFFER CLOCK ENABLE WRNEAR
70 RESET ; MASTER PROCESSOR RESET 24 39
INT(3) BUSGNT
SBRCOND/IO STROBE ; BRANCH CONDITION PORT 23 43
INT(4) DATA EN
/IO STROBE 20
INT(5)
SBRCOND/EXT DATA EN ; BRANCH CONDITION PORT
20 VDD(+5V) /EXT DATA EN 35 48
SINT(0)-(2) ; PROCESSOR INTERRUPT 0-2 RDCEN DIAG
GND GND 65 38
TRISTATE ; TRL-STATE RESET
VDD(+5V) 40
SYSCLK
29 54
OUTPUT SBRCOND(2) A/D0
28 55
ADDR0-3 ; LOW ADDRESS 0-3 SBRCOND(3) A/D1
25 56
BE16(0),(1) ; BYTE ENABLE STROBES FOR A/D2
60 27 59
16-BIT MEMORY PORT 0,1 SINT(0) A/D3
26 60
BURST/WRNEAR ; BURST TRANSFER WRITE NEAR SINT(1) A/D4
GND 25 61
BUSGNT ; DMA ARBITER BUS GRANT SINT(2) A/D5
VDD(+5V) 62
DATA EN ; DATA ENABLE A/D6
30 63
DIAG ; DIAGNOSTIC A/D7
GND 55 64
VDD(+5V)

VDD(+5V)

LAST ; LAST DATUM IN MINI BURST A/D8


VDD(+5V) 46 67
GND

GND

MEMSTROBE ; MEMORY STROBE ALE A/D9


68
RD ; READ A/D10
15 69
SYSCLK ; SYSTEM REFERENCE CLOCK TRISTATE A/D11
70
35 40 45 50 TC ; TERMINAL COUNT A/D12
(VDD = +5V) 71
A/D13
PIN PIN PIN PIN 72
I/O I/O SIGNAL INPUT/OUTPUT A/D14
SIGNAL I/O SIGNAL I/O SIGNAL 75
NO. NO. NO. NO. A/D15
A/D0-31 ; ADDRESS DATA 0-31
1 I/O A/D (23) 22 - VDD 43 O DATA EN 64 I/O A/D (8) 76
ALE ; ADDRSS LATCH ENABLE A/D16
2 I/O A/D (24) 23 I INT (4) 44 O WR 65 - GND 77
WR ; WRITE A/D17
3 I/O A/D (25) 24 I INT (3) 45 O RD 66 - VDD 78
A/D18
4 I/O A/D (26) 25 I SINT (2) 46 O ALE 67 I/O A/D (9) 79
A/D19
5 - VDD 26 I SINT (1) 47 O LAST 68 I/O A/D (10) 80
A/D20
6 - GND 27 I SINT (0) 48 O DIAG 69 I/O A/D (11) 83
A/D21
7 I/O A/D (27) 28 I/O *1/IOSTROBE 49 - GND 70 I/O A/D (12) 84
A/D22
8 I/O A/D (28) 29 I/O *2/EXTDATAEN 50 - VDD 71 I/O A/D (13) 1
A/D23
9 I/O A/D (29) 30 O TC 51 O ADDR (2) 72 I/O A/D (14) 2
A/D24
10 I/O A/D (30) 31 - GND 52 O ADDR (3) 73 - VDD 3
A/D25
11 I/O A/D (31) 32 - VDD 53 O BURST/WRNEAR 74 - GND 4
A/D26
12 - GND 33 O MEMSTROBE 54 I/O A/D (0) 75 I/O A/D (15) 17 7
BE16(0) A/D27
13 - VDD 34 I BUSREQ 55 I/O A/D (1) 76 I/O A/D (16) 16 8
BE16(1) A/D28
14 I CLK IN 35 I RDCEN 56 I/O A/D (2) 77 I/O A/D (17) 30 9
TC A/D29
15 I TRISTATE 36 I ACK 57 - VDD 78 I/O A/D (18) 10
A/D30
16 O BE16 (1) 37 I BUSERROR 58 - GND 79 I/O A/D (19) 33 MEMSTO 11
A/D31
ROBE 44
17 O BE16 (0) 38 I RESET 59 I/O A/D (3) 80 I/O A/D (20) WR
18 O ADDR (1) 39 O BUSGNT 60 I/O A/D (4) 81 - GND 47 45
LAST RD
19 O ADDR (0) 40 O SYSCLK 61 I/O A/D (5) 82 - VDD
20 I INT (5) 41 - GND 62 I/O A/D (6) 83 I/O A/D (21)
21 - GND 42 - VDD 63 I/O A/D (7) 84 I/O A/D (22)

*1 ; SBRCOND (3) *2 ; SBRCOND (2)

14
CLOCK MASTER PIPELINE CONTROL
CLK IN GENERATOR
UNIT

SYSTEM CONTROL INTEGER


COPROCESSOR CPU CORE
24,23,20
INT3-5 EXCEPTION/CONTROL GENERAL REGISTERS 28,29
SBRCOND 2,3
REGISTERS (32×32) 2

BUS INTERFACE ALU


REGISTERS
SHIFTER
PORT SIZE
MULT/DIY UNIT
REGISTER
ADDRESS ADDER
30 COUNTER
TC REGISTERS PC CONTROL
VIRTUAL
ADDRESS
32

PHYSICAL ADDRESS BUS

INSTRUCTION DATA
CACHE CACHE
32
2KB 512B

54-56,59-64, DATA BUS


67-72,75-80,
83-4,7-11 DATA 4-DEEP
ADDRESS/ UNPACK WRITE
DATA 0-31 UNUT BUFFER
32 R3051 SUPERSET
BUS INTERFACE UNIT
34,39 DATA 4-DEEP
DMA CTRL PACK READ
UNIT BUFFER
RD/WR 45,44
DMA
CTRL TIMING/ ARBITER
INTERFACE
40 CONTROL BIU
SYS CLK CONTROL

2-88 DME-3000/7000
IC

IDT74FCT821ASO(IDT)FLAT PACKAGE KM416C256BLJ-7(SAMSUNG)


C-MOS 10-BIT BUS INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
—TOP VIEW—

2 23
VDD D1 Q1
OE 1 24 3 22
(+5V) D2 Q2
4 21
D3 Q3
D1 IN 2 23 Q1 OUT 5 20
D4 Q4
6 19
D5 Q5
D2 IN 3 22 Q2 OUT 7 18
D6 Q6
8 17
D7 Q7
D3 IN 4 21 Q3 OUT 9 16
D8 Q8
10 15
D9 Q9
D4 IN 5 20 Q4 OUT 11 14
D10 Q10

D5 IN 6 19 Q5 OUT 13
OE
D6 IN 7 18 Q6 OUT 1

D7 IN 8 17 Q7 OUT

D8 IN 9 16 Q8 OUT
FUNCTION TABLE (EACH FLIP-FLOP)
D9 IN 10 15 Q9 OUT INPUTS OUTPUTS
OE CK D Q
D10 IN 11 14 Q10 OUT 0 1 1
0 0 0
12 GND 13 CK IN 0 0 X Q0
1 X X HI-Z
0 ; LOW LEVEL
1 ; HIGH LEVEL
X ; DON'T CARE
HI-Z ; HIGH IMPEDANCE

LOGIC DIAGRAM (POSITIVE LOGIC)

OE 1
CK 13
23 Q1
D1 2 D

22 Q2
D2 3 D

21 Q3
D3 4 D

20 Q4
D4 5 D

D5 6
19 Q5
D

D6 7
18 Q6
D

D7 8
17 Q7
D

D8 9
16 Q8
D

D9 10
15 Q9
D

D10 11
14 Q10
D

DME-3000/7000 2-89
IC

IDT79R3081-25MJ(IDT)
IL00
C-MOS RISC CPU
—TOP VIEW—

10 5 1 80 75 36 INPUT
ACK ACK ; ACKNOWLEDGE
51
GND
VDD(+5V)

VDD(+5V)
GND
ADDR(2) BRCOND(0) ; BRANCH CONDITION PORT (0)
33 52
GND GND BRCOND(0) ADDR(3) BUSERROR ; BUS ERROR
VDD(+5V) 37 BUSREQ ; DMA ARBITER BUS REQUEST
VDD(+5V) BUSERROR
34 53 CLK ; MASTER CLOCK
BUSREQ BURST/WRNEAR
15 39
COHREQ ; COHERENT DMA REQUEST
BUSGNT INT(3-5) ; PROCESSOR INTERRUPT (3-5)
70 14
IVDREQ ; INVALIDATE REQUEST
19 43 RDCEN ; READ BUFFER CLOCK ENABLE
COHREQ DATAEN
47 RESET ; MASTER PROCESSOR RESET
DIAG(0)/IVDREQ
24 48 SBRCOND(2, 3) ; BRANCH CONDITION PORT (2, 3)
20 VDD(+5V) INT(3) DIAG(1) SINT(0-2) ; PROCESSOR INTERRUPT (0-2)
23
GND GND 65 INT(4)
20 40
VDD(+5V) INT(5) SYSCLK OUTPUT
ADDR(2, 3) ; LOW ADDRESS (2, 3)
35 54 BURST / WRNEAR ; BURST TRANSFER WRITE NEAR
RDCEN A/D 0
38 55
BUSGNT ; DMA ARBITER BUS GRANT
25 RESET A/D 1 DATAEN ; EXTERNAL DATA ENABLE
60 56
A/D 2 DIAG(0, 1) ; DIAGNOSTIC (0, 1)
29 59 RD ; READ
SBRCOND(2) A/D 3
GND 28 60 SYSCLK ; SYSTEM REFERENCE CLOCK
SBRCOND(3) A/D 4
VDD(+5V) 27
SINT(0) 61
30 NC A/D 5 INPUT/OUTPUT
26 62
GND SINT(1) A/D 6 A/D(0-31) ; ADRESS DATA (0-31)
VDD(+5V)

VDD(+5V)

55 25 63 ALE ; ADDRESS LATCH ENABLE


GND

GND

VDD(+5V) SINT(2) A/D 7


64 RSVD(1-4) ; RESERVED (1-4)
A/D 8
67 WR ; WRITE
A/D 9
35 40 45 50 (VDD = +5V) 68
A/D 10
PIN PIN PIN PIN 69
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL A/D 11
No. No. No. No. A/D 12
70

1 I/O A/D (23) 22 — VDD 43 O DATAEN 64 I/O A/D (8) 71


A/D 13
2 I/O A/D (24) 23 I INT (4) 44 I/O WR 65 — GND 72
A/D 14
3 I/O A/D (25) 24 I INT (3) 45 O RD 66 — VDD 75
A/D 15
4 I/O A/D (26) 25 I SINT (2) 46 I/O ALE 67 I/O A/D (9) 76
A/D 16
5 — VDD 26 I SINT (1) 47 I/O DIAG(0) / IVDREQ 68 I/O A/D (10) 77
A/D 17
6 — GND 27 I SINT (0) 48 O DIAG (1) 69 I/O A/D (11) 46 78
ALE A/D 18
7 I/O A/D (27) 28 I SBR COND (3) 49 — GND 70 I/O A/D (12) 79
A/D 19
8 29 50 71 18 80
I/O A/D (28) I SBR COND (2) — VDD I/O A/D (13) RSVD1 A/D 20
9 I/O A/D (29) 30 — NC 51 O ADDR (2) 72 I/O A/D (14) 17 83
RSVD2 A/D 21
10 I/O A/D (30) 31 — GND 52 O ADDR (3) 73 — VDD 16 84
RSVD3 A/D 22
11 I/O A/D (31) 32 — VDD 53 O BURST / WRNEAR 74 — GND 15 1
RSVD4 A/D 23
12 — GND 33 I BR COND (0) 54 I/O A/D (0) 75 I/O A/D (15) 2
A/D 24
13 — VDD 34 I BUSREQ 55 I/O A/D (1) 76 I/O A/D (16) 3
A/D 25
14 I CLK 35 I RDCEN 56 I/O A/D (2) 77 I/O A/D (17) 4
A/D 26
15 I/O RSVD (4) 36 I ACK 57 — VDD 78 I/O A/D (18) 7
A/D 27
16 I/O RSVD (3) 37 I BUSERROR 58 — GND 79 I/O A/D (19) 8
A/D 28
17 I/O RSVD (2) 38 I RESET 59 I/O A/D (3) 80 I/O A/D (20) 9
A/D 29
18 I/O RSVD (1) 39 O BUSGNT 60 I/O A/D (4) 81 — GND 10
A/D 30
19 I COHREQ 40 O SYSCLK 61 I/O A/D (5) 82 — VDD 11
A/D 31
20 I INT (5) 41 — GND 62 I/O A/D (6) 83 I/O A/D (21)
21 — GND 42 — VDD 63 I/O A/D (7) 84 I/O A/D (22) 44
WR
45
RD

FLOATING POINT
COPROCESSOR
MC14495P1(MOTOROLA)
BRCOND (CP1)
(0,2,3)
CLOCK REGISTER UNIT C-MOS BCD-TO-SEVEN-SEGMENT 4-BIT LATCH/DECODER DRIVER
14 GRNERATOR MASTER PIPELINE (16X64)
CLK
UNIT/ CONTROL EXPONENT UNIT
CLOCK DOUBLER ADD UNIT
SYSTEM CONTROL INTEGER DIVIDE UNIT
COPROCESSOR(CP0) CPU CORE MULTIPLY UNIT
EXCEPTION/CONTROL GENERAL REGISTERS EXCEPTION/CONTROL
REGISTERS (32X32)
20, ALU
23, 24
MEMORY MANAGEMENT
INT(3-5) REGISTERS SHIFTER
TRANSLATION MULT/DIY UNIT
LOOKASIDE BUFFER ADDRESS ADDER
(64 ENTNES) PC CONTROL
VIRTUAL ADDRESS
FP INTERRUPT
DATA BUS

32
PHYSICAL ADDRESS BUS
54-56,59-64 4-DEEP
67-72,75-80 READ PARITY
83, 84, 1-4, 7-11 GENERATOR 36
BUFFER
ADDRESS/
DATA(0-31) 4-DEEP CONFIGURABLE
WRITE INSTRUCTION
BUFFER CACHE
R3051
DMA (16KB/8KB)
DMA CTRL SUPERSET
ARBITER BUS DATA BUS
45,44
RD/WR CTRL BIU INTERFACE CONFIGURABLE
40
SYSCLK CONTROL UNIT DATA
INVALIDATE COHERENCY CACHE
CONTROL LOGIC (4KB/8KB)

2-90 DME-3000/7000
IC

LM1881M(NS)FLAT PACKAGE LT1129CS8-3.3(LINEAR TECH)FLAT PACKAGE


LM1881M-FL63 LT1129CS8-3.3-E2
VIDEO SYNC SEPARATOR MICROPOWER LOW DROPOUT REGULATOR
—TOP VIEW— -TOP VIEW-

(+5 to +12V) 8 1
COMPOSITE VCC 8 IN OUT
SYNC OUT 1 C
2 COMPOSITE COMPOSITE 1 OUT 1 8 IN
VIDEO SYNC
COMPOSITE 5 2
7 ODD/EVEN OUT SHDN SENSE
VIDEO IN 2 VERTICAL 3 SENSE 2 GND 7
SYNC
GND
VERTICAL 3 6 RSET C
SYNC OUT 7 3 GND GND 6 3, 6, 7
ODD/EVEN

4 GND 5 BURST/BACK 6 SHDN ; DEVICE INTO SHUTDOWN INPUT


5 NC 4 5 SHDN
OUT RSET BURST/BACK
R

TIMING CHART

COMPOSITE
VIDEO IN

COMPOSITE
SYNC OUT

VERTICAL
SYNC OUT
BURST OUT LT1191CS8(LINEAR TECH)FLAT PACKAGE
ODD/EVEN OUT
HIGH SPEED OPERATIONAL AMPLIFIER
— TOP VIEW —

BAL 1 8 BAL

VCC
–IN 2 – (+5 V) 7

+IN 3 + 6
LM3080N(NSC)
4 VEE 5 SHUTDOWN
(–5 V)

MAX232CWE(MAXIM)
MAX232CWE-TE-2

RS-232 TRANSMITTER/RECEIVER
—TOP VIEW—

1 2
C1+ V+
C1 + 1 VDD (+5V) 16 3
C1–
4 6
C2+ V–
V+ 2 GND 15 5
C2–
LM360M(NS)FLAT PACKAGE
C1 – 3 14 T1 OUT 11 14
T1 T1
10 7
HIGH SPEED VOLTAGE COMPARATOR T2 T2
—TOP VIEW— C2 + 4 13 R1 IN
13 12
R1 R1
C2 – 5 12 R1 OUT 8 9
R2 R2
1 NC VCC (+5V) 8
V– 6 11 T1 IN
2 –– 7 R1, 2 ; RECEIVER 1, 2
+ T2 OUT 7 10 T2 IN T1, 2 ; TRANSMITTER 1, 2
+
3 6
R2 IN 8 9 R2 OUT
4 VCC (–5V) GND 5 +5V
INPUT

16 3k
1
DTR
+ +5V TO +10V 2 +10V
C1 3k
22 F 3 VOLTAGE DOUBLER
DSRS
+ 4 +10V TO –10V –10V +
C2
22 F VOLTAGE INVERTER 6 22 F
+
5
+5V
22 F
400k
11 14 TO
T1 RS-232 OUTPUT
+5V
LT1074CT(LINEAR TECH) TTL/CMOS
INPUTS 400k
10 7 RTS
T2 RS-232 OUTPUT

12 13 RO
R1 RS-232 INPUT
5k
TTL/CMOS
OUTPUTS
9 8 CTS
R2 RS-232 INPUT
5k

15

DME-3000/7000 2-91
IC

MAX241CWI(MAXIM)FLAT PACKAGE MAX651CSA(MAXIM)FLAT PACKAGE


C-MOS ADJUSTABLE STEP DOWN DC-DC CONTROLLER
RS-232C TRANSMITTER/RECEIVER
- TOP VIEW - -TOP VIEW-

12
C1+ OUT 1 GND 8
T3 OUT 1 28 T4 OUT 14
C1–
15 13
C2+ V+ FB 2 7 EXT
T1 OUT 2 27 R3 IN 16 17
C2– V–

T2 OUT 3 26 R3 OUT 7 2 SHDN 3 6 CS


T1 T1
6 3
T2 T2 REF 4 VDD(+3.3V) 5
R2 IN 4 25 SHDN 20 1
T3 T3
21 28
T4 T4
R2 OUT 5 24 EN OUT : OUTPUT VOLTAGE CONNECTION
8 9 FB : FEEDBACK INPUT
R1 R1
T2 IN 6 23 R4 IN 5 4 SHDN : SHUTDOWN CONTROL INPUT, ACTIVE HIGH
R2 R2
26 27 REF : REFERENCE VOLTAGE OUTPUT
R3 R3
T1 IN 7 22 R4 OUT 22 23 CS : CURRENT-SENSE INPUT
R4 R4
19 18 EXT : DRIVER FOR THE AUXILIARY MOSFET PNP
R5 R5
R1 OUT 8 21 T4 IN 24 25
EN SHDN

R1 IN 9 20 T3 IN
VDD FB
DUAL-MODE
10 GND 19 R5 OUT INPUT – COMPARATOR
+
EN ; RECEIVER ENABLE
11 V DD (+5V) 18 R5 IN SHDN ; SHUT DOWN SHDN ERROR
COMPARATOR OUT
R1, R2, R3, R4, R5 ; RECEIVER 1, 2, 3, 4, 5
C1+ 12 17 V– T1, T2, T3, T4, ; TRANSMITTER 1, 2, 3, 4 REF

1.5V
REFERENCE
V+ 13 16 C2– OUTPUT N
MINIMUM
R1, R2, R3, R4, R5 ; RECEIVER 1, 2, 3, 4, 5 Q OFF-TIME TRIG
ONE-SHOT FROM V+
C1– 14 15 C2+ T1, T2, T3, T4 ; TRANSMITTER 1, 2, 3, 4
EXT
S Q

MAXIMUM
TRIG ON-TIME Q
ONE-SHOT R
CURRENT CS
COMPARATOR +

CURRENT
CONTROL CIRCUITS
– –
+5 INPUT + +
0.2V 0.1V
(FULL CURRENT) (HALF CURRENT)
FROM VDD
C3 1.0µF
GND
+
11
12
C1 + +5V TO –10V 13
1.0µF 14 V+
VOLTAGE DOUBLER
15
C2 + +10V TO –10V 17
1.0µF 16 V–
VOLTAGE INVERTER C4
+ 1.0µF
+5V

T1
7 400k
2
T1
MAX691CPE(MAXIM)
+5V
400k C-MOS MICROPROCESSOR SUPERVISORY CIRCUITS
6 3
T2 T2 —TOP VIEW—
TTL/CMOS +5V RS-232C
INPUT 400k OUTPUT 1 5
20 1 V BATT BATT ON
T3 T3 V BATT 1 16 RESET
+5V
3 2
400k VDD V OUT
21 28 V OUT 2 15 RESET
T4 T4
13 12
CE IN CE OUT
EN 9 3 VDD (+4.75 to +5.5V) 14 WDO 6
R1 R1 LOW LINE
5k
4 GND 13 CE IN 7 15
8 4 OSC RESET
R2 R2 8 16
OSC SEL RESET
5k BATT ON 5 12 CE OUT

TTL/CMOS 5 27 RS-232C 11 14
R3 R3 WDI WDO
OUTPUT INPUT LOW LINE 6 11 WDI
5k
9 10
26 23 PFI PFO
R4 R4 OSC 7 10 PFO
5k
19 18 OSC SEL 8 9 PFI CE ; CHIP ENABLE
R5 R5 PFI, PFO ; POWER FAIL INPUT / OUTPUT
5k
WDI, WDO ; WATCHDOG INPUT / OUTPUT
24 25
EN SHDN
V BATT BATT ON

10 1 5

+ 2
VDD 3 – V OUT

13
CE IN 12
CE OUT

+ 6
LOW LINE

+4.65V 15
RESET
16
RESET
RESET GENERATOR

7
OSC TIMEBASE FOR RESET
8 AND
OSC SEL
WATCHDOG

WATCHDOG 14
WDI
11 WATCHDOG TRANSITION TIMER WDO
DETECTOR

9
PFI + 10
– PFO

+1.3V

2-92 DME-3000/7000
IC

MB40760PF(FUJITSU)FLAT PACKAGE MB8421-90LPFQ(FUJITSU)(ACCESS TIME=90nS)FLAT PACKAGE

C-MOS 16384 (2Kx8) BIT DUAL PORT STATIC RAM


—TOP VIEW—
2 49

64
63
62
61
60
59
58
57
56
55
54
53
52
3 OEL OER 16
A0L I/O 0L
4 17

NC

VDD (+5V)
VDD (+5V)
A1L I/O 1L
5 18
A2L I/O 2L
1 NC NC 51 6 19
A3L I/O 3L
2 NC 50 7 20
A4L I/O 4L
3 49 8 21
A5L I/O 5L
4 48 9 22
A6L I/O 6L
5 47 10 23
A7L I/O 7L
6 46 11
A8L
7 45 12 61
A9L BUSYL
8 44 63 62
A10L INTL
9 43
10 GND 42 48 28
A0R I/O 0R
11 41 47 29
A1R I/O 1R
12 40 46 30
A2R I/O 2R
13 NC 39 45 31
A3R I/O 3R
14 NC NC 38 44 32
A4R I/O 4R
15 NC NC 37 43 33
A5R I/O 5R
16 NC 36 42 34
A6R I/O 6R
17 35 41 35
A7R I/O 7R
18 34

VDD (+5V)
40
A8R
19 33

GND
GND
39 BUSYR 54
A9R

NC
52 INTR 53
A10R

CSL WEL CSR WER

20
21
22
23
24
25
26
27
28
29
30
31
32
59 60 56 55

A0L–A10L, A0R–A10R ; ADDRESS INPUTS


I/O0L–I/O7L, I/O0R–I/O7R ; DATA INPUTS/OUTPUTS
CSL, CSR ; CHIP SELECT INPUT
WEL, WER ; WRITE ENABLE INPUT
OEL, OER ; OUTPUT ENABLE INPUT
BUSYL, BUSYR ; BUSY OUTPUT
INTL, INTR ; INTERRUPT OUTPUT

61
BUSYL
62
INTL
60
WEL
59
CSL
OEL 2

A0L MATRIX I/O I/O 0L


| |
MB88346BPF(FUJITSU)FLAT PACKAGE A10L
DECODER BUFFER
I/O 7L
ARBITRATION INTERRUPUT CIRCUIT

MB88346BPFV(FUJITSU)FLAT PACKAGE(SMALL)
C-MOS 8-BIT D/A CONVERTER
— TOP VIEW —

18 MEMORY
AO1
1 GND GND 20 19 ARRAY
AO2
2
AO3
AO3 OUT 2 19 AO2 OUT 3
AO4
4
AO5
AO4 OUT 3 18 AO1 OUT 17 5
D1 AO6
6
AO7
AO5 OUT 4 17 DI IN 7 A0R
AO8 MATRIX I/O I/O 0R
8 | |
AO9 A10R
DECODER BUFFER
AO6 OUT 5 16 CK IN I/O 7R
9
AO10
12 55
AO11 WER
AO7 OUT 6 15 LD IN 13 56
AO12 CSR
16 49
OER
AO8 OUT 7 14 DO OUT 14 54
DO BUSYR
LD 53
INTR
AO9 OUT 8 13 AO12 OUT 15

AO10 OUT 9 12 AO11 OUT

VDD VCC
10 (+5 V) (+5 V) 11

AO1 - AO12 ; 8-BIT D/A OUTPUTS


CK ; CLOCK INPUT
DI ; SERIAL DATA INPUT
DO ; DATA OUTPUT
LD ; DATA LOAD CONTROL INPUT (H ; LOAD)

8 8 8-BIT 8 8-BIT
D0 R-2R + 13
LATCH – AO12
D1 D/A CONV
D2
17
DI D3
D4
SHIFT REGISTER

D5
8 8-BIT 8 8-BIT
D6 R-2R + 18
12-BIT

16 LATCH –
AO1
CK D7 D/A CONV

D8
D9
ADDRESS 12
D10 DECODER
D11

14
DO

15
LD

DME-3000/7000 2-93
IC

MB89371AH-PF(FUJITSU)

2-94 DME-3000/7000
IC

MC68882FN25(MOTOROLA)

C-MOS FLOATING-POINT COPROCESSOR


—TOP VIEW—
MC68882FN25 (3/3)
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61

CONTROL (CS, AS, DS, R/W, SIZE, DSAK1/0, RESET)


GND

GND

GND

GND

GND

VDD (+5V)
BIU APU

13,
10 60 CLK 11

26
11 59 A0
VDD (+5V) BUILT IN SELF CLOCK GENERATOR

31, 32,
25
A1 TEST REGISTERS
12 GND 58 24 COPROCESSOR
A2
23 INTERFACE REGISTER
13 57 A3
SELECT AND DSACK UPC STACK

18,
22
A4 CONTROL
14 GND 56 UPC UPC

28,
SELECT MULTI- UPC
15 NC 55 PLA PLEXER
RESET

29, 21, 20,


16 VDD (+5V) 54
3
D0 UROM
17 VDD (+5V) VDD (+5V) 53 2 INSTRUCTION DECODE
D1 CONTROL CIR PLAS
1
VDD (+5V) 52 D2
18 68
D3
67 INSTRUCTION DECODE
19 GND GND 51 D4 RESTORE CIR nROM
66 REGISTER
D5
20 50 65
D6
64 FPCR FPSR AND
D7 SAVE CIR
21 49 62 FPIAR
D8
60
22 48 D9 (EXPONENT)
59
D10 RESPONSE CIR
58 FLOATING - POINT
23 47 D11 DATA REGISTERS
D12
57 RESPONSE PLA
(MANTISSA)
24 46 56
D13
55
25 45 D14
STATUS FLAGS BARREL SHIFTER
VDD (+5V)

VDD (+5V)

54
D15
50
26 44
GND

GND

D16
49
D17 COMMAND/
48 CONSTANT ROM
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 D18 CONDITION CIR
47
D19 X
46
D20
45 TENPORARY
D21
44 INSTRUCTION REGISTERS
D22
42
ADDRESS CIR
D23
40 REGISTER SELECT
D24
D25
39 CIR
(VDD =+5V) 26 3 SHIFTER
38
A0 D0 D26
PIN PIN 25 2 37 COMMUNICATIONS
I/O SIGNAL I/O SIGNAL A1 D1 D27 DIALOG SEQUENCER
NO. NO. 1 36
24 D28
A2 D2 ALU
1 I/O D2 35 I/O D29 23 68 35 S. D. X. FORMAT
A3 D3 D29
22 67 D30
34 CONVERSION LOGIC
2 I/O D1 36 I/O D28 A4 D4
66 33 OPERAND CIR
D31
3 I/O D0 37 I/O D27 D5
65
D6 ROUND LOGIC
4 I SENSE 38 I/O D26 4 64
SENSE D7
5 — GND 39 I/O D25 18
SIZE D8
62
60
6 — GND 40 I/O D24 D9
59
7 — GND 41 — GND D10
58
D11
8 — GND 42 I/O D23 57
D12
9 — GND 43 — VDD 56
D13
55
10 — VDD 44 I/O D22 D14
D15
54 MC74HC164F(MOTOROLA)FLAT PACKAGE
11 I CLK 45 I/O D21
D16
50
SN74HC164ANS(TI)FLAT PACKAGE
12 — GND 46 I/O D20 49
D17
48
TC74AC164F(TOSHIBA)FLAT PACKAGE
13 I RESET 47 I/O D19 D18
47 SN74HC164ANS-E05
14 — GND 48 I/O D18 D19
46
D20
15 — NC 49 I/O D17 45 C-MOS 8-BIT SERIAL-IN/PARALLEL-OUT SHIFT REGISTER
D21
16 — VDD 50 I/O D16 44 —TOP VIEW—
D22
42
17 — VDD 51 — GND D23
40 3
Q1
18 I SIZE 52 — VDD D24 A 1 VDD 14
39 4
Q2
D25
19 — GND 53 — VDD 13 38 A 1 Q3
5
RESET D26 B 2 13 Q8 D 6
20 I DS 54 I/O D15 37 B 2 Q4
D27
36 10
I Q5
21 AS 55 I/O D14 D28 Q1 3 12 Q7
35 8 11
Q6
22 I A4 56 I/O D13 D29
34 12
Q7
D30 Q2 4 11 Q6
23 I A3 57 I/O D12 28 33 13
Q8
R/W D31
20 RD
24 I A2 58 I/O D11 DS Q3 5 10 Q5 9
21 31
25 I A1 59 I/O D10 AS DSACK 0
29 32
CS DSACK 1 Q4 6 9 RD INPUTS OUTPUTS
26 I A0 60 I/O D9 CLK

— 11 RD CK A B Q1 Q2 Q8
27 VDD 61 — VDD
7 GND 8 CK 0 X X X 0 0 0 0
28 I R/W 62 I/O D8 INPUT
1 0 X X Q1o Q2o Q8o
A0- A4 ; ADDRESS
29 I CS 63 — GND AS ; ADDRESS STROBE 1 1 1 1 Q1n Q7n 0 ; LOW LEVEL
30 — GND 64 I/O D7 CLK ; CLOCK 1 0 X 0 Q1n Q7n 1 ; HIGH LEVEL
CS ; CHIP SELECT NOTE: 1 X 0 0 Q1n Q7n X ; DON'T CARE
31 O DSACK0 65 I/O D6 DS ; DATA STROBE TYPE VDD
32 O DSACK1 66 I/O D5 R/W ; READ/WRITE AC/VHC +2 to +5.5 V
RESET ; RESET HC +2 to +6 V
33 I/O D31 67 I/O D4 SENSE ; SENSE DEVICE
HCT +5 V
34 I/O D30 68 I/O D3 SIZE ; SIZE

OUTPUT
DSACK0, ; DATA TRANSFER AND SIZE Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8
DSACK1 ; ACKNOWLEDGE 3 4 5 6 10 11 12 13
8
CK
1
INPUT/OUTPUT A
2 D Q D Q D Q D Q D Q D Q D Q D Q
D0-D31 ; DATA INPUTS/OUTPUTS B

RD RD RD RD RD RD RD RD

9
RD

DME-3000/7000 2-95
IC

MC68EC020RP25(MOTOROLA)
C-MOS 32-BIT MICROPROCESSOR
-BOTTOM VIEW-
INDEX
A B C D E F G H J K L M N
13G 3B
D0 A0 INPUT
1 11H 3A
D1 A1 AVEC ;AUTOVECTOR
12H 12D
2 D2 A2 BERR ;BUS ERROR
13H 13C
D3 A3 BR ;BUS REQUEST
3 12J 12C
D4 A4 CDIS ;CACHE DISABLE CONTROL
13K 13B
4 D5 A5 CLK ;CLOCK
12L 13A
D6 A6 DSACK0,
5 13L 12B
D7 A7 DSACK1 ;DATA TRANSFER AND SIZE
13M 12A
6 D8 A8 ACKNOWLEDGE
12M 11A
D9 A9 IPL0-IPL2 ;INTERRUPT PRIORITY CONTROL
7 13N 11B
D10 A10
12N 10A OUTPUT
8 D11 A11
11M 10B A0-A23 ;ADDRESS BUS
D12 A12
9 11N 9A AS ;ADDRESS STROBE
D13 A13
10M 9B BG ;BUS GRANT
10 D14 A14
10N 8A DS ;DATA STROBE
D15 A15
11 8N 8B
D16 A16 FC0-FC2 ;FUNCTION CODE SIGNALS
7L 6A OCS ;OPERAND CYCLE START
12 D17 A17
7M 6B R/ W ;READ/WRITE
D18 A18
13 7N 6C
D19 A19 RMC ;READ-MODIFY-WRITE CYCLE
6L 5A SIZ0,SIZ1 ;TRANSFER SIZE
D20 A20
6M 5B
D21 A21 INPUT/OUTPUT
6N 4A
D22 A22 D0-D31 ;DATA BUS
5M 4B
D23 A23 HALT ;HALT
V CC =-0.3to+7V 5N
D24 RESET ;RESET
4M
PIN I/O SIGNAL PIN I/O SIGNAL PIN I/O SIGNAL PIN I/O SIGNAL D25
No. No. No. No. 4N
D26
1A - GND 3A O A1 7N I/O D19 12E - V CC 3M
D27
1B - GND 3B O A0 8A O A15 12F - GND 3N
D28
1C I CLK 3E O FC0 8B O A16 12G I IPL0 2N
D29
1D - V CC 3G I AVEC 8C - GND 12H I/O D2 2M
D30
1E O RMC 3H I BERR 8L - GND 12J - D4 1N
D31
1F O FC2 3M I/O D27 8M - GND 12K I/O V CC
1G O SIZ1 3N I/O D28 8N I/O D16 12L I/O D6 12G 3E
IPL0 FC0
1H I DSACK0 4A O A22 9A O A13 12M I/O D9 11G 2E
IPL1 FC1
1J - GND 4B O A23 9B O A14 12N I/O D11 13F 1F
IPL2 FC2
1K I/O HALT 4M I/O D25 9M - V CC 13A O A6 3G 2F
1L O DS 4N I/O D26 9N - V CC 13B O A5 AVEC SIZ0
2G 1G
1M - GND 5A O A20 10A O A11 13C O A3 CDIS SIZ1
1N I/O D31 5B O A21 10B O A12 13D - GND 2A
BR
2A I BR 5M I/O D23 10M I/O D14 13E - V CC 3H 1E
2B O BG 5N I/O D24 10N I/O D15 13F I IPL2 BERR RMC
1H 2K
2C I/O RESET 6A O A17 11A O A9 13G I/O D0 DSACK0 AS
2H 1L
2D - V CC 6B O A18 11B O A10 13H I/O D3 DSACK1 DS
2E O FC1 6C O A19 11F - GND 13J - GND 1C 2L
CLK R/ W
2F O SIZ0 6L I/O D20 11G I IPL1 13K I/O D5
2G I CDIS 6M I/O D21 11H I/O D1 13L I/O D7 2C
RESET
2H I DSACK1 6N I/O D22 11M I/O D12 13M I/O D8 1K 2B
HALT BG
2J - GND 7A - GND 11N I/O D13 13N I/O D10
2K O AS 7B - V CC 12A O A8
2L O R/ W 7C - V CC 12B O A7
2M I/O D30 7L I/O D17 12C O A4
2N I/O D29 7M I/O D18 12D O A2

SEQUENCER AND CONTROL INSTRUCTION PIPE


CACHE
CONTROL STAGE STAGE STAGE HOLDING
STORE D C B REGISTER
(CARR)

INTERNAL
CONTROL DATA
LOGIC BUS

INSTRUCTION
CACHE
INSTRUCTION
ADDRESS
BUS
EXECUTION UNIT

PROGRAM D0-D31
A0-A23 ADDRESS DATA SIZE DATA
ADDRESS COUNTER DATA
ADDRESS SECTION SECTION MULTIPLEXER PADS
PADS SECTION BUS
BUS

ADDRESS
BUS

BUS CONTROLLER MISALIGNMENT


WRITE PENDING PREFETCH PENDING MULTIPLEXER
BUFFER BUFFER

MICROBUS
CONTROLLER

BUS CONTROL
SIGNALS

2-96 DME-3000/7000
IC

MC74HC30F(MOTOROLA)FLAT PACKAGE MC74HC4538AF(MOTOROLA)FLAT PACKAGE


MC74HC4538F(MOTOROLA)FLAT PACKAGE
C-MOS 8-INPUT POSITIVE-NAND GATE
—TOP VIEW— MC74HC4538AF-T2
H G Y
A A C-MOS DUAL RETRIGGERABLE/NON-RETRIGGERABLE MONOSTABLE
14 13 12 11 10 9 8 B B MULTIVIBRATOR
VDD NC NC NC C C
(+2 to + 6V) D D — TOP VIEW —
E Y = E Y
F F VDD VDD
G G VDD
H H 1-C 1 (+2 V to +6 V) 16 C R C R

Y=A•B•C•D•E•F•G•H 1 2 15 14
1-CR 2 15 2-C
GND = A + B + C + - - - - +H Q 6 Q 10
4 12
1 2 3 4 5 6 7
1-RD 3 14 2-CR 5 11
A B C D E F 7 9
Q Q
RD RD
1-CK 4 13 2-RD
3 13

1-CK 5 12 2-CK
OUTPUT PULSE WIDTH = k · C · R
1-Q 6 11 2-CK

k. OUTPUT PULSE WIDTH CONSTANT (TYPICAL)


1-Q 7 10 2-Q 0.74
MC74HC4053F(MOTOROLA)FLAT PACKAGE
0.72
MC74HC4053F-T2 8 GND 9 2-Q
0.70
TC74HC4053AF-TP2 0.68

0.66
C-MOS TRIPLE 2-CHANNEL ANALOG MULTIPLEXER/DEMULTIPLEXER 1 2 15 14
C CR C CR 0.64
— TOP VIEW —
4 Q 6 12 Q 10
0.62
12 X0 5 11
VDD 7 9
Q Q 2 3 4 5 6
Y1 IN/OUT 1 (+2 V to +6 V) 16 13 X1 X 14 RD RD
OPEN VDD POWER SUPPLY VOLTAGE (VOLTS)
3 13
11 A
Y0 IN/OUT 2 15 Y IN/OUT
2 Y0
Z1 IN/OUT 3 14 X IN/OUT 1 Y1
RETRIGGERABLE M. M. V NON-RETRIGGERABLE M. M. V
Y 15
OPEN VDD VDD VDD VDD
10 B
Z IN/OUT 4 13 X1 IN/OUT
5 Z0
Z0 IN/OUT 5 12 X0 IN/OUT 3 Z1 Z 4
OPEN Q Q Q Q
9 C
EN IN 6 11 A IN
VDD
EN VEE Q Q Q Q
RD RD RD RD
7 VEE * 10 B IN 6 7
VDD VDD
VDD VDD
8 GND 9 C IN

VEE*; VDD – VEE = +3 V to +12 V


< GND
VEE =

CONTROL INPUTS
SELECT ON CHANNEL
EN
C B A MC74HC595AF(MOTOROLA)FLAT PACKAGE
0 0 0 0 Z0 Y0 X0
0 0 0 1 Z0 Y0 X1 C-MOS 8-BIT SERIAL-INPUT/SERIAL- OR PARALLEL-OUTPUT
0 0 1 0 Z0 Y1 X0 SHIFT REGISTER WITH LATCHED 3-STATE OUTPUT
0 0 1 1 Z0 Y1 X1 —TOP VIEW—
0 1 0 0 Z1 Y0 X0
0 1 0 1 Z1 Y0 X1 14
SI QA
15
0 1 1 0 Z1 Y1 X0 0 ; LOW LEVEL QB OUT 1 VDD 16 1
(+2V to +6V) QB
0 1 1 1 Z1 Y1 X1 1 ; HIGH LEVEL 10
RESET QC
2
1 X X X OPEN X ; DON'T CARE QC OUT 2 15 QA OUT 3
QD
4
QE
QD OUT 3 14 SI IN 5
QF
6
QG
QE OUT 4 13 OE IN 7
QH
11
SCK
QF OUT 5 12 LCK ( ) IN 12
LCK

MC74HC4078F(MOTOROLA) QG OUT 6 11 SCK ( ) IN


SQH 9
OE
QH OUT 7 10 RESET IN 13

8 GND 9 SQH OUT OE ; OUTPUT ENABLE INPUT


LCK ; LATCH CLOCK INPUT
SCK ; SHIFT CLOCK INPUT
RESET ; SHIFT-REGISTER RESET INPUT
SI ; SERIAL IN
QA-QH ; PARALLEL OUTPUT
SQH ; SERIAL OUT

10
RESET

14 RD RD RD 9
SI D Q D Q D Q SQH

11
SCK

D Q D Q

12
LCK

13
OE
15 7
QA QH

DME-3000/7000 2-97
IC

MC74HC589F(MOTOROLA)FLAT PACKAGE NJM4565M-A(JRC)FLAT PACKAGE


NJM4565M-A-T1
C-MOS 8-BIT SERIAL OR PARALLEL INPUT/SERIAL OUTPUT
SHIFT REGISTER WITH 3-STATE OUTPUT DUAL OPERATIONAL AMPLIFIER
—TOP VIEW—
— TOP VIEW —

VDD 8 7 6 5
B 1 (+2 to +6V) 16
VDD
(+15 V)

C 2 15 A
+

D 3 14 SA A-H ; PARALLEL DATA INPUTS


+
LCK ; LATCH CLOCK INPUT –
E 4 13 SS/PL OE ; OUTPUT ENABLE INPUT VEE
(–15 V)
QH ; SERIAL DATA OUTPUT
1 2 3 4
F 5 12 LCK SA ; SERIAL DATA INPUT
SCK ; SHIFT CLOCK INPUT
G 6 11 SCK SS/PL ; SERIAL SHIFT/PARALLEL LOAD

H 7 10 OE

8 GND 9 QH

MSM514221B-30ZS(OKI)
FUNCTION TABLE
INPUTS
SERIAL SHIFT OUTPUT
OUTPUT RESULTING FUNCTION
PARALLEL LATCH SHIFT SA A-H QH
ENABLE LOAD CLOCK CLOCK

H X X X X X Z QH is in the high impedance state.

Parallel data is stored in the input latch.


L H L, H, X a-h no change
The state of the shift register is unaffected.

Parallel data is stored in the input latch and


L L X X a-h h
loaded into the shift register.

Parallel data is stored in the input latch and


L L L, H, L, H, X X hL*
loaded into the shift register.

L H X L X QGN A low logic level is shifted into the shift register.


L H X H X QGN A high logic level is shifted into the shift register.

Serial data is shifted into the shift register and


L H L, H L, H QGN
parallel data is stored in the input latch.

* hL = the data stored in stage H of the input latch


X = don't care
QGN = Data shifted from stage G
a-h = Data at inputs A-H, respectively
Z = High Impedance State

Serial
Data SA 14
Input
14
SA
15
A 15
B 1 1
A

C 2 2
B
Parallel
D 3 3
C
Data
Input Shift
Inputs E 4 4
D
Latch Register
F 5 5
E

G 6 6
F
9 Serial
H 7 QH Data
G
7 9
Output H QH

LCK 12 12
LCK
11
SCK 11 13
SCK
SS/PL
13 OE
SS/PL
10
10
OE

2-98 DME-3000/7000
IC

MSM514222B-30JS(OKI)CHIP CARRIER MSM514256BL-70ZS(OKI)

C-MOS 1M(262,144x4)-BIT DYNAMIC RAM

QS3384SO(QUALITY)FLAT PACKAGE

DME-3000/7000 2-99
IC

MSM514400C-70SJ(OKI) CHIP CARRIER MSM518221-30ZS(OKI)


C-MOS 4M (1, 048, 576·4) - BIT DYNAMIC RAM
— TOP VIEW —

5 25
A9 DQ4
DQ1 I/O 1 GND 26 18 24
A8 DQ3
17 2
A7 DQ2
DQ2 I/O 2 25 DQ4 I/O 16 1
A6 DQ1
15
A5
WE IN 3 24 DQ3 I/O 14
A4
12
A3
RAS IN 4 23 CAS IN 11
A2
10
A1
A9 IN 5 22 OE IN 9
A0
3
WE
22
OE
4
A0 IN 9 18 A8 IN RAS
23
CAS
A1 IN 10 17 A7 IN

A2 IN 11 16 A6 IN INPUT
A0 - A9 ; ADDRESS
A3 IN 12 15 A5 IN CAS ; COLUMN ADDRESS STROBE
OE ; OUTPUT ENABLE
13 VDD (+5V) 14 A4 IN RAS ; ROW ADDRESS STROBE
WE ; WRITE ENABLE
INPUT/OUTPUT
DQ1 - DQ4 ; DATA

RAS
4 TIMING
GENERATOR
TIMING
23
CAS GENERATOR

COLUMN
COLUMN WRITE
ADDRESS 3
DECODERS CLOCK WE
BUFFERS
GENERATOR 22
OE
5,
9-12
14-18 INTERNAL REFRESH I/O OUTPUT
A0 - A9 SENSE
ADDRESS CONTROL SELECTOR BUFFERS
AMPS 1, 2
COUNTER CLOCK
24, 25
DQ1 -
DQ4
ROW
ROW WORD MEMORY INPUT
ADDRESS
DECODERS DRIVERS CELLS BUFFERS
BUFFERS
13
VDD

On-chip
VBB
26
GND

MSM514400C-70ZS(OKI)
C-MOS 4M (1, 048, 576×4) - BIT DYNAMIC RAM
-SIDE VIEW-

10 4
A9 DQ4
20 3
A8 DQ3
19 7
A7 DQ2
18 6
A6 DQ1
17
A5
16
VDD A4
GND (+5V) 14
A3
13
A2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 12
A1
11
A0
INPUT
8
A0 - A9 ; ADDRESS WE
1
CAS ; COLUMN ADDRESS STROBE OE
9
OE ; OUTPUT ENABLE RAS
2
RAS ; ROW ADDRESS STROBE CAS
WE ; WRITE ENABLE

INPUT/OUTPUT
DQ1 - DQ4 ; DATA

RAS
TIMING
GENERATOR
TIMING
CAS GENERATOR

COLUMN
COLUMN WRITE
ADDRESS
DECODERS CLOCK WE
BUFFERS
GENERATOR
OE

INTERNAL REFRESH I/O OUTPUT


A0 - A9 SENSE
ADDRESS CONTROL SELECTOR BUFFERS
AMPS
COUNTER CLOCK
DQ1 -
DQ4
ROW
ROW WORD MEMORY INPUT
ADDRESS
DECODERS DRIVERS CELLS BUFFERS
BUFFERS

VDD

On-chip
VBB

GND

2-100 DME-3000/7000
IC

MSM518222-30JS(OKI)PLCC MX23C4000MC-12-DME3K(MACRONIX)FLAT PACKAGE

PALCE22V10H-25P(AMD)
PALCE22V10H-25PC/4(AMD/MONOLITHIC MEMORIES)

NJM78L05UA(JRC)+5 V(100 mA)


NJM78L05UA-TE1

POSITIVE VOLTAGE REGULATOR


-SIDE VIEW-

3 1
IN OUT
GND
2

OUT GND IN
1 2 3

DME-3000/7000 2-101
IC

P28F020-150(INTEL) RF5C15(RICOH)FLAT PACKAGE

2-102 DME-3000/7000
IC

SBX1601A(SONY) SBX1639-02(SONY)

8- OR 10-BIT PARALLEL-TO-SERIAL CONVERTER SERIAL DATA TRANSMISSION EQUALIZER AND RE-GENERATOR


—BOTTOM VIEW— —TOP VIEW—

INDEX 8
29 18
AIX SX
1 2 3 4 5 6 7 8 9 10 TTL/ECL DIY IN 1 24 FV IN 7 19
6 AIY SY
D9X(MSB)
36 37 11 7
D9Y DIX IN 2 23 DPR OUT 13
9
8 OFS PCK
35 12 D8X 12
9 SYN
D8Y ADS IN 3 NC 22 2
34 13 10 DIX
D7X 1 6
11 DIY CX
33 14 D7Y MON OUT 4 GND 21 4
12 MON
D6X 3
32 15 13 GND NC 20
ADS
D6Y 5 17
14 3 TN1
31 16 D5X SX 24
15 4 FV
D5Y SY CX OUT 6 19 SY OUT 23
30 17 16 DPR
D4X 11
17 RSE
29 18 D4Y AIY IN 7 18 SX OUT
18
D3X 14
28 27 26 25 24 23 22 21 20 19 19 TES
D3Y AIX IN 8 17 TN1 OUT
20
D2X
INPUT 21
D2Y OFS IN 9 VEE (-5V) 16
D9X-D0X, D9Y-D0Y ; PARALLEL DATA INPUTS 22 1 INPUT
D1X LST
PCX, PCY ; PARALLEL CLOCK INPUTS 23
D1Y 10 VEE (-5V) GND 15 ADS ; AERIAL DATA SELECT
FV ; VCO FREQ. ADJ. INPUT
24 34 (H:DIGITAL, L:ANALOG)
RSE ; VCO RANGE SELECT INPUT (H: HIGH RANGE) D0X(LSB) TE2
25 AIX, AIY ; EQUALIZER
TE1 ; TEST TERMINAL (LOW = TEST) D0Y RSE IN 11 14 TES IN
TTL/ECL ; VCC FOR INPUT LEVEL SELECT DIX, DIY ; SERIAL DATA
(+5V = TTL, GND = ECL) 30
PCX PCK
36
SYN OUT 12 13 PCK OUT FV ; VCO FREQ. ADJ.
OUTPUT 31 OFS ; AGC OFFSET ADJ.
PCY
LST ; PLL LOCK DETECT OUTPUT (H: LOCK)
RSE ; VCO RANGE SELECT
PCK ; PARALLEL CLOCK OUTPUT FV RSE TE1
SX, SY ; SERIAL DATA OUTPUTS (H:HIGH RANGE)
33 28 35
TE2 ; TEST TERMINAL TES ; TEST TERMINAL

VEE1 = –5V OUTPUT


VEE2 = –3.5V CX ; EQUALIZER DETECT (L: NO INPUT)
PIN PIN PIN PIN
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL DPR ; SERIAL DATA DETECT (L:NO INPUT)
No. No. No. No. MON ; EQUALIZER MONITOR
1 O LST 11 I D7Y 21 I D2Y 31 I PCY PCK ; PARALLEL CLOCK
2 — GND 12 I D6X 22 I D1X 32 — GND SX, SY ; SERIAL DATA
3 O SX 13 I D6Y 23 I D1Y 33 I FV SYN ; TRS DETECT
4 O SY 14 I D5X 24 I D0X(LSB) 34 O TE2 TN1 ; TEST TERMINAL
5 — GND 15 I D5Y 25 I D0Y 35 I TE1
6 I D9X(MSB) 16 I D4X 26 — VEE1 36 O PCK
7 I D9Y 17 I D4Y 27 — VEE2 37 — NC
8 I D8X 18 I D3X 28 I RSE
9 I D8Y 19 I D3Y 29 — TTL/ECL
10 I D7X 20 I D2X 30 I PCX TIMING 30 BIT
TIMING SHIFT DESCRAMBER
PCK DETECTOR REGISTOR
GENERATOR
12 NRZI
SYN
NRZ
14
TES
15
GND
5
GND
SBX1602A(SONY) 18
SX
8- OR 10-BIT SERIAL-TO-PARALLEL CONVERTER 10 DATA
VEE
—TOP VIEW— 16 DETECTOR
VEE
19
INDEX SY
9
(MSB)D9
1 2 3 4 5 6 7 8 9 10 10
D8
36 37 11 11
D7
12 8 AUTOMATIC
D6 AIX
35 12 33 13 CABLE INPUT DATA
DIX D5 AIY 7 EDGE PHASE 11
34 EQUALIZER SELECT DELAY VCO RSE
34 13 DIY D4 14 DETECTOR DETECTOR
D3 15 9
33 14 OFS
D2 16 6
CX
32 15 D1 17 4
MON
(LSB)D0 18 2
31 16 DIX
1
DIY
30 17 SX 4
SY 3
29 18 32
ADS PCK 19 3 17 21 23 24
28 27 26 25 24 23 22 21 20 19 DPR 35 ADS TN1 GND DPR FV

TN1 6
INPUT
ADS : SERIAL DATA SELECT INPUT (H : DIGITAL L : ANALOG)
AIX, AIY : EQUALIZER INPUTS SYN 20
DIX, DIY : SERIAL DATA INPUTS EVR 21
ESI : PLL SIGNAL INPUT 37
ESI ESO 1
OFS : AGC OFFSET ADJ. INPUT
FV : VCO FREQ. ADJ. INPUT
25 CX 29
RSE : VCO RANGE SELECT INPUT (H : HIGH RANGE)
26
AIY SC7S04F(MOTOROLA)CHIP PACKAGE
AIX MON 31
OUTPUT TC7S04F-TE85L
CX : EQUALIZER DETECT OUTPUT (L : NO INPUT)
FV OFS RSE
D9-D0 : PARALLEL DATA OUTPUTS
DPR : SERIAL DATA DETECT OUTPUT (L: NO INPUT ) 36 28 22 C-MOS INVERTER
ESO : TEST NODE PLL ERROR SIGNAL OUTPUT
(SCALE 6/1)
EVR : REFERENCE VOLTAGE FOR PARALLEL OUTPUT
MON : EQUALIZER MONITOR OUTPUT —TOP VIEW—
PCK : PARALLEL CLOCK OUTPUT
SX,SY : SERIAL DATA OUTPUTS 1 5 VDD 2 4
A Y = A Y
SYN : TRS DETECT OUTPUT VEE1, 3 = –5V 2
TN1 : TEST TERMINAL VEE2 = –3.5V
GND 3 4 Y=A
PIN PIN PIN PIN A Y
NO. I/O SIGNAL NO. I/O SIGNAL NO. I/O SIGNAL NO. I/O SIGNAL
0 1
1 O ESO 11 O D7 21 O EVR 31 O MON 1 0
2 — GND 12 O D6 22 I RSE 32 I ADS TYPE VDD 0 ; LOW LEVEL
3 O SY 13 O D5 23 — VEE3 33 I DIX 7S04F 1 ; HIGH LEVEL
4 O SX 14 O D4 24 — GND 34 I DIY 7SU04F +2 to +6V
5 — GND 15 O D3 25 I AIY 35 O DPR 7SU04FU
6 O TN1 16 O D2 26 I A IX 36 I FV 4S69F
7 — VEE1 17 O D1 27 — GND 37 I ESI +3 to +18V
4SU69F
8 — VEE2 18 O D0 (LSB) 28 I OFS 7SH04FU +2 to +5.5V
9 O D9 (MSB) 19 O PCK 29 O CX
10 O D8 20 O SYN 30 — GND

DME-3000/7000 2-103
IC

SCI7701YJA(SEIKO I&E) SN74HC125ANS(TI)FLAT PACKAGE


SCI7701YJA-T1 SN74HC125ANS-E05
C-MOS VOLTAGE DETECTOR C-MOS BUS BUFFER GATES WITH 3-STATE OUTPUT
—SIDE VIEW— - TOP VIEW -

14 13 12 11 10 9 8 G
V DD A Y

1 2 3
G A Y
0 0 0
VDD
0 1 1
2
1 X HI-Z
GND
OUT – 0 ; LOW LEVEL
1 1 2 3 4 5 6 7
+ 1 ; HIGH LEVEL
X ; DON'T CARE
NOTE : HI-Z ; HIGH IMPEDANCE
VREF

TYPE V DD
TC74AC/
VSS +2 to +5.5V
3 TC74VHC
LVT +2.7 to +3.6V
OTHER TYPES +2 to +6V
VDD = +1.5 V to +10.0 V

SN74ALS163BNS(TI)FLAT PACKAGE SN74HC138ANS(TI)FLAT PACKAGE


SN74ALS163BNS-E05 SN74HC138ANS-E05

TTL PRESETTABLE SYNCHRONOUS 4-BIT BINARY COUNTER C-MOS 3-TO-8 LINE DECODER / DEMULTIPLEXER
-TOP VIEW- —TOP VIEW—

1 15
A Y0
VCC A IN 1 VDD 16 2 14
RD (RESET) IN 1 (+5V) 16 B Y1
3 13
C Y2
CK (CLOCK) IN 2 15 CO (CARRY OUT) B IN 2 15 Y0 OUT 12
Y3
9 11
4 Y4
A (DATA A) IN 3 14 QA OUT LD C IN 3 14 Y1 OUT EN1 10
3 14 Y5
A QA 5
4 13 EN2 EN 9
B QB Y6
B (DATA B) IN 4 13 QB OUT EN1 IN 4 13 Y2 OUT 6 7
5 12 EN3 Y7
C QC
6 11
D QD
C (DATA C) IN 5 12 QC OUT EN2 IN 5 12 Y3 OUT

2 INPUTS OUTPUTS
D (DATA D) IN 6 11 QD OUT EN3 IN 6 11 Y4 OUT EN C B A Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0
7 15
0 X X X 1 1 1 1 1 1 1 1
ENP CO
ENP (ENABLE P) IN 7 10 ENT (ENABLE T) IN Y7 OUT 7 10 Y5 OUT 1 0 0 0 1 1 1 1 1 1 1 0
10
ENT 1 0 0 1 1 1 1 1 1 1 0 1
RD
8 GND 9 LD (LOAD) IN 8 GND 9 Y6 OUT 1 0 1 0 1 1 1 1 1 0 1 1
1
1 0 1 1 1 1 1 1 0 1 1 1
1 1 0 0 1 1 1 0 1 1 1 1
MODE SELECTION COUNT SEQUENCE 1 1 0 1 1 1 0 1 1 1 1 1
NOTE:
CONTROL INPUTS OUTPUTS 1 1 1 0 1 0 1 1 1 1 1 1
MODE COUNT TYPE VDD
RD LD ENP ENT QD QC QB QA 1 1 1 1 0 1 1 1 1 1 1 1
74HCT138 TYPE +5V
RESET 0 0 0 0 0 74ACT138 TYPE +4.5 to +5.5V EN = EN1 • EN2 • EN3 0 ; LOW LEVEL
0 X X X (SYNCHRONOUS) 1 0 0 0 1 TC74AC138 TYPE 1 ; HIGH LEVEL
2 0 0 1 0 +2 to +5.5V X ; DON'T CARE
PRESET TC74VHC138
1 0 X X (SYNCHRONOUS) 3 0 0 1 1 OTHER TYPES +2 to +6V
1 1 0 X NO COUNT 4 0 1 0 0
1 1 X 0 NO COUNT 5 0 1 0 1
1 1 1 1 COUNT 6 0 1 1 0
0 ; LOW LEVEL 7 0 1 1 1
1 ; HIGH LEVEL 8 1 0 0 0
X ; DON'T CARE 9 1 0 0 1
10 1 0 1 0
CARRY OUTPUT "CO"
QA 11 1 0 1 1 SN74HC157ANS(TI)FLAT PACKAGE
QB 12 1 1 0 0
QC CO TC74VHC157FS(TOSHIBA)FLAT PACKAGE(SMALL)
QD 13 1 1 0 1
ENT 14 1 1 1 0 SN74HC157ANS-E05
CO IS HIGH WHEN ENT INPUT IS
15 1 1 1 1 TC74VHC157FS(EL)
HIGH AND COUNT IS "15".
C-MOS QUAD 2-LINE-TO-1-LINE DATA SELECTOR/ MULTIPLEXER
—TOP VIEW—

INH Y0 Y1 YC X0 X1 XC 2 V0
IN IN IN OUT IN IN OUT VC 4
3 V1
16 15 14 13 12 11 10 9
VDD
SN74AS21NS(TI)FLAT PACKAGE 1 1 5 W0
0 0 6 W1 WC 7
SN74AS21NS-E05
0 0
1 1
11 X0
10 X1 XC 9
GND
1 2 3 4 5 6 7 8
A V0 V1 VC W0 W1 WC 14 Y0
IN IN IN OUT IN IN OUT 13 Y1 YC 12

A INH
1 15
NOTE:
TYPE VDD
74ACT/74FCT +5V CONT.IN ON
TC74AC157P INH A CHANNEL
+2 to +5.5V
TC74AC157 0 0 0
0 ; LOW LEVEL
TC40H +2 to +8V 0 1 1 1 ; HIGH LEVEL
OTHER TYPES +2 to +6V 1 X GND X ; DON'T CARE

2-104 DME-3000/7000
IC

SN74HC166ANS(TI)FLAT PACKAGE SN74HC251ANS(TI)FLAT PACKAGE


SN74HC166ANS-E05 SN74HC251ANS-E05

C-MOS 8-BIT SHIFT REGISTER C-MOS 8-LINE-TO-1-LINE DATA SELECTOR/MULTIPLEXER


—TOP VIEW— WITH 3-STATE OUTPUT
—TOP VIEW—
1
DS
DS IN 1 VDD 16 2 4 Y0
P1
Y3 IN 1 VDD 16 3 Y1
3 (+2 to +6 V)
P2
P1 IN 2 15 S/P IN 2 Y2
4
P3
Y2 IN 2 15 Y4 IN 1 Y3 YC 5
5 13
P4 Q8
P2 IN 3 14 P8 IN 10 15 Y4
P5
Y1 IN 3 14 Y5 IN 14 Y5 YC 6
11
P6
P3 IN 4 13 Q8 OUT 12 13 Y6
P7
Y0 IN 4 13 Y6 IN 12 Y7
14
P8
P4 IN 5 12 P7 IN
6
YC OUT 5 12 Y7 IN A B C INH
7
CKA IN 6 11 P6 IN 11 10 9 7
S/P RD
(CLOCK) YC OUT 6 11 A IN
15 9
CKB IN 7 10 P5 IN
(CLOCK) DS ; DATA SERIAL INPUT INH IN 7 10 B IN
P1-P8 ; DATA PARALLEL INPUT
8 GND 9 RD IN
(RESET) CK ; CLOCK 8 GND 9 C IN CONTROL IN OUTPUT
C B A INH YC YC
P1 P2 P3 P7 P8 X X X 1 HI-Z HI-Z
2 3 4 12 14 0 0 0 0 Y0 Y0
15
S/P
0 0 1 0 Y1 Y1
D D D D D 13
1 Q Q8 0 1 0 0 Y2 Y2
DS Q Q Q Q
0 1 1 0 Y3 Y3
RD RD RD RD RD 1 0 0 0 Y4 Y4
6
CKA
7 1 0 1 0 Y5 Y5
CKB
RD
9 1 1 0 0 Y6 Y6
1 1 1 0 Y7 Y7

CKA CKB CK INPUT OUTPUT NOTE: 0 ; LOW LEVEL


0 0 0 RD S/P CK DS P1-P8 Q8 TYPE VDD 1 ; HIGH LEVEL
TC40H +2 to +8 V X ; DON'T CARE
X 1 1 0 X X X X 0
OTHERS +2 to +6 V HI-Z ; HIGH IMPEDANCE
1 X 1 1 X 0 X X Q8o
1 1 1 0 X 1-8 8
1 1 1 1 1 X Q7n
0 1 1 0 X Q7n
0 1 X X X A8o
0 ; LOW LEVEL
1 ; HIGH LEVEL
X ; DON'T CARE
SN74HC273ANS(TI)FLAT PACKAGE
TC74VHC273F(TOSHIBA)FLAT PACKAGE
SN74HC273ANS-E05
TC74VHC273F(EL)

C-MOS OCTAL D-TYPE FLIP-FLOPS WITH RESET


SN74HC175ANS(TI)FLAT PACKAGE —TOP VIEW—

SN74HC175ANS-E05 3 2 EACH FLIP-FLOP


D1 Q1
RD 1 VDD 20 4 5 INPUTS OUT
D2 Q2
C-MOS QUAD D-TYPE FLIP-FLOPS WITH RESET 7
D3 Q3
6 RD CK D Q
—TOP VIEW— Q1 2 19 Q8 8 9 0 X X 0
D4 Q4
13 12 1 0 0
Q4 Q4 D4 D3 Q3 Q3 CK D5 Q5
D1 3 18 D8 14 15 1 1 1
16 15 14 13 12 11 10 9 2 RD CK D Q Q D6 Q6
4 Q1 17 16 1 0 X Qo
VDD D1 3 0 X X 0 1 D7 Q7
Q Q Q Q Q1 D2 4 17 D7
RD RD 5 7
1 1 1 0
18
D8 Q8
19 0 ; LOW LEVEL
D2 Q2
D D 6 11 1 ; HIGH LEVEL
12 Q2
10 1 0 0 1
D3 Q3 Q2 5 16 Q7 RD X ; DON'T CARE
13
11 1 0 X Q0 Q0 1 Qo ; NO CHANGE
D4 Q3
D D 15
RD Q4
RD 9 14 Q3 6 15 Q6
Q Q Q Q Q4 0 ; LOW LEVEL
GND RD 1 ; HIGH LEVEL D3 7 14 D6
1 2 3 4 5 6 7 8 1 X ; DON'T CARE 3 2 4 5 7 6 8 9 13 12 14 15 17 16 18 19
RD Q1 Q1 D1 D2 Q2 Q2 Q0 ; NO CHANGE D4 8 13 D5 D Q D Q
Q0 ; NO CHANGE RD RD
NOTE: Q4 9 12 Q5 11
CK
TYPE VDD
1
10 GND 11 CK RD
AC TYPE +2V to +5.5V
74ACT175 TYPE +4.5V to 5.5V
OTHER TYPES +2V to 6V
NOTE:
TYPE VDD
AC
+2 to +6 V
HC
VHC +2 to +5.5 V

TL431CM(MOTOROLA)FLAT PACKAGE

DME-3000/7000 2-105
IC

SN74HC4020ANS(TI)FLAT PACKAGE SN74HC573BNS(TI)FLAT PACKAGE


SN74HC4020ANS-E05 TC74AC573F(TOSHIBA)FLAT PACKAGE
SN74HC573BNS-E05
C-MOS 14-STAG RIPPLE-CARRY BINARY COUNTER/DRIVER
—TOP VIEW— C-MOS 3-STATE OUTPUTS OCTAL LATCHES
—TOP VIEW—
9
Q0
Q11 OUT 1 *VDD 16 Q3
7 2
D1 Q1
19

5 OE IN 1 VDD 20 3 18 INPUTS OUT


Q4 D2 Q2
Q12 OUT 2 15 Q10 OUT 4 4 17 OE CK D Q
Q5 D3 Q3
6 D1 IN 2 19 Q1 OUT 5 16 0 1 1 1
Q6 D4 Q4
Q13 OUT 3 14 Q9 OUT 13 6 15 0 1 0 0
Q7 D5 Q5
10 12 D2 IN 3 18 Q2 OUT 7 14 0 0 X QO
Q8 D6 Q6
Q5 OUT 4 13 Q7 OUT 14 8 13 1 X X HI-Z
Q9 D7 Q7
15 D3 IN 4 17 Q3 OUT 9 12
Q10 D8 Q8 0 ; LOW LEVEL
Q4 OUT 5 12 Q8 OUT 1 11 1 ; HIGH LEVEL
Q11
2 D4 IN 5 16 Q4 OUT OE X ; DON'T CARE
Q12
Q6 OUT 6 11 RD IN 3 1 HI-Z ; HIGH IMPEDANCE
Q13
RD D5 IN 6 15 Q5 OUT QO ; NO CHANGE
Q3 OUT 7 10 CK IN 11
*
TYPE VDD D6 IN 7 14 Q6 OUT
8 GND 9 Q0 OUT HC4020 +2 to +6V
14020, 4020, 84020 +3 to +18V D7 IN 8 13 Q7 OUT
D1 Q1 D2 Q2 D3 Q3 D4 Q4 D5 Q5 D6 Q6 D7 Q7 D8 Q8
2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12
D8 IN 9 12 Q8 OUT
BINARY OUTPUTS D Q D Q
COUNT
Q13 Q12 Q11 Q10 Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q0 10 GND 11 CK IN
0 0000 0 0 0 0 0 0 0 0 0 0 0 0
OE OE
1 0001 0 0 0 0 0 0 0 0 0 0 0 1 CK
11
2 0002 0 0 0 0 0 0 0 0 0 0 0 0 1
OE
3 0003 0 0 0 0 0 0 0 0 0 0 0 1 NOTE :
4 0004 0 0 0 0 0 0 0 0 0 0 0 0 TYPE VDD
•••

•••

•••

•••

•••

•••

•••

•••

•••

•••

•••

•••

•••

•••

AC
16380 4FFC 1 1 1 1 1 1 1 1 1 1 1 0 +2 to +6V
HC
16381 4FFD 1 1 1 1 1 1 1 1 1 1 1 1 RD Q13-Q0
ABT
16382 4FFE 1 1 1 1 1 1 1 1 1 1 1 0 1 ALL LOW
ACT +5V
16383 4FFF 1 1 1 1 1 1 1 1 1 1 1 1 0 COUNT
HCT
IN HEXADECIMAL 0 ; LOW LEVEL TC74AC573 +2 to +5.5V
IN DECIMAL 1 ; HIGH LEVEL

Q0 Q3 Q12
H 9 H H H 7 H 2 H
3
J Q J Q J Q J Q J Q J Q Q13
10
CK
K RD K RD K RD K RD K K RD

H H H H H H
RD
11 SN74LS123NS(TI)FLAT PACKAGE
SN74LS123NS-E05

TTL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS WITH DIRECT RESET


—TOP VIEW—

R C
VCC RD B A
SN74HC4040ANS(TI)FLAT PACKAGE 16 15 14 13 12 11 10 9 INPUTS OUTPUTS
SN74HC4040ANS-E05 VCC
(+5V)
RD A B Q Q
0 X X 0 1
Q Q RD X 1 X 0
C-MOS 12-STAGE RIPPLE CARRY BINARY COUNTER/DRIVER 1
-TOP VIEW- X X 0 0 1
Q Q
RD 1 0 0 ; LOW LEVEL
1 1 1 ; HIGH LEVEL
VDD
Q11 1 (+2 to +6V) 16 GND 0 1 X ; DON'T CARE
1 2 3 4 5 6 7 8
Q5 2 15 Q10 9 A B RD VCC
Q0 C R OUTPUT PULSE WIDTH
7
Q1
Q4 3 14 Q9 6 VCC
Q2
5 6 7 R
'123 ;TW=0.28 (1+ 700
R ) CR
Q3 C
Q6 4 13 Q7 3 C CR
9
Q4
10
Q 5 'L123;TW=0.33 (1+ 700
R ) CR
2
10 Q5
Q3 5 12 Q8 4 12 VCC
Q6 Q
13 RD R
Q2 6 11 RD
Q7
12
C '123 ;TW=0.25 (1+ 700
R ) CR
Q8 11
14
Q9 'L123;TW=0.29 (1+ 700
R ) CR
Q1 7 10 CK 15
Q10
Q11
1 VCC
8 GND 9 Q0 RD 14 15
C CR C R
11 1
Q 13 'LS123;TW=0.45CR
2
4
Q
Q0 Q1 Q2 Q3 ----------- Q10 Q11 RD
9 7 6 5 --------------- 15 1
H H H H H H
J Q J Q J Q J Q J Q J Q 3
10
CK 1 2 3 4 5----11 12
K RD K RD K RD K RD K K RD

11 H H H H H H
RD

COUNT Q11 Q10 Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 RD Q11--------Q0


0 0 0 0 0 0 0 0 0 0 0 0 0 1 ALL LOW
1 0 0 0 0 0 0 0 0 0 0 0 1 0 COUNT
2 0 0 0 0 0 0 0 0 0 0 1 0
3 0 0 0 0 0 0 0 0 0 0 1 1

0 ; LOW LEVEL
4095 1 1 1 1 1 1 1 1 1 1 1 1 1 ; HIGH LEVEL

2-106 DME-3000/7000
IC

SN74LS30NS(TI)FLAT PACKAGE SN75ALS194N(TI)


SN74LS30NS-E05
QUAD RS-422 LINE DRIVER WITH 3-STATE OUTPUTS
—TOP VIEW—

2
A IN 1 VCC (+5 V) 16 1 A OUT
A IN 3
A OUT
A OUT 2 15 D IN
4
A/B IN
A OUT 3 14 D OUT
6
7 B OUT
B IN 5
A/B IN 4 13 D OUT B OUT

10
B OUT 5 12 C/D IN 9 C OUT
C IN 11
C OUT

B OUT 6 11 C OUT
12
C/D IN

B IN 7 10 C OUT
14
15 D OUT
D IN 13
8 9 C IN D OUT
GND

A, B, C, D A/B, C/D A, B, C, D A, B, C, D
SN74LS38NS(TI)FLAT PACKAGE IN IN OUT OUT
SN74LS38NS-E05 0 0 0 1
1 0 1 0
X 1 HI-Z HI-Z
0 ; LOW LEVEL X ; DON'T CARE
1 ; HIGH LEVEL HI-Z ; HIGH IMPEDANCE

SN75ALS195J(TI)
QUAD RS-422/423 LINE RECEIVER WITH 3-STATE OUTPUTS
—TOP VIEW—

EN
B/D
INPUTS IN INPUTS
B OUTPUT OUTPUT D
B D
16 15 14 13 12 11 10 9
VCC
(+5 V)
SN74LS684NS(TI)FLAT PACKAGE
SN74LS684NS-E05

GND
1 2 3 4 5 6 7 8
OUTPUT OUTPUT
INPUTS A EN C INPUTS
A A/C C
IN

TC4S11F(TOSHIBA)CHIP PACKAGE
TC4S11F(TE85R)
C-MOS 2-INPUT NAND GATE
— TOP VIEW —

(SCALE 6/1)
1 5 VDD 2
A 4 A
1 Y = Y
2 B B

GND 3 4 Y=A•B=A+B
A B Y
0 0 1
0 1 1
1 0 1 0 ; LOW LEVEL
1 1 0 1 ; HIGH LEVEL

TYPE VDD
7S00F
+2 to +6 V
7S00FU
4S11F
+3 to +18 V
4SU11F
7SH00FU +2 to +5.5 V

DME-3000/7000 2-107
IC

TC4S584F(TOSHIBA)FLAT PACKAGE TC528126BJ-10(TOSHIBA)PLCC PACKAGE


TC4S584F-TE85L

TC4S66F(TOSHIBA)CHIP PACKAGE
TC4S66F-TE85L
C-MOS BILATERAL ANALOG SWITCH
—TOP VIEW—

(SCALE 6/1)
CONT
1 5 VDD 4
(+3 V to +18 V)
2 1 2
IN/OUT OUT/IN
GND 3 4

CONT SWITCH
0 OFF 0 ; LOW LEVEL
1 ON 1 ; HIGH LEVEL

TC74HC123AF(TOSHIBA)FLAT PACKAGE
TC74VHC123AF(TOSHIBA)FLAT PACKAGE
TC74VHC123AF(EL)

C-MOS DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS


—TOP VIEW—

R C
VDD
Q Q RD B A INPUT OUTPUT
16 15 14 13 12 11 10 9 RD A B Q Q
VDD 0 X X 0 1
RD
1 1 X 0 1
Q Q 1 X 0 0 1
1 0 0 ; LOW LEVEL
Q Q 1 1 ; HIGH LEVEL
RD 1
0 1 X ; DON'T CARE
GND
OUTPUT PULSE WIDTH = 0.46 CR
1 2 3 4 5 6 7 8
A B RD Q Q
VDD
C R

14 15 6 7 NOTE :
C CR 13 C CR 5
TYPE VDD
1 Q 9 Q
TC74HC123AF +5V
2 10
4 12 OTHER TYPES +2V to +6V
Q Q
RD RD
3 11

TC74VHC132F(TOSHIBA)FLAT PACKAGE
TC74VHC132F(EL)
C-MOS 2-INPUT NAND SCHMITT TRIGGER
—TOP VIEW—

14 13 12 11 10 9 8 A A
Y= Y
VDD B B
(+2 to +6 V)
Y=A·B=A+B
A B Y
0 0 1
0 1 1
1 0 1 0 ; LOW LEVEL
GND 1 1 0 1 ; HIGH LEVEL
1 2 3 4 5 6 7

NOTE:
TYPE VDD
HC +2 to +6 V
VHC +2 to +5.5 V

2-108 DME-3000/7000
IC

TC551664AJ-20(TOSHIBA) TC74HC221AF(TOSHIBA)FLAT PACKAGE


C-MOS 1M(65,536X16)-BIT STATIC RAM TC74HC221AF-TP2
-TOP VIEW-
C-MOS MONOSTABLE MULTIVIBRATOR WITH SCHMITT TRIGGER INPUT
—TOP VIEW—
A4 1 44 A5 5 7
A0 I/O 1 R C
4 8 VDD
A3 2 43 A6 A1 I/O 2 RD B A
3 9 INPUTS OUTPUTS
A2 I/O 3 16 15 14 13 12 11 10 9
A2 3 42 A7 2 10 RD A B Q Q
A3 I/O 1
1 13 VDD
A1 4 41 OE A4 I/O 5 (+2 to +6V) 0 X X 0 1
44 14 RD X 1 X 0 1
A5 I/O 6 Q
A0 5 40 UB 43 15 Q
A6 I/O 7 X X 0 0 1
42 16 1 0
CE 6 39 LB A7 I/O 8 0 ; LOW LEVEL
27 29 Q
Q
1 1
A8 I/O 9 RD 1 ; HIGH LEVEL
I/O1 7 38 I/O16 26 30 0 1 X ; DON'T CARE
A9 I/O10
25 31
I/O2 8 37 I/O15 A10 I/O11 GND OUTPUT PULSE WIDTH = 0.7CR
24 32
A11 I/O12 1 2 3 4 5 6 7 8
I/O3 9 36 I/O14 21 35
A12 I/O13 A B RD
20 36 VDD
I/O4 10 35 I/O13 A13 I/O14
C R
19 37
A14 I/O15
11 VDD(+5V) GND 34 18 38
A15 I/O16
12 GND VDD(+5V) 33

I/O5 13 32 I/O12 40
UB
39
I/O6 14 31 I/O11 LE

I/O7 15 30 I/O10 OE WE CE

I/O8 16 29 I/O9
41 17 6 TC74HC238AF(TOSHIBA)FLAT PACKAGE
WE 17 NC 28 C-MOS 3-TO-8 LINE DECODER/DEMULTIPLEXER
A0~A15 : ADDRESS INPUTS —TOP VIEW—
A15 18 27 A8
I/O1~I/O16 : DATA INPUTS/OUTPUTS
A14 19 26 A9 CE : CHIP ENABLE INPUT 1 15
VDD A Y0
WE : WRITE ENABLE INPUT A IN 1 16 2 14
A13 20 25 A10 (+2 V to +6 V) B Y1
OE : OUTPUT BUFFER CONTROL INPUT 3 13
C Y2
A12 21 24 A11 LB,UB : DATA BIT CONTROL INPUT B IN 2 15 Y0 OUT 12
Y3
11
22 NC NC 23 Y4
C IN 3 14 Y1 OUT 4 10
EN1 Y5
5 9
EN2 EN Y6
EN1 IN 4 13 Y2 OUT 6 7
EN3 Y7

EN2 IN 5 12 Y3 OUT
INPUT OUTPUT
A10 EN3 IN 6 11 Y4 OUT EN C B A Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0
A9
A8
VDD 0 X X X 0 0 0 0 0 0 0 0
ROW
A7 ROW MEMORY Y7 OUT 7 10 Y5 OUT 1 0 0 0 0 0 0 0 0 0 0 1
A6 ADDRESS GND
A5 BUFFER DECODER ARRAY 1 0 0 1 0 0 0 0 0 0 1 0
A4 8 GND 9 Y6 OUT 1 0 1 0 0 0 0 0 0 1 0 0
A3 256X256X16
(1,048,576) I/O 1
1 0 1 1 0 0 0 0 1 0 0 0
CE I/O 2 1 1 0 0 0 0 0 1 0 0 0 0
DATA DATA I/O 3
I/O 4 1 1 0 1 0 0 1 0 0 0 0 0
INPUT OUTPUT I/O 5 1 1 1 0 0 1 0 0 0 0 0 0
BUFFER BUFFER I/O 6
I/O 7 1 1 1 1 1 0 0 0 0 0 0 0
I/O 8
SENSE AMP EN = EN1 · EN2 · EN3 0 ; LOW LEVEL
I/O 9 1 ; HIGH LEVEL
I/O10
I/O11 X ; DON'T CARE
DATA DATA I/O12
INPUT OUTPUT I/O13
COLUMN
BUFFER BUFFER I/O14
DECODER I/O15
I/O16
COLUMN ADDRESS CE
BUFFER

CLOCK
GENER ATOR TC74VHC14F(TOSHIBA)FLAT PACKAGE
A0
A1
A2 A12 A14
A11 A13 A15 TC74VHC14F(EL)
C-MOS HEX SCHMITT TRIGGER INVERTERS
—TOP VIEW—

A Y= A Y
14 13 12 11 10 9 8
V IN V OUT
VDD
WE V OUT
Y=A VDD VN VP
2.0V 0.75V 1.25V
OE
A Y 4.5V 1.9V 2.7V
0 1 6.0V 2.6V 3.6V
UB
1 0
LB GND 0 ; LOW LEVEL V IN
1 2 3 4 5 6 7 1 ; HIGH LEVEL VN VP
CE CE
NOTE :
TYPE VDD
TC74AC/VHC +2V to +5.5V
OTHER TYPES +2V to +6V

DME-3000/7000 2-109
IC

TC74HC590AF(TOSHIBA) TC74VHC21F(TOSHIBA)FLAT PACKAGE


TC74VHC21F(EL)
***********
C-MOS DUAL 4-INPUT POSITIVE AND GATE
—TOP VIEW—

14 13 12 11 10 9 8 A A
VDD NC B B
Y= Y
C C
D D
Y=A•B•C•D=A+B+C+D

A B C D Y
0 0 0 0 0
NC GND 0 0 0 1 0
1 2 3 4 5 6 7 0 0 1 0 0
0 0 1 1 0
0 1 0 0 0

1 1 0 1 0
NOTE:
TYPE VDD 1 1 1 0 0
HC +2V to + 6V 1 1 1 1 1
VHC +2V to + 5.5V 0 ; LOW LEVEL
1 ; HIGH LEVEL

TC74VHC367F(TOSHIBA)FLAT PACKAGE
TC74VHC367F(EL)

C-MOS BUS DRIVER WITH 3-STATE OUTPUTS


- TOP VIEW -

16 15 14 13 12 11 10 9 G
V DD A Y

G A Y
0 0 0
0 1 1
1 X HI-Z
GND 0 ; LOW LEVEL
1 2 3 4 5 6 7 8 1 ; HIGH LEVEL
X ; DON'T CARE
2 3 2 3 HI-Z ; HIGH IMPEDANCE
4 5 4 5
NOTE :
6 7 6 7
TYPE V DD
10 9 OR 10 9
TC74AC/TC74VHC +2 to +5.5V
12 11 G
OTHER TYPES +2 to +6V
14 13 1
G1 G2
1 15 12 11
TC74HC688AF(TOSHIBA)FLAT PACKAGE 14 13
TC74HC688AF-TP2 G
15

TC74VHC368FS(TOSHIBA)FLAT PACKAGE
TC74VHC368FS(EL)

C-MOS BUS INVERTER WITH 3-STATE OUTPUTS


—TOP VIEW—

16 15 14 13 12 11 10 9 G
VDD A Y

G A Y
0 0 1
0 1 0
1 X HI-Z
GND
0 ; LOW LEVEL
1 2 3 4 5 6 7 8 1 ; HIGH LEVEL
X ; DON'T CARE
HI-Z; HIGH IMPEDANCE

2 3 2 3
4 5 4 5
NOTE:
6 7 6 7
TYPE VDD
10 9 OR 10 9
HC +2 to +6 V
12 11 G
VHC +2 to +5.5 V
14 13 1
G1 G2
1 15 12 11
14 13
G
15

2-110 DME-3000/7000
IC

TD62104F(TOSHIBA)FLAT PACKAGE TMS27C512-15JL(TI)

TL082M(TI)
TL082CPS-E05
OPERATIONAL AMPLIFIER
(J FET INPUT)
—TOP VIEW—

1 VDD 8
(+1.5 to +18V)

2 –+ 7

3 +– 6

4 VEE 5
(–18 to –1.5V)

TL084CNS(TI)FLAT PACKAGE
TL084CNS-E05
OPERATIONAL AMPLIFIER
(J FET INPUT)
—TOP VIEW—

14 13 12 11 10 9 8
VEE
(–15V)
– –
+

+
+

– VCC –
(+15V)

1 2 3 4 5 6 7

TL7705CPS-B(TI)FLAT PACKAGE
TL7705CPS-B-E05

POWER VOLTAGE SUPERVISOR


—TOP VIEW—

7 1
VCC SENSE VREF
VREF OUT 1 (+3 to +18V) 8
2 6
RESIN OUT(1)
RESIN IN 2 7 SENSE IN 5
OUT(2)
3
CT
CT IN 3 6 OUT(1) UPC814G2-1(NEC)FLAT PACKAGE
4 GND 5 OUT(2)

REF 1
+2.5V VCC

* 5

6
*

*OPEN COLLECTOR

DME-3000/7000 2-111
IC

TMS320C31PQL(TI)

2-112 DME-3000/7000
IC

TMS418160-60DZ(TI) TMS44400P-70DJ(TI)J LEAD PACKAGE


C-MOS 16M(1,048,576X16)-BIT HIGH SPEED DYNAMIC RAM TMS44400P-70DJ-E10
IL11
-TOP VIEW-
C-MOS 4M (1,048,576X4)-BIT DYNAMIC RAM WITH SELF-REFRESH
17 2 – TOP VIEW –
A0 DQ 0
1 VDD(+5V) GND 42 18 3
A1 DQ 1
19 4 5 25
DQ0 2 41 DQ15 A2 DQ 2 A9 DQ4
20 5 DQ1 I/O 1 GND 26 18 24
A3 DQ 3 A8 DQ3
DQ1 3 40 DQ14 23 7 17 2
A4 DQ 4 A7 DQ2
24 8 DQ2 I/O 2 25 DQ4 I/O 16 1
DQ2 4 39 DQ13 A5 DQ 5 A6 DQ1
25 9 15
A6 DQ 6 A5
DQ3 5 38 DQ12 26 10 W IN 3 24 DQ3 I/O 14
A7 DQ 7 A4
27 33 12
6 VDD(+5V) GND 37 A8 DQ 8 A3
26 34 RAS IN 4 23 CAS IN 11
A9 DQ 9 A2
DQ4 7 36 DQ11 35 10
DQ10 A1
36 A9 IN 5 22 OE IN 9
DQ5 8 35 DQ10 DQ11 A0
30 38
UCAS DQ12
DQ6 9 34 DQ9 31 39 3
LCAS DQ13 W
14 40 4
DQ7 10 33 DQ8 RAS DQ14 RAS
41 A0 IN 9 18 A8 IN 23
DQ15 CAS
11 NC NC 32 22
OE
A1 IN 10 17 A7 IN
12 NC 31 LCAS

W 13 30 UCAS A2 IN 11 16 A6 IN INPUT
A0 - A9 ; ADDRESS
RAS 14 29 OE A3 IN 12 15 A5 IN CAS ; COLUMN ADDRESS STROBE
OE ; OUTPUT ENABLE
15 NC 28 A9
RAS ; ROW ADDRESS STROBE
OE W 13 VDD (+5 V) 14 A4 IN
16 NC 27 A8 W ; WRITE ENABLE
29 13
A0 17 26 A7 INPUT/OUTPUT
DQ1 - DQ4 ; DATA
A1 18 25 A6 A0~A9 : ADDRESS INPUTS
DQ0~DQ15 : DATA INPUTS/OUTPUTS
A2 19 24 A5
LCAS,UCAS : COLUMN ADDRESS CONTROL INPUTS
A3 20 23 A4 RAS : ROW ADDRESS CONTROL INPUT
OE : OUTPUT ENABLE INPUT
21 VDD(+5V) GND 22
W : WRITE ENABLE INPUT

WS57C49C-35S(WAFERSCALE)

RAS UCAS LCAS W OE

TIMING & CONTROL

A0 COLUMN COLUMN DECODER


A1 ADDRESS
A2 BUFFER
SENSE AMP
A3
A4 256K ARRAY ROW 256K ARRAY
A5 256K ARRAY DECODER 256K ARRAY
A6 • •
A7 • •
A8 • • I/O DATA INPUT
A9 • • BUFFER REGISTER

ROW
ADDRESS
BUFFER DATA OUTPUT
REGISTER

DQ0–DQ15

256K ARRAY 256K ARRAY

DME-3000/7000 2-113
IC

TMS4C2970-28DT(TI) UPD42101G-3(NEC)FLAT PACKAGE


TMS4C2970-28DTR UPD42101G-3-E1

C-MOS 2.9M (245760 WORD x 12) BIT FIELD MEMORY C-MOS 7K (910 x 8)-BIT FIFO MEMORY
—TOP VIEW—
- TOP VIEW -

24 1
D0 Q0
13 24 Q0 OUT 1 24 D0 IN 23 2
D1 Q1
1 GND GND 36 D0 Q0 22 3
12 25 D2 Q2
D1 Q1 Q1 OUT 2 23 D1 IN 21 4
11 26 D3 Q3
D11 2 35 Q11 D2 Q2 16 9
10 27 D4 Q4
D3 Q3 Q2 OUT 3 22 D2 IN 15 10
9 28 D5 Q5
D10 3 34 Q10 D4 Q4 14 11
8 29 D6 Q6
D5 Q5 Q3 OUT 4 21 D3 IN 13 12
7 30 D7 Q7
D9 4 33 Q9 D6 Q6
6 31
D7 Q7 RE IN 5 20 WE IN 8
5 32 RCK
D8 5 32 Q8 D8 Q8 17
4 33 WCK
D9 Q9 RSTR IN 6 19 RSTW IN
3 34
D7 6 31 Q7 D10 Q10 19
2 35 RSTW
D11 Q11 7 GND VDD (+5V) 18 6
RSTR
D6 7 30 Q6
14
SWCK RCK IN 8 17 WCK IN RE WE
23
D5 8 29 Q5 SRCK 5 20
15
RSTW Q4 OUT 9 16 D4 IN
22
D4 9 28 Q4 RSTR D0 –D7 ; DATA INPUTS
WE

Q0 –Q7 ; DATA OUTPUTS


OE
RE

Q5 OUT 10 15 D5 IN
IE

D3 10 27 Q3 WCK ; WRITE CLOCK INPUT


16
17
20
21

RCK ; READ CLOCK INPUT


Q6 OUT 11 14 D6 IN WE ; WRITE ENABLE INPUT
D2 11 26 Q2 RE ; READ ENABLE INPUT
INPUT Q7 OUT 12 13 D7 IN RSTW ; RESET WRITE INPUT
D0-D11 ; DATA INPUT RSTR ; RESET READ INPUT
D1 12 25 Q1
IE ; INPUT ENABLE
D0 13 24 Q0 OE ; OUTPUT ENABLE
RE ; READ ENABLE WCK
17
WRITE ADDRESS 19
RSTR ; RESET READ RSTW
SWCK 14 23 SRCK 20 POINTER
WE
RSTW ; RESET WRITE
RSTW 15 22 RSTR SRCK ; SERIAL READ CLOCK 24 1
D0 Q0
SWCK ; SERIAL WRITE CLOCK 23 2

OUTPUT BUFFER
D1 Q1

INPUT BUFFER
WE 16 21 RE WE ; WRITE ENABLE 22 3
D2 7280-BIT Q2
OUTPUT 21 4
D3 (910 x 8) Q3
Q0-Q11 ; DATA OUTPUT 16 9
IE 17 20 OE D4 MEMORY CELL Q4
D5
15 ARRAY 10
Q5
18 VDD VDD 19 14 11
D6 Q6
(+5V) (+5V)
13 12
D7 Q7

RSTR
6 READ ADDRESS 5
RE
POINTER 8
RCK
D0-D11
SWCK
RSTW
WE

OE
IE
16
15
14

2-13
17

20

INPUT INPUT
BUFFER
INPUT

BUFFER BUFFER UPD42102G-3(NEC)(ACCESS TIME=21nS)FLAT PACKAGE


SERIAL WRITE WRITE INPUT LINE C-MOS 9K (1135 x 8)-BIT FIFO MEMORY
COUNTER CONTROLLER SELECTOR —TOP VIEW—

24 1
D0 Q0
LINE BUFFER Q0 OUT 1 24 D0 IN 23 2
D1 Q1
22 3
D2 Q2
Q1 OUT 2 23 D1 IN 21 4
D3 Q3
16 9
SELECTOR

D4 Q4
WRITE ADDRESS POINTER

OUTPUT

OUTPUT
BUFFER

Q2 OUT 3 22 D2 IN 15 10
WRITE LINE SELECTOR

LINE
READ LINE SELECTOR

24-35
WRITE MASK BUFFER

D5 Q5
Q0-Q11 14 11
READ ADDRESS

D6 Q6
Q3 OUT 4 21 D3 IN 13 12
MEMORY D7 Q7
ARRAY 8
RCK
RE IN 5 20 WE IN 17
CONTROLLER

WCK
23 19
OUTPUT
BUFFER

SRCK RSTW
READ

22 RSTR IN 6 19 RSTW IN 6
RSTR RSTR
21
LOW RE
RECORDER 7 GND VDD (+5V) 18 RE WE
5 20
RCK IN 8 17 WCK IN
MEMORY ARRAY CONTROLLER
Q4 OUT 9 16 D4 IN
D 0 – D7 ; DATA INPUTS
WRITE REFLESH READ Q 0 – Q7 ; DATA OUTPUTS
LOW LOW LOW Q5 OUT 10 15 D5 IN
WCK ; WRITE CLOCK INPUT
RCK ; READ CLOCK INPUT
Q6 OUT 11 14 D6 IN WE ; WRITE ENABLE INPUT
SERIAL READ
CONTROLLER COUNTER RE ; READ ENABLE INPUT
Q7 OUT 12 13 D7 IN
RSTW ; RESET WRITE INPUT
RSTR ; RESET READ INPUT
OSCILLATOR

17
WCK WRITE ADDRESS 19
20 RSTW
WE POINTER

24 1
D0 Q0
23 2
OUTPUT BUFFER

D1 Q1
INPUT BUFFER

22 3
D2 9080-BIT Q2
21 4
D3 (1135 x 8) Q3
16 MEMORY CELL 9
D4 Q4
D5
15 ARRAY 10
Q5
14 11
D6 Q6
13 12
D7 Q7

5
RSTR
6 READ ADDRESS RE
8
POINTER RCK

2-114 DME-3000/7000
IC

WS57C49C-35J(WAFERSCALE) UPD4701AC(NEC)
C-MOS 64K (8,192 X 8)-BIT HIGH SPEED PROGRAMMABLE ROM
-TOP VIEW- C-MOS INCREMENTAL ROTARY ENCODER
—TOP VIEW—
4 3 2 1 28 27 26 22 20
NC A12 D7 1 16

VDD (+5V)
23 3 XA D0
A11 D6 XA IN 1 VDD (+5V) 24 2 17
5 25 25 18 XB D1
A10 D5 18
26 17 D2
6 24 A9 D4 XB IN 2 23 D7 OUT 3 RESET X 19
27 16 D3
A8 D3 20
7 23 2 13 D4
A7 D2 RESET X IN 3 22 D6 OUT 4 21
3 12 YA D5
8 22 A6 D1 5 22
4 11 YB D6
A5 D0 YA IN 4 21 D5 OUT 23
9 21 5 D7
A4 6 RESET Y
6
10 20 A3 YB IN 5 20 D4 OUT 10
7 SF
A2 7 11
GND

11 19 8
6
RIGHT CF
A1 RESET Y IN 19 D3 OUT 9
9 MIDDLE
A0 8
12 13 14 15 16 17 18 LEFT
RIGHT IN 7 18 D2 OUT
24
CS1 X/Y U/L CS
LEFT IN 8 17 D1 OUT 14 13 15

MIDDLE IN 9 16 D0 OUT CS ; CHIP SELECT


A5-A12 8 ROW EPROM ARRAY
ROW X /Y ; X/Y COUNTER SELECT
ADDRESSES DECODER 65,536 BITS
SF OUT 10 15 CS IN XA, YA ; INPUT A PHASE
XB, YB ; INPUT B PHASE
RIGHT, LEFT, MIDDLE ; SWITCH INPUT
CF OUT 11 14 X / Y IN
FOR INTERNAL STATUS

12 GND 13 U / L IN U/L ; UPPER/LOWER BYTE SELECT


A0-A4 5 COLUMN
COLUMN D0 to D7 ; DATA
DECODER CF ; COUNT FLAG
ADDRESSES
SF ; SWITCH FLAG
RESET X ; COUNTER RESET
RESET Y ; COUNTER RESET

SENSE
AMPLIFERS

RESET X 3

YA 1 PHASE DISC-
CS1 RIMINATION
X AXIS UP/DOWN COUNTER
AND
2
YB EDGE DETECT
8
6
RESET Y
OUT
4 PHASE DISC-
YA
RIMINATION Y AXIS UP/DOWN COUNTER
5 AND
YB EDGE DETECT

16 to 23

14
X/L DATA MULTIPLEXER
13 AND D0 to 7
U/L
15 LATCH
CS

7
RIGHT
KEY SWITCH 10
8 INPUTS SF
LEFT FLAG
CIRCUIT CIRCUIT
9
MIDDLE

COUNT
11
FLAG CF
CIRCUIT

DME-3000/7000 2-115
IC

UPD71054GB-10-3B4(NEC)FLAT PACKAGE WS57C191C-35J(WAFERSCALE)


WS57C191C-45J(WAFERSCALE)
C-MOS PROGRAMMABLE TIMER COUNTER
—TOP VIEW—

37 WR
41 D6
43 D4

40 D7
42 D5

8
D0
7

NC 39

35

34
D1

VDD (+5V) 38

36
44

5
D2
4
1 33 D3

NC
43 D4
2 NC 32 RD 42
D5
41
3 31 CS D6
40
D7
D3 4 30 A1
9 10
5 29 A0 CLK 0 OUT 0
D2 15
GATE 0
6 NC NC 28
24 18
D1 CLK 1 OUT 1
7 27 CLK 2 19
GATE 1
D0 8 26 OUT 2
27 26
CLK 2 OUT 2
CLK 0 9 25 GATE 2 25
GATE 2
OUT 0 10 24 CLK 1
32
RD
16 GND

11
NC

23
NC

37
WR
29
A0
21
GATE 1 19

20
13

14

OUT 1 18

22
GATE 0 15
12

17

30 A1
31
CS

FUNCTION TABLE A1, A0 ; SELECTED READ/WRITE OPERATION


INPUTS CLK n ; COUNTER CLOCK INPUT n
FUNCTION CS ; CHIP SELECT
CS RD WR A1 A0
0 1 0 0 0 D7-D0 ; 8-BIT DATA I/O
COUNTER NO. 1 WRITE
GATE n ; COUNTER GATE INPUT n
0 1 0 0 1 COUNTER NO. 2 WRITE IC ; INTERNALLY CONNECTED
0 1 0 1 0 COUNTER NO. 3 WRITE OUT n ; COUNTER CLOCK OUTPUT n
0 1 0 1 1 CONTROL WORD WRITE RD ; READ COUNTER/STATUS
0 0 1 0 0 COUNTER NO. 1 READ WR ; WRITE COMMAND/DATA
0 0 1 0 1 COUNTER NO. 2 READ
0 0 1 1 0 COUNTER NO. 3 READ 0 ; LOW LEVEL
0 0 1 1 1 NO -OPERATION (HI-Z) 1 ; HIGH LEVEL
1 X X X X DISABLE (HI-Z) X ; DON'T CARE
0 1 1 X X NO-OPERATION (HI-Z) HI-Z ; HIGH IMPEDANCE

CONTROL WORD FORMAT

D7 D6 D5 D4 D3 D2 D1 D0
SC1 SC0 RWM1 RWM0 CM2 CM1 CM0 BCD BCD ; BINARY CODED DECIMAL

BCD COUNTER OPERATION


0 16-BIT BINARY COUNT
1 4-FIGURE BCD COUNT

CM2 CM1 CM0 COUNTER MODE


0 0 0 MODE 0
0 0 1 MODE 1
X 1 0 MODE 2
X 1 1 MODE 3
1 0 0 MODE 4
1 0 1 MODE 5

RWM1 RWM1 READ/WRITE MODE


0 0 COUNTER LATCHING CMD.
0 1 LSB ONLY
1 0 MSB ONLY
1 1 LSB FIRST THEN MSB

SC1 SC0 OPERATION


0 0 SELECTED COUNTER No.0
0 1 SELECTED COUNTER No.1
1 0 SELECTED COUNTER No.2
1 1 MULTIPLE LATCH COMMAND
40 COUNTER NO. 0
D7
41
D6
42 MSB
D5 (8)
43 COUNT (8)
(16)
D4 I/O DATA BUS REGISTER
4 LSB 9
D3 BUFFER (8) (8) CLK 0
5 DOWN CONTROL 15
GATE 0
D2
7 COUNTER LOGIC 10
D1 MSB OUT 0
(8) (8)
8 COUNT (16)
D0
LATCH LSB
INTERNAL DATA BUS

(8) (8)
37
WR
32
RD READ/WRITE
A1 30
STATUS STATUS
CONTROL (8) (8)
LATCH REGISTER
A0 29

CS 31
24
CLK 1
(8) 19
COUNTER NO. 1 GATE 1
CONTROL 18
OUT 1
WORD
REGISTER 27
(8) CLK 2
COUNTER NO. 2 25 GATE 2
26
OUT 2

2-116 DME-3000/7000
IC

UPD72123GJ-5BG(NEC)FLAT PACKAGE

DME-3000/7000 2-117
IC

WS57C291C-35S(WAFERSCALE) WS57C45-35T(WAFERSCALE)
C-MOS 16K-BIT (2048 x 8) HIGH SPEED ERASABLE P-ROM
—TOP VIEW—

8 9
VDD A0 D0
A7 IN 1 (+5V) 24 7 10
A1 D1
6 11
A2 D2
A6 IN 2 23 A8 IN 5 13
A3 D3
4 14
A4 D4
A5 IN 3 22 A9 IN 3 15
A5 D5
2 16
A6 D6
A4 IN 4 21 A10 IN 1 17
A7 D7
23
A8
A3 IN 5 20 CS1/VPP IN 22
A9
21
A10
A2 IN 6 19 CS2 IN

A1 IN 7 18 CS3 IN CS1/
VPP CS2 CS3
A0 IN 8 17 D7 OUT 20 19 18

D0 OUT 9 16 D6 OUT A0-A12 ; ADDRESS INPUTS


D0-D7 ; DATA OUTPUTS
D1 OUT 10 15 D5 OUT CS1-CS3 ; CHIP SELECT INPUT
VPP ; PROGRAM POWER SUPPLY
D2 OUT 11 14 D4 OUT

12 GND 13 D3 OUT

8 CHIP SEL
A0 OUTPUT
7 CS1/VPP CS2 CS3
A1
DECODER

6 0 1 1 ENABLE
1-OF-128

A2 16384(128 x 128)
5 1 0 X
A3 128 HI-IMPEDANCE
1 X 0
ADDRESS INPUTS

4 MEMORY ARRAY
A4
3
A5 0 ; LOW LEVEL
2
A6 1 ; HIGH LEVEL
X ; DON'T CARE
16

16

16

16

16

16

16

16

1
1-OF-16 DEC

1-OF-16 DEC

1-OF-16 DEC

1-OF-16 DEC

1-OF-16 DEC

1-OF-16 DEC

1-OF-16 DEC

1-OF-16 DEC

A7
23
A8
22
A9
21
A10

20
CS1/VPP
19
CS2
18
CS3
10

11

13

14

15

16

17
9
D0

D1

D2

D3

D4

D5

D6

D7

ZA4041
C-MOS 4.4M-BIT MUSE MEMORY
-TOP VIEW-

5 10
D0 D10
1 V DD 2 V DD 1 36 32 11
(+5V) (+5V) D1 D11
6 12
D2 D12
OE1 IN 2 35 OE2 IN 31 13
D3 D13
7 14
D4 D14
CK IN 3 34 RST1 IN 30 15
D5 D15
8 16
D6 D16
RST0 IN 4 33 RST2 IN 29 17
D7 D17

D0 IN 5 32 D1 IN 27
D20
3 26
D21
D2 IN 6 31 D3 IN 25
D22
4 24
RST0 D23
D4 IN 7 30 D5 IN 34 23
RST1 D24
33 22
RST2 D25
D6 IN 8 29 D7 IN 21
D26
2 20
OE1 D27
9 GND2 GND2 28 35
OE2

D10 OUT 10 27 D20 OUT

D11 OUT 11 26 D21 OUT

D12 OUT 12 25 D22 OUT 5,32,6,31 INPUT


7,30,8,29
D0-D7 DATA
D13 OUT 13 24 D23 OUT
BUFFER

D14 OUT 14 23 D24 OUT


4
RST0
D15 OUT 15 22 D25 OUT 34 MEMORY
RST1
33 CONTROL CELL
RST2
D16 OUT 16 21 D26 OUT (4.4M-BIT)

D17 OUT 17 20 D27 OUT

3 REFRESH OUTPUT 10-17


18 GND1 GND2 19 CK D10-D17
COUNT BUFFER 1

2
OE1

OUTPUT 27-20
D20-D27
BUFFER 2

35
OE2

2-118 DME-3000/7000
Section 3
Block Diagrams
BKDM-3010 DME Control Panel
DME-3000 Digital Multi Effects No. Board name Circuit function Model name Page
No. Board name Circuit function Model name Page 1 Overall (CPU-119) BKDM-3010 3-4
1 Overall DME-3000 3-2 2 Frame Wiring BKDM-3010 3-9
2 Frame Wiring DME-3000 3-6
3 CMB-1 Combiner, lighting and Z recursive BKDM-3050 3-10
4 CPU-114 System control and communication DME-3000 3-12
5 DPR-35 Video memory DME-3000 3-16
6 KPC-2 Key memory and recursive block BKDM-3060 3-20
7 MPU-70 3D linear address generator DME-3000 3-26
8 MPU-72 Non-linear address generator BKDM-3030 3-28
9 MPU-80 Digital sparkle generator BKDM-7031 3-31
10 VIF-6 Component digital/analog input/output BKDM-3023 3-34
11 VIF-6A Component digital input/output BKDM-3021 3-34
12 VIF-9 Composite digital/analog input/output BKDM-3022 3-38
13 VIF-9A Composite digital input/output BKDM-3020 3-38
14 WKG-13 Wipe pattern generator and graphics generator BKDM-3040 3-43
15 WKG-16 Digital sketch generator BKDM-7041 3-46

DME-7000 Digital Multi Effects


No. Board name Circuit function Model name Page

1 Overall DME-7000 3-3


2 Frame Wiring DME-7000 3-7
3 CMB-1 Combiner, lighting and Z recursive BKDM-3050 3-10
4 CPU-196 System control and communication DME-7000 3-15
5 DPR-70 Video memory DME-7000 3-18
6 KPC-9 Key memory and recursive block BKDM-7060 3-23
7 MPU-70 3D linear address generator DME-7000 3-26
8 MPU-72 Non-linear address generator BKDM-3030 3-28
9 MPU-80 Digital sparkle generator BKDM-7031 3-31
10 SKP-1 Advanced Shadow generator BKDM-7070 3-32
11 VIF-6 Component digital/analog input/output BKDM-3023 3-34
12 VIF-6A Component digital input/output BKDM-3021 3-34
13 VIF-9 Composite digital/analog input/output BKDM-3022 3-38
14 VIF-9A Composite digital input/output BKDM-3020 3-38
15 WKG-13 Wipe pattern generator and graphics generator BKDM-3040 3-43
16 WKG-16 Digital sketch generator BKDM-7041 3-46

DME-3000/7000 3-1 3-1


Block Diagram DME-3000 DME-3000 Block Diagram

3-1. Overall Block Diagrams


DME-3000 (SY) : S/N 50001 and Higher

CN-753(4/6)
BKDM-302X OUTPUTS
CN-753(1/6) BKDM-302X BKDM-3040 DIGITAL VIDEO 1
INPUTS
VIF-XX(2/2)
DIGITAL VIDEO A
VIF-XX(1/2) WKG-13 BKDM-7041 DIGITAL VIDEO 2
BKDM-3050 BKDM-3060
DIGITAL VIDEO B
WKG-16 ANALOG VIDEO/Y/G 1

ANALOG VIDEO/Y A VIDEO & KEY


DPR-35(1/2) CMB-1 KPC-2(2/2)
ANALOG VIDEO/Y/G 2
MODIFY
VIF2 COMB PROC
ANALOG VIDEO/Y B
INPUT INPUT VIDEO MODIFY VIDEO VIDEO GRAPHIC VIDEO BKGD MIX ANALOG R-Y/R 1
FILTER & FRAME INTER-
SELECT MEMORY BORDER MIX VIF3 RECURSIVE INSERT SHADOW MIX
ANALOG R-Y A DEFOCUS BUFFER POLATION PROC(Y) DIM &
MPX & PROC ANALOG R-Y/R 2
OVERLAP COMBINE
LIGHT VIDEO
ANALOG R-Y B MODIFY MASK VIF2 PROC(C) COMBINE
VIF1 MIX ANALOG B-Y/B 1
SPOT LIGHT MIX
ANALOG B-Y A
ANALOG B-Y/B 2
COLOR
COLOR COMB PROC
ANALOG B-Y B WIPE WIPE MIX BKDM-3060
MIX PRIORITY KEY KEY GRAPHIC KEY SHADOW KEY SYNC 1
GEN. PRI0RITY
GEN.
KPC-2(1/2) GEN.
GEN.,
FADE & PROC
RECURSIVE INSERT ADD
SYNC 2
DIGITAL KEY A KEY
KEY KEY
KIF2 COMBINE
KIF2 WIPE CROP COMBINE FROM KPC-2(1/2)
DIGITAL KEY B DIGITAL KEY 1
INPUT INPUT KEY FILTER & FRAME INTER- PROC(K)
CROP
SELECT MEMORY GEN. KIF3 DEFOCUS BUFFER POLATION
ANALOG KEY A DIGITAL KEY 2

GRAPHICS GEN. CLOCK SYNC


ANALOG KEY B ANALOG KEY 1
KIF1 GENERATOR
TO KPC-2(2/2)
ANALOG KEY 2
COLOR EXT
MIX VIDEO

REF
VIDEO/Y VIDEO/Y
MPX DE-MPX
(D2) (D2)
EXT/C EXT/C REF
BKDM-3030
BKDM-7031
MPU-72 MPU-70 KEY/Z
KEY/Z CN-753(6/6) CPU-114
MPU-80 Z
MPX
KEY/Z

CPU CO-PRO
SPARKLE NON-LINEAR
H,V
3D LINEAR
R ADD
COMBINER CN-753(5/6)
ADDRESS ADDRESS ADDRESS INPUTS
DELAY Z CONTROL
GENERATOR GENERATOR GENERATOR Z
CN-753(2/6) (D1) RECURSIVE
COMBINER
PANEL(X4)
SWITCHER
OUTPUTS PANEL(X2) RS-422A
GPI
MPU DPR-35(2/2) PROC
EXT Z COLOR
AUX(X2)
SERIAL I/F
PORT
OVERLAP
NX,NY SELECT
MPU KEY KEY ENABLE KEY
VIDEO MIX
CN-753(3/6)
ADDRESS GENERATOR CONTROL EDITOR
COMBINER
PZ
GPI
PZ
SELECT
PZ T Z.PZ
GENERATOR GENERATOR Z
RE-104 LE-76
+5(A) POWER
INDICATOR
+5(B)
FAN
-5
AC IN AC
TO DC +12

OVERALL BLOCK
DME-3000

3-2 3-2 DME-3000/7000


DME-3000
Block Diagram DME-7000 DME-7000 Block Diagram

DME-7000 (SY) : S/N 10001 and Higher

CN-1256(4/6)
BKDM-302X OUTPUTS
CN-1256(1/6) BKDM-302X BKDM-3040 DIGITAL VIDEO 1
INPUTS
VIF-XX(2/2)
DIGITAL VIDEO A
VIF-XX(1/2) WKG-13 BKDM-7041 DIGITAL VIDEO 2
BKDM-3050 BKDM-7060
DIGITAL VIDEO B
WKG-16 ANALOG VIDEO/Y/G 1

ANALOG VIDEO/Y A VIDEO & KEY


DPR-70(1/2) CMB-1 KPC-9(2/2)
ANALOG VIDEO/Y/G 2
MODIFY
VIF2 COMB PROC
ANALOG VIDEO/Y B
INPUT INPUT VIDEO MODIFY VIDEO VIDEO TARGET GRAPHIC V VIDEO BKGD MIX ANALOG R-Y/R 1
FILTER & FRAME INTER- BRICK
SELECT MEMORY BORDER MIX VIF3 RECURSIVE LIGHT INSERT SHADOW MIX
ANALOG R-Y A DEFOCUS BUFFER POLATION PROC(Y) DIM &
MPX & PROC ANALOG R-Y/R 2
OVERLAP COMBINE
LIGHT VIDEO
ANALOG R-Y B MODIFY MASK VIF2 PROC(C) COMBINE
VIF1 MIX ANALOG B-Y/B 1
SPOT LIGHT MIX
ANALOG B-Y A WIPE
ANALOG B-Y/B 2
COLOR
COLOR COMB PROC
ANALOG B-Y B WIPE MIX BKDM-7060
MIX PRIORITY KEY KEY TARGET GRAPHIC K KEY SHADOW KEY SYNC 1
GEN. PRI0RITY
GEN.
KPC-9(1/2) GEN.
GEN.,
FADE & PROC
KEY
RECURSIVE SHADOW INSERT ADD
SYNC 2
DIGITAL KEY A KEY BORDER
KEY KEY
KIF2 COMBINE
KIF2 WIPE CROP COMBINE
DIGITAL KEY B DIGITAL KEY 1
INPUT INPUT KEY FILTER & FRAME INTER- PROC(K)
CROP
SELECT MEMORY GEN. KIF3 DEFOCUS BUFFER POLATION FROM KPC-9(1/2)
ANALOG KEY A DIGITAL KEY 2

GRAPHICS GEN. CLOCK SYNC


ANALOG KEY B ANALOG KEY 1
KIF1 GENERATOR
TO KPC-9(2/2)
ANALOG KEY 2
COLOR EXT
MIX VIDEO

REF
VIDEO/Y VIDEO/Y
MPX DE-MPX
(D2) (D2)
EXT/C EXT/C REF
BKDM-3030

CN-1256(6/6) CPU-196
BKDM-7031
MPU-72 MPU-70 KEY/Z
KEY/Z
MPU-80 Z
MPX
KEY/Z
ETHERNET
CPU
SPARKLE NON-LINEAR
H,V
3D LINEAR
R ADD
COMBINER CN-1256(5/6) CONTROLLER

ADDRESS ADDRESS ADDRESS INPUTS


DELAY Z CONTROL
GENERATOR GENERATOR GENERATOR Z
CN-1256(2/6) (D1) RECURSIVE
COMBINER
PANEL(X4)
SWITCHER
OUTPUTS PANEL(X2) RS-422A
GPI
MPU DPR-70(2/2) PROC
EXT Z COLOR
AUX(X2)
SERIAL I/F
PORT
OVERLAP
NX,NY SELECT
MPU KEY KEY ENABLE KEY
VIDEO MIX
CN-1256(3/6)
ADDRESS GENERATOR CONTROL EDITOR
COMBINER
PZ
RS-232C
TERMINAL
PZ SERIAL I/F
SELECT
BKDM-7070
PZ T Z.PZ GPI
GENERATOR GENERATOR Z
SKP-1 NETWORK
FILTER
FREEZE FRAME INTER- SKP VIDEO
SEL &
MEMORY BUFFER POLATION 2CH
DEFOCUS
MIXER PROC(SK) RE-104 LE-76
+5(A) POWER
2CH INDICATOR
PIXEL FILTER
ADDRESS +5(B)
CONTROL
GEN FAN
-5
AC IN AC
TO DC +12

OVERALL BLOCK
DME-7000

DME-3000/7000
DME-7000 3-3 3-3
Block Diagram BKDM-3010 (CPU-119 board) BKDM-3010 (CPU-119 board) Block Diagram

BKDM-3010 (SY) : S/N 50001 and Higher

IC1

32 32
DATA BUS AD0~AD31 DATA BUS D0~AD31
CPU
AD31

IC2~IC4

AD0~23
4 4
ADDRESS BUS BE0~3 ADDRESS BUS BE0~3

24 24
24
ADDRESS BUS A20~23 ADDRESS BUS A0~23
ADDRESS
LATCH

16

13

18

20

32
8

8
ALE

A16~23

A0~A15

D24~31

A20~23

A0~A12

D24~31

A0~A17

D24~31

AD0~31
BE0~3

A2~21
IC10 IC52 IC8,9,11,12
IC16~23

IC6 MONITOR BACKUP FLASH


MDEC IC13,28 DRAM
4 ROM RAM ROM
A0~A3
ADDRESS
CS4 MPX
8 10 10 10
MEMORY CS5
A12~21 ADD0~9 A10-11
ADDRESS CS0~3 CS

DEC 20 20
CS CS 28
12 VB RD 8
ADH OE
RD/WR RD/WR
13 22 26 WR
RD RESET

CS0~3
VPP RAS
1
CAS

IC14,28
X1 4
CSO~3
35MHz 3 14
IC24 Q1,3 ADDRESS
OSC
MPX
IC7
WAIT IC75 +12VREG X2
10 10
4
A2~11
RESET SW RESET A20~23 FF IC15 X2 IC29 DEV
AD31 DECM
IC5 10
WAIT RESET CLR
26MHz
FLUSH DRAM 10BIT COUNTER
RESET 38 47 CAST 11 4 ADL OE OSC
IC26
IC BE0~3 ADDRESS
RASV
WR 18 RAS 3
DEC
10
27 44 WRN 13 RASC
FDD WAIT IC26 4 8 IC31 COM 17 18
45 CASV A20~23 DEC RD/WR
26 RD SIGNAL 14 CAS
V
TIMING 16
GEN 10
43 DDATAEN 4 CASC RD CONTROL
11
WR
13 15
ALE 16 RESET 10SEL 15 14
ADH 1
SYSCLK
14
46 ALE 5 17 RASC IC30
ADL BUSRQ 2
40 CLR
25 FF 15 3 BUS REQUEST
INT
GEN
53 BURST 3
19
1
18 16
2
SYSCLK 4

34 36 ACK IC33 VSQ


VIDEO
35 RDCENN
SEQUENCER
39 BUSGNT
16 17 18 19

BUSRQ

3-4 3-4 DME-3000/7000


BKDM-3010
Block Diagram BKDM-3010 (CPU-119 board) BKDM-3010 (CPU-119 board) Block Diagram

32 4 IC68
DATA BUS AD0~31 D24~27
4
VB
A2~5
REAL
IC64
8 TIME
17 1 X4
A16~23
21 2 CLOCK 32.76KHz
RESET
24 13 23 8
ALE LOGIC FLUSH WR
ADDRESS BUS A0~A23 10 16 10

D24~31
RD PLT RD
11 22
WR DEVICE CS0
15
CS1 IC77 IC80
14
CS2

17
IC65~67 FF NOR BZ
4

BZ

8
8
32

10
CS3~5

AD0~AD31
A20~23

D24~31

D24~31
BE0~3

A2~18

A2~12
A2~4
CN5
8
UP/DOWN UDA2 1
D24~31
UDB2 2
COUNTER UDA3 3
12
UDB3 4 FROM
2 UDA4 5 ROTARYENCODER
A2,3 UDB4 6 ELCO
15pin
UDA5 7
IC40~43 UDB5 8
IC34
DECG TC528126 IC53 UDA6 9
UDB6 10
4 8 CN4
DTOE/WE DTOE/WE IC69 IC70 UDA1 14

WAIT
CS0
RD
WR
56 UDB1 15
CS1
59
4 GRAM 9 IC59 61
WAIT

49
55
56
54
ADDRESS A0~10 D0~31 MB8421 2
WR
DEC 60
GRAPHIC COLOR RD
DUALPORT
A10~18 RAM PALETTE 8 8
IC38,44,49 8
10 CN2 D24~31 MEMORY
WR CASV 9 G0~7
11 34 R DUALPORT
RD ADL R 1 5
24 33 G FROM MEMORY
ADD0~8 4 PLT G 2 A2~6
ADDRESS 28 32 B MONITOR
SE/SC WR B 3 DSUB
MPX 41 40 H 5 8 8
ADH X2 H 13 15pin
9 42 39 V
IC48 RESET V 14 IC74 IC73
74HC540 74HC541

2
OE CAS 55 49

60
59
61
RAS
SHIFT
SE/SC HD

A2~6
REGISTER
4

A0~10
VD

D0~7
A2~9 BUS BUS FROM
IC39,44,49 KEYSCAN
RECEIVER DRIVER ELCO
8
15pin

ADD0~8 OE OE
ADDRESS
1 1

8
11
MPX IC71 IC72 KEY CN4
ADL
9 KD0 8
14 8 8
5 KD1 7
OE 12
IC32 IC55 KD2 6
74HC4040 KEY 8
71BIT KD3 5
6 10
TIMING KD4 4
IC58 COUNTER
10 VERTICAL 9 6 IC81 KD5 3
IC36,44 IC57 HD647180 GEN
COUNTER KD6 2

81
80
77
9 26LS32 CNT3K

6
X5 13 OR IC80 KD7 1
CN3
11 9.83MHz
ADD0~8 3 RX-A RS422 13 60 IC77 NOR RESET SW
10 ADDRESS
16 RX-B RECEIVER CN4
MPX BZ 10SEL FF
KA0 13
C0~10 9 SERIAL
5 KA1 12
INTERFACE
OE CN3 KA2 11
5 TX-A RS422 2 59 KA3 10
18 TX-B DRIVER IC76 KA4 9
HD63266F
8 IC69
IC37,44 FROM IC56 67 66 CN6
10 D24~31
8 PROCESSOR 26LS30 MDDIA 9
IC35 DSUB X3
2 INDEX 2

RESET
VCONT 19 25pin 12.2MHz
ADD0~8 A2,3 FLOPPY DRIVE SELECT 4
ADDRESS 11
DISK MOTOR ON 10
VERTICAL 16 MPX 6
IC57 CS2 DIRECTION 12
CONTROL 17 9 26LS32 3 CONTROLLER TO
RESET STEP 14
5 FDD
OE CN3 WR WD 16 26pin
15 18 14 4 212
V 9 VD-A REFV 3 RD FDD WG 18
22 VD-B RECEIVER TRKO0 20
VD WRITE PROT 22
HD X6 READ DAT 24
16MHz SIDE1 26

IC26
IC63
MAX232C
CASC
IC26 CN1
11 14
REFV TD 3
13 FROM
RASC RS232 RD 2 SPARE
2
RST 7 DSUB
DRIVER DTR 4 9pin
12

OVERALL BLOCK
BKDM-3010 (CPU-119 board)

DME-3000/7000
BKDM-3010 3-5 3-5
Block Diagram DME-3000 FRAME DME-3000 FRAME Block Diagram

3-2. Frame Wirings


DME-3000 (SY) : S/N 50001 and Higher

RE-104 MB-438 CN-753

AC INLET CN8
LE-76 CN1
CN105 CN101 CN105 CN101
CN205 CN207

CN1 1 +DC 2 +5V 1


L 1 AC L 3 3 -DC 0 GND 3 CN206 CN208
N 9 AC N 1
FG
CN201 CN200
CN4 CN10
5 1 FAN3 9 1 +5A +5A 1
2 +S1 2 2 +5A +5A 2 CN209 CN202
4
3 +DC1 2 3 +5A +5A 3
4 +DC1 4 +5A-S +5A-S 4
CN204 CN203
5 +DC1 5 +5B +5B 5
6 -DC1 6 +5B +5B 6
7 -DC1 7 +5B +5B 7
CN2
8 -DC1 0 8 +5B-S +5B-S 8
9 AC N 1
9 -S1 0 9 -5V -5V 9
1 AC L 3
POWER 10 -5V -5V 10
SW 11 -5V-S -5V-S 11
CN5 CN51 . CN52 . CN61 . CN62
12 +12V +12V 12 CN309 CN109 CN309 CN109
1 +S2 3 CN71 . CN72 . CN75 . CN81
13 GND GND 13
CN3 2 +DC2 3 CN82 . CN85
14 GND GND 14
1 AC L 3 3 +DC2
15 GND GND 15
9 AC N 1 4 +DC2
16 +5A-SG +5A-SG 16
5 -DC2
17 GND GND 17
6 -DC2
18 GND GND 18
7 -DC2 8
19 FAN3 FAN3 19
8 -S2 8
20 +5B-SG +5B-SG 20
21 GND GND 21 CN53 . CN54 . CN63 . CN64
FAN3 CN9 CN6 22 GND GND 22
CN73 . CN74 . CN83 . CN84
2 +DC4 1 1 +S3 0 23 -5V-SG -5V-SG 23
2 +DC3 0 24 GND GND 24
4 SENSE 2 3 +DC3 FAN1
4 -DC3 6 CN301
0 -DC4 3 5 -DC3 1 +12V 2
6 -S3 6 2 SENSE 4
3 GND 0
CN101 . CN102 . CN103 . CN104 CN11 . CN12 . CN13 . CN14
CN7 CN105 . CN106 . CN107 . CN108 CN21 . CN22 . CN23 . CN24
1 NC CN109 . CN201 . CN202 . CN203 CN25 . CN31 . CN32 . CN33
FAN2
2 +DC4 4 CN204 . CN205 . CN206 . CN207 CN34 . CN41 . CN42 . CN43
CN302
3 NC CN208 . CN209 . CN301 . CN302 CN44 . CN45 . CN55 . CN65
1 +12V 2
4 -DC4 7 CN303 . CN304 . CN305 . CN306
2 SENSE 4
CN307 . CN308 . CN309
3 GND 0

TO EACH BOARD IN SLOTS

FRAME
DME-3000
LOT NO. 502-

3-6 3-6 DME-3000/7000


DME-3000
Block Diagram DME-7000 FRAME DME-7000 FRAME Block Diagram

DME-7000 (SY) : S/N 10001 and Higher

RE-104 MB-660 CN-1256


CN210 CN211

AC INLET CN8
LE-76 CN1
CN105 CN101 CN105 CN101
CN205 CN207

CN1 1 +DC 2 +5V 1


L 1 AC L 3 3 -DC 0 GND 3 CN206 CN208
N 9 AC N 1
FG
CN201 CN200
CN4 CN10
5 1 FAN3 9 1 +5A +5A 1
2 +S1 2 2 +5A +5A 2 CN209 CN202
4
3 +DC1 2 3 +5A +5A 3
4 +DC1 4 +5A-S +5A-S 4
CN204 CN203
5 +DC1 5 +5B +5B 5
6 -DC1 6 +5B +5B 6
7 -DC1 7 +5B +5B 7
CN2
8 -DC1 0 8 +5B-S +5B-S 8
9 AC N 1
9 -S1 0 9 -5V -5V 9
1 AC L 3
POWER 10 -5V -5V 10
SW 11 -5V-S -5V-S 11
CN5 CN51 . CN52 . CN61 . CN62
12 +12V +12V 12 CN309 CN109 CN309 CN109
1 +S2 3 CN71 . CN72 . CN75 . CN81
13 GND GND 13
CN3 2 +DC2 3 CN82 . CN85
14 GND GND 14
1 AC L 3 3 +DC2
15 GND GND 15
9 AC N 1 4 +DC2
16 +5A-SG +5A-SG 16
5 -DC2
17 GND GND 17
6 -DC2
18 GND GND 18
7 -DC2 8
19 FAN3 FAN3 19
8 -S2 8
20 +5B-SG +5B-SG 20
21 GND GND 21 CN53 . CN54 . CN63 . CN64
FAN3 CN9 CN6 22 GND GND 22
CN73 . CN74 . CN83 . CN84
2 +DC4 1 1 +S3 0 23 -5V-SG -5V-SG 23
2 +DC3 0 24 GND GND 24
4 SENSE 2 3 +DC3 FAN1
4 -DC3 6 CN301
0 -DC4 3 5 -DC3 1 +12V 2
6 -S3 6 2 SENSE 4
3 GND 0
CN101 . CN102 . CN103 . CN104 CN11 . CN12 . CN13 . CN14
CN7 CN105 . CN106 . CN107 . CN108 CN21 . CN22 . CN23 . CN24
1 NC CN109 . CN201 . CN202 . CN203 CN25 . CN31 . CN32 . CN33
FAN2
2 +DC4 4 CN204 . CN205 . CN206 . CN207 CN34 . CN41 . CN42 . CN43
CN302
3 NC CN208 . CN209 . CN301 . CN302 CN44 . CN45 . CN55 . CN65
1 +12V 2
4 -DC4 7 CN303 . CN304 . CN305 . CN306
2 SENSE 4
CN307 . CN308 . CN309
3 GND 0

TO EACH BOARD IN SLOTS

FRAME
DME-7000
LOT NO. 508-

DME-3000/7000
DME-7000 3-7 3-7
Block Diagram BKDM-3010 FRAME BKDM-3010 FRAME Block Diagram

3-8 3-8 DME-3000/7000


BKDM-3010
Block Diagram BKDM-3010 FRAME BKDM-3010 FRAME Block Diagram

BKDM-3010 (SY) : S/N 50001 and Higher

CN6
INDEX 2
CPU-119 BOARD DRIVE SELECT 4 KEY-32A BOARD KEY-32B BOARD
DISK CHANGE 6 CN9 CN1
CPU BOARD NC 8 KEY BOARD D7 1
9
8
9
8
1 D7 KEY BOARD
MOTOR ON 10 D6 2 2 D6
8 8
DIRECTTION 12 D5 3 3 D5
8 8
STEP 14 D4 4 4 D4
8 8
WD 16 D3 5 5 D3
8 8
WG 18 D2 6
8 8
6 D2 X 31
TRK00 20 X 37 D1 7
8 8
7 D1
WRITE PROT 22 D0 8 8 D0
RE AD DAT 24 FDD K7 9
8
8
8
8
9 K7
SIDE 1 26 K6 10 10 K6
8 8
+5V
+5V
1
3
MPF320-01 K5
K8
11
12
8 8
11
12
K5
K8
8 8
+5V 5 L2 13 13 L2
8 8
+5V 7 L3 14 14 L3
8 8
MDDIA 9 L4 15 15 L4
NC 11
GND 13
GND 15
GND 17
GND 19
GND 21 KEY-32C BOARD
GND 23 CN10 CN1
GND 25 D7 1
9
8
9
8
1 D7 10 KEY BOARD
D6 2 2 D6
8 8
D5 3 3 D5
CN1 FLAT CABLE D4 4
8 8
4 D4
8 8
NC 1 D3 5 5 D3
8 8
NC 6 D2 6
8 8
6 D2 X 19
RD 2 D1 7 7 D1
8 8
RST 7 D0 8 8 D0
8 8
TD 3 K11 9 9 K11
CN3 NC 8 RS-232C K10 10
8
8
8
8
10 K10
1 GND DTR 4 K9 11 11 K9
14 POWER NC 9
2 POWER SG 5
15 POWER
3 RX-A
16 RX-B CN4 CN1 CN3
9 9 2
4 GND D7 1 1 D7 +5V 1
8 8 1
17 GND D6 2
8 8
2 D6 A 2
9 ROTARY
5 TX-A D5 3
8 8
3 D5 B 3
0 LEFT
18
6
TX-B
NC
D4
D3
4
5
8 8
4
5
D4
D3
GND 4
ENCODER
8 8
19 NC D2 6 6 D2
8 8
7 NC D1 7 7 D1
PROCESSOR 20 NC D0 8
8
8
8
8
8 D0 CN4
2
8 NC A4 9 9 A4 +5V 1
8 8 1
21 NC A3 10
8 8
10 A3 A 2
9 ROTARY
9 VD-A A2 11
8 8
11 A2 B 3
0 CENTER
22
10
VD-B
GND
A1
A0
12
13
8 8
12
13
A1
A0
GND 4
ENCODER
8 8
23 NC UDA1 14 14 UDA1
8 8
11 NC UDB1 15 15 UDB1
24 NC CN5
2
12 GND +5V 1
1
25 GND CN5
9 9
CN2 A 2
9 ROTARY
13 GND UDA2 1
8 8
1 UDA2 B 3
0 RIGHT
UDB2
UDA3
2
3
8 8
2
3
UDB2
UDA3
GND 4
ENCODER
8 8
UDB3 4 4 UDB3
8 8
UDA4 5 5 UDA4
8 8
UDB4 6 6 UDB4
8 8
UDA5
UDB5
7
8
8 8
7
8
UDA5
UDB5
CN6
9 9
CN1 SE-214 BOARD
UDA6 9
8 8
9 UDA6
+5V 1
8 8
1 +5V SENSOR
UDB6 10
8
8
8
8
10 UDB6
A
B
2
3
8 8
2
3
A
B
X
+5V 11 11 +5V 8 8
8 8 GND 4 4 GND
GND 12 12 GND
8 8
GND 13 13 GND
8 8
GND 14 14 GND
8 8
GND 15 15 GND
CN7
9 9
CN1 SE-214 BOARD
CN2 +5V
A
1
2
8 8
1
2
+5V
A
SENSOR
R
G
1
2
B 3
8
8
8
8
3 B Y
GND 4 4 GND
B 3
GND 4
NC 5
GND 6
GND 7 CN8
9 9
CN1 SE-214 BOARD
GND 8 +5V 1
8 8
1 +5V SENSOR
NC 9 A 2
8 8
2 A Z
GND
GND
10
11
MONITOR B
GND
3
4
8 8
3
4
B
GND
NC 12
H
V
13
14
FRAME
NC 15 BKDM-3010
LOT NO. 502-

DME-3000/7000
BKDM-3010 3-9 3-9
Block Diagram CMB-1 CMB-1 Block Diagram

IC14,15,40
3-3. Block Diagrams FIFO
BKDM-3050 (SY) : S/N 50001 and Higher
*1 IC13 CXD8331Q
IC1,46
IC5,6 IC8 CXD8838Q IC16,17,18
CNY1
OVER VIDEO
FROM DPR 28A-30B PROC(Y) 9-0 BUFF FIFO A P IN1 4 1 OUT1
OVER/UNDER
DEMULTIPLEX
*1 & FIFO
IC2,46 Y/C MULTIPLEX
IC6,7
CNY1
UNDER VIDEO
FROM DPR 30C-32D PROC(Y) 9-0 BUFF FIFO B Q IN2 3 2 OUT2
(2D) IC43 CXD8331Q

*1 IN0 1 OUT0 IN3 OVLP COEF


IC3,47
CNY1 IC10,11
FROM WKG 6A-8B WASH 9-0 D
IN1 2 2 OUT1 IN4
FRONT COLOR
WASH IC11,12
*1 IN0 FILTER OUT0
IC4,48

BACK COLOR
3 D

IC317
*1 EXT VIDEO IC318 IC319 CXD8331Q
IC306,335 PZ DEMULTIPLEXER
LSB MSB A
CNZ1 D A,C IC331 LIGHTING KEY GENERATOR
FROM MPU-70 12A-15A MPU KEY 9-0 D PZ
SK1
OVER G,H 2D IN0 1 N/A1 OUT0
SAMPLER
SK2
D B,D 2 FILTER OUT1
*1 IC312 CXD8331Q
IC304,333
IC307,308 IC311 CXD8838Q IC316 IC320
CNY1 1/2FS
IC313
FROM KPC 23A-25B PROC(K) 9-0 D FIFO A P IN0 1 2 OUT0 2D A P KA KAB

*1 SHADOW/KEY KA KB OVERLAP KEY


IC305,334 MULTIPLEXER MAT1 3 OUT1 EXCHANGER &
CNY1 COEFFICIENT KOUT
25C-27D PROC(SK) D B Q B Q
(2D) (2D) GENERATOR
IC302,336 IC303,337
IC309,310
CNZ1
FROM MPU-70 8C-11C PZ 9-0 D D FIFO ZA ZOUT
IC321 CXD8828Q
IC428(2/4)
A P
CNZ1 CROP
SIGNAL
FROM MPU-70 29B CLIP GENERATOR 1D/2D
SELECTER
*1
IC201,251 IC203-242 B Q
IC202 IC243-247 IC314,315 (2D)
CNZ1
10 FLOATING
FROM MPU-70 5B-8B Z 9-0 D DEMULTIPLEXER MULTIPLEX FIFO
MULTIPLIER
IC41,42 IC326-327

*1 FIFO FIFO
IC508,521
IC510,512

2 D FIFO

*1
IC501,520
IC503,507

1 D FIFO

IC513,514

FIFO
IC504-506 IC511,519
IC502 IC509 IC515 CXD8838Q IC516,517
CNX1 ECL
FROM CN 17B C IN VIDEO S/P TBC D A P FIFO
TTL
CN1 Y/C
MULTIPLEXER
5-14 IN VIDEO IN 9-0
CN2
B Q
5-14 IN VIDEO OUT 9-0 (2D)
IC615,622 *1 IC312 CXD8331Q
IC606-608
IC602 IC610
CNX1 ECL Y D FIFO IN2 N/A1 OUT2
FROM CN 19B C IN KEY S/P TBC
TTL UV
IC618,619
KEY/ KEYZ
CN1
41-50 IN KEY Z IN 9-0
CN1
23-32 IN KEY IN 9-0
CN2
23-32 IN KEY OUT 9-0

IC603-605 IC614,621 *1
IC601 IC609 IC611(2/2),IC613 IC616,617
CNX1 ECL
FROM CN 13B C IN Z S/P TBC D FIFO
TTL
KEY/ KEYZ
CN1 IC611(1/2),IC612
59-68 IN Z IN 9-0
CN2
41-50 IN Z OUT 9-0

IC702-704 IC706
IC701 IC705 IC707 IC708-710
CNX1 ECL
FROM CN 15B C IN C S/P TBC BUFF A P
TTL D1: Y/C
DEMULTIPREX
CN1
FRAME
77-86 IN C IN 9-0
MEMORY
CN2
D2: A P
59-68 IN C OUT 9-0 B Q
(2D)
IC428(1/4)

CNZ1 RECURSIVE
2
FROM KPC 31A VBE2 CTRL SIGNAL
GENERATOR
FROM KPC 31B VTE2

3-10 3-10 DME-3000/7000


Block Diagram CMB-1 CMB-1 Block Diagram

IC38,39
IC27 CXD8838Q
CNY1
A P D COMB VIDEO 9-0 1A-3B TO KPC

IC19 CXD8331Q IC26 CXD8331Q


IC21 CXD8838Q IC22 CXD8838Q IC23 CXD8334Q IC24,25 IC44
IC34,35 IC36,37 1
IN0 1 OUT0 A P 2D KA KOUT FIFO LIGHT IN1 OUT0 B Q CNY1
1 (2D)
CROP FOR CROP D D PROC VIDEO 9-0 18A-20B TO VIF/FROM KPC
OVERLAP DIM
FILTER EFFECTS PROCESSOR IN1 COMBINER
(2D) IC30 IC32
OVERLAP IC28 CXD8838Q IC29 CXD8838Q IC31 IC33
IN1 COMBINER B Q ZA TTL CNX1
P-SW
& IN2 FILTER A P A P BUFF ENCODER P/S C OUT VIDEO 25B TO CN
LIGHT KEY ECL
GENERATOR Y/C
IN2 MAT1 3 OUT1 CMB/RECURSIVE
DEMULTIPLEXER
VIDEO SELECT CN3
FOR D2
OUT VIDEO OUT 9-0 5-14
MAT2 4 OUT2
IN3 N/A1 4 OUT1 B Q B Q
(2D) (2D)
CN4
OUT VIDEO IN 9-0 5-14
IN4 2 OUT2
CROP LEVEL FOR OVERLAP EFFECTS

DIM Z
IC45
OVLP CTRL
FIFO

IC324,325

FIFO

IC425,426
IC322
CNY1
FIFO D COMB KEY 9-0 3C-5D TO KPC

IC423,424 2
IC323 CXD8334Q IC329 CXD8334Q
CNY1
KA KOUT D PROC KEY 9-0 20C-22D TO VIF/FROM KPC

FADE KA KAB
PROCESSOR
COMBINER KEY IC312 IC429
IC301,330 IC418 CXD8838Q IC421,422 IC430
ZA & IC436
IC438
KB COEFFCIENT KOUT FIFO A P FIFO IN1 N/A2 OUT3 BUFF Y TTL CNX1
GENERATOR NO KPC: ENCODER P/S C OUT KEY 27B TO CN
A P UV ECL
IC328 CXD8838Q IC401-403
KPC EXISTS: CN4
A P ZA ZOUT FIFO B P OUT KEY OUT 9-0 23-32
B Q CN3
(2D)
OUT KEY IN 9-0 23-32
DEMULTIPLEXER

ZB IC440,441 IC437
IC442-445 IC415 CXD8838Q IC419,420 CXD8838Q IC431 CXD8838Q IC433 IC427
B Q TTL CNX1
(2D) Z CODE GEN P-SW
A P A P A P BUFF ENCODER P/S C OUT Z 21B TO CN
FOR NO KEY AREA ECL
Z MASK
AXIS D1 Z FORMAT CN4
IC518 CXD8838Q FOR
INSERTER GENERATOR OUT Z OUT B-A 41-50
IC412-414 NO KEY AREA
A P
FIFO B Q B Q B Q
D1:A P (2D) (2D) (2D) CN3
41-50
OUT Z IN B-0
D2:B P IC439 CXD8838Q IC406-408 IC409-411 IC432 CXD8838Q 59-68
IC404 CXD8838Q Z CODE GEN
B Q A P A P
(2D) P-SW FOR AXIS IC435
A P IC718(2/2) EXTV/KEYZ
Z RECURSIVE
D2 Z FORMAT
Z RECURSIVE
SELECTOR 2 FIELD FIELD GENERATOR
NOTE;
SELECTOR 1 MEMORY MEMORY
ADDRESS MARK CHANGED INFORMATION SERIAL No.
B B Q
(2D) IC46,47,48,251,
B
333,334,335,520,
*1 521,621,622,726 #10391-
ADDED

CN3
OUT C IN 9-0 77-86
CN4
IC620 CXD8838Q
OUT C OUT 9-0 59-68
A P
IC722 3
Z CNY1
DEMULTIPLEXER D EXT VIDEO 9-0 9C-10D TO WKG,KPC,DPR,VIF

B Q
(2D)
*1
IC716,726 IC718(1/2) IC720
IC714 CXD8838Q IC724,725 IC715 CXD8838Q IC719 IC717 IC723
TTL CNX1
A P FIFO A P D ENCODER P/S C OUT C 23B TO CN
D1: Y/C ECL
MULTIPLEX EXT/C
EXTV/KEYZ
OUTPUT
SELECTOR
D2: A P
B Q B Q Combiner, lighting and Z recursive
(2D) (2D)

Y/C MULTIPLEX CMB-1


BKDM-3050
LOT NO. 502-
FOR DME-3000/7000

DME-3000/7000 3-11 3-11


Block Diagram CPU-114 CPU-114 Block Diagram

DME-3000 (SY) : S/N 50001 and Higher

CNY1
10A-17A
32
10B-17B TO MPU-70
SD0-31 SD0-SD31
10C-17C WKG
IC58-65 10D-17D

32 32
CNY1
DATA BUS DO-31 D0-31
3A-8A
24
3B-8B TO MPU-70
24 24 SA0-23 SA0-SA23
3C-8C WKG
ADDRESS BUS AO-23 A0-23
3D-8D
ADDRESS
/DATA CNY1
RESET BUFFER -RESET 19A

ADDRESS BUS QA0-19


MCLK MCLK 19B

DATA BUS QD0-31


SIZE1 SIZE1 19C TO MPU-70
SIZE0 SIZE0 19D WKG
32
IC1 IC2 -AS -AS 20A
S2 32 -DS -DS 20B
D0-31 R/W R/W 20C
CNY1 24 5
21B DUMACK0 A0-23 A1-A5
FROM MPU-70 CO-PROCESSOR
21A DUMACK1 MAIN IC51-57

ADDRESS BUS QA0-19

DATA BUS QD0-31


CPU
32 32
D0-31 QD0-31
ADDRESS
R/W
20 /DATA 20
-DS
A0-19 BUFFER QA0-19
-AS
X1,IC10
SIZE1
IC11 SIZE0
25MHz
IC11 IC4
12 DATA BUS DB0-31
MCLK 20
ADDRESS BUS RA0-19
ADDRESS
AO-3,A16-23 CS
DECODE
ADDRESS BUS MA2-18
IC14-20
32
32 IC32-34 17 IC21 IC24-31
32 8
32
DB0-31 DB24-31
DB0-31
D0-31 ADDRESS 16
20 BOOT FLASH
/DATA RA0-19 RA0-15
ROM MEMORY
A0-19 BUFFER 20
RA2-18
MA2-18

IC22 IC35-50
8 32
DB24-31 DB0-31
WORK
EEPROM
13 17 RAM
RA0-12 MA2-18

IC3,6,7
8
DB24-31
2
RA0,1 RS232C
CN1
1 TXD
FUCTORY USE
2 RXD
CONNECTOR
3 GND

IC5,8,9
BT1

RESET RESET

S1

3-12 3-12 DME-3000/7000


DME-3000
Block Diagram CPU-114 CPU-114 Block Diagram

DATA BUS QD0-31

ADDRESS BUS QA0-19

8 11 8 11 8 11 8 11 IC220,221 IC222,223

QD24-31

QD24-31

QD24-31

QD24-31
QA0-10

QA0-10

QA0-10

QA0-10
12 16
SPLINE
I0-12 S0-11 D QD16-31
32 TABLE
IC105 IC106 IC107 IC108 RD0-31
IC209 13
ADDRESS BUS QA0-19

IC210
DATA BUS QD0-31

IC216-IC219 IC212-IC215 IC201 IC224-IC229


DUAL DUAL DUAL DUAL
32 23 32
PORT PORT PORT PORT
QD0-31 D0-22 QD0-31
RAM RAM RAM RAM ADDRESS SPLINE 32 30 SPLINE
SPLINE
/DATA INPUT RD0-31 RD0-29 OUT
11 11 INTERPOLATER 11 11
BUFFER RAM RAM
RA2-12 RA0-10 W0-10 QA2-12

8 11 8 11 8 11 8 11
IC314
SA0-10

SA0-10

SA0-10
SD0-7

SD0-7

SD0-7

SD0-7
IC203-208 IC312

SA0-10
CN301
IC101, IC102, IC103, IC104, JCK+ 1
11
109,116 110,116 111,117 112,117 14BIT JCK- 2
RA0-10 IC312
COUNTER JDO+ 5
JDO- 6
IC313
JDI+ 9
SUB CPU SUB CPU SUB CPU SUB CPU FACTORY USE
13.5MHz JDI- 10
(CONT I/F) (SWER I/F) (EDITOR I/F) (AUX I/F) IC312 CONNECTOR
JAD+ 13
JAD- 14
IC302 JCKX 18
IC319
JCTL 19
IC318
IC118 IC120 IC118 IC120 IC119 IC120 IC119 IC120 MCLK 12.5MHz JRST 17
RESET IC318
CNY1
IC301 IC314
RST 6A
64 11
16 CKD1 9
10 CKD 4A
QD16-31
56 2
DOUT 4
QA1 3 WDATA 5A TO MPU-70,WKG,CMB,KPC-2,DPR,VIF
SIO
11 5
SWER TXB
SWER TXA

SWER RXB
SWER RXA

EDIT TXB
EDIT TXA

EDIT RXB
EDIT RXA
CTL TXB
CTL TXA

CTL RXB
CTL RXA

AUX TXB
AUX TXA

AUX RXB
AUX RXA
ADRO 7
6 SADD 4B
54 14
DIN 12
13 CKX 6B

CNX1
CKX ORG 29C FROM VIF
CNX1
12C
12A

13C
13A

19C
19A

20C
20A

15C
15A

16C
16A

17C
17A

18C
18A
IC318
CNX1

CNX1

CNX1

CNX1

CNX1

CNX1

CNX1

CNX1

RDATA 5B FROM MPU-70,WKG,CMB,KPC-2,DPR,VIF

IC318
TO FROM TO FROM TO FROM TO FROM
CN-753 CN-753 CN-753 CN-753 CN-753 CN-753 CN-753 CN-753
IC303-IC311 IC316
IC319 CNX1
3 FD 7A
QA0-2 PIO TP301 IC302 13.5M MCKI(13.5M) 10B
D FROM VIF
VD CNX1
FF REF VD(BLK) 8C
IC317
VDB 14C
8 IC319 IC319 TO CN-753
VDA 14A
QD24-31
ND301 FCKI(27M) 10A FROM VIF

8 7 SEG
QD24-31 LED
CNX1
GPI IN1 21A
8 4
GPI IN2 21C
QD24-31 GPI IN 1-4 TO CN-753
GPI IN3 22A
GPI IN4 22C
CNX1
GPI OUT1 23A
RY1-4 GPI OUT2 24A
GPI OUT3 25A
8 8
GPI OUT4 26A
QD24-31 RELAY GPI OUT 1-4,1G-4G TO CN-753
GPI OUT1G 23C
GPI OUT2G 24C
GPI OUT3G 25C
SETUP GPI OUT4G 26C
S301 CNX1
FAN 3 28B FROM POWER ASSY
FAN 2 28A
FROM CN-753
FAN 1 29A
FUSE(+5V) 3B FROM MPU-70,WKG,CMB,KPC-2,DPR,VIF

System control and communication


CPU-114
DME-3000
LOT NO. 502-

DME-3000/7000
DME-3000 3-13 3-13
Block Diagram CPU-196 CPU-196 Block Diagram

3-14 3-14 DME-3000/7000


DME-7000
Block Diagram CPU-196 CPU-196 Block Diagram

IC26-28 DATA BUS


DME-7000 (SY) : S/N 10001 and Higher ADRS
CNY1
SA02~SA27 3A-8D
BUFFER

ADRS BUS
TO MPU-70,WKG,SKP

IC22-25
CNY1
DATA IC501,502 IC515-518 IC524 IC531-533
SD0~SD31 10A-17D
BUFFER
ADRS/ SPLINE SPLINE SPLINE
DATA INPUT INTER- OUTPUT
IC9
CNY1 BUFFER RAM POLATER RAM
WRN R/ W 20C
CNY1
IC503-506 IC526,527 IC528,529
SCLK MCLK 19B
DATA CNY1 TO MPU-70,WKG,SKP
14BIT SPLINE
SEL -RST -RESET 19A 13.5MHz D
COUNTER TABLE IC707-709
CNY1 CNX1
AS
-AS 20A DCD 12B
RDN CONT FROM CN
RXD 13B
IC534
IC202 TXD 14B
TO CN
IC501,502 DTR 15B
COUNTER
DSR 16B FROM CN
ADRS CONT
RTS 17 TO CN
BUFFER IC705,706
CTS 18B
FROM CN
RI 19B
COM CONT
RS232C CN1 232C
D2 DCD 1
RUN RXD 2
IC18-21
TXD 3
IC610 IC607 IC605 CNX1
IC7 DATA RS232C DTR 4
CTL TXB 12C FUCTORY USE
BUFFER TO CN DRIVER GND 5
LED DUAL PORT SUB CPU CTL TXA 12A CONNECTOR
TP3 TP2 DSR 6
DRIVE RAM (CTL I/F) CTL RXB 13C
ETHER TIMER FROM CN RTS 7
CTL RXA 13A
5V IC302,303 CTS 8
IC321,322 IC602
IC4,5 IC6 BUSY RI 9
IC342-344 ADRS BUS
ALE IC613 IC611 IC605 CNX1 CN2
ADRS ADRS
TIMER AD SWER TXB 20A TXD 1
LATCH BUFFER TO CN FUCTORY USE
DUAL PORT SUB CPU SWER TXA 19A RXD 2
INT CONNECTOR
ETHER INT RAM (SWER I/F) SWER RXB 19C GND 3
SEL IC207,208 FROM CN
X1, SWER RXA 20C
VD CPU DATA BUS CN3
VD IC32 BOOT IC602
CONT BUSY TXD 1
ROM FUCTORY USE
RXD 2
IC206 OSC IC14-17 IC618 IC616 IC615 CNX1 CONNECTOR
GND 3
EDIT TXB 15C
DATA TO CN
50MHz RST DUAL PORT SUB CPU EDIT TXA 15A
TP1 MON BUFFER
RAM (EDIT I/F) EDIT RXB 16C
VD S1 FROM CN
IC216-219 EDIT RXA 16A
D3 IC602
SCLK APPLI BUSY
IC7 VD ROM
(FLASH) IC621 IC619 IC615 CNX1
LED RDN IC201,202
IC206 AUX TXB 17C
DRIVE TO CN
DUAL PORT SUB CPU AUX TXA 17A
WRN ADRS
CS RAM (AUX I/F) AUX RXB 18C
DECODE FROM CN
AUX RXA 18A
IC209-212 IC602
BUSY
BUSY
IC806
E 2 PROM

IC29 IC304-319
RESET IC323-338 RTC TIMER
RESET
WORK IC810
IC IC811
S2 SRAM CKDI CNX1
DOUT WDATA 5A
SIF TO DPR,VIF,KPC,CMB
ADRO SADD 4B
DINK RDATA 5B FROM DPR,VIF,KPC,CMB
-RST

IC401 IC811 CNX1


IC811
CKX 6B TO MPU-70,WKG,CMB,KPC,DPR,VIF,SKP
SCLK 12.5M
CKX ORG 29C FROM VIF
IC809
ETHER IC811 CNX1
CNX1 CONT
-RST -RST 6A TO DPR,VIF,KPC,CMB,MPU,WKG,SKP
30A TX+
TO CN
30B TX-
31A RX+ IC801,802 IC815
CNX1
31B RX- IC814
FROM CN FD 7A
32A CD+ ETHER
13.5MHz CK(13.5M) 10B
32B CD-
D FROM VIF
CNX1
IC813
COR407-412 VD 8C
CN5
VDB 14C
5 GND
VDA 14A TO CN
6 GND
FCKI(27M) 10A
9 GND FROM VIF
10 GND IC814
11 TX+ VD
12 TX-
CNX1
FACTORY USE 13 RX+
GPI IN1 21A
CONNECTOR 14 RX- D801-812
GPI IN2 21C
15 GND 5V FROM CN
GPI IN3 22A
16 GND
GPI IN4 22C
17 CD+
18 CD-
CNX1
19 +5V MON
GPI OUT1 23A
20 +12V MON PIO
GPI OUT1G 23C
RY801-804 GPI OUT2 24A
GPI OUT2G 24C
CNX1 RELAY TO CN
GPI OUT3 25A
1B +12V
FROM CN GPI OUT3G 25C
2B +12V F401
GPI OUT4 26A
GPI OUT4G 26C

IC31,816 CNX1
FAN 3 28B FROM POWER ASSY
SETUP
D FAN 2 28A
FROM CN
S801 FAN 1 29A
FUSE(+5V) 3B FROM MPU-70,WKG,CMB,KPC,DPR,VIF,SKP

D819-822

4BIT LED

System control and communication


D802-810

8BIT LED CPU-196


DME-7000
LOT NO. 508-
B-¥DME7000-CPU196-BD

DME-3000/7000
DME-7000 3-15 3-15
Block Diagram DPR-35 DPR-35 Block Diagram

DME-3000 (SY) : S/N 50001 and Higher

IC951-953
10 10
C0-9 C FILTERD VIDEO 0-9
L
10 10
Y0-9 Y FILTERD VIDEO 0-9
CNX1
IC101
29C VFILT 0 10 10 IC13
FROM

-
V FILTER COEF DIAG FILTER
SKP
26C VFILT 9 6 IC301 10 IC303
SERIAL CONT SIG IC412 10
CNX1 BUS IC413
EXCHANGER 10 10 10 10 10 Y FILTERD VIDEO 0-9
16B VIF2 0 10 H FILTER V FILTER
FROM MULTIPLEXED VIDEO FOR Y YO-9 DATA YO-9 FOR Y
-

-
VIF,WKG BUS DIAG FILTER 10
13B VIF2 9 92
10 V EDGE C FILTERD VIDEO 0-9
52
H-FILTER COEF SERIAL CONT SIG
CNX1
26B HFILT 0 CK2 CK2
FROM
-

10
SKP 10
23B HFILT 9 10
10 IC321-323
CK1 IC311-313
FIFO Y(A) BANK
FIFO
IC603 YA(T-O)0-9,YA(T-1)0-9,
10 10 YA(T-2)0-9 30
10
10 10 Y FILTERD VIDEO 0-9 C FILTERD VIDEO 0-9
IC302 IC304 DATA
10 10
BUS IC621-IC638
10 YPHO SW 10
C FILTERD VIDEO 0-9 YPH1 D0-9
10 10 10 10
H FILTER V FILTER CK1 Y(A)
CO-9 CO-9 52
FOR C FOR C IC601 MEMORY
92
6 V EDGE IC602
16 16
SERIAL CONT SIG SERIAL CONT SIG DIAG FILTER
A0-15
CK2 IC421-424 CK2 YAEN
WE
CNX1 IC11-IC13 IC14 F2N IC431-434 IC513 16 ADD
DIAG DRAM 32 42 BUS IC23
10C SCK3(6.75M) CK3 IC511 40 F2N V EDGE DELAY SW
FROM D DRAM CE
10B MCK3(13.5M) CK2 32 41 BUFF
VIF IC17 PSHDTG DELAY (2FIELD MEMORY) YPHO
10A FCK3(27M) CK1
CK2 YPH1
DL CK1 INV
CK1

RAS
CAS
36
IC411 Y(B) BANK

PSHDT0
IC608 YB(T-O)0-9,YB(T-1)0-9,
ADDRESS BUS 10 YB(T-2)0-9 30
Y FILTERD VIDEO 0-9 C FILTERD VIDEO 0-9
DATA

RAS
CAS
BUS IC641-IC650
YPHO SW 10
IC401 IC16,IC501
IC101 IC214-218 YPH1 D0-9
CNX1 Y PH0
CK3 CK1 Y(B)
7A FD Y PH1
FROM CK3PM IC606 MEMORY
7B VD DRAM W/R SRAM WRITE
VIF IC607
8A HD BUS ADDRESS GEN ADDRESS GEN 16 16
TIMING CK2
EXCHANGER C PH0 A0-15
PULSE GEN. CK1
C PH1 YBEN
WE
16 ADD
CK1 BUS
CK2 CK2 SW IC21,22
CE
SERIAL CONT SIG YPHO D
IC102 YPH1
CNZ1 81 49
ABSELY-10D ABSELY-11D CK1 CK1 INV
23C H RADD2 0 24
SW-1D
48 VO(Y)-2D 22 IC401 IC512
Y(C) BANK
-

55 33 42 ABSELY-10D
19C H RADD2 14 31 BUS 29 IC13 14 DELAY
FROM BOADER-5B F2N IC613 YC(T-O)0-9,YC(T-1)0-9,
28A V RADD2 0 EXCHANGER 10 YC(T-2)0-9 30
MPU-70
29 IC103 IC980(1/2)
-

Y FILTERD VIDEO 0-9 C FILTERD VIDEO 0-9


24A V RADD2 14 43 VO(C)-6B 23 IC401 IC512 DATA
CK1 56 32 41 ABSELC-14D BUS IC661-IC678
29B CLIP TGL 20 19 14 DELAY YPHO 10
CK3 BORDER AREA ADDRESS SW
& SAMPLE&HOLD YPH1 D0-9
ADDRESS OFFSET CK1 Y(C)
CK1 IC611 MEMORY
IC612
SERIAL CONT SIG 16 16
CK1 A0-15
D2H YCEN
IC15 WE
V0-9,VM1-5 CK3 16 ADD
H0-9,HM1-4 BUS IC26
D2H SW CE
BUFF
YPHO
8 IC511 YPH1
CK1

16 Y(D) BANK
V0-9, Y(A)ADR
H0-9 CONV. SRAM YAR ADR 0-15 IC618 YD(T-O)0-9,YD(T-1)0-9,
20 8 IC521 10 YD(T-2)0-9 30
Y FILTERD VIDEO 0-9 C FILTERD VIDEO 0-9
CK1 DATA
C(A)ADR 15 BUS IC681-IC698
YPHO SW 10
8 IC512 CONV.
YPH1 D0-9
19 CK1
CK1 Y(D)
16 IC616 MEMORY
V0-9, Y(B)ADR IC617
H0-9 CONV. SRAM YBR ADR 0-15 8 IC522 16 16
IC219 19 A0-15
4 CK1 YDEN
C(B)ADR 15 WE
MULTIPLEX CTL 16 ADD
CONV.
IC513 BUS
8 8 18 SW IC24,25
MUL WIDTH 0-7 CK1 CE
21 YPHO D
D2H 16 IC523 YPH1
10 V0-9, Y(C)ADR 8
FIELD INTP H0-9 CONV. SRAM YCR ADR 0-15 CK1 CK1 INV
S/P 11
FRAME INTP 19
C(C)ADR 15 16
29 CK1
COMB OECTL CONV. SRAM CAR ADR 0-14,CK3PH
28
MPUKEY OECTL 8 IC514 18 16
24 CK1
DIAG INTP SRAM CBR ADR 0-14,CK3PH
23
DIAG DRAM
22 16 8 IC524 16
DIAG FILTER V1-9, Y(D)ADR
H1-9 CONV. SRAM YDR ADR 0-15 SRAM CCR ADR 0-14,CK3PH
18 C(D)ADR 15 16
CK1 CONV. SRAM CDR ADR 0-14,CK3PH
17
CK1 CK3PH

3-16 3-16 DME-3000/7000


DME-3000
Block Diagram DPR-35 DPR-35 Block Diagram

10
C FILTERD VIDEO 0-9 CNX1 IC2 IC1,IC3 IC4
10 4A CKD
EEPROM
Y FILTERD VIDEO 0-9 FROM CPU 4B SADD
SERIAL
5A W DATA CONTROLIC
ADAP DEG 0-9 SERIAL CONT SIG
TO CPU 5B R DATA
CKDB,ADRB
DB,DIO,CS
CNX1 IC3 RST,CKX
6A RST
FROM CPU IC3
6B CKX

CNZ1
MOTION AB 0 11C
MOTION AB M1 11B
IC911 MOTION AB M2 11A
IC912 MOTION AB M3 10C
10 10 10
MOTION AB M4 10B
MOTION A/B 0,M1 - M4 MOTION C/D 0,M1 -M4 TO KPC
MOTION CD 0 10A
C(A) BANK D MOTION CD M1 9C
MOTION CD M2 9B
IC703 MOTION CD M3 9A
10 20 CK1
CA(T-O)0-9,CA(T-1)0-9 MOTION CD M4 8C
DATA
BUS IC721-IC733 IC891
CPH0 SW 10 10
IC881
CPH1 D0-9 IC882
CK1 C(A)
IC701 MEMORY IC511,IC512 40
IC702 BOADER-16D YA-YD(T-O)0-9
16 16 BOADER-10D DELAY
A0-15 FIELD INTP
SW-10D 20 IC913
CAEN CNY1
WE IC804 IC805 SW-1D E0-9,F0-9 IC912
16 ADD 40 10 MOTION 10 10 10 PROC(Y) 0 30B
BUS IC23 CK1 DETECT TO CMB

-
YA-YD(T-O)0-9 1-2<A(T-O)+B(T-O)>0-9 PRO(Y)0 - 9
SW CE 12 10 10
BUFF MIDDLE FILED INTERPOLATOR PROC(Y) 9 28A
EFI0-5, KEM0-4,KEF0-4
CPH0 OUT SUB (Y) D
CPH1 10
CK1 12 13
CK1 CK1
EHFL0-5,FHFL0-5
C(B) BANK
CK1
IC708
10 20 SIRIAL CONT SIG
CB(T-O)0-9,CB(T-1)0-9
DATA IC803 IC883,884 CK1
BUS IC741-IC753 40 20 16
CPH0 CK3

1/2<C(T-O)+D(T-O)>0-9
SW 10 YA-YD(T-4)0-9 EMUL1-8,FMUL1-8 IC903
ROM SW-10D CNY1
CPH1 D0-9 IC980(2/2) IC904
SMP 10 10 10 10 PROC VIDEO 0 22D
CK1 C(B) VMOVE
ADAP TO CMB/KPC/VIF

-
IC601 MEMORY ELOEA
DEG PROC VIDEO 9 20C
IC602 CK1
16 16 MULTIPLEX CTL D IC999
A0-15 Y/C 1 KPC IN 4C FROM
CK1
CBEN MULTIPLEX COMB IN 4B KPC,CMB
WE 10 IC892
16 ADD
BUS
SW IC21,22
IC801 10
CE 40 10 40
CPH0 D IC901 CNY1
YA-YD(T-1)0-9 CA-CD(T-O)0-9 IC902
CPH1 10 COMB VIDEO 0 3B
CK1 ABSELY-10D EFSEL
TO KPC

-
(Y) 20 CK1
C(C) BANK 20 COMB VIDEO 9 1A
E0-9,F0-9 CK2
CK1 E0-9,F0-9 D IC998
IC713 1
10 20 10 CK1
CC(T-O)0-9,CC(T-1)0-9 INTERPOLATOR
KEM0-4,KFM0-4
DATA (C)
BUS IC761-IC773 COMB OECTL
CPH0 SW 10 13
CPH1 D0-9 IC802 IC913 CNY1
CK1 40 12 IC914
C(C) 10 10 10 PROC(C) 0 32A
IC711 MEMORY YA-YD(T-2)0-9
TO CMB

-
PROC(C)0-9
IC712 MIDDEL SIRIAL CONT SIG PROC(C) 9 30D
16 16
ABSELY-11D OUT D
A0-15
CK1
CCEN CK1 CK1
WE CK3
16 ADD
BUS IC26 SMP
SW CE FLOEA
BUFF SW-14D
CPH0
CPH1
CK1
C(D) BANK IC511
34 43
SW-10D DELAY
IC718 IC811
10 20 40 20
CD(T-O)0-9,CD(T-1)0-9 CA-CD(T-1)0-9 E0-9,F0-9
DATA IC905
BUS IC781-IC793 ABSELC-14D EFSEL CNZ1 CNY1
CPH0 10 IC906
SW (C) 15A MPUKEY 0 10 10 PROC KEY 0 25B
CPH1 D0-9 FROM TO VIF

-
CK1 CK1 MPU-70
C(D) 12A MPUKEY 9 PROC KEY 9 23A
IC716 MEMORY D
IC717
16 16 CK1
A0-15
CDEN
WE
16 ADD
BUS MPUKEY DECTL
SW IC24,25
CE
CPH0 D
IC921
CPH1 CNX1
CK1 H FILTER VCLR 12A
H FILTER HCLR 12B
TIMING PULSE D TO KPC
V FILTER VCLR 12C
CK2 V FILTER PSHCLR 13A

IC514,IC521-IC524,IC953 Video memory


13
DELAY HO,H1,HM1-5,VO,VM1-VM5
DPR-35
DIAG INTP DME-3000
LOT NO. 502-

DME-3000/7000
DME-3000 3-17 3-17
Block Diagram DPR-70 DPR-70 Block Diagram

DME-7000 (SY) : S/N 10001 and Higher

IC11 IC205

FIFO FIFO IC301~305


10 10
Y(U)
IC4 H-FILTER(Y) IC203 V-FILTER(Y)
CNX1 IC32
IC1 IC15 IC208 FLD/FRM CONV IC212(1/2)
16B VIF2 0 10 10 Y 10 10
DE- DEFOCUS AA DEFOCUS AA FILTERED VIDEO(Y)
FIFO DATA CK2
MULTIPLEX FILTER FILTER FILTER FILTER MIX
13B VIF2 9 BUS 10 10 10
Y(L)
CNX1 FIFO
D
16C CROP
IC9 IC13 IC201 MIX
CNX1 10
AA AA
20B WIPE0 10 FIFO FIFO IC30 FIFO MID FIFO MID
FILTER FILTER S/P S/P
INTP INTP
17D WIPE9 DATA
BUS

IC12 IC206

FIFO FIFO
IC220(1/2)
IC5 H-FILTER(C) IC204 V-FILTER(C)
IC215 IC212(2/2) IC925(1/2)
IC33 FLD
IC14
C 10 FLD MEM. SUB 7
DE- DEFOCUS AA DEFOCUS AA D
MULTIPLEX FILTER FILTER
FIFO DATA
FILTER FILTER MIX X BIT LIMI
BUS MIX SHFT TER
IC217 IC221(1/2) IC223(1/2)
FIFO
FLD MEM. FIFO
IC10 IC35 IC202 FRM FIL
10
AA AA SUB TER FLD/FRM
FIFO FIFO IC31 FIFO FIFO CONTROL
FILTER FILTER
IC224(1/2) IC227
DATA
CNX1 IC2 7
BUS MIX
26B HFIT0 10
VMOVE COEF
FIFO
23B HFIT9 IC228
IC3,6 IC34 IC209 IC211,213
IC7 IC207 7
9 8 8 9 AMP
SAMPLE
ENCODE FIFO DATA FIFO DECODE COEF 10 10
& HOLD C(U)
BUS

CNX1 IC8 IC210 FLD/FRM CONV IC214(1/2)


10
29C VFILT0 10 FILTERED VIDEO(C)
CK2
FIFO 10 10 10
26C VFILT9 C(L)
IC17~29 FIFO
I/O
DRAM X 12 MIX
IC101 IC105 IC104 (SCAN CONV.)
CNX1 MID FIFO MID
S/P S/P
4A CKD ADD INTP INTP
EEPROM
4B SADD SERIAL IC19
5A W DATA
CONTROL IC ADDRESS BUS
CNX1 CKD,ADD,DIO
5B R DATA SERIAL DATA
IC16
IC106,107 COMB OE 7
IC134~136 MPUKEY OE CTL DRAM
CNX1 IC220(2/2)
ADDRESS GEN. SELECTOR
6A RST S/P
MODE,ETC IC216 IC214(2/2) IC935(1/2) IC911
6B CKX CONVERTER FLD
FLD MEM. SUB 7
IC102,108,109 IC122,123
CNX1
IC110~119 X BIT LIMI
10C CK3 CK3 MIX SHFT TER
IC218 IC221(2/2) IC223(2/2)
10B CK2 CK2 TIMING TIMING SIGNAL FIFO
10A CK1 PULSE GEN. FLD MEM. FIFO
IC124 IC125 FRM FIL ADAP MODE
SUB TER FLD/FRM
CK2-D MEMORY CONTROL FIFO CONTROL
CK1-D
IC224(2/2) IC225
CNX1
IC126 7
DELAY CK1D H VCLR 12A MIX
5V H HCLR 12B VMOVE COEF
V VCLR 12C
IC103,ETC IC226
CNX1 V PSHDCLR 13A
LOCAL 7
1C~4C 5V AMP
POWER
CNX1 3.3V COEF
30A,ETC GND

3-18 3-18 DME-3000/7000


DME-7000
Block Diagram DPR-70 DPR-70 Block Diagram

20
DATA(U)

20
DATA(L)

IC306 IC307~310 IC311


IC920(1/2) IC920(2/2)
ADD DATA 20 10 CNY1
A(U)MEM. IC902,903
GEN. BUS 10 10 10 PROC(Y)9 28A
IC312 IC313~316 IC317
ADD DATA 10 PROC(Y)0 30B
B(U)MEM.
IC801 IC806~813 GEN. BUS MULTI
CNZ1 LINEAR
IC804 IC401 IC402~405 IC406 INTERPOLATOR
19A HRAD2 14 15 14 10 7 HAAD INTERPOLATOR
ADD DATA Y(U)
VAAD C(U)MEM.
GEN. BUS 10
23C HRAD2 0 DIV
IC407 IC408~411 IC412
22
ADD DATA
D(U)MEM.
GEN. BUS
CNZ1
IC805 IC501 IC502~505 IC506
24B VRAD2 14 15 14 10 4
ADD DATA 8 VMIX
D E(U)MEM.
GEN. BUS
29A VRAD2 0 MOD 4
IC507 IC508~511 IC512 CRIP
ADD DATA CNY1
F(U)MEM. IC925(2/2)
GEN. BUS COMB VIDEO9 1A
IC601 IC602~605 IC606 IC219
CNZ1 1 IC905,906
ADD DATA COMB VIDEO0 3B
29B CRIP DECI G(U)MEM.
GEN. BUS MULTI CNZ1
12
IC607 IC608~611 IC612 MULTI PLEX KPC IN 4C
ADD DATA INTERPOLATOR CMB IN 4B
H(U)MEM.
GEN. BUS C(U) CNY1
4 IC907,908
IC701 IC702~705 IC706 PROC VIDEO9 20C
HM
ADD DATA
4 I(U)MEM.
GEN. BUS PROC VIDEO0 22D
VMIX
1
CRIP HBAD
VBAD 4 8 COMB OE
D DECI
22 4
HM

IC318 IC319~322 IC323


IC930(1/2) IC930(2/2)
ADD DATA 20 10 CNY1
A(L)MEM. IC903,904
GEN. BUS 10 10 10 PROC(C)9 30C
IC324 IC325~328 IC329
ADD DATA 10 PROC(C)0 32B
B(L)MEM.
GEN. BUS MULTI
LINEAR
IC413 IC414~417 IC418 INTERPOLATOR
INTERPOLATOR
ADD DATA Y(L)
C(L)MEM.
GEN. BUS 10
IC419 IC420~423 IC424
ADD DATA
D(L)MEM.
GEN. BUS
IC513 IC514~517 IC518
ADD DATA VMIX
E(L)MEM.
GEN. BUS
IC519 IC520~523 IC524 8 CRIP
HCAD ADD DATA
VCAD F(L)MEM. IC935(2/2)
GEN. BUS
CNZ1 CNY1
IC613 IC614~617 IC618 IC802,803
21 12A MPUKEY9 10 10 PROC KEY9 1A
ADD DATA
G(L)MEM.
GEN. BUS
15A MPUKEY0 PROC KEY0 3B
IC619 IC620~623 IC624 MULTI
ADD DATA INTERPOLATOR
H(L)MEM.
GEN. BUS C(L)
IC707 IC708~711 IC712
8 ADD DATA MPUKEY OE CTL
I(L)MEM.
MUL GEN. BUS

Video memory
DPR-70
DME-7000
LOT NO. 508-
B-¥DME7000-DPR70-BD

DME-3000/7000
DME-7000 3-19 3-19
Block Diagram KPC-2 KPC-2 Block Diagram

BKDM-3060 (SY) : S/N 50001 and Higher

THR

IC201 H FILTER SCAN CONV V FILTER


CNX1
13B KIF2 9 INTERPOLATION
IC202 IC218 IC219
13C KIF2 8 10 10 MEM A
E DATA H K DATA
14A KIF2 7 VI VO VI VO CNY1
BUS A-D IC316 AT0(9-0), IC610 IC613
14B KIF2 6 FI FI 16 20 PROC(K) 9 25C
SW SRAM WR ADR E DATA AT1(9-0)
14C KIF2 5 PROC(K) 8 25D
FROM VIF FIL FIL BUS
15A KIF2 4 10 IC205 IC206~217 SW A-C PROC(K) 7 26A
15B KIF2 3 FO DL ADDR M FO DL READ ADR CONV 2D PROC(K) 6 26B
IC304~312
15C KIF2 2 BUS DRAM IC501 B 20 PROC(K) 5 26C
ADDR TO CMB
16A KIF2 1 IC203 SW IC220 CNZ1 IC503 A PROC(K) 4 26D
IC204 IC221 BUS SRAM
16B KIF2 0 19A H RADD2 9 16 SW PROC(K) 3 27A
19B H RADD2 8 PROC(K) 2 27B
IC301~303 IC611
CNX1 19C H RADD2 7 20 PROC(K) 1 27C
23B H FILT 9 D 20A H RADD2 6 PROC(K) 0 27D
23C H FILT 8 20B H RADD2 5 MEM B
24A H FILT 7 20C H RADD2 4 IC504 2D INTP
IC333
24B H FILT 6 21A H RADD2 3 16 20
24C H FILT 5 21B H RADD2 2 DATA
IC116 IC120 BUS
25A H FILT 4 SW
25B H FILT 3
IC321~329
25C H FILT 2 CNZ1 13
MEM CONT ADDR
26A H FILT 1 21C H RADD2 1 IC505
DRAM R/W ADR GEN BUS SRAM
26B H FILT 0 22A H RADD2 0 16 SW IC609
22B H RADD2 M1 D
IC118 IC317~319
CNX1 22C H RADD2 M2
D
26C V FILT 9 23A H RADD2 M3
SRAM WR ADR GEN
27A V FILT 8 10 23B H RADD2 M4 MEM C
27B V FILT 7 23C H RADD2 M5 IC506
IC416
27C V FILT 6 16
28A V FILT 5 DATA
FROM MPU BUS
28B V FILT 4 CNZ1 SW
28C V FILT 3 24B V RADD2 9
IC507 IC404~412
29A V FILT 2 24C V RADD2 8 IC508
29B V FILT 1 25A V RADD2 7 IC223 ADDR
BUS SRAM
29C V FILT 0 25B V RADD2 6 13 SW
25C V RADD2 5
IC401,402
26A V RADD2 4
SERIAL CONT 26B V RADD2 3
TP2 TP1 TP3
26C V RADD2 2 MEM D
VD HD PSHD
IC106 IC112
CNX1 IC433
4A CXD IC104 CS
IC105 CNZ1 DATA
4B S ADD TIMING SIG BUS
FROM CPU 27A V RADD2 1 SW
5A WDATA EEPROM
TO CPU 27B V RADD2 0
5B RDATA IC421~429
27C V RADD2 M1
TP8 ADDR
ADR IC107 IC115 28A V RADD2 M2
BUS SRAM
CNX1 28B V RADD2 M3 SW
ADR
5C SLOT4 28C V RADD2 M4
TP9 CONT DATA IC417,418
6C SLOT3 DIO 29A V RADD2 M5
INTP RATIO
7C SLOT2 29B CLIP
DATA
CNX1 TP7
IC102 CKD IC102 IC117 MOTION DETECT
6A RST
FROM CPU
6B CKX CKD
AREA CONT DATA
CKX
RST

IC607,IC608
IC201 IC616
CNX1
IC603 IC617 IC609
7A FD FLOE
FROM VIF 7B VD BUFF VD (T-0) V
ROM MOTION DET A
8A HD HD MOVE

CLK IC604

(T-0) MID
TP5 TP6 TP4
OUT
CK3 CK2 CK1

IC101,111,107~109 IC605 IC606


CNX1
10C SCK CK3 (6.75M) CK3 (T-1) EF FIELD
FROM VIF 10B MCK CK2 (13.5M) CK2 SEL SUB
10A FCK CK1 (27M) CK1

3-20 3-20 DME-3000/7000


DME-3000
Block Diagram KPC-2 KPC-2 Block Diagram

IC801 RECURSIVE V

IC806~813 12
CNX1 1
FROM VIF 9A CTIM FRAME
MEMORY
CNY1
IC835 IC805
CNY1 PROC VIDEO 9 20C
IC836~840,IC709
1A COMB VIDEO 9 PROC VIDEO 8 20D
IC827,828
1B COMB VIDEO 8 PROC VIDEO 7 21A
1C COMB VIDEO 7 NAM 10 10 PROC VIDEO 6 21B
VIDEO
1D COMB VIDEO 6 10 MIX MIX D PROC VIDEO 5 21C
10 TO CMB/KPC/VIF
2A COMB VIDEO 5 PROC VIDEO 4 21D
FROM DPR,CMB
2B COMB VIDEO 4 PROC VIDEO 3 22A
IC841
2C COMB VIDEO 3 10 PROC VIDEO 2 22B
PVEN
2D COMB VIDEO 2 A/B PROC VIDEO 1 22C
3A COMB VIDEO 1 A PROC VIDEO 0 22D
IC828
3B COMB VIDEO 0 B
1 CNZ1
CNY1 10 O/ U
VBE2 31A
6A COLOR MIX 9
D 1 CNZ1 TO CMB
6B COLOR MIX 8 D V/REC
VTE2 31B
6C COLOR MIX 7
6D COLOR MIX 6 10
7A COLOR MIX 5
FROM WKG
7B COLOR MIX 4
PVEN
7C COLOR MIX 3
7D COLOR MIX 2
8A COLOR MIX 1 RECURSIVE CTL
8B COLOR MIX 0
IC706 OE
CNY1 PVEN
8C EXT VIDEO 9 RECURSIVE K
CONT PKEN
8D EXT VIDEO 8
9A EXT VIDEO 7
9B EXT VIDEO 6 10 IC817~824
9C EXT VIDEO 5 IC701~IC705
FROM CMB IC825 12
9D EXT VIDEO 4 FRAME
10A EXT VIDEO 3 PULSE MEMORY
D
10B EXT VIDEO 2 GEN
10C EXT VIDEO 1 IC816
10D EXT VIDEO 0
CNY1
PROC KEY 9 23A
CNY1 PROC KEY 8 23B
IC802 IC829,830
3C COMB KEY 9 PROC KEY 7 23C
3D COMB KEY 8 10 D NAM 10 10 PROC KEY 6 23D
KEY
4A COMB KEY 7 A MIX D PROC KEY 5 24A
IC814 TO CMB/KPC/VIF
4B COMB KEY 6 PROC KEY 4 24B
KPCNSV1
4C COMB KEY 5 B PROC KEY 3 24C
FROM CMB
4D COMB KEY 4 PROC KEY 2 24D
5A COMB KEY 3 RANDOM PKEN OE PROC KEY 1 25A
5B COMB KEY 2 A /B OE PROC KEY 0 25B
5C COMB KEY 1
5D COMB KEY 0
10
GDC
CNZ1
1 IC802
4B COMB IN IC709
IC842 Y/C MPX
CNZ1 AXISV1
IC843 C
28A PROC (SK) 9
IC710
28B PROC (SK) 8 10
Y AXIS V
28C PROC (SK) 7 D DL
28D PROC (SK) 6
29A PROC (SK) 5
FROM SKP
29B PROC (SK) 4
29C PROC (SK) 3
KEY/SK
29D PROC (SK) 2 2 1 IC711,712
30A PROC (SK) 1
30B PROC (SK) 0 AXIS K

CNZ1 3 KEYDATA

FROM WKG
30C
30B
AXIS 3
AXIS 2
Key memory and recursive block
30A AXIS 1
IC826,832

THR
KPC-2
THR
BKDM-3060
LOT NO. 502-
FOR DME-3000

DME-3000/7000
DME-3000 3-21 3-21
Block Diagram KPC-9 (1/2) KPC-9 (1/2) Block Diagram

3-22 3-22 DME-3000/7000


DME-7000
Block Diagram KPC-9 (1/2) KPC-9 (1/2) Block Diagram

BKDM-7060 (SY) : S/N 10001 and Higher


DIAG K1

CNX1 IC201 H FILTER/DEFOCUS SCAN CONV V FILTER/DEFOCUS

13B KIF2 9
IC203 IC210 IC212 INTERPOLATION CNY1
13C KIF2 8 10 10 IC610 IC612
E DATA H K DATA MEM A
14A KIF2 7 VI VO VI VO IC611 IC613 PROC(K) 9 25C
BUS A-D IC313 AT0(9-0), IC609
14B KIF2 6 FI FI 16 20 PROC(K) 8 25D
SW SRAM WR ADR E DATA AT1(9-0)
14C KIF2 5 A D D PROC(K) 7 26A
FROM VIF BUS
15A KIF2 4 10 FIL IC205 IC206~209 FIL SW A-C PROC(K) 6 26B
15B KIF2 3 FO DL ADDR M FO DL PROC(K) 5 26C
IC304~312 TO CMB
15C KIF2 2 BUS DRAM B 20 PROC(K) 4 26D
16A KIF2 1 SW A ADDR B PROC(K) 3 27A
IC204 IC213 READ ADR CONV BUS SRAM
16B KIF2 0 SW PROC(K) 2 27B
IC502 16 PROC(K) 1 27C
CNX1 IC301~303
20 PROC(K) 0 27D
23B H FILT 9 D C
23C H FILT 8
MEM B
24A H FILT 7 INTP
IC327
24B H FILT 6 IC503 20
24C H FILT 5 IC127 16 DATA D
FROM SKP IC128 IC136 BUS
25A H FILT 4 SW
25B H FILT 3 KEY 2/2
IC320~324
25C H FILT 2 13
MEM CTL ADDR
26A H FILT 1 DRAM R/W ADR GEN IC504
BUS SRAM
26B H FILT 0 16 SW

CNX1 IC134 IC314~316

26C V FILT 9 IC211


SRAM WR ADR GEN
27A V FILT 8 10 IC505
MEM C
27B V FILT 7 DL 16
IC412
27C V FILT 6
28A V FILT 5 DATA
FROM SKP BUS
28B V FILT 4 IC506 SW
28C V FILT 3 IC215
IC403~411
29A V FILT 2 13
29B V FILT 1 ADDR
BUS SRAM
29C V FILT 0 SW
SIF CTL IC401,402
TP2 TP1 TP3
IC125 VD HD PSHD
IC126 MEM D
CNX1 IC107 IC113
IC424
4A CXD IC124 SIF SIF
TIMING SIG DATA
4B S ADD CTL CS1** CTL CS2** BUS
FROM CPU SW
5A WDATA

MOTION RATIO
TO CPU IC106
5B RDATA IC415~423
IC111 EEPROM IC129
IC133 ADDR
IC112 TP104 ADR BUS SRAM
CNX1
SW
5C SLOT4 ADR
CTL DATA IC413,414
6C SLOT3 TP105 DIO INTP RATIO
7C SLOT2
DATA
IC130 MOTION DETECT
6A RST IC102 TP103 CKD IC131
FROM CPU IC132
6B CKX
CKD
IC607,IC608
FILTER CTL DATA IC602
IC601 IC603

(T-O) V
ROM MOTION DET
MOVE
CKX

CNX1 IC201 IC604

7A FD FLOE (T-O) MID


FROM VIF 7B VD BUFF VDA OUT EF SEL
8A HD HDA

IC605 IC606
CLK
(T-I) EF FIELD
IC114 TP101 TP102 TP106 SEL SUB
IC119 SCK MCK FCK
IC120
IC109 IC123
CNX1 IC108 IC110 IC124
IC138 IC137
10C SCK CK3 (6.75M) SCK
FROM VIF 10B MCK CK2 (315M) MCK/ MCK
10A KCK CK1 (27M) FCK/ FCK

CNZ1 IC501
19A H RADD2 9
19B H RADD2 8
19C H RADD2 7
20A H RADD2 6
20B H RADD2 5
20C H RADD2 4
21A H RADD2 3
21B H RADD2 2

CNZ1
21C H RADD2 1
22A H RADD2 0
22B H RADD2 M1 D
22C H RADD2 M2
23A H RADD2 M3
23B H RADD2 M4
23C H RADD2 M5

FROM MPU CNZ1


24B V RADD2 9
24C V RADD2 8
25A V RADD2 7
25B V RADD2 6
25C V RADD2 5
26A V RADD2 4
26B V RADD2 3
26C V RADD2 2
Key memory and recursive block
CNZ1
27A
27B
V
V
RADD2
RADD2
1
0
KPC-9 (1/2)
27C V RADD2 M1 BKDM-7060
28A V RADD2 M2 LOT NO. 508-
28B V RADD2 M3
28C V RADD2 M4 FOR DME-7000
29A V RADD2 M5 B-¥BKDM7060-KPC9-BD
29B CLIP

DME-3000/7000
DME-7000 3-23 3-23
Block Diagram KPC-9 (2/2) KPC-9 (2/2) Block Diagram

BKDM-7060 (SY) : S/N 10001 and Higher

CNX1
RECURSIVE VIDEO
FROM VIF 9A CTIM

CNY1 WIND,BLK MASK


BRICK VIDEO MIX CHROMA PROC.
1A COMB VIDEO 9
KEY BORDER IC804(1/2) IC806
1B COMB VIDEO 8 IC807~812
IC905
1C COMB VIDEO 7 IC801(1/3) IC805 IC714(1/2)
DECAY
1D COMB VIDEO 6 0
DL 4 1 1 1 IC901 DIAG KF STB
2A COMB VIDEO 5 D 3D MIX1 MIX2 3D NAM1 NAM2 MIX1
FROM DPR,CMB 13/20 NAM DL 0
2B COMB VIDEO 4 4D
PEDES.CTL 2/6
2C COMB VIDEO 3
SEL
2D COMB VIDEO 2
3A COMB VIDEO 1 1
3B COMB VIDEO 0 0 4D
4 DL 2
3D 3D 4D 2
SD 1
MIX1 MIX2
IC802 0
IC803
MAT1 A NAM2

Y,C GAIN
CNY1 3 3 4
MIX2 4D 4D
6A COLOR MIX 9 B FIL
6B COLOR MIX 8
IC902
6C COLOR MIX 7 IC801(2/3) IC903 MAT1
6D COLOR MIX 6 SEL IC904
7A COLOR MIX 5 D DL 1
FROM WKG
7B COLOR MIX 4 30/23
7C COLOR MIX 3
3 2
7D COLOR MIX 2 IC814 IC813 NAM1 NAM2 FIL
8A COLOR MIX 1 RANDOM COLOR GEN
DL
8B COLOR MIX 0 D DUST GEN
IC1317
RND
CNY1 C MIX OE COLOR
IC1315 IC1316 ROM
8C EXT VIDEO 9
8D EXT VIDEO 8 CTL RND COLOR GEN
D
9A EXT VIDEO 7 IC801(3/3) DUST GEN
9B EXT VIDEO 6
V FILTER RECURSIVE KEY
9C EXT VIDEO 5 D
FROM CMB
9D EXT VIDEO 4
IC1320 IC1109
10A EXT VIDEO 3 IC1108
10B EXT VIDEO 2
I 0
10C EXT VIDEO 1 X DIAG
H FILTER IC1322
10D EXT VIDEO 0
IC1318 DUST GAIN/VOL.
MAT2
Q P 1
(2m+1)H X + H FILTER MIX1
IC1321 MIX TRANSPARENCY 2
0 0 MIX1
3D 3D 4D
IC1321 Y
X
O/N
1H DECAY
DENS.
IC1323 1
MIX2 2 2
CNZ1 IC1319 NAM1 NAM2 MIX2
DL
4B COMB IN (m+1)H 1
≈ 4
CNY1 KF STB
1 DL 3
3C COMB KEY 9 NAM2
3D
3D COMB KEY 8 IC1101(1/2)
4A COMB KEY 7 DIAG K1
4B COMB KEY 6
IC804(2/2)
4C COMB KEY 5 1D 0
FROM CMB 4 NAM1 3D
4D COMB KEY 4 A
5A COMB KEY 3 IC1103
5B COMB KEY 2
DL 2 2
5C COMB KEY 1 NAM1
13D 1
5D COMB KEY 0 2D MAT1 4D

3
1/2 KEY B
CNZ1
IC1102
28A PROC(SK)9
28B PROC(SK)8
28C PROC(SK)7 KEY BORDER GEN IC1107(1/2)
1D TARGET LIGHT
28D PROC(SK)6
29A PROC(SK)5 CLIP IC1308 IC1312
FROM SKP GAIN DENS.
29B PROC(SK)4 IC1309 INTENS.
29C PROC(SK)3 2 0 CLIP MACH
29D PROC(SK)2
2D MIX1 NAM1 MIX2 ADR , GAIN CANCEL
D X
X.Y
30A PROC(SK)1
30B PROC(SK)0 IC1105
CNZ1 0
KEY /SK BRICK V 2 S/H
D 3 4D
8C SKP VIDEO 9 MOD
9A SKP VIDEO 8
IC1301 IC1304
9B SKP VIDEO 7
9C SKP VIDEO 6
IC1302,1303
FROM SKP
10A SKP VIDEO 5 MOD X
10B SKP VIDEO 4 SIN WIPE INT/EXT
10C SKP VIDEO 3
11A SKP VIDEO 2
11B SKP VIDEO 1
11C SKP VIDEO 0

CNY1
17C WIPE B
IC1101(2/2)
17D WIPE A
Y/C MPX
18A WIPE 9
C
18B WIPE 8 D
18C WIPE 7
AXIS CTL
18D WIPE 6 V GRAPHICS
FROM WKG IC714(2/2) IC715
19A WIPE 5
19B WIPE 4 DL D
Y
19C WIPE 3 5D
19D WIPE 2
20A WIPE 1 V GRAPHICS EN
20B WIPE 0

CNZ1 K GRAPHICS EN
30C AXIS 3 IC726
IC718,719
FROM WKG 30B AXIS 2
30A AXIS 1 LEVEL K GRAPHICS

3-24 3-24 DME-3000/7000


DME-7000
Block Diagram KPC-9 (2/2) KPC-9 (2/2) Block Diagram

REC/V
RECURSIVE DEFOCUS VIDEO
CNY1
V FILTER
IC1001 PROC VIDEO 9 20C
IC1004 LIGHT V MIX IC910
DMPX PROC VIDEO 8 20D
0 IC911 PROC VIDEO 7 21A
Y/C Y Q DIAG IC913 IC912
X H FILTER PROC VIDEO 6 21B
IC1006 IC1016 4 1 DL
D D PROC VIDEO 5 21C
IC1002 IC1012,1013 MPX MIX1 MIX2 2D TO CMB/VIF
PROC VIDEO 4 21D
DL Y P Y Y/C
1H
X + H FILTER MIX FRAME MEM PROC VIDEO 3 22A
PROC VIDEO 2 22B
C
PROC VIDEO 1 22C
IC1003 I 4D
X IC906 PROC VIDEO 0 22D
DL
IC907
1H
SEL IC908
DL 1
IC1005 3D
36/29
DL
1H+
MAT1
V FILTER
IC1009
2
NAM1 FIL
C IC1118
X H FILTER IC1119
IC1011
3
IC1007 IC1014,1015 D NAM2
DL
1H
X + H FILTER MIX FRAME MEM 27 13.5

IC1008 V GRAPHICS EN
X
DL V GRAPHICS
1H

IC1010
DL
1H+

IC912 CNZ1
5D RECUR O/U 31A

CNZ1 TO CMB

D RECUR V 31B

RECURSIVE DEFOCUS KEY

V FILTER CNY1
IC1201
IC1204
DMPX PROC KEY 9 23A
LIGHT K MIX IC1107(2/2)
PROC KEY 8 23B
SK/K K IC1113
X H FILTER PROC KEY 7 23C
IC1206 IC1216 IC1112 IC1115 IC1114
PROC KEY 6 23D
IC1202 IC1212,1213 MPX DL 4 DL
D D PROC KEY 5 24A
DL K SK/K 27D NAM2 3D TO CMB/VIF
1H
X + H FILTER MIX FRAME MEM PROC KEY 4 24B
PROC KEY 3 24C
SK
PROC KEY 2 24D
IC1203
X 1 PROC KEY 1 25A
DL 3D FIL
PROC KEY 0 25B
1H
WIND MASK

IC1205
DL
K GRAPHICS EN
1H+
K GRAPHICS

V FILTER
IC1209

SK
X H FILTER
IC1211
IC1207 IC1214,1215
DL
1H
X + H FILTER MIX FRAME MEM

IC1208
X
DL
1H

IC1210
DL
1H+

SHADOW
IC1111 Key memory and recursive block

IC1110
2D
D KPC-9 (2/2)
DL BKDM-7060
MASK SK F.MEM
LOT NO. 508-
IC1313 FOR DME-7000
DL
B-¥BKDM7060-KPC9-BD
41D

DME-3000/7000
DME-7000 3-25 3-25
Block Diagram MPU-70 MPU-70 Block Diagram

DME-3000 (SY) : S/N 50001 and Higher


DME-7000 (SY) : S/N 10001 and Higher

IC306
BUFFF 7 7
SERIAL CONTROL

RST
CNM2
CS14 14
] ]
IC301 IC304,306 CS1F 25
CNX1
IC308 IC307
TO CPU 5B R DATA CNM3
5A W DATA DRIVER CS20 1 TO MPU-72
4A CKD & ] ] PLUS GEN1
CS27 8 PLUS GEN2 29 HBLK
FROM 4B SADD RECEIVER SERIAL (KEY DLY,
CPU (HBLK,LD)
6A RST CNM1 OVER SMPL)
INTERFACE
6B CKX RST HBLK(DLY) 11
CNX1 IC302
4 33 21 26 DLY CTL(KEY) DLY CTL(KEY)
5C-7C SOLT 4-2
EEPROM OVER SMPL OFF OVER SMPL OFF

CNM3
NONL CTL NONL CTL
12 NONL CTL
CNM3
16
FROM
MPU-72 13-28 NX15-NX0 NX15-NX0 NX15-NX0

CNM3

29-44 NY15-NY0 NY15-NY0 NY15-NY0


16
DIP SW CS
19

32

30 4

IC311 IC313 IC416


8 19 32 16 32 15 32 11 8 7 10 11 16 ZXS
16 16
A00-15,17,22,23

ZX 4D

LCS1,LCS2,LAU1,LAU2
A04-06,11,12,22,23
ZX0-15 ZXN0-15
D00-29 SUPER ZX00-22 INT
INTERPOL FLOAT IC401,404,406,408,410
LCS1 5
D00-07

D00-31

A00-15

D00-31

A00-14

D00-31

A00-10

D00-07

D00-09

A00-10

D00-15
ZXE0-4 A 5
A-B ZXE0-4
E0-4 B
IC403
10,2 23
IC230

ZXO0-22
VSAW CS IC228, SAMPLE ZXS
229

ZX0-15
IC415
HD0-HD9,HD1,HD2 IC413,IC414

LD
16

D00-D09
CNM2 7 N I/N ZX0-15 SAMPLE
FROM 10,2
MPU-72 26 MPU72 SENSE IC211,212,213,
P2-8

218,219,220, 4 10 IC309,
IC208, 221,222,223, IC214,215,216,217 IC225 IC226 IC227 IC305 13 310
S3 IC202 209 224 IC312 IC314 IC417
15 TYS
DIP-SW A00-14 H-SAW 16 16
Dual Port ADDRESS TY 23 4D
EMU MODE ROM SW RAM V H Dual Port TY0-15 TYN0-15
RAM DECODE D00-D29 SUPER TY00-22 INT
DSP (No.Mt) D00-32 COUNTER COUNTER RAM
D202,203 INTERPOL FLOAT IC402,405,107,409,411
32 LCS2 5
LED TYE0-4 C 5
FD , RUN IC207, TYE0-4
201 C-B
9 E0-4 B
SW 10,2 IC207 IC201

HA0-HA9
CONT HALF CK1
SD24-31
SA0-10

CNE1
SA2-16

SD0-31

1 EMU1
IC10 WE OE CE
5 EMU2 D
CS IC201
9 EMU3
LSB HALF CK2
11 EMUH3 15 32
ADDRESS
CNY1 11 8
DECODE
TO CPU 21C -DSPACK1
WKB 21D -DSPACK0

CNM2
10
FROM 29-38 PZ9-0 PZ0-9
MPU-72
IC11,12,13,14
CNY1
10A-17A
FROM/TO 32 32
CPU 10D-17D BUS
SD31-SD0 SD0-31
WKB 10B-17B BUF
SA0,1,19-23

10C-17C

Z L/N CTL
CNM1

FROM/TO 47-78 SD31-SD0


MPU-72 IC7,8,9
CNY1 7
3A-8A
24 24
3B-8B BUS
FROM CPU SA23-SA0 SA0-23
3C-8C BUF
3D-8D

3-26 3-26 DME-3000/7000


Block Diagram MPU-70 MPU-70 Block Diagram

CNM2
RCS 7
CKD02 8
SADD 9
SDAT 10 TO MPU-72
CKX 11
RESET 12
SDI0 13

NONL CTL
CNM2
CTL
16 CTL 42
16
NX15-NX0 TO MPU-72
H15-H0 43-58
IC614,615
16

H15-H0
3
NY15-NY0
IC616,617
CNZ1
10 KEY 10 10
DLY K0-9 D K0-9 MPU KEY9-0 12A-15A

MPU KEYO-9
16
IC509
IC618,619
16 IC513,514
515,516 DIAG
B P IC511
IC507,503,504 BUS CNZ1
CTL CTL 11,4 11,4 16
SEL X
12,4 MX 0-10,-1--14 0-10,-1--14 H RADD2 15-1 18C-23B
XA0-XA11,XA-1-XA-4 X0-X11,X-1-X-4 A Q 0-10,-1--14 X
H RADD2 0 23C
IC418 IC501,IC203 IC502 ADDR 12,4 11,4 ADDRESS IC517,518 TO CPU,WKG,CMB
ZXSN 15 TXOVF
12,4 12,4 CTL X KEY-GEN D KPC,DPR
12,4 DIAG
FLOAT Y
X0-X11,X-1-X-4 OVER 12,4 CNZ1
INT 11,4 11,4 16
CTL SMPL XB0-XB11,XB-1-XB-4 12,4
ALU1 SAMPLE MY 0-10,-1--14 0-10,-1--14 V RADD2 14-0 24B-29A
16 12,4 SEL 12,4

0-11,-1--4
CLP
DO0-15 YB0-YB11,YB-1-YB-4 V RADD2 15 24A

Y0-Y11,Y-1-Y-4
IC519,520
12,4 12,4 ADDR
12,4 DIAG
35 Y CNZ1
YA0-YA11,YA-1-YA-4
IC510
CLIP 29B
16 12,4 12,4
IC508,505,506 A Q
BUS
T0-15

CNM2
16 SEL Y 16
TYOVF

ZXST
B P V15-V0 59-74 TO MPU-72

CNX1 IC1
10A FCK1(27M) CK(27M)
IC1 CNM1
FROM
VIF CK1(FX27M) 7 TO MPU-72 IC15
IC419 CNY1 RESET CNM1
TYSN 16 CNX1 IC2 CNM1
A19 -RESET RESET 83
DO0-15 10B MCK1(13.5M) CK1(SM13.5M) 8
FLOAT IC4 B19 MCLK MCLK
IC2
INT C19 SIZE1
Y0-Y11,Y-1-Y-4 D CK13.5M
ALU2 FROM CPU D19 SIZE0 BUFF
12,4
IC6 A20 -AS AS TO MPU-72
CNX1 CNM1
B20 -DS -QRW CNM1
9B HZ HZ(DLY) 86
C20 R/W -QRW 81
7B VD VD(DLY) 14
FROM IC2 CNM1
CPU 7A FD D FD(DLY) 15 TO MPU-72
-QRD 82
8A HD HD(DLY) 13
-QRD
9C VZ VZ(DLY) 12
CNX1 CNM1
IC606,607
TO CPU 3B FUSE(5V) FUSE(5V) 84 FROM MPU-72
IC601 CNZ1
6 10 10
Y6-Y11 A P ZI9-0 ZI9-0 Z19-0 8C-11C TO CPU,WKG,CMB
D
TYOVF SAMPLE MPU TL CTL
CK(27M) IC612,613
B Q
TL0-TL15
DIAG
12,4 CNM2
HALF CK2
MPU TL CTL 78
HALF CK1 IC602,603 16
TO MPU-72
MPUTL15-0 79-94
D
IC604,605
23 IC608,607
ZXO0-22 13.5MHz CNZ1
10 10
SAMPLE ZR9-0 ZR9-0 5B-8B TO CPU,WKG,CMB
D

CK(27M) IC609,610
IC621
DIAG
CNM1 3D linear address generator
HALF CK2
HALF CK1
HALF CK2
HALF CK1
10
9 MPU-70
24
CNM1 TO MPU-72 DME-3000/7000
SA23-SA0 19-42 LOT NO. 502- (DME-3000)
LOT NO. 508- (DME-7000)

DME-3000/7000 3-27 3-27


Block Diagram MPU-72 MPU-72 Block Diagram

BKDM-3030 (SY) : S/N 50001 and Higher

IC115
IC315
OVF
DL8 X IN OVF
DET

CN2
IC101,102
43 H15
XL 12.4 IC116
~

D IC315 IC118,119,120
58 H0 OVF F3A
DL8 Y IN OVF 6
DET F3O
5
IC601-611
CN2
IC103,104
IC113,114 IC414-417
59 V15
YL 12.4 F3I RAM TABLE
~

D C
OVF X2 F3
74 V0 DL1I
XY/T
X
1
FROM MPU-70 IC109
Y2 F
OVER/UNDER
Y X 2/MUX
IC106 2 IC520
IC105 IC501-511
11.2
IC117
11.2 25D R D D
12.4 X R 3 F1I RAM TABLE
S/H D 1/2 D D A
12.1 F1
CN2

79 TL15 11.2 Q D D
Y Q 4
~

S/H D D A B
11.2 IC406
94 TL0 IC409
M F 1/F3

ABS
7
12.1 PARA /SERI IC410-413
IC904 D901 F4A
RUN 8
ALE LED
ADDRESS BUS IC110 IC407
DRIVE IC907-910 T F4O I/X
9 10 408
32 IC613-618
IC401,402 ABS IC406
32 ADDRESS CONTROL BUS
F4I
LATCH XPT D RAM TABLE
1
F4

S/P IC820
DATA BUS
IC911-914 IC405 IC403,404
CPU
32 2D F 4/DATA SIF
IDT79R3081 H 2D
DATA
DL4I
CN1 BUFFER G
1 OVER/UNDER
13 HD Y 2/MUX
IC619
14 VD IC512-519
15 FD +5V
TP902 D D
IC915,925 LST F2I RAM TABLE
B
3 IC903 6 F2

CONTROL 27
SIGNAL GEN D D
2
SEL IC916,917
22
S902 1 2 IC111 IC112 F 2/F4 12.4
RESETN Z
MON 32 BOOT CK I
FRROM MPU-70 IC934
IC905 ROM
D902 2 A 11.1 12.0 E
P FSI
LED VD B
REFRESH CN4
DRIVE 10.2
CYCLE GEN Q 12.3
TP901 82~96 F5 MIX OUT
IC906,D903-910 OEE
VD CN4
6
VD 10 CK
IC112 CN5
HD 11 8 8BIT STATUS
IC922-924 12.3
URD/WRN 9 LED GEN 11.1 /10.2
IC926-932 2 51~65 DL5 OUT
26
IC808 IC901,902
CN1 ROUTE 12.3
WORK 32
83 RESET RESET SELECT CN4 70~84 DL6 OUT
RESETN D-RAM
IC 12 12.4
S901 XPTOUT 62~67 2
RST IC918-921 15,16 PICTURE ERASE
23
IC940 IC937,938
CN901 TABLE WR ADDR 25~37
32 EFFECT PGM
2 RXD1 RS232C 17~29 F5 HI OUT
MEMORY
CN901 CH1 8 3
1 TXD1 DRIVER
16
TABLE WR DATA 46~57 34~46 F5 LO OUT
8
SIO
IC940
CN902 12.1
X
2 RXD2 RS232C 5
Y
CN902 CH2
1 TXD2 DRIVER IC939,816,810 12.1
7
CN2 TP903 8 ROUTE
IC935,936 1 COM
32 SA0 CONTROL
11 3
~

17
42 SA10

DUAL PORT 8
FROM MPU-70
CN2 RAM
3 IC706,707
71 SD0
8
~

FLOAT
78 SD7 32

INT

3-28 3-28 DME-3000/7000


Block Diagram MPU-72 MPU-72 Block Diagram

IC405
IC208
CMB
4D
IC206
1 X OUT OVF
IC207 OVF IC218
OVF IC213 IC214
IC201,202 IC317
12.3
T Q T CN3
DL1 SHIFT SHIFT 4D D
12.3 12.4 13
N N

~
0 0 KN ADDRESS IC216,217 NX
CONVINER 28
R0 R4 R8 R0 R4
D D
4D
PARALELL DATA

IC203,204 IC205 NARROW


D
OVER/UNDER
DL2

D
IC316 Xz
IC209,210 TO MPU-70
DL9 F4 MPY OVF Xz/MUX
27MHz
IC221
DLX
IC211,212 IC215
IC319 D CN3
IC405 12.4
DIFON NONL CTL 12
4D
IC306 4D D
1 Y OUT OVF
OVF CN3
OVF IC313 KW IC219,220
IC313
D 12.4 15
IC301,302 12.4

~
12.3 D NY
T Q Y
DL3 SHIFT SHIFT 4D D 44
12.3
N N
0 0
WIDE
R0 R4 R8 R0 R4

PARALELL DATA

IC303,304 IC305
D Yz
IC309,310 IC317 OVF
DL4 OVER/UNDER
Yz/MUX
27MHz EXP ON/ OFF
OVF LOGIC
F4 MPY OVF DET ON/ OFF
DLY
IC311,312
2 2

F4 MPY OVF
IC711 DIFON

X OUT OVF
Y OUT OVF
X IN OVF
Y IN OVF
2
CN2
DLZ
MPU72 SENCE 26
CN2
IC710
10 29 TO MPU-70

~
MUX PZ9~PZ0
IC709 38
TP801
IC820
FCK
SIF S/P IC801
CN1
CN1 TP701 7 CXFX FCK
10 HCK 2 HCK 1 IC121
FROM MPU-70 CN4
9 HCK 1
DLY FCK 4
FROM CPU-70
IC803,804 TP802
CK
CN1
8 CXSX CK CN4
CK2 6
CK1 5
FF
CKN 7
IC802
DLY CK 8
TABLE RD MSB 15
IC802

Non-linear address generator


MPU-72
BKDM-3030
LOT NO. 502-
FOR DME-3000/7000

DME-3000/7000 3-29 3-29


Block Diagram MPU-80 MPU-80 Block Diagram

3-30 3-30 DME-3000/7000


Block Diagram MPU-80 MPU-80 Block Diagram

BKDM-7031 (SY) : S/N 10001 and Higher

IC1-11,30-32 CN2
12.4 82
CN1 MIX

~
F5 MIX OUT
62 12
96

~
XPT OUT
73 LO
CN2
IC19,20 IC24,25
12.3 51
CN1

~
DL5 DL5 OUT
25 13 RAM TABLE
65
~

TABLE WR ADDR
CN2
37 F15
IC21,22
12.3 70
CN1 HI

~
DL6 DL6 OUT
42 16
84
~

TABLE WR DATA
57
CN2
CTL REG 4 8
IC12,16
IC18 CN2
2
15
.
COMP DL7 PICTURE ERASE
16

CN2
IC26,27
12.1 17

~
F5 LO OUT
8 29

CN2
IC28,29
12.1 34

~
CN2 F5 HI OUT
10 CTL REG 0 46
RANDOM
CN2 GEN CN2
9 CTL REG 3 CTL REG 7 7

IC13-15,17

Digital sparkle generator


MPU-80
BKDM-7031
LOT NO. 508-
FOR DME-3000/7000
B-¥BKDM7031-MPU80-BD

DME-3000/7000 3-31 3-31


Block Diagram SKP-1 SKP-1 Block Diagram

BKDM-7070 (SY) : S/N 10001 and Higher

DATA BUS

IC516~519 IC524,527
IC512
IC511 ADDRESS BUS
INTR
INT ADRS IC200
SEL IC208
R3081 LATCH
IC201 IC209 IC205
CPU IC177 IC179 IC188
IC549 IC532
EXPONENT
READ READ MICRO
ACK IC520~523 X X/Z
I/O TIMING ADRS PROGRAM X X 1/Z
A X X+B X Y+C X X
CONTROL GEN AREA SEQUENCER &
CLIP
IC560 IC178

CLK
14.3M
GEN MICRO PROGRAM
D CH1
IC534,535 ROM
IC2
IC202 IC206
SLEEP BOOT IC180,181 IC189
CONT ROM EXPONENT
256K BYTE Y Y/Z
IC561 Y X 1/Z
A Y X+B Y Y+C Y Y
&
SLEEP
CLIP
CONT

IC528~531

FLASH
ROM
512K BYTE IC190

IC196,197
Z
A Z X+B Z Y+C Z MANTESSA
IC545,546,548
1/Z
RAS
IC544,547 IC536~543
CAS
SEL
DRAM DRAM
CONTROL 4M BYTE
IC200
IC214
IC203 IC215 IC210
IC191
IC552 IC551 EXPONENT
X X/Z
9.6K RS232C X X 1/Z
CN1 A X X+B X Y+C X X
38.4K DRV SIO &
CN2
REC CLIP

4.9152M OSC D CH2


IC553
IC204 IC211
IC192
IC503,508,509 IC501 EXPONENT
DUAL Y Y/Z
CNY1 A10~D17 SD31~24 D IC1 Y X 1/Z
PORT A Y X+B Y Y+C Y Y
BUFF &
RAM
CNY1 A3~D6 SA23~0 A CLIP
PIF
CS CS
CONTROL

ADRS
DEC
IC193
IC510
IC506 IC198,199
Z
IC550
A Z X+B Z Y+C Z MANTESSA
1/Z
SIF
CONTROL

3-32 3-32 DME-3000/7000


DME-7000
Block Diagram SKP-1 SKP-1 Block Diagram

THROUGH VIDEO

IC228~235

MOTION
IC10~12 IC32 IC75~78 DETECT
IC260~262 V H SCAN CONVERT
IC18,19 IC80,81,83,84,86
IN PROC. IC34~36 IC43~45
IC37,38
Y
IN0 4D S/H H-LPF V-LPF TRANSFORM
CNX1 C16~C19 VIF20~29 OUT1 SEL
S (Y) (Y) MEMORY
E IC247
IN1 MIX1 MIX2 OUT0 (A)
CNX1 B13~B16 KIF20~29 L FREEZE IC39~42 IC251
D E MEMORY DRAM IN3 OUT PROC.
IN2 C IC88~91
CNX1 A20~A23 WASH0~9 T IM X 16 256K X 16 X 4
IC93,94,96,97,99
O CLIP GAIN IC13 IC14
IN3 R IC68
CNY1 C7~D9 EXTV0~9 MASK C
3D S/H H-LPF V-LPF TRANSFORM
DENSITY OUT2 SEL IN0 IC252~254
(C) (C) MEMORY 4D 3D 4D
(B)
MIX NAM VAR OUT0
IN4 4D 3D D SKPV0~9 C30~D32 CNY1
IC259 IC30 2 X 2 1 2 DLY
FCK MCK IC101~104 INTERPOLATOR IN1
DRAM DRAM IC106,107,109,110,112
(Y)
CONT CONT
TRANSFORM 4D
MEMORY MAT1
MIX D
(C)
2
MAT2

IC60 IC61 IC113~116,87,100,118


IC119,121,122,124,125
IC29,256 IC216~219
NAM1 WRITE
MIX TRANSFORM NAM OUT2
IC46 IC49,50 ADRS 4D D PROC0~9 A28~B30 CNY1
1 ADRS MEMORY 1
H-H IN0
SEL (D)
COEF
(Y)
MIX H
4D 4D S/H
IC51,52 1 OUT2
V-H IN1 IN2 IN4
COEF
MIX
2
INTP NAM2 V
3D S/H
COUNT OUT1
IC47,48
H-V IN2 IC126~129
IC257,258 IC131,132,134,135,137
COEF IC222~225

4D TRANSFORM
IC53,54
ADRS MEMORY
V-V IN3 IC249
SEL (A)
COEF
(C)

IN4 IC139~142
IC144,145,147,148,150
MASK FCK MCK
GEN IC63 IC64
TRANSFORM
IC70,72 MEMORY
NAM1
MIX (B)
1
IN0 2 X 2
IC152~155 INTERPOLATOR
IC157,158,160,161,163
MIX H (C)
4D 4D S/H HFILT0~9 B23~B26 CNY1
1 OUT2
TRANSFORM
IN1
MEMORY
D
MIX (C)
2
NAM2 V
3D S/H VFILT0~9 C26~C29 CNY1 IC164~167,138,151,169
OUT1
IC170,172,173,175,176
IC62
IN2 KEY GEN
TRANSFORM
MEMORY IN4 OUT1
3D S/H
4D IC207 (D)
READ ADRS
IN3 CH1 X X IN 4D
XY IC220,221
OUT VARIABLE VAR OUT2
Y Y IN S/H
KEY DELAY DLY
OUT
IC3~8 IC20~26 FCK MCK
CH1 KEY IN0
3D 4D 4D IC226
A10 FCK FCK
CNX1 B10 MCK MCK IC213 ADD OUT0 VARIABLE
TIMING 3D MIX1 MIX2 D
C10 SCK CLK SCK NAM1 DELAY
GEN. CH2 X X IN
A8 HD DRV HD CH2 KEY IN1
B7 VD VD
Y Y IN CLIP GAIN S-CURVE
A7 FLD FLD KEY
OUT
SLEEP CONT
FCK MCK
IC9,15~17 IC27,28

SIF SIF
INTFACE -PIF Advanced Shadow generator

SIF BUS
SKP-1
BKDM-7070
LOT NO. 509-
FOR DME-7000
B-¥BKDM7070-SKP1-BD

DME-3000/7000
DME-7000 3-33 3-33
Block Diagram VIF-6/6A (1/2) VIF-6/6A (1/2) Block Diagram

BKDM-3021 (SY) : S/N 50001 and Higher (VIF-6A)


BKDM-3023 (SY) : S/N 50001 and Higher (VIF-6)

CNY1 IC201,202(1/3)
6A WASH 9 10
FROM WKG WASH 0-9 D
8B WASH 0
CNY1 IC203,202(2/3)
8C EXT VIDEO 9 10
525/625 A B SIGNAL FORMAT FROM EXT VIDEO 0-9 D
L L SMPTE WKG,CMB
10D EXT VIDEO 0
525 H H B CAM Set up 0
CNY1 IC204,202(3/3)
TP601 L H B CAM Set up 7.5IRE
IC601 IC619,620 17C WIPE 11 12 12
CNZ1 625 L L EBU
1 SIGNAL 7 IC603 IC608 FROM WKG WIPE 0-11 D WIPE 0-11
20B AIN YA 6 IC604 10 DELAY 10 20B WIPE 0
CLAMP 13 6 IC605 IC605,Q601 TP603 IC604
TP602 8 4 8
IC602 8 4 3 13 39,40 LINE
CNZ1 6 + BUFF BUFF
1 SIGNAL 7 9 Y
12B AIN BA 9
CLAMP 9 IC606 A/D
2 CONV.
VAB A 6 IC628
2/2 SELECT SIG CLAMP 3 IC517 2
B 13 1
IC625,435 14 AMP 3
IC611, 5 12 2/2 IN FRZ CTL
A IC610 Q604
4 VIDEO 11 TP101
B 2 6 CLAMP
2/2 AY IN MODE FORMAT AMP IC102,Q106
C CONTROL 20 IC103-105 IC106,107
SELECT CNX1
10 ECL 10 10
20B DIN VIDEO A
33,34 S/P AV DATA
525/625 A C SIGNAL FORMAT IC520,601,612-618,626,627, IC102,Q106 TTL
L L SMPTE 629,705,712,Q602,603,
605,702,703,705,706 CNX1 CABLE 18,19 VDA
525 H H B CAM Set up 0 7,8 32 6 34 2/2 SELECT SIG
629-5,11 16B DIN VIDEO B EQUALIZER 13 IC436, IC105,132(1/2)
L H B CAM Set up 7.5IRE 29-35 & PLL Q104
VIDEO VREF 2/2 SELECT SIG
625 L L EBU A/D 22 24 VAB
618-44 CK 2/2 DVO PCK V PCK 2/2
2/2 525/625
GEN. 4
TP701 FROM 2/2 FV ADJ
CNZ1 CN Q103,Q105
IC701 RST TP102
18B AIN B-YA 6 IC702 CK EN
13 6 IC703 Q701,IC703 TP705 IC702 IC707 IC118,Q109, 6 34
CNZ1 TP702 8 4 8 10 IC453, 20 IC119-121 IC122,123
8 4 3 13 39,40 CNX1
10B AIN B-YB 6 + BUFF BUFF Q101 10 ECL 10 10
FROM 9 B-Y 18B DIN KEY A
9 Q107, 33,34 S/P AK DATA
CN 9 IC704 A/D
2 CONV. IC131 24 TTL
VAB A 6
2/2 SELECT SIG CLAMP 3 29-35 CNX1 CABLE 18,19 KDA
C 7,8 32 2/2 SELECT SIG
TP703 22 14B DIN KEY B EQUALIZER 13 IC436, IC121,132(2/2)
5 & PLL Q108
CNZ1 2/2 SELECT SIG
IC708 KAB
16B AIN R-YA 6 IC709 TP706 2/2 DKO PCK K PCK 2/2
13 6 IC710 Q704,IC710 IC709 IC714
CNZ1 TP704 8 4 8 10
8 4 3 13 39,40
8B AIN R-YB 6 + BUFF BUFF
9 R-Y
9
9 IC711 A/D
2 CONV. IC621 IC107,622
2/2 SELECT SIG
VAB A 6
CLAMP 3 29-35 10
10 10 10
A/D
C
22 BUFF
5
10 MPX

IC618
10 8

IC507,512-516, IC623,624
2/2 525/625 518-520,525-528
Q502,503,509 TRS ADD 3 10
12 & BUFF
TP501 518-5,11 LIMITTER
IC501 KEY
CNZ1 IC503 A/D
1 SIGNAL 7 6 IC504 IC508
22B AIN KEY A 13 6 IC505 CK
CLAMP 8 4 6 IC517 IC510 GEN. 29-35
TP502 8 4 2 1 VDA
IC502 8 15 2 6 521-44 22 2/2 SELECT SIG
CNZ1 9 1 AMP
1 SIGNAL 7 9
14B BIN KEY B 9 KEY IC123,522,523
CLAMP 10 TP503 A/D
Q501,IC505 IC504 10 10 10
KAB CONV.
2/2 SELECT SIG 3 13 39,40 D
+ BUFF BUFF
AKS
2/2 SELECT SIG IC506
2 IC521
6 8
CLAMP 3

5 IC524,624
TRS ADD 3 10
12 & BUFF
IC511,Q504 LIMITTER
CLAMP
CONTROL
1 KDA ONLY FOR BKDM-3023(1/2)
2/2 SELECT SIG (COMPONENT DIGITAL/ANALOG I/O BOARD)

3-34 3-34 DME-3000/7000


Block Diagram VIF-6/6A (1/2) VIF-6/6A (1/2) Block Diagram

10
WASH 0-9 WASH 2/2

10
EXT VIDEO 0-9 EXT VIDEO 2/2
IC213(2/2),481-489,461,411,413
MOSAIC 10
10 DIAG VIDEO 2/2
2/2 SERIAL CONTROL SIG. CONTROL
LOGIC 10
+5V
DIAG VIDEO IC216,217 CNY1
IC133,134
10 10 10 VIF1 9 28A
VIF1 0-9 D TO WKG
9 IC215 BORDER MIX VIF1 0 30B
10
0 V1OE
2/2 VIF OE
DISV 10
1 10
IC205(1/2) POSTERI,SOLARI,SEPIA,MONO,CONTRAST,VIDEO H MOSAIC 3
IC108 IC115-116,
IC109-114 117(1/2) PEDESTAL SUB PEDESTAL VIDEO V MOSAIC MAT1 IC218,219(2/2) CNY1
10 10
10 1/N xN ADD MONO Y 12 12 FIFO 12 BORDER MAT A 10 10 10 VIF2 9 1A
Y DATA MPX & 2 MIX1 1
INPUT FREEZE VIDEO 4 MIX2 MIX1 N/A1 N/A2 D 4 B VIF2 0-9 D TO DPR
TBC 10 LINE 3D 11D 4D
FREEZE 4D 4D 3D 3D VIF2 0 3B
CHROMA DATA ADD 4D K
BORDER ON OFF V2OEL
10 NORMAL 2/2 VIF OEL
+5V POSTER,SOLA,CONTRAST D IC207,208 3D LPF 26D MIX2
C 12 IC220,221(1/2) CNY1
IC134,135 1 7D 4D
10 SELECT D 10 10 VIF3 9 25C
4D CROP INV REG6
SEPIA,CONTRAST VIF3 0-9 D TO WKG
12 NORMAL :POSI NAM
9 3 VIF3 0 27D
MONO 4D CROP INV:NEGA NAM WITH KPC
SEPIA MIX 10 V3OE
MIX1 N/A1 N/A2 0 12 2/2 VIF OE
DISV MIX2 A 2
10 4D 3D 3D N/A2 4D D
4D B IC219(1/2)
IC124 0 3D (N/A1)
CNY1
WITHOUT KPC 4 17
10
1 D CROP 13D TO MPU-70,CPU,WKG
TBC CMB,KPC,DPR
12
SEPIA MAT V2OEL
2/2 VIF DEL
MAT1
10

IC221(2/2)
EXT VIDEO 0-9
WIPE 0-11

CNY1
WASH 0-9
TBC KEY

IC214(1/3) KEY CROP 17


Y DATA

4
D CROP ORG 17A TO WKG
WITH KPC
IC206(1/2) EXT LKEY CLIP,GAIN,FILTER,KEY H MOSAIC
10 4 MAT2 V3OE
3D 2/2 VIF DE
4 CLIP KEY V MOSAIC 001H IC228,229
IC205(2/2) D 10
10 GAIN 12 FIFO 12
0 IC117(2/2) 10 1 1 EXT.LUM K 2 DIAG KEY 2/2
3 TRAP MIX1 LPF D N/A2 D
IC125-128 IC129,130 4D 3D 4D 4D MIX2 K1
10 7D 4D 7D 3D 2/2 DIAG DATA EN
1 10 MAT1 INT 4D
10 10 LINE 2 NEGA NAM
INPUT FREEZE KEY 400H
10 3D ADD 0 IC224,225 CNY1
2 FREEZE SELECT 10 IC209,210
4D 3 10 10 10 KIF2 9 3C
+5V NORMAL :A 1
10 CROP INV:B 3D D TO KPC
IC135,136
10

3 KIF2 0 5D
2
K2OEL
10 2/2 KIF OEL
9 10
DIAG KEY IC226,227 CNY1
10 10 KIF3 9 11A
DISK KIF1 0-9 D TO WKG
2/2 IN FRZ CTL IC214(1/3) KIF3 0 13B
IC213(1/2) CROP,BORDER KEY GEN K3OE
WITHOUT KPC 2/2 KIF OE
10
4 10 IC222,223 CNY1
1 MAT2 10 10 KIF1 9 30C
12 CLIP,GAIN S-CURVE 001H
IC211 2 D TO WKG
MIX1 MIX2 LPF 0 KIF1 0 32D
INNER 12 3D 2
0 4D 4D 4D N/A2 D K1OE
SOLID 12 4 2/2 KIF OE
3D 3D
GEN 12 NEGA NAM
1
IC212
MPX
OUTER
SOLID
GEN

Component digital/analog input/output (VIF-6)


Component digital input/output (VIF-6A)
VIF-6/6A (1/2)
BKDM-3021/3023
LOT NO. 507- (VIF-6)
LOT NO. 502- (VIF-6A)
FOR DME-3000/7000

DME-3000/7000 3-35 3-35


Block Diagram VIF-6/6A (2/2) VIF-6/6A (2/2) Block Diagram

BKDM-3021 (SY) : S/N 50001 and Higher (VIF-6A)


BKDM-3023 (SY) : S/N 50001 and Higher (VIF-6)

10
1/2 WASH WASH 0-9
10 IC309 SHADOW,BKGD MIX
1/2 EXT VIDEO EXT VIDEO 0-9 10
0
10
1/2 DIAG VIDEO 10
10

SHADOW MIX
CNY1 IC301,302(1/2) IC304,305 MAT1 BKGD MIX
B
20C PROC VIDEO 9 10 10 10 10 10 MIX1 Y/I/Q
DELAY 2 SHADOW MAT A A MIX2 0
FROM CMB,DPR,KPC D PROC VIDEO 0-9 4D
ADJ B 4D
22D PROC VIDEO 0
11 K
0 3 LPF K
DIAG DATA EN 6D

BKGD
ON
10 OFF
IC214(2/3) IC306 MAT2 REG4
1/2 DIAG KEY
10 LUM WITH KPC KAB 11
3 SHADOW DENSITY 13 IC214(3/3) BKGD MAT PEDESTAL
CNY1 IC303,302(2/2) 10
23A PROC KEY 9 10 10 0 KEY PRIORITY
2 MIX1
FROM CMB,DPR,KPC PROCKEY 0-9 D PROCESS K OUT 11 11 12
0 LPF 3D 3 4 N/A1
25B PROC KEY 0 10 3D 4D 3D
7D (N/A1) 3D
0
BKGD OFF 1BIT
DIAG DATA EN IC214(2/3) MPU KEY,LUM KEY CLIP,
GAIN,SHADOW DENSITY
IC206(2/2) KEY LEVEL CONVERSION
WITHOUT KPC COLOR MONO
3D 11
0 N/A2
CLIP.GAIN BKGD OFF 4D
SHADOW REG6/7
3 DENSITY 400H ON
K
MIX1 A K KEY TRANSPARENT
2 4D MIX2 0 A
4D MAT1
B 4D 758H MIX2
ON 10
0
0 B 4D OFF
REG4/5
CNZ1 80H
FROM CN 6B REF IN
525/625 1/2
IC401
CNX1
8 12 625
6A RST SERIAL CONTROL SIG
TP454
CNX1 IC406 IC462
17 3 10
6B CKX IC452 3 12
FROM CPU MM 6
IC307,436, 2 SYNC 625
IC401 IC402-407,436 SEP. IC426,428-434 IC428
CNX1 414-416,422,613 TP452 CNX1
2 18 403-64 IC454-458 428-17 4-6 INV 16-14
4A CKD REF IC453 FCK1-3(27M) 10A-12A
4 RECEIVER 16 403-53 CONTROL SIG Q451,452 455-17 BUFF
4B SADD TP451 IC451 TP453 5 6 457-1,10 REF
6 & 14 403-54 IC105(2/2),121(2/2), 456-13 MPU-70,
5A W DATA CYCLIC SYNC REF EXIST 1/2 CLOCK
3 DRIVER 17 403-56 132,412 AMP 456-12 IC432 CNX1 TO CPU,WKG
TO CPU 5B R DATA PULSE 454-13,1, GEN. PULSE 430-13 3-5 15-17 CMB,KPC
GEN 458-3 INV SCK1-3(6.75M)10C-12C
CNX1 DATA GEN 430-14 6-8 12-14 DPR
403-46 IC420,421,423, BUFF MCK1-3(13.5M)10B-12B
5C SLOT4 SEL AY IN MODEL 1/2 427,436,453,
403-47 SIRIAL
FROM 6C SLOT3 463-469 IC459
403-48 CONTROL IC408,409, 7
7C SLOT2 DIAG DATA EN 1 428-2
460,461 469-21 6 COMP CLK
404-2 3
V0 FCK
404-3 MODE SIG FD0 HD0
K0 MCK
404-1 TP401 TP402 IC426
625 etc
404-15 SELECT SIG IC424
REF OFFSET 469-27 FD0 5 7 5
VAB(VIDEO IN ACH/BCH) 469-31 HD0 8 6
VDA(VIDEO IN DIG1/ANA) DELAY BUFF TIMING PULSE
KAB,KDA,AKS LINE
5 HZ FD,HD,VD,HZ,
SIRIAL TIMING 17
CTIM,FHZ
CONTROL SIG
TO SIGNAL MCK 4
PARALLEL (RTS,CKEN etc) GEN CKXORG,VD,
VZ,HZ,CTIM
2,4,6,8,11, IC425 CNY1
CTL REG 0 13,15 18
1/2 V PCK CKX DRG 13C TO CPU
1/2 K PCK 2 CNX1
VIF OE 1/2 IN FRZ CTL 1/2 16
FD 7A
VD 7B
KIF OE 1/2 469-25 RED VD 17 BUFF 12
VZ(SPARE 3) 9C MPU-70,
IC435 9
VIF OE 10 8 HD 8A TO CPU,WKG
VIF OEL 1/2 7
IC453 KIF OE 5 OUTPUT 6 HZ(SPARE 2) 9B CMB,KPC
CNZ1 KIF OEL 1/2 5
9 8 4,9 CONTROL CTIM(SPARE 1) 9A DPR
FROM WK8 4A LIGHT ON 3
REF VD(BLK) 8C
IC318-320,324,325, 2
FV ADJ
Q304,308-312
3 4
FV
FV ADJ 1/2
ADJ
3
AD VR CTL

3-36 3-36 DME-3000/7000


Block Diagram VIF-6/6A (2/2) VIF-6/6A (2/2) Block Diagram

IC315 Q303
1
VO
33
FV ADJ
PARA 34 DVO PCK
IC310 Q301 CNX1
IC312 3
10 TTL SERI DRIVER D OUT VIDEO 1 B28 TO CN
LIMITER 10 10 10
COMP.VIDEO Q302 CNX1
W/D CLIP 4
ECL DRIVER D OUT VIDEO 2 B26 TO CN
BLANKING
IC313
TRS ADD 58 10 30 31
TTL 15
12
IC311 13
58 11
ECL 14
LIMITER IC314 IC316 30 31
Q305 CNX1
10 W/D CLIP 10 10 TTL 10 3
DRIVER D OUT KEY 1 B24 TO CN
BLANKING COMP.KEY
Q306 CNX1
TRS ADD ECL PARA 4
DRIVER D OUT KEY 2 B22 TO CN
33 SERI 34
FV ADJ DKO PCK
Q307
1
KO

TP803
D/A IC821
10
IC819,820
10
1-10 IC838 Q805-807 IC839 Q808,IC840 IC841 IC842,844 CNZ1
17 1 7 SYNC 3 RGB 6 AOUT Y 1 30C
Y AMP CLAMP BUFF
ADD MTX AOUT Y 2 30A
D/A
10 RV702
CONV YOUT TP804
COMP.VIDEO DELAY
15 FREQ
TRS ADJ VRI 12 IC824
11
SET 94 BLANKING 36 SET 7 SET 13
SYNC 95 DE MPX 35 SYNC 8 SYNC
DSYNC 93 37 DSYNC 6 9 IC824
8
IC845 10
TP805
IC828,829 1-10 Q809-811 IC846 IC847 IC848 IC849,850 CNZ1
IC801-809, 10 10 10 B-Y
811-817,822,858 17 1 7 3 6 3 RGB 6 AOUT B-Y 1 28A
D/A AMP CLAMP AMP BUFF
DE MTX AOUT B-Y 2 28C
817-23 CONV
MPX RV703
SYNC 817-22
15 BOUT TP806
GEN 817-24 VRI TP807
FREQ
816-22 1-10 IC851 Q812-814 IC852 IC853 IC857 IC854,855 CNZ1
10 TO CN
17 1 7 3 6 3 RGB 6 AOUT R-Y 1 26A
R-Y AMP CLAMP AMP BUFF
MTX AOUT B-Y 2 26C
IC818 D/A
10 IC520,823,827,856 RV704
Q820-Q823 CONV ROUT TP808
COMP.KEY 15 FREQ
D/A VRI
CONTROL
IC833 TP801
TRS 1-10 Q801-803 IC834 Q804,IC835 IC836,837 CNZ1
10 KEY
BLANKING 17 1 7 SYNC AOUT KEY 1 32A
D/A AMP CLAMP BUFF
ADD AOUT KEY 2 32C
CONV
RV701
15 +5V KOUT TP802
VRI
4 IC824 FREQ TP809
6
62 18 5 IC513 Q815-819 CNZ1
DSYNC 9 11 SYNC 1 24A
BUFF
SYNC 2 24C
AD VR CTL

ONLY FOR BKDM-3023(2/2) MODE SIG TP810


(COMPONENTE DIGITAL/ANALOG I/O BOARD)

Component digital/analog input/output (VIF-6)


Component digital input/output (VIF-6A)
VIF-6/6A (2/2)
BKDM-3021/3023
LOT NO. 507- (VIF-6)
LOT NO. 502- (VIF-6A)
FOR DME-3000/7000

DME-3000/7000 3-37 3-37


Block Diagram VIF-9/9A (1/2) VIF-9/9A (1/2) Block Diagram

BKDM-3020 (SY) : S/N 50001 and Higher (VIF-9A)


BKDM-3022 (SY) : S/N 50001 and Higher (VIF-9)

CNY1 IC201,202(1/3)
6A WASH 9 10 10
FROM WKG WASH 0-9 D WASH 0-9
8B WASH 0
CNY1 IC203,202(2/3)
8C EXT VIDEO 9 10 10
FROM CMB EXT VIDEO 0-9 D EXT VIDEO 0-9
10D EXT VIDEO 0
CNY1 IC204,202(3/3)
17C WIPE 11 12 12
FROM WKG WIPE 0-11 D WIPE 0-11
20B WIPE 0 +5V
IC142,143
10

DISV
2/2 IN FRZ CTL
TP1 IC132-134, IC146,148,
IC123-131
Q4,IC104 IC137-139 IC149(1/2)
20 IC106-108 IC113,120 IC114 IC119 10 10
CNX1 10
10 ECL 10 10 10 10 Y DATA MPX &
20B DIN VIDEO A Y/C INPUT
33,34 S/P AV DATA TBC BUFFER 10 LINE
SEP FREEZE
IC102,Q3 TTL CHROMA DATA ADD 4D
CNX1 CABLE 18,19 10
7,8 32 6 24 2/2 SELECT SIG VDA +5V
16B DIN VIDEO B EQUALIZER 13 IC100, IC108,112(1/2) IC117,118
& PLL IC143,144
Q7 5 10
2/2 SELECT SIG VAB CONT.
24 2/2 SERIAL CONTROL SIG. SIG.
2/2 DVO PCK V PCK 2/2
GEN. 9
FROM 4
2/2 FV ADJ
CN IC100, Q6,Q8
Q1 RST TP2 DISV
CK EN Q5,IC105 6 24
20 IC1109-111 IC116,122 IC115
CNX1
10 ECL 10 10
18B DIN KEY A
Q2, 33,34 S/P AK DATA TBC
IC101 24 TTL
CNX1 CABLE 18,19 KDA
7,8 32 2/2 SELECT SIG

10
14B DIN KEY B EQUALIZER 13 IC111,112(2/2)

EXT VIDEO 0-9


IC100,
& PLL

WIPE 0-11
Q9

WASH 0-9
TBC KEY
2/2 SELECT SIG

Y DATA
KAB
2/2 DKO PCK K PCK 2/2

IC205(2/2)
10
0

AV DATA
IC520,603,604, 10
TP600
AIV
610,612-614 A/D 1 3
CNZ1 IC618 IC601 IC608,606 TP602 IC611 Q602,603 IC615 IC617,621 3D
6 608-3 10 10 10 10 10
20B AIN VIDEO A 13 3 6 606-13 39,40 2
8 AMP + BUFF VIDEO
TP601 VIDEO TRS ADD 10
A/D A/D CK 3
CNZ1 9 GEN & BUFF
CONV
12B AIN VIDEO B 29-35 & LIMITTER
VREF CLAMP
VAB 22 CTL
2/2 SELECT SIG
4

Q601,IC602 IC616
2 VDA
CLAMP 2/2 SELECT SIG
FROM
CN IC619,620

AK DATA
SYNC Q604
SEP
AIK
TP500 IC505,507,508,511,514,
CNZ1 IC522 IC523 IC500,510 TP502 IC515 516-518,Q506,Q507 IC519 IC521,524
6 500-3 10 10 10 10
22B AIM KEY A 13 3 6 510-13 39,40
8 AMP + BUFF KEY
TP501 KEY TRS ADD
A/D A/D CK
CNZ1 9 GEN & BUFF
CONV
14B AIN KEY B & LIMITTER
VREF CLAMP
CTL
KAB 4

IC503,Q501 IC520
2 KDA
CLAMP 2/2 SELECT SIG
IC504,506
IC501
SYNC 2
15
504-3 SEP 506-6 1 Q508

AKS 10
2/2 SELECT SIG ONLY FOR BKEM-3022(1/2)
(COMPOSITE DIGITAL/ANALOG I/O BOARD)

3-38 3-38 DME-3000/7000


Block Diagram VIF-9/9A (1/2) VIF-9/9A (1/2) Block Diagram

WASH 2/2

EXT VIDEO 2/2


IC213(2/2),481-490,411,412
MOSAIC 10
10 DIAG VIDEO 2/2
2/2 SERIAL CONTROL SIG. CONTROL
LOGIC 10
DIAG VIDEO IC216,217 CNY1
10 10 VIF1 9 28A
VIF1 0-9 D TO WKG
IC215 BORDER MIX VIF1 0 30B
10
0 VIOE
2/2 VIF OE
10
1 10
IC205(1/2) POSTERI,SOLARI,SEPIA,MONO,CONTRAST,VIDEO H MOSAIC 3

PEDESTAL SUB PEDESTAL VIDEO V MOSAIC MAT1 IC218,219(2/2) CNY1


1/N xN ADD MONO Y 12 12 FIFO 12 BORDER MAT A 10 10 10 VIF2 9 1A
2 MIX1 1
FREEZE VIDEO 4 MIX2 MIX1 N/A1 N/A2 D 4 B VIF2 0-9 D TO DPR
3D 11D 4D
4D 4D 3D 3D VIF2 0 3B
K
BORDER ON OFF V2OEL
NORMAL 2/2 VIF OEL
POSTER,SOLA,CONTRAST D IC207,208 3D LPF 26D MIX2
C 12 IC220,221(1/2) CNY1
1 7D 4D
SELECT D 10 10 VIF3 9 25C
4D CROP INV REG6
SEPIA,CONTRAST VIF3 0-9 D TO WKG
12 NORMAL :POSI NAM
3 VIF3 0 27D
MONO 4D CROP INV:NEGA NAM WITH KPC
SEPIA MIX 10 V3OE
MIX1 N/A1 N/A2 0 12 2/2 VIF OE
MIX2 A 2
10 4D 3D 3D N/A2 4D D
4D B IC219(1/2)
0 3D (N/A1)
CNY1
WITHOUT KPC 4 17
10
1 D CROP 13D TO MPU-70,CPU,WKG,
CMB,KPC,DPR
12
SEPIA MAT V20EL
2/2 VIF OEL
MIT1
IC221(2/2)
CNY1
IC214(1/3) KEY CROP 4 17
D CROP ORG 17A TO WKG
WITH KPC
IC206(1/2) EXT LKEY CLIP,GAIN,FILTER,KEY H MOSAIC
10 4 MAT2 V30E
3D 2/2 VIF OE
4 CLIP KEY V MOSAIC OO1H IC228,229
D 10
GAIN 12 FIFO 12
IC149(2/2) 10 1 1 EXT.LUM K 2 DIAG KEY 2/2
3 TRAP MIX1 LPF D N/A2 D
IC135,136,140,141 IC147,150 4D 3D 4D 4D MIX2 K1
7D 4D 7D 3D 2/2 DIAG DATA EN
10 MAT1 INT 4D
10 10 LINE 2 NEGA NAM
INPUT FREEZE KEY 400H
ADD IC209,210 0 IC224,225 CNY1
FREEZE SELECT 10
4D 3 10 10 10 KIF2 9 3C
+5V NORMAL :A 1
CROP INV:B 3D D TO KPC
IC144,145
10

KIF2 0 5D
2
K2OEL
10 2/2 KIF OEL
9 10
DIAG KEY IC226,227 CNY1
10 10 KIF3 9 11A
DISK KIF1 0-9 D TO WKG
2/2 IN FRZ CTL IC214(1/3) KIF3 0 13B
IC213(1/2) CROP,BORDER KEY GEN K3OE
WITHOUT KPC 2/2 KIF OE
10
4 10 IC222,223 CNY1
1 MAT2 10 10 KIF1 9 30C
12 CLIP,GAIN S-CURVE OO1H
IC211 2 D TO WKG
MIX1 MIX2 LPF 0 KIF1 0 32D
INNER 12 3D 2
0 4D 4D 4D N/A2 D K1OE
SOLID 12 4 2/2 KIF OE
3D 3D
GEN 12
1 NEGA NAM
IC212
MPX
OUTER
SOLID
GEN

Composite digital/analog input/output (VIF-9)


Composite digital input/output (VIF-9A)
VIF-9/9A (1/2)
BKDM-3020/3022
LOT NO. 503- (VIF-9)
LOT NO. 502- (VIF-9A)
FOR DME-3000/7000

DME-3000/7000 3-39 3-39


Block Diagram VIF-9/9A (2/2) VIF-9/9A (2/2) Block Diagram

BKDM-3020 (SY) : S/N 50001 and Higher (VIF-9A)


BKDM-3022 (SY) : S/N 50001 and Higher (VIF-9)

10
1/2 WASH WASH 0-9
10 IC309 SHADOW,BKGD MIX
1/2 EXT VIDEO EXT VIDEO 0-9 10
0
10
1/2 DIAG VIDEO 10
1

SHADOW MIX
CNY1 IC301,302(1/2) IC304,305 MAT1 BKGD MIX
B IC321 IC322
20C PROC VIDEO 9 10 10 10 10 10 MIX1 A Y/I/Q 10 10 10
DELAY 2 SHADOW MAT A MIX2 0
FROM CMB,DPR,KPC D PROC VIDEO 0-9 4D B
ADJ 4D D2 LIMITER
22D PROC VIDEO 0
11 K
0 3 LPF K I/Q 10 ENCODER
2
DIAG DATA EN 6D S/H

BKGD
ON
10
IC214(2/3) IC306 10
1/2 DIAG KEY OFF
10 LUM WITH KPC KAB 11 MAT2 REG4
3 SHADOW DENSITY 13
CNY1 IC303,302(2/2) 10
0 KEY PRIORITY IC214(3/3) BKGD MAT PEDESTAL
23A PROC KEY 9 10 10 10 MIX1
2 PROCESS
FROM CMB,DPR,KPC D
25B PROC KEY 0 K OUT 11 11 12
0 LPF 3D 3 4 N/A1
0 3D 4D 3D
7D (N/A1) 3D
DIAG DATA EN IC214(2/3) MPU KEY,LUM KEY CLIP. BKGD OFF 1BIT
GAIN.SHADOW DENSITY

WITHOUT KPC IC206(2/2) KEY LEVEL CONVERSION


3D
COLOR MONO
11
CLIP.GAIN 0 N/A2
SHADOW BKGD OFF 4D
3 DENSITY
REG6/7
K 400H
MIX1 A ON
2 4D MIX2 0
4D 4D K KEY TRANSPARENT
B MAT1 A
758H ON 10
MIX2 0
0
B 4D OFF
REG4/5
80H
CNZ1
FROM CN 6B REF IN
IC400
CNX1
8 12 Q400,401,
6A RST SERIAL CONTROL SIG REF SYNC SCH
IC426,430,432, IC415,422,431,446-448
CNX1 REF 438-441,444, TP406 TP404 450-458,460-465,
17 3 IC307,406,418,
6B CKX TP405 445,456,467,508467-7 53
IC449
43
468,470,508 IC448
420-422 SY2 SCH CNX1
FROM CPU IC401 IC401,402,404, REF 439-1 54 12 415-17 7-9 INV 11-13
SYNC SY1 WIN REF NG FCK1-3(28.6M)10A-12A
IC400 406,408,455,466 CONTROL SIG 441-5 BUFF
CNX1 2 GEN REF EXIST MPU-70,
4A CKD 18 404-64
4 RECEIVER 16 CYCLIC VIDEO CLOCK TO CPU,WKG,
4B SADD 404-53 IC108(2/2),111(2/2), IC452 CNX1
6 PULSE CLOCK PULSE 468-13 3-5 15-17 CMB,KPC,
5A W DATA & 14 404-54 112,413 INV SCK1-3(7.15M)10C-12C
3 GEN GEN GEN 468-14 6-8 12-14 DPR
TO CPU 5B R DATA DRIVER 17 404-56 BUFF MCK1-3(14.3M)10B-12B
DATA
DIAG DATA EN
SEL
404-46
5C SLOT 4 IC409,410, MODE SIG
404-47 SIRIAL CLK
FROM MB 6C SLOT 3 459,490
404-48 CONTROL FCK
7C SLOT 2 SELECT SIG IC423-425,427-429 FDO HDO
MCK
455-2 433-437,443,406 TP401 TP402 IC442
V0 SERIAL VAB(VIDEO IN ACH/BCH) etc
455-3 TO VDA(VIDEO IN DIG1/ANA)
K0 436-27 FDO 5
455-1 PARALLEL KAB,KDA,AKS IC447
REF NG TIMING 436-31 HDO 8
455-15
REF EXIST CONTROL SIG SIGNAL 7 5
GEN 5 6
(RST CKEN etc) DELAY TIMING PULSE
LINE IC417
CTL REG 0 CKX,BOXYDO,VDO, HZ 4 BUFF FD,VD,HD,
6 9
HZ,CTIM CFO 5 HZ,CTIM,FHZ
TP403 MCK 5
1/2 V PCK VIF OE 1/2 IC149 CNX1
KIF OE 1/2 2 18
1/2 K PCK 436-34 DELAY 11 REF VD(BLK) 8C
IC417 11 LINE 17 IC446 CNX1
VIF OE 10 8 11
VIF OEL 1/2 CF 8B
IC100 KIF OE 13 OUTPUT 11 436-25 12
CNZ1 KIF OEL 1/2 CTIM(SPARE1) 9A
11 10 9,12 CONTROL 2-4, 13
4A WKG IN 2 HZ(SPARE2) 9B TO MPU-70,
IN FRZ CTL 1/2 7 6-9 14
BUFF HD 8A CPU,WKG,
IC317-320,325, 2 VZ(SPARE3) 9C CMB,KPC,
FV ADJ 16
Q304,308-312 VD 7B DPR
3 4 17
FV FD 7A
FV ADJ 1/2 18
ADJ CNY1
CKX ORG 13C TO CPU
3
AD VR CTL

3-40 3-40 DME-3000/7000


Block Diagram VIF-9/9A (2/2) VIF-9/9A (2/2) Block Diagram

Q303
IC315
1
33 VO
FV ADJ
PARA 34
DVO PCK
IC310 IC323 IC312
Q301 CNX1
10 10 DATA TTL 10 SERI
LIMITER DRIVER D OUT VIDEO 1 28B TO CN
COMP.VIDEO
W/D CLIP CONV. Q302 CNX1
ECL
BLANKING DRIVER D OUT VIDEO 2 26B TO CN
TRS ADD IC313 15 30 31
52 CKD 10
TTL 12
IC311 13
52 CKD 11
ECL 14
LIMITER
W/D CLIP IC326 IC314 IC316 30 31 Q305 CNX1
BLANKING 10 10 DATA TTL 10 DRIVER D OUT KEY 1 24B TO CN
TRS ADD COMP.KEY Q306 CNX1
CONV. PARA
ECL DRIVER D OUT KEY 2 22B TO CN
33 34
FV ADJ SERI DKO PCK
Q307
1
K0

D/A
TP703
IC700(1/2),701 IC703 Q701,703,705 IC712,708 IC710 CNZ1
10 10 13
17 712-3 708-7 A OUT Y 1 30A
VIDEO AMP CLAMP BUFF 11
TRS 2,4 A OUT Y 2 30C
D/A
BLANKING 1-10 CONV
15 TP702
VRI

Q706,707,
IC508,713,744
TO CN
D/A
CONTROL

TP701
IC700(2/2),704 IC702 Q700,702,704 IC711,707 IC709 CNZ1
10 10 13
17 711-3 707-7 A OUT KEY 1 32A
KEY AMP CLAMP BUFF 11
TRS 2,4 A OUT KEY 2 32C
D/A
BLANKING 1-10 CONV
AD VR CTL

15 TP700
VRI
ONLY FOR BKDM-3022(2/2)
(COMPONENTE DIGITAL/ANAOG I/O BOARD)

Composite digital/analog input/output (VIF-9)


Composite digital input/output (VIF-9A)
VIF-9/9A (2/2)
BKDM-3020/3022
LOT NO. 503- (VIF-9)
LOT NO. 502- (VIF-9A)
FOR DME-3000/7000

DME-3000/7000 3-41 3-41


Block Diagram WKG-13 (1/2) WKG-13 (1/2) Block Diagram

3-42 3-42 DME-3000/7000


Block Diagram WKG-13 (1/2) WKG-13 (1/2) Block Diagram

BKDM-3040 (SY) : S/N 50001 and Higher

IC312~319
UPD42264
IC321~324
#2
UPD72123 IC304 IC31O,311
#1 16
4
MA GVRAM P S
16 16 16 IC320
DAD DLCTL8
CNZ1
16 64KX16
MAD SLOP 29C
AX1S3~0
D DL D 30A~30C
GEN
GDC IC307,308,309
IC325 IC326
EMP7032
CN4
IC114,115,116,113
ADRS 8
18 8 A27~A2

LATCH
D15~D0

IC201 IC113
IC306 IC320

READY GDC VRAM VRAM


IC305
CONT CONT READ RD,WD,DTENB
EPM7032
IC300,301 IC327
SYSCLK,RESET
302,303 CONT CONT
SYSTEM CLOCK GEN OSC 26 16 CN5
IC8,9 EPM7032 EPM7032 DIN,DOUT
ADRS 19.66MHZ
16 CKD,ADR
DATA
CNX1
RSK
MPX
10A FCK2(27M) 2CK0~4 CKX
IC100 R3081 IC101
IC105,106 CX8052 IC13 CX8052 IC500
2CKN0~2 107,108
ACK TO CXD8XXX
MON 4 32 A2~A27
INT INT AD
IC10,11 S2 SEL ADRS

LATCH Y04
CNX1 I/O PORT
RISC

~
10B MCK2(13.5M) D CK0~11 Serlal
CPU Y3B
IC109,110,111,112 I/O PORT DEC
X1
CONT
CNX1
OSC RST
7A FD CONT D0~D31
IC12
50MHZ
7B VD
(Board
8A HD [CPU SIDE]
FD
8B CF D VD IC200 SIDE)
HD EPM7032
CF

Serlal Bus
ROM
IC3 CX8058 IC14
CONT TP200
LST IC220,209
CNY1 EPM7032 IC208 IC104 Parallel
8 8 210
10A~11D SD31~24 DRAM 211 por1
LED
CONT
DRV
CX8058 IC15,16
IC1,2 INTR IC5

STATUS DALAY
CNY1 DL1

~
11 11 CONT
6B~8D SA10~0 DL8
W TP1
20C R/W COM
DUAL
R BOOT SYSTEM SYSTEM COMM
PORT DRV
COM1(9.6K) 1,2 CN1
ROM ROM RAM CONT
RAM
(Flash) RS232C
IC1,4 IC305 2KX8
COM2(38.4K) 1,2 CN2
REC
CNY1 64KX32 128KX32 1MX32
5 5 MAX232C
3A~4A SA23~19 ADRS HN27C1024 AM29F010 MSM514400 MB89371
IC7
CS IC202,203 IC204,205 IC212~219 IC6
20A AS DEC 206,207

CNY1

19A RESET

IC102
RESET
RESET
S1 FC

Wipe pattern generator and graphics generator


WKG-13 (1/2)
BKDM-3040
LOT NO. 502-
FOR DME-3000/7000

DME-3000/7000 3-43 3-43


Block Diagram WKG-13 (2/2) WKG-13 (2/2) Block Diagram

BKDM-3040 (SY) : S/N 50001 and Higher

WIPE
IC700 IC701 IC703 IC705 IC706
CXD8053 CXD8059 CXD8063 CXD8190 CXD8062
IC804
CXD8062
IC800,801
HV H H TRIANGLE BASIC
DLY
SIN
MOD MOD SAWTOOTH WAVE SOLID D
8ck
ROM
GEN GEN ROTATION GEN GEN
CN4/5
IC613,614 GEN
INNER
IC616 IC702 IC704 IC707 IC805
BORDER
CXD8053 CXD8059 CXD8063 CXD8060 CXD8062
CXD8062
KEY
IC615
FRINGE V V POLAR SPIRAL

MOD SAWTOOTH MOD

GEN GEN ROTATION GEN


COORDINATE
WIPE

IC611 IC806 IC810 IC813 IC814 IN4 IN3


CXD8062 807 CXD8838 CXD8062 CXD8062
IC503 IC504 IC608 CXD8331 IC912
CXD8058 CXD8190 MX23C4000 CXD8063 IC817
INTER- BUFF CXD8061
IC815,816
MAIN 5 POLATE
IC609,610 PATTERN CLOSED
PAT PAT PATTERN SPRING RAM MPX IN0 S

~
ENHANCED INNER
I/r E
ADRS D MOD D A A 13 IN2 (BORDER)
SUB 12 SOLID L D
SIZE PATTERN
MAIN/SUB MPLX POM ADDER
IC606,607 OUT1
IC612 IC808 ROM GEN #10271~
IN CLIP GAIN
CXD8062 809
IC604,605 CNY1
IC603 CONT NAM/ADD
IC602 12
CXD8059 CXD8062 INTER- BUFF D D 22~25B WIPE
S
POLATE
OUTER
RAM E
(WIPE)
POLYGON POLYGON
L D
B B
OUT2
ADRS STAR
OUT CLIP GAIN
GEN CONT

IC507,508 IC509,510
515,516 515,516
IN2 IC916 CXD8331
ROM IC600,601 RAM IC8O2,803
TP500 TP501
Read TRANFER
VD HD 4Delay
D D S
ADRS ADRS DLCTL2
GEN S E
GEN MAT2 IC919,920
IC923,924
MAT1 E L CNX1
MASK
WIPE IN0 OUT0
SYNC L X D VDL D VIF2 16C~19C
PULSE IN1 X
IC502,505,506,511
GEN DLCTL1
IC900
IC902
CNY1
903 4Delay
10 D VDL
28A~30B VIF1
10 IN3 IN4
25C~27D VIF3
D VDL
IC904
IC913
905
CXD8331 OUT1
IC901
DLCTL3

D
CN5 IC925,926
OUT2
4Delay D
S
IN4
S E
SEL
E
X L
L
IN3
S Key/Border Denslty
IN2 E 5Deiay
L
DLCTL4 DLCTL5
IC906
IC908 0
CNY1 S MASK/KROP IC917,918 IC921,922
909
10 IN0 E CNX1
D VDL
30C~32D KIF1 L OUT0
10 IN1 X 4Delay D VDL D KIF2 13B~16B
26C~29C KIF3
D VDL
IC910
CNX1
IC907 911
DLCTL6

3-44 3-44 DME-3000/7000


Block Diagram WKG-13 (2/2) WKG-13 (2/2) Block Diagram

COLOR MIX

#10001~#10240
IC401 IC402 IC404 IC406 IC407 IC409 800~000h
CXD8058 CXD8059 CXD8063 CXD8190 CXD8062 CXD8065

IC411
F,V,H H TRI-ANGLE BASIC
H KEY
WAVE
Pluse SAWTOOTH SOLID
ROTATION GEN
GEN GEN GEN GEN

DLCTL7
NAM/ADD IC412,413
IC403 IC405
CXD8059 CXD8063 IC408 IC414,415
CXD8060 CNX1
S
MIX OUT0 10
V D VDL D WASH 20A~23A
V E
POLAR
SAWTOOTH L
ROTATION COORDINATE
GEN
3ck~1H

IC916
#10241~
IN2
IN2
CXD8331 IC411

IN1

DLCTL7
Cooh
IC410 MAT2 IC412,413
CY7C271
IC414,415
CNX1
1 OUT0 10
ENBOSS
IN0 MIX D VDL D WASH 20A~23A

ROM
Goln OFSET
S 3ck~1H
MAT1 S OUT1
CN5
E D
E
IN3 L
T

CNX1
IN4
23B~26B EXT VIDEO D 4Delay

IC915

Wipe pattern generator and graphics generator


WKG-13 (2/2)
BKDM-3040
LOT NO. 502-
FOR DME-3000/7000

DME-3000/7000 3-45 3-45


Block Diagram WKG-16 WKG-16 Block Diagram

BKDM-7041 (SY) : S/N 10001 and Higher

CN2
IC406 IC103 IC106
15 HD
16 VD TIMING BOX WIPE KEY&MATTE
17 FD PULSE1 GEN. GEN.

IC407 IC104

CN2 TIMING POLAR


MEM TIM
83 CKD PULSE2 COORDINATE
IC111
84 ADR
85 DIN
IC411
87 RST
88 CKX SER/PARA CLIP
MIX

IC107~110
CN2
21~30 V IN
SEL CN2
45~54 K IN SEL
V OT 33~42
IC205 IC206 IC211 KEY OT 57~66
IC209 VIDEO MAT 71~80
2H DL
IC207
IC204 EDGE NON-

1H DL ABS LINEAR

DETECT
TRANS MIX
CLIP

IC203

VR DL
IC311

BUFFER

IC312~315
CN1
51~66 D BUFFER

IC301~310 IC316~321
CN1
IC322
23~48 A ADRS GEN ADRS
FRAME
CN1 DIO BUFFER
MEMORY
13 RDN MEM TIM CTNT GEN R/W
14 WRN
15 DATA ENN
SYSCLKN
Digital sketch generator
16
17 RESET
WKG-16
BKDM-7041
LOT NO. 509-
FOR DME-3000/7000
B-¥BKDM7031-WKG16-BD

3-46 3-46 DME-3000/7000


Section 4
Schematic Diagrams
DME-3000 Digital Multi Effects BKDM-3010 DME Control Panel
1
No. Board name Circuit function Model name Page No. Board name Circuit function Model name Page

1 CMB-1 Combiner, lighting and Z recursive BKDM-3050 4-2 1 CPU-119 System control communication display BKDM-3010 4-36
2 CN-753 Rear panel DME-3000 4-26 2 KEY-32A Key switch BKDM-3010 4-98
3 CPU-114 System control and communication DME-3000 4-28 3 KEY-32B Key switch BKDM-3010 4-99
4 DPR-35 Video memory DME-3000 4-58 4 KEY-32C 10 Key BKDM-3010 4-99
5 KPC-2 Key memory and recursive block BKDM-3060 4-100 5 SE-214 Photointerrupter BKDM-3010 4-99
6 LE-76 Power indicator DME-3000 4-192
7 MB-438 Mother board DME-3000 4-142
8 MPU-70 3D linear address generator DME-3000 4-156
9 MPU-72 Non-linear address generator BKDM-3030 4-168 2
10 MPU-80 Digital sparkle generator BKDM-7031 4-190
11 RE-104 Power supply DME-3000 4-192
12 VIF-6 Component digital/analog input/output BKDM-3023 4-224
13 VIF-6A Component digital input/output BKDM-3021 4-238
14 VIF-9 Composite digital/analog input/output BKDM-3022 4-248
15 VIF-9A Composite digital input/output BKDM-3020 4-266
16 WKG-13 Wipe pattern generator and graphics generator BKDM-3040 4-278
17 WKG-16 Digital sketch generator BKDM-7041 4-298

3
DME-7000 Digital Multi Effects
No. Board name Circuit function Model name Page

1 CMB-1 Combiner, lighting and Z recursive BKDM-3050 4-2


2 CN-1256 Rear panel DME-7000 4-24
3 CPU-196 System control and communication DME-7000 4-42
4 DPR-70 Video memory DME-7000 4-74
5 KPC-9 Key memory and recursive block BKDM-7060 4-116
6 LE-76 Power indicator DME-7000 4-192
7 MB-660 Mother board DME-7000 4-150
8 MPU-70 3D linear address generator DME-7000 4-156 4
9 MPU-72 Non-linear address generator BKDM-3030 4-168
10 MPU-80 Digital sparkle generator BKDM-7031 4-190
11 RE-104 Power supply DME-7000 4-192
12 SKP-1 Advanced Shadow generator BKDM-7070 4-194
13 VIF-6 Component digital/analog input/output BKDM-3023 4-224
14 VIF-6A Component digital input/output BKDM-3021 4-238
15 VIF-9 Composite digital/analog input/output BKDM-3022 4-248
16 VIF-9A Composite digital input/output BKDM-3020 4-266
17 WKG-13 Wipe pattern generator and graphics generator BKDM-3040 4-278 5
18 WKG-16 Digital sketch generator BKDM-7041 4-298

DME-3000/7000 4-1 4-1


I J K L M N O P
Combiner, lighting and Z recursive CMB-1 (1/11) CMB-1 (1/11) Combiner, lighting and Z recursive

BKDM-3050 (SY) : S/N 50001 and Higher

1 2, 10/11 VAR. DELAY RST

12

15
2, 10/11 ADV ≠≠≠
2FS
≠≠ 0
OVER/UNDER DEMULTIPLEX
Y/C MULTIPLEX 5V
C8 C9
IC1 0.1 0.1
5V 74AC541SJ IC43
C1 CXD8331Q
0.1 IC41
IC5 HM63021FP-28

R10 1k
HM63021FP-28 16 41 65 91 B 122 134 B

R1 1k
R2 1k
R3 1k
R4 1k
R5 1k
R6 1k
R7 1k
R8 1k
R9 1k
20 10 B B
CNY1 A 123 135 A
2 18 4 24 81 49 9 9 4 24 9 A A
DPR,Y1-28A 28A PROC (Y) 9 A16 P16 9 124 136 9
3 17 5 23 82 IC8 48 8 8 5 23 8 9 9
DPR,Y1-28B 28B PROC (Y) 8 A15 CXD8838Q P15 8 125 137 8
4 16 6 22 83 47 7 7 6 22 7 8 8
DPR,Y1-28C 28C PROC (Y) 7 A14 P14 7 126 138 7
5 15 7 21 84 46 6 6 7 21 6 7 7
DPR,Y1-28D 28D PROC (Y) 6 A13 P13 6 127 143 6
6 14 8 20 85 45 5 5 8 20 5 6 6
DPR,Y1-29A 29A PROC (Y) 5 A12 P12 5 128 IN0 OUT0 144 5
7 13 9 19 86 44 4 4 9 19 4 5 5
DPR,Y1-29B 29B PROC (Y) 4 A11 P11 4 129 145 4
8 12 10 18 87 43 3 3 10 18 3 4 4
DPR,Y1-29C 29C PROC (Y) 3 A10 P10 3 130 146 3
9 11 11 17 88 42 2 2 11 17 2 3 3
DPR,Y1-29D 29D PROC (Y) 2 A9 P9 2 131 147 2
1 5V 1 89 39 1 5V 2 2
DPR,Y1-30A 30A PROC (Y) 1 A8 P8 1 132 148 1
0 1 19 28 15 0 92 38 0 28 15 1 1
DPR,Y1-30B 30B PROC (Y) 0 VDD DEC4 A7 P7 VDD DEC4 0 133 149 0
5V C5 16 93 37 C72 16 0 0
C2 IC2 0.1 DEC3 A6 P6 0.1 DEC3
0.1 74AC541SJ 14 26 94 36 14 26
GND DEC2 A5 P5 IC10 GND DEC2 B 150 13 B
95 35 13 B B

R11 1k
R12 1k
R13 1k
R14 1k
R15 1k
R16 1k
R17 1k
R18 1k
R19 1k
R20 1k
13 74AC244SJ
20 10 DEC1 A4 P4 DEC1 A 151 14 A
CNY1 27 96 34 27 A A
2 18 9 M2 A3 P3 5V C10 M2 9 152 15 9
30C PROC (C) 9 1 97 33 0.1 1 9 9
DPR,Y1-30C 3 17 8 M1 A2 P2 M1 8 153 16 8
30D PROC (C) 8 12 2 98 32 2 8 8
2 DPR,Y1-30D
DPR,Y1-31A
31A PROC (C) 7
4
5
16
15
7
6
25
WE
OE RST
3 99
A1
A0
P1
P0
31
20 10
12
25
WE
OE RST
3
7
6
154
155
7 7
17
22
7
6
31B PROC (C) 6 6 6
DPR,Y1-31B 6 14 5 9 2 V DD GND 18 9 5 156 IN1 OUT1 23 5
31C PROC (C) 5 9 74 6 9 5 5
DPR,Y1-31C 7 13 4 B16 Q16 8 4 16 8 4 157 24 4
31D PROC (C) 4 8 73 7 8 4 4
DPR,Y1-31D 8 12 3 B15 Q15 7 6 14 7 3 158 25 3
32A PROC (C) 3 7 72 8 7 3 3
DPR,Y1-32A 9 11 2 B14 Q14 6 8 12 6 2 159 26 2
32B PROC (C) 2 6 71 9 6 2 2
DPR,Y1-32B 1 IC6 B13 Q13 5 11 9 5 1 2 27 1
32C PROC (C) 1 5 70 10 5 1 1
DPR,Y1-32C 1 19 HM63021FP-28 B12 Q12 13 7 3 28
0 11 4 4 4 0 0
32D PROC (C) 0 4 69 0 0
DPR,Y1-32D 5V 1 4 24 1 B11 Q11 3 15 5 3
C82 IC46 3 68 12 3 IC42
0.1 74AC541SJ 0 5 23 0 B10 Q10 2 17 3 2 HM63021FP-28 4 53
2 67 13 2 B B
1 6 22 1 B9 Q9 5 54
20 10 1 64 14 1 A A
0 7 21 0 B8 Q8 1 19 1 4 24 1 6 55
1 2 18 1 0 63 17 0 9 9
8 20 B7 Q7 0 5 23 0 7 56
0 3 17 0 62 18 8 8
9 19 B6 Q6 6 22 8 57
1 4 16 1 61 19 7 7
10 18 B5 Q5 IC11 7 21 9 58
0 5 15 0 60 20 74AC244SJ 6 6
11 17 B4 Q4 8 20 10 IN2 OUT2 65
6 14 59 21 5V 5 5
5V B3 Q3 C11 9 19 11 66
7 13 58 22 0.1 4 4
28 15 B2 Q2 10 18 12 67
8 12 VDD DEC4 57 23 3 3
C6 16 B1 Q1 11 17 29 68
9 11 0.1 DEC3 56 24 20 10 2 2
14 26 B0 Q0 30 69
GND DEC2 1 2 V DD GND 18 1 5V 1 1
5V 13 5V 28 15 31 70
1 19 DEC1 100 50 0 4 16 0 VDD DEC4 0 0
27 SMPL-A SMPL-P C73 16
5V M2 26 27 6 14 0.1 DEC3
IC3 1 P-SW OUT-SW-P 14 26 32 94
C3 M1 78 28 8 12 GND DEC2 B B
74AC574SJ

R29 100k
R30 100k
R21 100k
R22 100k
R23 100k
R24 100k
R25 100k
R26 100k
R27 100k
R28 100k
0.1 12 2 DIR OE-P 13 33 95
WE 1 11 9 1 DEC1 A A
20 10 25 3 27 34 96
CNY1 OE RST 75 25 13 7 M2 9 9
3 WKG,X1-20A 6A WASH 9
2
3
V DD GND 19
18
9
8
1
SMPL-B
Q-SW
SMPL-Q
OUT-SW-Q
2
0
15 5
0
1
12
M1
2
35
36
8 8
97
98
WKG,X1-20B 6B WASH 8 3 17 3 WE 7 7
4 17 7 OE-Q 25 3 37 104
WKG,X1-20C 6C WASH 7 OE RST 6 6
5 16 6 38 IN3 OUT3 105
WKG,X1-21A 6D WASH 6 IC7 29 54 1 19 5 5
6 15 5 HM63021FP-28 CK-A CK-P 1 2 39 106
WKG,X1-21B 7A WASH 5 79 4 4 4
7 14 4 CK-B CK-Q 42 107
WKG,X1-21C 7B WASH 4 9 4 24 9 IC12 3 3
8 13 3 74AC244SJ 43 108
WKG,X1-22A 7C WASH 3 8 5 23 8 51 IC9(1/6) 2 2
9 12 2 OP-IN 74AC04SJ C12 44 109
WKG,X1-22B 7D WASH 2 7 6 22 7 52 77 1 1
OE OP-CTL OP-OUT 5V 0.1 45 110
1 21 76
WKG,X1-22C 8A WASH 1 6 7 6 53 0 0
0 11 1 OP-CK OP-GATE
WKG,X1-23A 8B WASH 0 5 8 20 5
20 10 46 92
4 9 19 4 Vss B DTO1
5V 9 2 V DD GND 18 9 47 93
IC47 3 10 18 3 A DTO2
C83 4 16 48 91
0.1 74AC574SJ 17 5 15 30 40 55 66 80 90 8 8
2 11 2 9 DTKO
7 6 14 7 49 118
20 10 5V 8 TSTO
6 8 12 6 50
1 2 V DD GND 19 1 28 15 7
VDD DEC4 5 11 9 5 51
0 3 18 0 16 6
C7 DEC3 13 7 52 IN4
0.1 26 4 4
4 17 14 5
GND DEC2 3 15 5 3 71
5 16 13 4
DEC1 2 17 3 2 72
6 15 27 3
M2 73
7 14 1 5V 2
M1 1 19 74
8 13 12 2 3 4 1
WE 75
9 12 25 3 0
OE RST R89
OE IC9(2/6) 22k
74AC04SJ 84
11 1 CLR0
85
EN0
4 5V

5V IC4 5V
IC48
74AC574SJ
86
87
CLR1
1
5V

C4 74AC574SJ C84 EN1 VDD


0.1 0.1 88 18
R39 100k
R40 100k
R31 100k
R32 100k
R33 100k
R34 100k
R35 100k
R36 100k
R37 100k
R38 100k

TN IN VDD
40
20 10 20 10 VDD
CNY1 82 41
9 2 V DD GND 19 9 1 2 V DD GND 19 1 DTI1 VDD
WKG,X1-23B KPC/DPR/VIF,Y1-8C 8C EXT VIDEO 9 83 81 C74
8 3 18 8 0 3 18 0 DTI2 VDD 0.1
WKG,X1-23C KPC/DPR/VIF,Y1-8D 8D EXT VIDEO 8 63 64
7 4 17 7 4 17 CKS VDD
WKG,X1-24A KPC/DPR/VIF,Y1-9A 9A EXT VIDEO 7 76 80 C75
6 5 16 6 5 16 OE0 VDD 0.1
WKG,X1-24B KPC/DPR/VIF,Y1-9B 9B EXT VIDEO 6 77 103
5 6 15 5 6 15 OE1 VDD
WKG,X1-24C KPC/DPR/VIF,Y1-9C 9C EXT VIDEO 5 78 120 C76
4 7 14 4 7 14 OE2 VDD 0.1
WKG,X1-25A KPC/DPR/VIF,Y1-9D 9D EXT VIDEO 4 79 121
3 8 13 3 8 13 OE3 VDD
WKG,X1-25B KPC/DPR/VIF,Y1-10A 10A EXT VIDEO 3 139 C77
2 9 12 2 9 12 VDD 0.1
WKG,X1-25C KPC/DPR/VIF,Y1-10B 10B EXT VIDEO 2 60 160
1 1 OE OE CK VDD
WKG,X1-26A KPC/DPR/VIF,Y1-10C 10C EXT VIDEO 1 CTIM 117
0 0 11 1 11 1 WASH ON/OFF 10/11 CTIM
WKG,X1-26B KPC/DPR/VIF,Y1-10D 10D EXT VIDEO 0 RESET 119 62
EXT. VIDEO ON/OFF 10/11 RESET VSS
113 20
9 8 IC9(4/6)
74AC04SJ
CKX
CKX VSS
SDIO 102 21
9/11 EXT.V SDAT VSS
CKD1 100 59
3, 10/11 ADV FS
≠≠
≠ CKD VSS
SADD1 112 61
10/11 UNDER ON/OFF SADD VSS
99
10/11 OVER ON/OFF VSS
CS6 116 101
4/11 MAT CS0 VSS
CS7 115 141
CS1 VSS
CSA 114 142
CS2 VSS
10/11 2FS 0
10/11 2FS 1
5 10/11 2FS 2
10/11 2FS 3

4/11 OVLP COEF


4/11 SK1
7/11 PK
9,8,7,6,4,2,10/11 SERIAL CTRL
4/11 OVLP CTRL
4/11 SK2

4-2 4-2 DME-3000/7000

A B C D E F G H
Combiner, lighting and Z recursive CMB-1 (1/11) CMB-1 (1/11) Combiner, lighting and Z recursive

1
5V
C26 C27 5V
0.1 0.1
C28 C29
0.1 0.1
IC13 IC14 IC19
CXD8331Q HM63021FP-28 CXD8331Q 16 41 65 91
16 41 65 91
B 122 134 4 24 B B 122 134 81 49 OVLP VIDEO 2/11
B B B B A16 P16
A 123 135 5 23 A A 123 135 82 48 81 49 B
A A A A A15 P15 A16 P16
9 124 136 6 22 9 9 124 136 83 47 82 IC22 48 A
9 9 9 9 A14 P14 A15 CXD8838Q P15
8 125 137 7 21 8 8 125 137 84 IC21 46 83 47 9
8 8 8 8 A13 CXD8838Q P13 A14 P14
7 126 138 8 20 7 7 126 138 85 45 84 46 8
7 7 7 7 A12 P12 A13 P13
6 127 143 9 19 6 6 127 143 86 44 85 45 7
6 6 6 6 A11 P11 A12 P12
5 128 IN0 OUT0 144 10 18 5 5 128 IN0 OUT0 144 87 43 86 44 6
5 5 5 5 A10 P10 A11 P11
4 129 145 11 17 4 4 129 145 88 42 87 43 5
4 4 4 4 A9 P9 A10 P10
3 130 146 3 5V 3 130 146 89 39 88 42 4
3 3 3 3 A8 P8 A9 P9
2 131 147 2 28 15 2 131 147 92 38 89 39 3
2 2 VDD DEC4 IC16 2 2 A7 P7 A8 P8
1 132 148 1 C17 16 5V C19 µPD42101G-3 1 132 148 93 37 92 38 2
1 1 0.1 DEC3 0.1 1 1 A6 P6 A7 P7
0 133 149 0 14 26 0 133 149 94 36 93 37 1
0 0 GND DEC2 0 0 A5 P5 A6 P6
13 18 7 95 35 94 36 0
DEC1 A4 P4 A5 P5
150 13 B 27 B 24 1 B B 150 13 96 34 95 35
B B M2 B B A3 P3 A4 P4
9 151 14 A 1 A 23 2 A A 151 14 97 33 96 34
A A M1 A A A2 P2 A3 P3
8 152 15 9 12 2 9 22 3 9 9 152 15 98 32 97 33
9 9 WE 9 9 A1 P1 A2 P2
7 153 16 8 25 3 0 8 21 4 8 8 153 16 99 31 98 32
8 8 OE RST 8 8 A0 P0 A1 P1
6 154 17 7 7 16 9 7 7 154 17 99 31
5 155
7
6
7
6
22 6 6 15 10 6 6 155
7
6
7
6
22 B 74
B16 Q16
6
A0 P0
2
4 156 IN1 OUT1 23 5 5 14 11 5 5 156 IN1 OUT1 23 A 73 7 74 6
5 5 5 5 B15 Q15 B16 Q16
3 157 24 4 4 13 12 4 4 157 24 9 72 8 73 7
4 4 4 4 B14 Q14 B15 Q15
2 158 25 3 IC15 D 6 5 3 158 25 8 71 9 72 8
3 3 HM63021FP-28 3 3 B13 Q13 B14 Q14
1 159 26 2 D 19 20 2 159 26 7 70 10 71 9
2 2 2 2 B12 Q12 B13 Q13
0 2 27 1 8 1 2 27 6 69 11 70 10
1 1 3 4 24 3 1 1 B11 Q11 B12 Q12
3 28 0 17 0 3 28 5 68 12 69 11
0 0 2 5 23 2 0 0 B10 Q10 B11 Q11
4 67 13 68 12
1 6 22 1 B9 Q9 B10 Q10
4 53 B 4 53 B 3 64 14 67 13
B B 0 7 21 0 IC17 B B B8 Q8 B9 Q9
9 5 54 A µPD42101G-3 A 5 54 A 2 63 17 64 14
A A 3 8 20 3 5V C20 A A B7 Q7 B8 Q8
8 6 55 9 0.1 9 6 55 9 1 62 18 63 17
9 9 2 9 19 2 9 9 B6 Q6 B7 Q7
7 7 56 8 8 7 56 8 0 61 19 62 18
8 8 1 10 18 1 18 7 8 8 B5 Q5 B6 Q6
6 8 57 7 7 8 57 7 60 20 61 19
7 7 0 11 17 0 3 24 1 3 7 7 B4 Q4 B5 Q5
5 9 58 6 6 9 58 6 59 21 60 20
6 6 5V 2 23 2 2 6 6 B3 Q3 B4 Q4
4 10 IN2 OUT2 65 5 5 10 IN2 OUT2 65 5 58 22 59 21
5 5 28 15 1 22 3 1 5 5 B2 Q2 B3 Q3
3 11 66 4 VDD DEC4 4 11 66 4 57 23 58 22
4 4 C18 16 0 21 4 0 4 4 B1 Q1 B2 Q2
2 12 67 3 0.1 DEC3 3 12 67 3 56 24 57 23
3 3 14 26 3 16 9 3 3 3 B0 Q0 B1 Q1
1 29 68 2 GND DEC2 2 29 68 2 56 24
2 2 13 2 15 10 2 2 2 5V 5V B0 Q0
0 30 69 1 DEC1 1 30 69 1 100 50
1 1 27 1 14 11 1 1 1 SMPL-A SMPL-P
31 70 0 M2 0 31 70 0 26 27 100 50
0 0 1 0 13 12 0 0 0 P-SW OUT-SW-P SMPL-A SMPL-P
M1 78 28 R43 26 27
12 2 D 6 5 DIR OE-P 4.7k P-SW OUT-SW-P
B 32 94 WE 32 94 78 28
B B 25 3 0 D 19 20 B B DIR OE-P
A 33 95 OE RST 9 33 95 75 25
A A 8 A A SMPL-B SMPL-Q
9 34 96 8 34 96 1 2 75 25
9 9 17 9 9 Q-SW OUT-SW-Q SMPL-B SMPL-Q
8 35 97 7 35 97 3 1 2
7 36
8
7
8
7
98 6 36
8
7
8
7
98
OE-Q Q-SW OUT-SW-Q
OE-Q
3 3
6 37 104 5 37 104 29 54
6 6 5V C21 IC18 6 6 CK-A CK-P
5 38 IN3 OUT3 105 IC40 0.1 µPD42101G-3 4 38 IN3 OUT3 105 79 4 29 54
5 5 HM63021FP-28 5 5 CK-B CK-Q CK-A CK-P
4 39 106 3 39 106 79 4
4 4 18 7 4 4 CK-B CK-Q
3 42 107 2 42 107 51
3 3 B 4 24 B B 24 1 B 3 3 OP-IN
2 43 108 1 43 108 52 77 51
2 2 A 5 23 A A 23 2 A 2 2 OP-CTL OP-OUT OP-IN
1 44 109 0 44 109 53 76 52 77
1 1 9 6 22 9 9 22 3 9 1 1 OP-CK OP-GATE OP-CTL OP-OUT
0 45 110 45 110 53 76
0 0 8 7 21 8 8 21 4 8 0 0 OP-CK OP-GATE
Vss
7 8 20 7 7 16 9 7
B 46 92 B 46 92 Vss
B DTO1 6 9 19 6 6 15 10 6 B DTO1 5 15 30 40 55 66 80 90
A 47 93 A 47 93
A DTO2 5 10 18 5 5 14 11 5 A DTO2 5 15 30 40 55 66 80 90
9 48 91 9 48 91
9 DTKO 4 11 17 4 4 13 12 4 9 DTKO 8 9
8 49 118 8 49 118
8 TSTO 5V D 6 5 8 TSTO
7 50 7 50
7 28 15 D 19 20 7
6 51 VDD DEC4 6 51 IC810(4/6)
6 C71 16 8 6 74AC04SJ
5 52 IN4 0.1 DEC3 5 52 IN4
5 14 26 17 5
4 71 GND DEC2 4 71
4 13 4
3 72 DEC1 3 72
3 27 3
2 73 M2 2 73
5V 2 1 2
1 74 M1 1 74
1 12 2 1
0 75 WE 0 75
0 25 3 0 0
R41 OE RST 5V R42
22k 84 22k
84
CLR0 CLR0
85 85
EN0 5V EN0 5V
86 86
87
CLR1
EN1 VDD
1 87
CLR1
EN1 VDD
1 4
88 18 88 18
TN IN VDD TN IN VDD
40 40
VDD VDD
82 41 82 41
DTI1 VDD DTI1 VDD
83 81 C13 83 81 C22
DTI2 VDD 0.1 DTI2 VDD 0.1
63 64 63 64
CKS VDD CKS VDD
76 80 C14 76 80 C23
OE0 VDD 0.1 OE0 VDD 0.1
77 103 77 103
OE1 VDD OE1 VDD
78 120 C15 78 120 C24
OE2 VDD 0.1 OE2 VDD 0.1
79 121 79 121
OE3 VDD OE3 VDD
139 C16 139 C25
VDD 0.1 VDD 0.1
60 160 60 160
CK VDD CK VDD
CTIM 117 CTIM 117
CTIM CTIM
RESET 119 62 RESET 119 62
RESET VSS RESET VSS
CKX 113 20 CKX 113 20
CKX VSS CKX VSS
SDIO 102 21 SDIO 102 21
SDAT VSS SDAT VSS
CKD1 100 59 CKD1 100 59
CKD VSS CKD VSS
SADD1 112 61 SADD1 112 61 CROP MAT 2/11
SADD VSS SADD VSS
99 99 REC.Z CTRL 5/11
VSS VSS
CSC 116 101 CSF 116 101
CS0 VSS CS0 VSS
CSD 115 141 CS14 115 141
CS1 VSS CS1 VSS
CSE 114 142 CS15 114 142
CS2 VSS CS2 VSS

Combiner, lighting and Z recursive


4,10/11 ≠≠≠≠
OVLP/CMB
≠≠≠
CMB-1 (1/11) 5
BKDM-3050
BOARD NO. 1-652-569-14
LOT NO. 502-
IC810(5/6)
74AC04SJ FOR DME-3000/7000
11 10 B-¥BKDM3050-CMB1M

DME-3000/7000 4-3 4-3


I J K L M N O P
Combiner, lighting and Z recursive CMB-1 (2/11) CMB-1 (2/11) Combiner, lighting and Z recursive

BKDM-3050 (SY) : S/N 50001 and Higher

1,5,6,10/11 VAR. DELAY RST

1 IC24
IC44
CXD8838Q
DIM µPD42101G-3 5V
C78 C79 IC26
0.1 0.1 CXD8331Q
5V
C34
0.1
16 41 65 91
1/11 OVLP VIDEO 73 56 18 7 122 134
KA12 KAB12 B B
B 48 55 A 24 1 81 49 123 135 9
KA11 KAB11 A16 P16 A A
A 47 54 9 23 2 82 48 124 136 8
KA10 KAB10 A15 P15 9 9
9 46 53 8 22 3 83 47 125 137 7
KA9 IC23 KAB9 A14 P14 8 8
8 45 CXD8334Q 52 7 21 4 84 46 126 138 6
KA8 KAB8 A13 P13 7 7
7 44 51 6 16 9 85 45 127 143 5
KA7 KAB7 A12 P12 6 6
6 43 50 5 15 10 86 44 128 IN0 OUT0 144 4
KA6 KAB6 A11 P11 5 5
5 42 27 4 14 11 87 43 129 145 3
KA5 KAB5 A10 P10 4 4
4 39 26 3 13 12 88 42 130 146 2
KA4 KAB4 A9 P9 3 3
3 38 25 1 6 5 2 89 39 131 147 1
KA3 KAB3 A8 P8 2 2
2 37 24 1 19 20 1 92 38 132 148 0
KA2 KAB2 A7 P7 1 1
1 36 23 8 0 93 37 133 149
KA1 KAB1 A6 P6 0 0
0 35 22 17 94 36
KA0 KAB0 A5 P5
95 35 150 13 B
A4 P4 B B 5V
88 71 96 34 9 151 14 A
KB12 KOUT12 A3 P3 A A C40 C41
87 70 A 97 33 8 152 15 9 0.1 0.1
KB11 KOUT11 A2 P2 9 9
86 69 9 98 32 7 153 16 8
KB10 KOUT10 A1 P1 8 8
85 68 8 99 31 6 154 17 7
KB9 KOUT9 IC25 A0 P0 7 7 16 41 65 91
84 67 7 µPD42101G-3 5 155 22 6
KB8 KOUT8 6 6
83 66 6 B 74 6 4 156 IN1 OUT1 23 5 81 49 9
2 82
79
KB7
KB6
KOUT7
KOUT6
65
64
5
4
5V
C35
0.1
A
9
73
72
B16
B15
Q16
Q15
7
8
3
2
157
158
5
4
5
4
24
25
4
3
82
83
A16
A15 IC27
P16
P15
48
47
8
7
KB5 KOUT5 B14 Q14 3 3 A14 CXD8838Q P14
78 63 3 18 7 8 71 9 1 159 26 2 84 46 6
KB4 KOUT4 B13 Q13 2 2 A13 P13
77 62 24 1 2 7 70 10 0 2 27 1 85 45 5
KB3 KOUT3 B12 Q12 1 1 A12 P12
76 59 23 2 1 6 69 11 3 28 0 86 44 4
KB2 KOUT2 B11 Q11 0 0 A11 P11
75 58 22 3 0 5 68 12 87 43 3
KB1 KOUT1 B10 Q10 A10 P10
74 57 21 4 4 67 13 4 53 B 88 42 2
KB0 KOUT0 B9 Q9 B B A9 P9
16 9 3 64 14 A 5 54 A 89 39 1
B8 Q8 A A A8 P8
9 128 2 15 10 2 63 17 9 6 55 9 92 38 0
ZA19 ZOUT20 B7 Q7 9 9 A7 P7
8 127 151 14 11 1 62 18 8 7 56 8 93 37
ZA18 ZOUT19 B6 Q6 8 8 A6 P6
7 126 150 13 12 0 61 19 7 8 57 7 94 36
ZA17 ZOUT18 B5 Q5 7 7 A5 P5
6 125 149 1 6 5 60 20 6 9 58 6 95 35
ZA16 ZOUT17 B4 Q4 6 6 A4 P4
5 124 148 1 19 20 59 21 5 10 IN2 OUT2 65 5 96 34
ZA15 ZOUT16 B3 Q3 5 5 A3 P3
4 123 147 8 58 22 4 11 66 4 97 33
ZA14 ZOUT15 B2 Q2 4 4 A2 P2
3 122 146 17 57 23 3 12 67 3 98 32
ZA13 ZOUT14 B1 Q1 3 3 A1 P1
2 119 145 56 24 2 29 68 2 99 31
ZA12 ZOUT13 B0 Q0 2 2 A0 P0
1 118 144 5V 1 30 69 1
ZA11 ZOUT12 1 1
0 117 143 100 50 0 31 70 0 9 74 6
ZA10 ZOUT11 SMPL-A SMPL-P 0 0 B16 Q16
116 142 R90 26 27 8 73 7
ZA9 ZOUT10 4.7k P-SW OUT-SW-P B15 Q15
115 139 78 28 32 94 7 72 8
ZA8 ZOUT9 DIR OE-P B B B14 Q14
114 138 33 95 6 71 9
ZA7 ZOUT8 A A B13 Q13
113 137 75 25 34 96 5 70 10
ZA6 ZOUT7 SMPL-B SMPL-Q 9 9 B12 Q12
112 136 1 2 35 97 4 69 11
ZA5 ZOUT6 Q-SW OUT-SW-Q 8 8 B11 Q11
111 135 3 36 98 3 68 12
ZA4 ZOUT5 OE-Q 7 7 B10 Q10
110 134 37 104 2 67 13
ZA3 ZOUT4 6 6 B9 Q9
3 109
108
ZA2 ZOUT3
133
132
29
79
CK-A CK-P
54
4
38
39
5
IN3 OUT3
5
105
106
1
0
64
63
B8 Q8
14
17
ZA1 ZOUT2 CK-B CK-Q 4 4 B7 Q7
107 131 42 107 62 18
ZA0 ZOUT1 3 3 B6 Q6
130 51 43 108 61 19
ZOUT0 OP-IN 2 2 B5 Q5
16 52 77 44 109 60 20
ZB20 OP-CTL OP-OUT 1 1 B4 Q4
15 53 76 45 110 59 21
ZB19 OP-CK OP-GATE 0 0 B3 Q3
14 58 22
ZB18 B2 Q2
13 Vss 46 92 57 23
ZB17 B DTO1 B1 Q1
12 47 93 56 24
ZB16 5 15 30 40 55 66 80 90 A DTO2 B0 Q0
11 48 91
ZB15 5V 9 DTKO
10 49 118 100 50
ZB14 8 TSTO SMPL-A SMPL-P
9 106 50 26 27
ZB13 TNCON 7 P-SW OUT-SW-P
8 CMB:1/2FS/OVLP:1/2FS
≠≠≠≠≠
≠≠≠≠ 51 78 28
ZB12 6 DIR OE-P
7 18 52 IN4
ZB11 CLKH 10/11 ,4/11 5
6 20 71 75 25
ZB10 CLK ADV FS 0 10/11 4 SMPL-B SMPL-Q
5 72 1 2
ZB9 3 Q-SW OUT-SW-Q
4 73 3
ZB8 2 OE-Q
3 5V 74
ZB7 1
159 34 RESET 75 29 54
IC45 ZB6 RST 0 CK-A CK-P
HM63021FP-28 158 32 CKX R44 79 4
ZB5 CKX 22k CK-B CK-Q
157 33 CKD1 84
4 24 ZB4 CKD CLR0
4/11 VIDEO CROP 156 31 CS16 85 51
5 23 ZB3 CS EN0 5V OP-IN
155 29 SADD1 86 52 77
6 22 ZB2 SADRS CLR1 OP-CTL OP-OUT
154 30 SDIO 87 1 53 76
7 21 ZB1 SDATA EN1 VDD OP-CK OP-GATE
153 88 18
20 ZB0
4 8
9 19
104 5V 82
TN IN VDD
VDD
40
41
Vss

10 18 GZ12 DTI1 VDD 5 15 30 40 55 66 80 90


103 1 83 81 C36
11 17 GZ11 VDD DTI2 VDD 0.1
102 40 63 64
5V GZ10 VDD CKS VDD
100 41 76 80 C37
28 15 GZ9 VDD OE0 VDD 0.1
VDD DEC4 98 61 C30 77 103
C80 16 GZ8 VDD 0.1 OE1 VDD
0.1 DEC3 97 80 78 120 C38
14 26 GZ7 VDD OE2 VDD 0.1
GND DEC2 96 99 C31 79 121
13 GZ6 VDD 0.1 OE3 VDD
DEC1 95 120 139 C39
27 GZ5 VDD VDD 0.1
M2 94 121 C32 60 160
1 GZ4 VDD 0.1 CK VDD
M1 93 140 CTIM 117
12 2 GZ3 VDD CTIM
WE 92 160 C33 RESET 119 62
25 3 16 GZ2 VDD 0.1 RESET VSS
OE RST 91 17 CKX 113 20
GZ1 VDD CKX VSS
90 81 SDIO 102 21
GZ0 VDD SDAT VSS
CKD1 100 59
CKD VSS
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss

SADD1 112 61
SADD VSS
99
VSS
101
129
141
152
19
21
28
49
60
72
89

CS17 116 101


CS0 VSS
CS18 115 141
CS1 VSS
CS19 114 142
CS2 VSS

5 10/11
10/11
ADV 2FS
≠≠≠
≠≠ 1
2FS 4

1/11 CROP MAT


4/11 DIM Z
1,4,6,7,8,9,10/11 SERIAL CTRL

7/11 EXT CMB VIDEO


4/11 CMB COEF
7/11 REC.VIDEO
6,7,8,9,10/11 TIMING SIG

4-4 4-4 DME-3000/7000

A B C D E F G H
Combiner, lighting and Z recursive CMB-1 (2/11) CMB-1 (2/11) Combiner, lighting and Z recursive

CMB/REC. 2,5,6,10/11 NEW/OLD


≠≠≠
≠≠ OUT
VIDEO SEL.
Y/C DEMULTIPLEX IC30 IC31
IC32
CX22029 CN3
1
5V 5V IDT74FCT827ASO CXD8885Q 9
C42 C43 C44 C45 5V OUT VIDEO IN 9 5
0.1 0.1 0.1 0.1 5V C47 C49 5V 8
C46 0.1 0.1 C52 OUT VIDEO IN 8 6
0.1 0.1 7
OUT VIDEO IN 7 7

100
117
6
16 41 65 91 OUT VIDEO IN 6 8

17
45
57
73
16 41 65 91
24 12 14 28 5
OUT VIDEO IN 5 9
81 49 9 81 49 9 2 23 9 116 V DD 56 4 3 9 4
A16 P16 A16 P16 Y9 O9 OUT VIDEO IN 4 10
82 48 8 82 48 8 3 22 8 115 55 6 5 8 3
A15 IC28 P15 A15 IC29 P15 Y8 O8 OUT VIDEO IN 3 11
83 CXD8838Q 47 7 83 CXD8838Q 47 7 4 21 7 114 54 8 7 7 2
A14 P14 A14 P14 Y7 O7 OUT VIDEO IN 2 12
84 46 6 84 46 6 5 20 6 113 53 10 9 6 1
A13 P13 A13 P13 Y6 D6 OUT VIDEO IN 1 13
85 45 5 85 45 5 6 19 5 112 52 12 11 5 0
A12 P12 A12 P12 Y5 D5 OUT VIDEO IN 0 14
86 44 4 86 44 4 7 18 4 111 51 18 17 4
A11 P11 A11 P11 Y4 D4
87 43 3 87 43 3 8 17 3 110 50 20 19 3
A10 P10 A10 P10 Y3 D3 CN4
88 42 2 88 42 2 9 16 2 109 48 22 21 2 9
A9 P9 A9 P9 Y2 D2 OUT VIDEO OUT 9 5
89 39 1 89 39 1 10 15 1 108 47 24 23 1 8
A8 P8 A8 P8 Y1 D1 OUT VIDEO OUT 8 6
92 38 0 92 38 0 11 14 0 107 46 26 25 0 7
A7 P7 A7 P7 Y0 D0 OUT VIDEO OUT 7 7
93 37 93 37 1 6
A6 P6 A6 P6 OUT VIDEO OUT 6 8
94 36 94 36 13 1 13 58 15 5
A5 P5 A5 P5 U9 CKO -5V OUT VIDEO OUT 5 9
95 35 95 35 12 4
A4 P4 A4 P4 U8 C53 OUT VIDEO OUT 4 10
96 34 96 34 11 61 13 27 0.1 3
A3 P3 A3 P3 U7 D PHS1 IC33 OUT VIDEO OUT 3 11
97 33 97 33 9 60 SBX1601A 2
A2 P2 A2 P2 U6 D PHS0 L1 OUT VIDEO OUT 2 12
98 32 98 32 8 62 1µH 1
A1 P1 A1 P1 U5 TRS JST OUT VIDEO OUT 1 13
99 31 99 31 6 63 0
A0 P0 A0 P0 U4 SEL STAT1 C58 C59 OUT VIDEO OUT 0 14
4 65 0.1 100 -5V Q1
U3 SEL STAT0 R46 6.3V 2SC3356 C69
9 74 6 74 6 9 3 75 R77 CNX1
680 33 0.1
8
7
73
72
B16
B15
Q16
Q15
7
8
73
72
B16
B15
Q16
Q15
7
8
8
7
2
1
U2
U1
TOUT
5V 9 6
D9X
26 27
V EE V EE
SX
3
R66
120 C OUT VIDEO 25B CN,105-25B 2
B14 Q14 B14 Q14 U0 7 R83 R84
6 71 9 71 9 6 95 D9Y R78 75 75
B13 Q13 B13 Q13 BLK MODE2 8 8 4 33
5 70 10 70 10 5 31 94 D8X SY R85
B12 Q12 B12 Q12 V9 BLK MODE1 9 R53 R55 R79 Q2 C68 130 R88
4 69 11 69 11 4 30 93 D8Y 220 220 82 2SC3356 0.1 10k
B11 Q11 B11 Q11 V8 BLK MODE0 7 10 5V
3 68 12 68 12 3 29 97 D7X C66
B10 Q10 B10 Q10 V7 MUX MODE1 11 C64 C65 10
2 67 13 67 13 2 28 96 D7Y R54 0.1 0.1 16V 5V
B9 Q9 B9 Q9 V6 MUX MODE0 6 12 1k
1 64 14 64 14 1 26 98 D6X
B8 Q8 B8 Q8 V5 525/625 13 36
0 63 17 63 17 0 24 99 D6Y PCK DVO PCK 7/11
B7 Q7 B7 Q7 V4 D1/D2 5 14 R86
62 18 62 18 23 104 D5X 22k
B6 Q6 B6 Q6 V3 TRS SEL1 15 C62
61 19 61 19 22 102 D5Y 220p DVO LOCK 10/11
B5 Q5 B5 Q5 V2 TRS SEL0 4 16 34 R87
60 20 60 20 20 D4X TRP 22k
B4 Q4 B4 Q4 V1 17
59 21 59 21 19 77 D4Y Q3
B3 Q3 B3 Q3 V0 RDCLR 3 18 DTC114EK
58 22 58 22 78 D3X
B2 Q2 B2 Q2 DR ON 19 1
57 23 57 23 43 79 D3Y LST
B1 Q1 B1 Q1 CK TRS EN 2 20 C60 D1 C70
5V 56 24 56 24 HD 33 80 D2X 0.1 1S2835 0.1
B0 Q0 B0 Q0 HD BURST EN 21 33
5V FDD 34 81 D2Y FV
FD SYNC EN 1 22
100 50 100 50 5V CF 35 83 D1X -5V
SMPL-A SMPL-P SMPL-A SMPL-P CFP AUTO TRS 23 3
26 27 26 27 101 85 D1Y R81
P-SW OUT-SW-P P-SW OUT-SW-P BLK CKINV 0 24 28 33
78 28 78 28 R45 87 CKO V 9/11 D0X RSE 1
DIR OE-P DIR OE-P 22k CLIP 25
SADD1 39 88 D0Y R82
SADD LIMIT 30 35 36
75 25 75 25 SDIO 41 89 9/11 CKO VX PCX TNI 2
SMPL-B SMPL-Q SMPL-B SMPL-Q SDAT V BLK FIX 31 C61
1 2 1 2 CKD3 40 91 9/11 CKO VY PCY 0.1
Q-SW OUT-SW-Q Q-SW OUT-SW-Q CKD DBLK/ABLK
3 3 CS1A 38 R80 C67
OE-Q OE-Q CS ECL GND GND GND 33 0.1
CKX 37 72
29
79
CK-A CK-P
54
4
29
79
CK-A CK-P
54
4
RESET 36
16
CKX
PAR/SER
TNCON
RAMTEST
71
69
C56
0.1
R47
220
29 32 2 5

PSP RST ECL 7/11


3
SMPL
CK-B CK-Q CK-B CK-Q SAMPL TEST MOD1 5V
5V 68
TEST MOD0
51 51 118
OP-IN OP-IN EWRST
52 77 52 77 120 119 R48
OP-CTL OP-OUT OP-CTL OP-OUT ERRST 22k Q4
53 76 53 76 105 2SA812
OP-CK OP-GATE OP-CK OP-GATE
V SS
10/11 ≠≠
D1/D2

Vss Vss 15 32 42 59 66 76 92 R49 R50
10k 10k
5 15 30 40 55 66 80 90 C63
5 15 30 40 55 66 80 90 0.1
R51 R52
15k 1000

-5V
10/11 FV ADJ V OUT
CMB PROC VIDEO 7/11
IC35 IC36 IC37
IC34 SN74HC574ANS SN74HC574ANS SN74HC574ANS
SN74HC574ANS

5V 5V 5V 5V
C48 C50 C54 C57
0.1 0.1 0.1 0.1

9 R56 22 9
20 10 20 10 20 10 20 10
8 R57 22 8
9 2 V DD GND 19 9 1 2 V DD GND 19 1 9 2 V DD GND 19 9 1 2 V DD GND 19 1
18 7 R58 22 7
8 3 18 8 0 3 18 0 8 3 8 0 3 18 0
17 6 R59 22 6
7 4 17 7 4 17 7 4 7 4 17
16 5 R60 22 5
6 5 16 6 5 16 6 5 6 5 16
15 4 R61 22 4
6
7/11,10/11
10/11
D1:0/D2:FS
D1:0/D2:FS
≠≠

5
4
6
7
15
14
5
4
6
7
15
14
5
4 7 14
5
4
6
7
15
14 3
2
R62 22
R63 22
3
2
4
3 8 13 3 8 13 3 8 13 3 8 13
12 9 9 12 12 1 R64 22 1
2 9 2 12 2 2 9
6,9/11, 10/11 ADV 2FS/FS 0 0 R65 22 0
OE OE OE OE

1 11 1 11 1 11 1 11

2FS 5 10/11
H:KPC EXIST 10/11

MULTIPLEXED C 9/11
2FS 6 10/11

IC38 IC39
SN74HC574ANS SN74HC574ANS
5V 5V CNY1
C51 C55 9 R67 22
0.1 0.1 COMB VIDEO 9 1A KPC,Y1-1A
8 R68 22
COMB VIDEO 8 1B KPC,Y1-1B
7 R69 22
20 10 20 10 COMB VIDEO 7 1C KPC,Y1-1C
6 R70 22
9 2 V DD GND 19 9 1 2 V DD GND 19 1 COMB VIDEO 6 1D KPC,Y1-1D
5 R71 22
8 3 18 8 0 3 18 0 COMB VIDEO 5 2A KPC,Y1-2A
4 R72 22
7 4 17 7 4 17 COMB VIDEO 4 2B KPC,Y1-2B
3 R73 22
6 5 16 6 5 16 COMB VIDEO 3 2C KPC,Y1-2C
2 R74 22
5 6 15 5 6 15 COMB VIDEO 2 2D KPC,Y1-2D
1 R75 22
4 7 14 4 7 14 COMB VIDEO 1 3A KPC,Y1-3A
0 R76 22
3 8 13 3 8 13 COMB VIDEO 0 3B KPC,Y1-3B
2 9
OE
12 2 9
OE
12
5
1 11 1 11 Combiner, lighting and Z recursive
CMB-1 (2/11)
BKDM-3050
BOARD NO. 1-652-569-14
LOT NO. 502-
FOR DME-3000/7000
B-¥BKDM3050-CMB1M

DME-3000/7000 4-5 4-5


I J K L M N O P
Combiner, lighting and Z recursive CMB-1 (3/11) CMB-1 (3/11) Combiner, lighting and Z recursive

BKDM-3050 (SY) : S/N 50001 and Higher

4
IC202
CXD8838Q
IC240
IC201 CXD8838Q
74AC574SJ 5V
C203 C241 C242
C202 5V 0.1 IC203 IC211 IC219 IC227 IC235 0.1 0.1
0.1 5V C204 SN74HC157ANS 5V C212 SN74HC157ANS 5V C220 SN74HC157ANS 5V C228 SN74HC157ANS 5V C236 SN74HC157ANS
5V 0.1 0.1 0.1 0.1 0.1
C201
0.1 16 8 16 8 16 8 16 8 16 41 65 91
16 8

R201 1k
R202 1k
R203 1k
R204 1k
R205 1k
R206 1k
R207 1k
R208 1k
R209 1k
R210 1k
16 41 65 91 15 2 1D 2 1D 2 1D 2 1D 2
20 10 13 81 49 9
CNZ1 15 5 1C 5 1C 5 1C 5 1C 5 A16 P16
2 V DD GND 19 9 81 49 13 12 82 48 8
MPU-70,Z1-5B 5B Z 9 A16 P16 15 14 4 1D 1B 14 4 1D 1B 14 4 1D 1B 14 4 1D 1B 14 4 13 A15 P15
3 18 8 82 48 12 11 83 47 7
MPU-70,Z1-5C 5C Z 8 A15 P15 15 11 7 1C 1A 11 7 1C 1A 11 7 1C 1A 11 7 1C 1A 11 7 12 A14 P14
4 17 7 83 47 11 10 84 46 6
MPU-70,Z1-6A 6A Z 7 A14 P14 15 3 12 1B 1B 3 12 1B 19 3 12 1B 15 3 12 1B D 3 12 11 A13 P13
5 16 6 84 46 10 F 85 45 5
MPU-70,Z1-6B 6B Z 6 A13 P13 15 6 9 1A 1A 6 9 1A 18 6 9 1A 14 6 9 1A C 6 9 10 A12 P12
6 15 5 85 45 F E 86 44 4
MPU-70,Z1-6C 6C Z 5 A12 P12 15 13 1 19 13 1 17 13 1 13 13 1 B 13 1 A11 P11
7 14 4 86 44 E D 87 43 3
MPU-70,Z1-7A 7A Z 4 A11 P11 15 10 15 18 10 15 16 10 15 12 10 15 A 10 15 A10 P10
8 13 3 87 43 D C 88 42 2
MPU-70,Z1-7B 7B Z 3 A10 P10 A9 P9
9 12 2 88 42 C B 89 39 1
MPU-70,Z1-7C 7C Z 2 A9 P9 IC204 IC212 IC220 IC228 IC236 A8 P8
1 OE 1 89 39 B 5V C205 SN74HC157ANS 5V C213 SN74HC157ANS 5V C221 SN74HC157ANS 5V C229 SN74HC157ANS 5V C237 SN74HC157ANS A 92 38 0
MPU-70,Z1-8A 8A Z 1 A8 P8 0.1 0.1 0.1 0.1 0.1 A7 P7
0 11 1 0 92 38 A 93 37

2
MPU-70,Z1-8B 8B Z 0 A7 P7 A6 P6
9 93 37 15 16 8 16 8 16 8 16 8 16 8 94 36
A6 P6 A5 P5
9 94 36 14 14 2 19 2 19 2 19 2 19 2 95 35
A5 P5 A4 P4
95 35 14 5 18 5 18 5 18 5 18 5 96 34
10/11 2FS 7 A4 P4 A3 P3
C257 96 34 14 14 4 19 17 14 4 19 17 14 4 19 17 14 4 19 17 14 4 F 97 33
R225 A3 P3 A2 P2
56p 560 33 11 7 11 7 11 7 11 7 11 7 98 32
97 14 18 16 18 16 18 16 18 16 E
A2 P2 A1 P1
98 32 14 3 12 17 17 3 12 17 15 3 12 17 11 3 12 17 9 3 12 D 99 31
A1 P1 A0 P0
99 31 14 6 9 16 16 6 9 16 14 6 9 16 10 6 9 16 8 6 9 C
A0 P0
14 13 1 15 13 1 13 13 1 F 13 1 7 13 1 9 74 6
B16 Q16
9 74 6 9 14 10 15 14 10 15 12 10 15 E 10 15 6 10 15 8 73 7
B16 Q16 B15 Q15
8 73 7 8 7 72 8
B15 Q15 B14 Q14
7 72 8 7 IC205 IC213 IC221 IC229 IC237 6 71 9
B14 Q14 5V C206 SN74HC157ANS 5V C214 SN74HC157ANS 5V C222 SN74HC157ANS 5V C230 SN74HC157ANS 5V C238 SN74HC157ANS B13 Q13
6 71 9 6 0.1 0.1 0.1 0.1 0.1 5 70 10
B13 Q13 B12 Q12
IC251 5 70 10 5 4 69 11
74AC574SJ B12 Q12 16 8 16 8 16 8 16 8 16 8 B11 Q11
4 69 11 4 3 68 12
5V B11 Q11 13 2 15 2 15 2 15 2 15 2 B10 Q10
3 68 12 3 2 67 13
C264 B10 Q10 13 5 14 5 14 5 14 5 14 5 B9 Q9
0.1 2 67 13 2 1 64 14
B9 Q9 13 14 4 15 13 14 4 15 13 14 4 15 13 14 4 15 13 14 4 B B8 Q8
1 64 14 1 0 63 17
B8 Q8 12 11 7 14 12 11 7 14 12 11 7 14 12 11 7 14 12 11 7 A B7 Q7
20 10 0 63 17 0 62 18
B7 Q7 13 3 12 13 13 3 12 13 11 3 12 13 D 3 12 13 5 3 12 9 B6 Q6
1 2 V DD GND 19 1 62 18 61 19
B6 Q6 13 6 9 12 12 6 9 12 10 6 9 12 C 6 9 12 4 6 9 8 B5 Q5
0 3 18 0 61 19 60 20
B5 Q5 12 13 1 11 13 1 F 13 1 B 13 1 3 13 1 B4 Q4
4 17 60 20 59 21
B4 Q4 11 10 15 10 10 15 E 10 15 A 10 15 2 10 15 B3 Q3
5 16 59 21 58 22
B3 Q3 B2 Q2
6 15 58 22 57 23
B2 Q2 IC206 IC214 IC222 IC230 IC238 B1 Q1
7 14 57 23 5V C207 SN74HC157ANS 5V C215 SN74HC157ANS 5V C223 SN74HC157ANS 5V C231 SN74HC157ANS 5V C239 SN74HC157ANS 56 24
B1 Q1 0.1 0.1 0.1 0.1 0.1 B0 Q0
8 13 5V 56 24 5V
B0 Q0
9 12 16 8 16 8 16 8 16 8 16 8 100 50
SMPL-A SMPL-P
OE 100 50 11 2 11 2 11 2 11 2 11 2 R213 26 27
R211 SMPL-A SMPL-P 4.7k P-SW OUT-SW-P
11 1 4.7k 26 27 5V 10 5 10 5 10 5 10 5 10 5 78 28
P-SW OUT-SW-P DIR OE-P
28 14 4 14 4 14 4 14 4 14 4
3 78

75
DIR OE-P

25 R212
F
E 11
3
7
12
11
10
F
E 11
3
7
12
11
10
F
E 11
3
7
12
11
10
F
E 11
3
7
12
11
10
F
E 11
3
7
12
7
6 75
1
SMPL-B SMPL-Q
25
2
4.7k 10 F F F D F 9 F 1 5
SMPL-B SMPL-Q Q-SW OUT-SW-Q
1 2 F 6 9 E E 6 9 E C 6 9 E 8 6 9 E 0 6 9 4 3
Q-SW OUT-SW-Q OE-Q
3 E 13 1 D 13 1 B 13 1 7 13 1 13 1
OE-Q
D 10 15 C 10 15 A 10 15 6 10 15 10 15 29 54
CK-A CK-P
29 54 79 4
4,6,10/11 ADV 1/2FS
≠≠≠≠≠
≠≠≠≠ CK-A CK-P CK-B CK-Q
79 4 IC207 IC215 IC223 IC231 IC239
CK-B CK-Q 5V C208 SN74HC157ANS 5V C216 SN74HC157ANS 5V C224 SN74HC157ANS 5V C232 SN74HC157ANS 5V C240 SN74HC157ANS
0.1 0.1 0.1 0.1 0.1 51
OP-IN
51 52 77
OP-IN 16 8 16 8 16 8 16 8 16 8 OP-CTL OP-OUT
52 77 53 76
OP-CTL OP-OUT D 2 D 2 D 2 D 2 D 2 OP-CK OP-GATE
53 76 VSS
OP-CK OP-GATE C 5 C 5 C 5 C 5 C 5
B 14 4 D B 14 4 D B 14 4 D B 14 4 D B 14 4 3 5 15 30 40 55 66 80 90
Vss
A 11 7 C A 11 7 C A 11 7 C A 11 7 C A 11 7 2
5 15 30 40 55 66 80 90 C 3 12 B B 3 12 B 9 3 12 B 5 3 12 B 3 12 1
B 6 9 A A 6 9 A 8 6 9 A 4 6 9 A 6 9 0
A 13 1 9 13 1 7 13 1 3 13 1 13 1
9 10 15 8 10 15 6 10 15 2 10 15 10 15

IC208 IC216 IC224 IC232


5V C209 SN74HC157ANS 5V C217 SN74HC157ANS 5V C225 SN74HC157ANS 5V C233 SN74HC157ANS
0.1 0.1 0.1 0.1

16 8 16 8 16 8 16 8
9 2 9 2 9 2 9 2
8 5 8 5 8 5 8 5
7 14 4 9 7 14 4 9 7 14 4 9 7 14 4 9
6 11 7 8 6 11 7 8 6 11 7 8 6 11 7 8
8 3 12 7 7 3 12 7 5 3 12 7 1 3 12 7
10/11 ADV FS 0
7 6 9 6 6 6 9 6 4 6 9 6 0 6 9 6

4 6
5
13
10
1
15
5
4
13
10
1
15
3
2
13
10
1
15
13
10
1
15

IC209 IC217 IC225 IC233


5V C210 SN74HC157ANS 5V C218 SN74HC157ANS 5V C226 SN74HC157ANS 5V C234 SN74HC157ANS
0.1 0.1 0.1 0.1

16 8 16 8 16 8 16 8
5 2 5 2 5 2 5 2
4 5 4 5 4 5 4 5
3 14 4 5 3 14 4 5 3 14 4 5 3 14 4 5
2 11 7 4 2 11 7 4 2 11 7 4 2 11 7 4
4 3 12 3 3 3 12 3 1 3 12 3 3 12 3
3 6 9 2 2 6 9 2 0 6 9 2 6 9 2
2 13 1 1 13 1 13 1 13 1
1 10 15 0 10 15 10 15 10 15

IC210 IC218 IC226 IC234


5V C211 SN74HC157ANS 5V C219 SN74HC157ANS 5V C227 SN74HC157ANS 5V C235 SN74HC157ANS
0.1 0.1 0.1 0.1

16 8 16 8 16 8 16 8
1 2 1 2 1 2 1 2
0 5 0 5 0 5 0 5
14 4 1 14 4 1 14 4 1 14 4 1
11 7 0 11 7 0 11 7 0 11 7 0
0 3 12 3 12 3 12 3 12
6 9 6 9 6 9 6 9
10/11 ADV FS 1
13 1 13 1 13 1 13 1
5,9,10/11 FS
10 15 10 15 10 15 10 15

5
10/11 ADV 1/2FS 0
10/11 ADV 1/2FS 1
10/11 ADV 1/2FS 2
10/11 FRAC Z COEF

4-6 4-6 DME-3000/7000

A B C D E F G H
Combiner, lighting and Z recursive CMB-1 (3/11) CMB-1 (3/11) Combiner, lighting and Z recursive

EXP Z COEF 10/11

Z 4/11
≠≠
FS
≠ 1/11 10/11
IC245 IC246 IC247
CXD8838Q CXD8838Q CXD8838Q
5V IC244
IC241 IC243 CXD8335AQ
IDT7210L55J 5V CXD8838Q
C243 C244 5V IC250 5V 5V 5V 5V
0.1 0.1 C247 C248 C262 CXD8838Q C263 5V C251 C252 C253 C254 C255 C256
R214 0.1 0.1 0.1 0.1 C249 C250 0.1 0.1 0.1 0.1 0.1 0.1
10k 0.1 0.1

16 41 65 91 3 28 53 78 16 41 65 91 16 41 65 91 16 41 65 91
16 41 65 91
15 16 25 21 11 24 22 12 23 13 14 54 53 20 19 18 17
A 81 49 9 93 89 13 81 49 13 2 81 49 2 13 81 49 9
A16 P16 A9 E9 A16 P16 A16 P16 A16 P16
CK
CK
CK
TC
OEL
OEM
OEX
RND
PREL
SUB
ACC

GND
GND
VCC
VCC
VCC
VCC
82 48 81 A16 P16 49 94 88 82 82 48 82
9 9 8 12 48 12 1 1 12 48 8
10 30 A15 P15 82 48 A8 E8 A15 P15 A15 P15 A15 P15
X15 8 83 47 8 A15 P15 7 95 87 11 83 47 11 0 83 47 0 11 83 47 7
9 9 31 A A14 P14 83 47 A7 E7 A14 P14 A14 P14 A14 P14
X14 P29 7 84 46 7 A14 P14 6 96 86 10 84 46 10 84 46 10 84 46 6
8 8 32 9 A13 P13 F 84 46 6 A6 E6 A13 P13 A13 P13 A13 P13
X13 P28 6 85 45 6 A13 P13 5 97 85 F 85 45 F 85 45 F 85 45 5
7 7 33 8 A12 P12 E 85 45 5 A5 E5 A12 P12 A12 P12 A12 P12
X12 P27 5 86 44 5 A12 P12 4 98 84 E 86 44 E 86 44 E 86 44 4
6 6 34 7 A11 P11 D 86 44 4 A4 E4 A11 P11 A11 P11 A11 P11
X11 P26 4 87 43 4 A11 P11 3 99 83 D 87 43 D 87 43 D 87 43 3
5 5 35 6 A10 P10 C 87 43 3 A3 E3 A10 P10 A10 P10 A10 P10
X10 P25 3 88 42 3 A10 P10 2 100 82 C 88 42 C 88 42 C 88 42 2
4 4 36 5 A9 P9 B 88 42 2 A2 E2 A9 P9 A9 P9 A9 P9
X9 P24 2 89 39 2 A9 P9 1 1 81 B 89 39 B 89 39 B 89 39 1
3 3 37 4 A8 P8 A 89 39 1 A1 E1 A8 P8 A8 P8 A8 P8
X8 P23 1 92 38 1 A8 P8 0 2 80 A 92 38 A 92 38 A 92 38 0
2 2 38 3 A7 P7 9 92 38 0 A0 E0 A7 P7 A7 P7 A7 P7
X7 P22 0 93 37 0 A7 P7 9 93 37 9 93 37 93 37
1
0
1
68
X6
X5
P21
P20
39
40
2
1
94
95
A6
A5
P6
P5
36
35
93
94
A6
A5
P6
P5
37
36
5
6
B9 F9
77
76
8
7
94
95
A6
A5
P6
P5
36
35
8
7
94
95
A6
A5
P6
P5
36
35
94
95
A6
A5
P6
P5
36
35
2
67 41 0 A4 P4 95 35 B8 F8 A4 P4 A4 P4 A4 P4
X4 P19 96 34 A4 P4 7 75 6 96 34 6 96 34 96 34
66 42 -1 A3 P3 96 34 B7 F7 A3 P3 A3 P3 A3 P3
X3 P18 97 33 A3 P3 8 74 5 97 33 5 97 33 97 33
65 43 -2 A2 P2 97 33 B6 F6 A2 P2 A2 P2 A2 P2
X2 P17 98 32 A2 P2 9 73 4 98 32 4 5V 98 32 98 32
64 44 -3 A1 P1 98 32 B5 F5 A1 P1 A1 P1 A1 P1
X1 P16 99 31 A1 P1 10 72 3 99 31 3 99 31 99 31
63 A0 P0 99 31 B4 F4 A0 P0 A0 P0 A0 P0
X0 A0 P0 11 71 R221
Y15
Y14
Y13
Y12
Y11
Y10

B3 F3 5V 4.7k
Y9
Y8
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0

A 74 6 A 12 70 R219 74 6 74 6 9 74 6
B16 Q16 -1 74 6 9 B2 F2 750 B16 Q16 B16 Q16 B16 Q16
9 73 7 9 B16 Q16 13 69 73 7 73 7 8 73 7
45 46 47 48 49 50 51 52 55 56 57 58 59 60 61 62 B15 Q15 -2 73 7 8 B1 F1 B15 Q15 B15 Q15 B15 Q15
8 72 8 8 B15 Q15 A 14 68 72 8 72 8 7 72 8
B14 Q14 -3 72 8 7 B0 F0 B14 Q14 B14 Q14 B14 Q14
7 71 9 7 B14 Q14 71 9 71 9 6 71 9
F
E
D
C
B
A
9
8
7
6
5
4
3
2
1
0

B13 Q13 71 9 B13 Q13 B13 Q13 B13 Q13


6 70 10 6 B13 Q13 9 18 64 13 70 10 70 10 5 70 10
B12 Q12 70 10 C9 G9 B12 Q12 B12 Q12 B12 Q12
5 69 11 5 B12 Q12 8 19 63 12 69 11 69 11 4 69 11
B11 Q11 69 11 C8 G8 B11 Q11 B11 Q11 B11 Q11
4 68 12 4 B11 Q11 7 20 62 11 68 12 68 12 3 68 12
B10 Q10 68 12 C7 G7 B10 Q10 B10 Q10 B10 Q10
3 67 13 3 B10 Q10 6 21 61 10 67 13 67 13 2 67 13
B9 Q9 67 13 C6 G6 B9 Q9 B9 Q9 B9 Q9
2 64 14 2 B9 Q9 5 22 60 F 64 14 64 14 1 64 14
B8 Q8 64 14 C5 G5 B8 Q8 B8 Q8 B8 Q8
1 63 17 1 B8 Q8 4 23 59 E 63 17 63 17 0 63 17
IC242 B7 Q7 63 17 C4 G4 B7 Q7 B7 Q7 B7 Q7
EPM7032LC44-3 0 62 18 0 B7 Q7 3 24 58 D 62 18 62 18 62 18
B6 Q6 62 18 C3 G3 B6 Q6 B6 Q6 B6 Q6
61 19 B6 Q6 2 25 57 C 61 19 61 19 61 19
13

4
3
2
1
0

B5 Q5 61 19 C2 G2 B5 Q5 B5 Q5 B5 Q5
60 20 B5 Q5 1 26 56 B 60 20 60 20 60 20
1A
19
18
17
16
15

B4 Q4 60 20 C1 G1 B4 Q4 B4 Q4 B4 Q4
59 21 B4 Q4 0 27 55 A 59 21 59 21 59 21
B3 Q3 59 21 C0 G0 B3 Q3 B3 Q3 B3 Q3
58 22 B3 Q3 58 22 58 22 58 22
4 5 6 7 8 39 36 34 33 32 31 29 37 38 B2 Q2 58 22 B2 Q2 B2 Q2 B2 Q2
57 23 B2 Q2 9 30 52 9 57 23 57 23 57 23
B1 Q1 D9 H9 B1 Q1 B1 Q1 B1 Q1
S4A26
S4A25
S4A24
S4A23
S4A22
S4A21
SIGN

S4
S3
S2
S1
S0

CO

MUL

5V 56 24 57 B1 Q1 23 31 51 56 56 24 56
5V 8 8 5V 24 5V 5V 24
B0 Q0 5V 56 24 D8 H8 B0 Q0 B0 Q0 B0 Q0
B0 Q0 7 32 50 7
1D 9 3 C245 R224 D7 H7
S8A29 VCC 0.1 100 50 4.7k 6 33 49 6 100 50 R222 100 50 100 50
1C 11 15 SMPL-A SMPL-P 100 50 D6 H6 R220 SMPL-A SMPL-P 4.7k SMPL-A SMPL-P R223 SMPL-A SMPL-P
S8A28 VCC R215 26 27 5V SMPL-A SMPL-P 5 34 48 5 4.7k 26 27 26 27 4.7k 26 27
1B 12 23 C246 4.7k P-SW OUT-SW-P 26 27 D5 H5 P-SW OUT-SW-P P-SW OUT-SW-P P-SW OUT-SW-P
S8A27 VCC 0.1 78 28 P-SW OUT-SW-P 4 35 47 4 78 28 78 28 78 28
1A 13 35 DIR OE-P 78 28 D4 H4 DIR OE-P DIR OE-P DIR OE-P
46
19
18
14
16
S8A26
S8A25
S8A24
VCC
75
SMPL-B SMPL-Q
25
2
R216
4.7k
75
DIR

SMPL-B
OE-P

SMPL-Q 25
3
2
36
37
D3
D2
H3
H2
45
44
3
2 75
SMPL-B SMPL-Q
25 75
SMPL-B SMPL-Q
25 75
SMPL-B SMPL-Q
25 3
1 1 38 1 1 2 1 2 1 2
17 17 Q-SW OUT-SW-Q 1 2 D1 H1 Q-SW OUT-SW-Q Q-SW OUT-SW-Q Q-SW OUT-SW-Q
S8A23 3 Q-SW OUT-SW-Q 0 39 43 0 3 3 3
16 18 OE-Q 3 D0 H0 OE-Q OE-Q OE-Q
S8A22 OE-Q
15 19 5V
S8A21 41 29 54 92 67 29 54 29 54 29 54
14 20 OVF CK-A CK-P 29 54 P M1 CK-A CK-P CK-A CK-P CK-A CK-P
S8A20 79 4 CK-A CK-P R217 16 66 R218 79 4 79 4 79 4
13 21 CK-B CK-Q 79 4 5V 4.7k M3 M0 4.7k CK-B CK-Q CK-B CK-Q CK-B CK-Q
S8A19 CK-B CK-Q 17 42
12 24 M2 MFLD1
S8A18 51 91 41 51 51 51
11 25 OP-IN 51 CK FLD0 OP-IN OP-IN OP-IN
S8A17 52 77 OP-IN 52 77 52 77 52 77
10 26 OP-CTL OP-OUT 52 77 Vss OP-CTL OP-OUT OP-CTL OP-OUT OP-CTL OP-OUT
S8A16 53 76 OP-CTL OP-OUT 53 76 53 76 53 76
F 27 10 OP-CK OP-GATE 53 76 OP-CK OP-GATE OP-CK OP-GATE OP-CK OP-GATE
S8A15 GND VSS OP-CK OP-GATE 4 15 29 40 54 65 79 90 VSS VSS VSS
E 28 22 VSS
S8A14 GND
D 40 30 5 15 30 40 55 66 80 90 5 15 30 40 55 66 80 90 5 15 30 40 55 66 80 90 5 15 30 40 55 66 80 90
S8A13 GND 5 15 30 40 55 66 80 90
43 42
CK GND
OE1
CLR
OE2

44 1 2

5V C260 IC248
0.1 74AC244SJ
10/11 DELAYED 1/2FS
20 10
F 2 V DD GND 18 F
E 4 16 E
D 6 14 D
C
B
8
11
12
9
C
B
4
A 13 7 A
9 15 5 9
8 17 3 8

1 19

5V C261 IC249
0.1 74AC244SJ

20 10
7 2 V DD GND 18 7
6 4 16 6
5 6 14 5
4 8 12 4
3 11 9 3
2 13 7 2
1 15 5 1
0 17 3 0

1 19

5
Combiner, lighting and Z recursive
CMB-1 (3/11)
BKDM-3050
BOARD NO. 1-652-569-14
LOT NO. 502-
FOR DME-3000/7000
B-¥BKDM3050-CMB1M

DME-3000/7000 4-7 4-7


I J K L M N O P
Combiner, lighting and Z recursive CMB-1 (4/11) CMB-1 (4/11) Combiner, lighting and Z recursive

BKDM-3050 (SY) : S/N 50001 and Higher

10/11 CMBED KEY KA/KB EXCHANGE


2CK DELAY
SK MULTIPLEX/K
5V 5V
5V C316 C319 C320 C321
0.1 0.1 0.1 0.1 5V
IC304 IC333 C310 C311 C322 C323 5V 5V
74AC574SJ 74AC574SJ 0.1 0.1 0.1 0.1 C324 C325 C353 C354
5V 5V IC312 0.1 0.1 0.1 0.1
C303 C356 CXD8331Q 16 41 65 91 16 41 65 91
0.1 0.1
IC307
R301 1k
R302 1k
R303 1k
R304 1k
R305 1k
R306 1k
R307 1k
R308 1k
R309 1k
R310 1k

16 41 65 91 16 41 65 91 3 28 53 78 16 41 65 91
20 10 20 10 HM63021FP-28 122 134 81 49 81
B P16 P16 49
CNY1 B B A16 A16 IC316
2 V DD GND 19 9 1 2 V DD GND 19 1 9 4 24 81 49 123 135 A 82 IC313 48 82 CXD8838Q 48 9 10 81 49 10 10 93 89 B 81 49 B
KPC,Y1-25C 23A PROC (K) 9 A16 P16 A A A15 CXD8838Q P15 A15 P15 A16 P16 A9 E9 A16 P16
3 18 8 0 3 18 0 8 5 23 82 IC311 48 124 136 9 83 47 83 47 8 F 82 IC317 48 F 10 94 88 A 82 IC331 48 A
KPC,Y1-25D 23B PROC (K) 8 A15 CXD8838Q P15 9 9 A14 P14 A14 P14 A15 CXD8838Q P15 A8 IC318 E8 A15 CXD8838Q P15
4 17 7 4 17 7 6 22 83 47 125 137 8 84 46 84 46 7 E 83 47 E 10 95 CXD8335AQ 87 9 83 47 9
KPC,Y1-26A 23C PROC (K) 7 A14 P14 8 8 A13 P13 A13 P13 A14 P14 A7 E7 A14 P14
5 16 6 5 16 6 7 21 84 46 126 138 7 85 45 85 45 6 D 84 46 D 10 96 86 8 84 46 8
KPC,Y1-26B 23D PROC (K) 6 A13 P13 7 7 A12 P12 A12 P12 A13 P13 A6 E6 A13 P13
6 15 5 6 15 5 8 20 85 45 127 143 6 86 44 86 44 5 C 85 45 C F 97 85 7 85 45 7
KPC,Y1-26C 24A PROC (K) 5 A12 P12 6 6 A11 P11 A11 P11 A12 P12 A5 E5 A12 P12
7 14 4 7 14 4 9 19 86 44 128 IN0 OUT0 144 5 87 43 87 43 4 B 86 44 B E 98 84 6 86 44 6
KPC,Y1-26D 24B PROC (K) 4 A11 P11 5 5 A10 P10 A10 P10 A11 P11 A4 E4 A11 P11
8 13 3 8 13 3 10 18 87 43 129 145 4 88 42 88 42 3 A 87 43 A D 99 83 5 87 43 5
KPC,Y1-27A 24C PROC (K) 3 A10 P10 4 4 A9 P9 A9 P9 A10 P10 A3 E3 A10 P10
9 12 2 9 12 2 11 17 88 42 130 146 3 89 39 89 39 2 9 88 42 9 C 100 82 4 88 42 4
KPC,Y1-27B 24D PROC (K) 2 A9 P9 3 3 A8 P8 A8 P8 A9 P9 A2 E2 A9 P9
1 OE OE 5V 1 89 39 131 147 2 92 38 92 38 1 8 89 39 8 B 1 81 3 89 39 3
KPC,Y1-27C 25A PROC (K) 1 A8 P8 2 2 A7 P7 A7 P7 A8 P8 A1 E1 A8 P8
0 11 1 11 1 28 15 0 92 38 132 148 1 93 37 93 37 0 7 92 38 7 A 2 80 2 92 38 2
KPC,Y1-27D 25B PROC (K) 0 VDD DEC4 A7 P7 1 1 A6 P6 A6 P6 A7 P7 A0 E0 A7 P7
C307 16 93 37 133 149 0 94 36 94 36 6 93 37 6 1 93 37 1
0.1 DEC3 A6 P6 0 0 A5 P5 A5 P5 A6 P6 A6 P6
14 26 94 36 95 35 95 35 5 94 36 5 10 5 77 0 94 36 0
GND DEC2 A5 P5 A4 P4 A4 P4 A5 P5 B9 F9 A5 P5

2 IC305
74AC574SJ
IC334
74AC574SJ
27
M2
DEC1
13 95
96
A4
A3
P4
P3
35
34 9
150
151
B
A
B
A
13
14 9
96
97
A3
A2
P3
P2
34
33
32
96
97
A3
A2
P3
P2
34
33
4
3
95
96
A4
A3
P4
P3
35
34
4
3
10
10
6
7
B8
B7
F8
F7
76
75
-1
-2
95
96
A4
A3
P4
P3
35
34
-1
-2
5V 5V 1 97 33 8 152 15 8 98 98 32 2 97 33 2 10 8 74 -3 97 33 -3
C304 C357 M1 A2 P2 9 9 A1 P1 A1 P1 A2 P2 B6 F6 A2 P2
0.1 0.1 12 2 98 32 7 153 16 7 99 31 99 31 1 98 32 1 F 9 73 -4 98 32 -4
WE A1 P1 8 8 A0 P0 A0 P0 A1 P1 B5 F5 A1 P1
R311 1k
R312 1k
R313 1k
R314 1k
R315 1k
R316 1k
R317 1k
R318 1k
R319 1k
R320 1k

25 3 99 31 6 154 17 6 0 99 31 0 E 10 72 5V 99 31
20 10 20 10 OE RST A0 P0 7 7 A0 P0 B4 F4 A0 P0
CNY1 5 155 22 5 74 6 B 74 6 D 11 71
2 V DD GND 19 9 1 2 V DD GND 19 1 6 6 B16 Q16 B16 Q16 B3 F3 R348
25C PROC (SK) 9 9 74 6 4 156 IN1 OUT1 23 4 73 7 A 73 7 74 6 10 C 12 70 4.7k B 74 6
3 18 8 0 3 18 0 B16 Q16 5 5 B15 Q15 B15 Q15 B16 Q16 B2 F2 B16 Q16
25D PROC (SK) 8 IC308 8 73 7 3 157 24 3 72 8 9 72 8 73 7 F B 13 69 73 7
4 17 7 4 17 HM63021FP-28 B15 Q15 4 4 B14 Q14 B14 Q14 B15 Q15 B1 F1 B15 Q15
26A PROC (SK) 7 7 72 8 2 158 25 2 71 9 8 71 9 72 8 E A 14 68 72 8
5 16 6 5 16 B14 Q14 3 3 B13 Q13 B13 Q13 B14 Q14 B0 F0 B14 Q14
26B PROC (SK) 6 1 4 24 1 6 71 9 1 159 26 1 70 10 7 70 10 71 9 D 71 9
6 15 5 6 15 B13 Q13 2 2 B12 Q12 B12 Q12 B13 Q13 B13 Q13
26C PROC (SK) 5 0 5 23 0 5 70 10 0 2 27 0 69 11 6 69 11 70 10 C 9 18 64 70 10
7 14 4 7 14 B12 Q12 1 1 B11 Q11 B11 Q11 B12 Q12 C9 G9 B12 Q12
26D PROC (SK) 4 6 22 4 69 11 3 28 68 12 5 68 12 69 11 B 8 19 63 69 11
8 13 3 8 13 B11 Q11 0 0 B10 Q10 B10 Q10 B11 Q11 C8 G8 B11 Q11
27A PROC (SK) 3 7 21 3 68 12 67 13 4 67 13 68 12 A 7 20 62 68 12
9 12 2 9 12 B10 Q10 B9 Q9 B9 Q9 B10 Q10 C7 G7 B10 Q10
27B PROC (SK) 2 8 20 2 67 13 4 53 64 14 3 64 14 67 13 9 6 21 61 B 67 13
1 OE OE B9 Q9 B B B8 Q8 B8 Q8 B9 Q9 C6 G6 B9 Q9
27C PROC (SK) 1 9 19 1 64 14 9 5 54 9 63 17 2 63 17 64 14 8 5 22 60 A 64 14
0 B8 Q8 A A B7 Q7 B7 Q7 B8 Q8 C5 G5 B8 Q8
27D PROC (SK) 0 11 1 11 1 10 18 0 63 17 8 6 55 8 62 18 1 62 18 63 17 7 4 23 59 9 63 17
B7 Q7 9 9 B6 Q6 B6 Q6 B7 Q7 C4 G4 B7 Q7
11 17 62 18 7 7 56 7 61 19 0 61 19 62 18 6 3 24 58 8 62 18
B6 Q6 8 8 B5 Q5 B5 Q5 B6 Q6 C3 G3 B6 Q6
5V 61 19 6 8 57 6 60 20 60 20 61 19 5 2 25 57 7 61 19
B5 Q5 7 7 B4 Q4 B4 Q4 B5 Q5 C2 G2 B5 Q5
28 15 60 20 5 9 58 5 59 21 59 21 60 20 4 1 26 56 6 60 20
IC335 VDD DEC4 B4 Q4 6 6 B3 Q3 B3 Q3 B4 Q4 C1 G1 B4 Q4
IC306 74AC574SJ C306 16 59 21 4 10 IN2 OUT2 65 4 58 22 58 22 59 21 3 0 27 55 5 59 21
74AC574SJ 0.1 14 DEC3 B3 Q3 5 5 B2 Q2 B2 Q2 B3 Q3 C0 G0 B3 Q3
5V 5V 26 58 22 3 11 66 3 57 23 57 23 58 22 2 58 22
C305 C358 GND DEC2 B2 Q2 4 4 B1 Q1 B1 Q1 B2 Q2 B2 Q2
0.1 0.1 13 57 23 2 12 67 2 56 24 56 24 57 23 1 9 30 52 4 57 23
R321 1k
R322 1k
R323 1k
R324 1k
R325 1k
R326 1k
R327 1k
R328 1k
R329 1k
R330 1k

DEC1 B1 Q1 3 3 B0 Q0 B0 Q0 B1 Q1 D9 H9 B1 Q1
27 56 24 1 29 68 1 56 24 0 8 31 51 3 56 24
20 10 20 10 M2 B0 Q0 2 2 5V 5V B0 Q0 D8 H8 B0 Q0
CNZ1 1 0 30 69 0 100 50 100 50 5V 7 32 50 2 5V
2 V DD GND 19 9 1 2 V DD GND 19 1 M1 5V 1 1 SMPL-A SMPL-P SMPL-A SMPL-P D7 H7
MPU-70,Z1-12A 12A MPU KEY 9 12 2 100 50 31 70 26 27 26 27 100 50 5V 6 33 49 1 R349 100 50
3 18 8 0 3 18 0 WE SMPL-A SMPL-P 0 0 P-SW OUT-SW-P P-SW OUT-SW-P SMPL-A SMPL-P D6 H6 4.7k SMPL-A SMPL-P
MPU-70,Z1-12B 12B MPU KEY 8 25 3 26 27 78 28 78 28 R342 26 27 5 34 48 0 26 27
4 17 7 4 17 OE RST P-SW OUT-SW-P DIR OE-P DIR OE-P 4.7k P-SW OUT-SW-P D5 H5 P-SW OUT-SW-P
MPU-70,Z1-12C 12C MPU KEY 7 78 28 32 94 78 28 R343 4 35 47 -1 78 28
5 16 6 5 16 DIR OE-P B B DIR OE-P 4.7k D4 H4 DIR OE-P
MPU-70,Z1-13A 13A MPU KEY 6 33 95 9 75 25 75 25 3 36 46 -2
6 15 5 6 15 A A SMPL-B SMPL-Q SMPL-B SMPL-Q D3 H3
MPU-70,Z1-13B 13B MPU KEY 5 75 25 34 96 8 1 2 1 2 75 25 2 37 45 -3 75 25
7 14 SMPL-B SMPL-Q 9 9 Q-SW OUT-SW-Q Q-SW OUT-SW-Q SMPL-B SMPL-Q D2 H2 SMPL-B SMPL-Q
3 MPU-70,Z1-13C
MPU-70,Z1-14A
13C
14A
MPU
MPU
KEY
KEY
4
3
8
9
14
13
4
3
7
8 13
12
1
Q-SW OUT-SW-Q
OE-Q
2
3
35
36
8
7
8
7
97
98
7
6
OE-Q
3
OE-Q 3 1
Q-SW OUT-SW-Q
OE-Q
2
3 5V
1
0
38
39
D1
D0
H1
H0
44
43
-4
5V
1
Q-SW OUT-SW-Q
OE-Q
2
3
12 2 9
MPU-70,Z1-14B 14B MPU KEY 2 37 104 5 29 54 29 54
1 OE OE 6 6 CK-A CK-P CK-A CK-P
MPU-70,Z1-14C 14C MPU KEY 1 29 54 38 IN3 OUT3 105 4 79 4 79 4 29 54 R344 92 67 29 54
0 11 1 11 1 CK-A CK-P 5 5 CK-B CK-Q CK-B CK-Q CK-A CK-P 4.7k P M1 CK-A CK-P
MPU-70,Z1-15A 15A MPU KEY 0 79 4 39 106 3 79 4 16 66 R345 79 4
CK-B CK-Q 4 4 CK-B CK-Q M3 M0 CK-B CK-Q
42 107 2 51 51 17 42 4.7k
3 3 OP-IN OP-IN M2 MFLD1
IC428(3/4) 51 43 108 1 52 77 52 77 51 91 41 51
EPM7032LC44-3 OP-IN 2 2 OP-CTL OP-OUT OP-CTL OP-OUT OP-IN CK FLD0 OP-IN
52 77 44 109 0 53 76 53 76 52 77 52 77
10/11 KEY SEL OP-CTL OP-OUT 1 1 OP-CK OP-GATE OP-CK OP-GATE OP-CTL OP-OUT Vss OP-CTL OP-OUT
0 21 25 3 4 53 76 45 110 VSS VSS 53 76 53 76
OP-CK OP-GATE 0 0 OP-CK OP-GATE OP-CK OP-GATE
1 24 VSS VSS 4 15 29 40 54 65 79 90 VSS
5 15 30 40 55 66 80 90 5 15 30 40 55 66 80 90
IC810(2/6) 46 92
74AC04SJ 5 15 30 40 55 66 80 90 B DTO1 5 15 30 40 55 66 80 90 5 15 30 40 55 66 80 90
47 93
10/11 FS/0 A DTO2
48 91
IC302 IC336 9 DTKO
74AC574SJ 74AC574SJ 49 118
5V 5V 8 TSTO SRC FS 10/11
C301 C302 5V IC309 50
0.1 0.1 7 MAT 1/11
µPD42101G-3 51
R331 1k
R332 1k
R333 1k
R334 1k
R335 1k
R336 1k
R337 1k
R338 1k
R339 1k
R340 1k

C308 6 CMB OUT KEY 6/11


20 10 20 10 0.1 52 IN4
CNZ1 5
2 V DD GND 19 9 1 2 V DD GND 19 1 18 7 71 5V
MPU-70,Z1-8C 8C PZ 9 4 C317 IC314
3 18 8 0 3 18 0 13 24 1 9 72
MPU-70,Z1-9A 9A PZ 8 3 0.1 µPD42101G-3
4 17 7 4 17 12 23 2 8 73
MPU-70,Z1-9B 9B PZ 7 2 6, 10/11 ADV 1/2FS 3 IC428(2/4)
5 16 6 5 16 11 22 3 7 74 18 7
MPU-70,Z1-9C 9C PZ 6 5V 1 EPM7032LC44-3
6 15 5 6 15 10 21 4 6 75 9 24 1 9
MPU-70,Z1-10A 10A PZ 5 R341 0
7 14 4 7 14 F 16 9 5 8 23 2 8 B 8 20
MPU-70,Z1-10B 10B PZ 4 22k
8 13 3 8 13 E 15 10 4 84 7 22 3 7 A 9 29
MPU-70,Z1-10C 10C PZ 3 CLR0 5V
9 12 2 9 12 D 14 11 3 85 6 21 4 6 9 11
MPU-70,Z1-11A 11A PZ 2 EN0 5V
1 OE OE C 13 12 2 86 5 16 9 5 8 12
MPU-70,Z1-11B 11B PZ 1 CLR1 R350
5 87 15 10 22k 13
0 11 1 11 1 6 1 4 4 7
MPU-70,Z1-11C 11C PZ 0 EN1 VDD
19 20 88 18 3 14 11 3 14
TN IN VDD 10/11 PZ SEL 0
12 16
4 8
17 82
83
DTI1
VDD
VDD
40
41
2 13
6 5
20
2
10/11
CNZ1
PZ SEL 1
17
18
19
VIDEO CROP 1/11
81 C312 19
10/11 2FS 7 DTI2 VDD 0.1 MPU,Z1-29B 29B CLIP
63 64 8
IC303 IC337 IC310 CKS VDD
74AC574SJ 74AC574SJ µPD42101G-3 76 80 C313 17
5V 5V 5V OE0 VDD 0.1
C359 C360 C309 77 103
0.1 0.1 0.1 OE1 VDD
78 120 C314
OE2 VDD 0.1
18 7 79 121 5V
20 10 20 10 OE3 VDD C318
IC315
B 24 1 1 139 C315 0.1 µPD42101G-3
9 2 V DD GND 19 13 1 2 V DD GND 19 B VDD 0.1
A 23 2 0 60 160
8 3 18 12 0 3 18 A CK VDD
22 3 CTIM 117 18 7
7 4 17 11 4 17 CTIM
21 4 RESET 119 62 1 24 1 1
6 5 16 10 5 16 RESET VSS
16 9 CKX 113 20 0 23 2 0
5 6 15 F 6 15 CKX VSS
15 10 SDIO 102 21 22 3
4 7 14 E 7 14 SDAT VSS
14 11 CKD2 100 59 21 4
3 8 13 D 8 13 CKD VSS
13 12 SADD1 112 61 16 9
2 9 12 C 9 12 SADD VSS
6 5 99 15 10
OE OE VSS
19 20 CS1C 116 101 14 11
11 1 11 1 CS0 VSS
8 CS1D 115 141 13 12
CS1 VSS
17 CS1E 114 142 6 5
CS2 VSS
8/8 FS 1 19 20
8
3/11 Z
17
10/11 2FS 8
10/11 2FS 9

10/11 ADV FS 2
10/11 2FS A

10/11 MAT ON/OFF


5 8/11
1,2,6,7,8,9,10/11
CMB EXT KEY
SERIAL CTRL
13 7 8
10/11 VAR. DELAY RST
8/11 CMB EXT Z
5,6,10/11 ADV ≠≠≠
2FS
≠≠ 1

4-8 4-8 DME-3000/7000

A B C D E F G H
Combiner, lighting and Z recursive CMB-1 (4/11) CMB-1 (4/11) Combiner, lighting and Z recursive

SK2 1/11
SK1 1/11
OVLP COEF 1/11
1D/2D SELECT
IC324 DIM Z 2/11
µPD42101G-3
IC319 5V 5V
CXD8331Q C334 C336 C345 C346
0.1 0.1 5V C341 0.1 0.1
0.1
CMB COEF 2/11
OVLP 16 41 65 91 FADE
B 122 134 B 18 7 16 41 65 91
B B
A 123 135 A 9 73 56 A C 81 49 73 56 9 24 1 9 C 73 56 A
A A KA12 KAB12 A16 P16 KA12 KAB12 9 81 49 13 KA12 KAB12
9 124 136 9 8 48 55 9 B 82 48 48 55 8 23 2 8 A16 P16 B 48 55 9
9 9 KA11 KAB11 A15 P15 KA11 KAB11 8 82 IC328 48 12 KA11 KAB11
8 125 137 8 7 47 IC320 54 8 A 83 IC321 47 47 IC323 54 7 22 3 7 A15 CXD8838Q P15 A 47 54 8
8 8 KA10 CXD8334Q KAB10 A14 CXD8838Q P14 KA10 CXD8334Q KAB10 7 83 47 11 KA10 IC329 KAB10
7 126 138 7 6 46 53 7 9 84 46 46 53 6 21 4 6 A14 P14 9 46 CXD8334Q 53 7
7 7 KA9 KAB9 A13 P13 KA9 KAB9 6 84 46 10 KA9 KAB9
6 127 143 6 5 45 52 6 8 85 45 45 52 5 16 9 5 A13 P13 8 45 52 6
6 6 KA8 KAB8 A12 P12 KA8 KAB8 5 85 45 F KA8 KAB8
5 128 IN0 OUT0 144 5 4 44 51 5 7 86 44 44 51 4 15 10 4 A12 P12 7 44 51 5
5 5 KA7 KAB7 A11 P11 KA7 KAB7 4 86 44 E KA7 KAB7
4 129 145 4 3 43 50 4 6 87 43 43 50 3 14 11 3 A11 P11 6 43 50 4
4 4 KA6 KAB6 A10 P10 KA6 KAB6 3 87 43 D KA6 KAB6
3 130 146 3 2 42 27 3 5 88 42 42 27 2 13 12 2 A10 P10 5 42 27 3
3 3 KA5 KAB5 A9 P9 KA5 KAB5 2 88 42 C KA5 KAB5
2 131 147 2 1 39 26 2 4 89 39 39 26 6 5 A9 P9 4 39 26 2
2 2 KA4 KAB4 A8 P8 KA4 KAB4 1 89 39 B KA4 KAB4
1 132 148 1 0 38 25 1 3 92 38 38 25 19 20 A8 P8 3 38 25 1
1 1 KA3 KAB3 A7 P7 KA3 KAB3 0 92 38 A KA3 KAB3
0 133 149 0 37 24 0 2 93 37 37 24 8 A7 P7 2 37 24 0
0 0 KA2 KAB2 A6 P6 KA2 KAB2 93 37 KA2 KAB2
36 23 1 94 36 36 23 17 A6 P6 1 36 23
B
9
150
151
B B
13
14
B
A
35
KA1
KA0
KAB1
KAB0
22 0 95
96
A5
A4
P5
P4
P3
35
34
35
KA1
KA0
KAB1
KAB0
22
94
95
A5
A4
P5
P4
36
35
0 35
KA1
KA0
KAB1
KAB0
22
2
A A A3 IC325 96 34
8 152 15 9 88 71 C 97 33 88 71 C µPD42101G-3 A3 P3 9 88 71 9
9 9 KB12 KOUT12 A2 P2 KB12 KOUT12 97 33 KB12 KOUT12
7 153 16 8 87 70 B 98 32 87 70 B 5V C342 A2 P2 8 87 70 8
8 8 KB11 KOUT11 A1 P1 KB11 KOUT11 0.1 98 32 KB11 KOUT11
6 154 17 7 86 69 A 99 31 86 69 A A1 P1 7 86 69 7 CMB Z 5/11
7 7 KB10 KOUT10 A0 P0 KB10 KOUT10 99 31 KB10 KOUT10
5 155 22 6 85 68 9 85 68 9 A0 P0 6 85 68 6
6 6 KB9 KOUT9 KB9 KOUT9 18 7 KB9 KOUT9
4 156 IN1 OUT1 23 5 84 67 8 74 6 84 67 8 5 84 67 5
5 5 KB8 KOUT8 B16 Q16 KB8 KOUT8 1 24 1 1 9 74 6 9 KB8 KOUT8
3 157 24 4 83 66 7 73 7 83 66 7 B16 Q16 4 83 66 4
4 4 KB7 KOUT7 B15 Q15 KB7 KOUT7 0 23 2 0 8 73 7 8 KB7 KOUT7
2 158 25 3 82 65 6 72 8 82 65 6 B15 Q15 3 82 65 3
3 3 KB6 KOUT6 B14 Q14 KB6 KOUT6 22 3 7 72 8 7 KB6 KOUT6
1 159 26 2 79 64 5 71 9 79 64 5 B14 Q14 2 79 64 2
2 2 KB5 KOUT5 B13 Q13 KB5 KOUT5 21 4 6 71 9 6 KB5 KOUT5
0 2 27 1 78 63 4 70 10 78 63 4 B13 Q13 1 78 63 1
1 1 KB4 KOUT4 B12 Q12 KB4 KOUT4 16 9 5 70 10 5 KB4 KOUT4
-1 3 28 0 77 62 3 69 11 77 62 3 B12 Q12 0 77 62 0
0 0 KB3 KOUT3 B11 Q11 KB3 KOUT3 15 10 4 69 11 4 KB3 KOUT3
76 59 2 68 12 76 59 2 B11 Q11 76 59 IC330 CMB KOUT 6/11
KB2 KOUT2 B10 Q10 KB2 KOUT2 14 11 3 68 12 3 KB2 KOUT2 HM63021FP-28
B 4 53 75 58 1 67 13 75 58 1 B10 Q10 75 58
B B KB1 KOUT1 B9 Q9 KB1 KOUT1 13 12 2 67 13 2 KB1 KOUT1
6 5 54 74 57 0 64 14 74 57 0 B9 Q9 74 57
A A KB0 KOUT0 B8 Q8 KB0 KOUT0 6 5 1 64 14 1 KB0 KOUT0 9 4 24 9
5 6 55 63 17 B8 Q8
9 9 B7 Q7 19 20 0 63 17 0 8 5 23 8
4 7 56 9 128 2 62 18 9 128 2 B7 Q7 13 128 2
8 8 ZA19 ZOUT20 B6 Q6 ZA19 ZOUT20 8 62 18 ZA19 ZOUT20 7 6 22 7
3 8 57 8 127 151 61 19 8 127 151 B6 Q6 12 127 151 13
7 7 ZA18 ZOUT19 B5 Q5 ZA18 ZOUT19 17 61 19 ZA18 ZOUT19 6 7 21 6
2 9 58 7 126 150 60 20 7 126 150 B5 Q5 11 126 150 12
6 6 ZA17 ZOUT18 B4 Q4 ZA17 ZOUT18 60 20 ZA17 ZOUT18 5 8 20 5
1 10 IN2 OUT2 65 6 125 149 59 21 6 125 149 B4 Q4 10 125 149 11
5 5 ZA16 ZOUT17 B3 Q3 ZA16 ZOUT17 59 21 ZA16 ZOUT17 4 9 19 4
0 11 66 5 124 148 58 22 5 124 148 B3 Q3 F 124 148 10
4 4 ZA15 ZOUT16 B2 Q2 ZA15 ZOUT16 A 58 22 ZA15 ZOUT16 3 10 18 3
-1 12 67 4 123 147 57 23 4 123 147 B2 Q2 E 123 147 F
3 3 ZA14 ZOUT15 B1 Q1 ZA14 ZOUT15 57 23 ZA14 ZOUT15 2 11 17 2
-2 29 68 3 122 146 56 24 3 122 146 B1 Q1 D 122 146 E
2 2 ZA13 ZOUT14 B0 Q0 ZA13 ZOUT14 IC326 56 24 ZA13 ZOUT14 5V
-3 30 69 2 119 145 2 119 145 µPD42101G-3 B0 Q0 C 119 145 D
1 1 ZA12 ZOUT13 ZA12 ZOUT13 ZA12 ZOUT13 28 15
-4 31 70 1 118 144 100 50 1 118 144 B 118 144 C VDD DEC4
0 0 ZA11 ZOUT12 5V SMPL-A SMPL-P ZA11 ZOUT12 5V C343 100 50 ZA11 ZOUT12 C351 16
0 117 143 26 27 0 117 143 0.1 SMPL-A SMPL-P A 117 143 B 0.1 DEC3
ZA10 ZOUT11 P-SW OUT-SW-P ZA10 ZOUT11 5V 26 27 5V ZA10 ZOUT11 14 26
32 94 116 142 78 28 116 142 P-SW OUT-SW-P 9 116 142 A GND DEC2
B B ZA9 ZOUT10 DIR OE-P ZA9 ZOUT10 78 28 ZA9 ZOUT10 13
33 95 115 139 115 139 18 7 DIR OE-P 8 115 139 9 DEC1
A A ZA8 ZOUT9 ZA8 ZOUT9 ZA8 ZOUT9 27
114 138 114 138 24 1 114 138 M2
34
35
9
8
9
8
96
97 113
112
ZA7
ZA6
ZOUT8
ZOUT7
137
136
75
1
SMPL-B
Q-SW
SMPL-Q
OUT-SW-Q
25
2
3
113
112
ZA7
ZA6
ZOUT8
ZOUT7
137
136
9
8 23
22
2
3
9
8
75
1
SMPL-B
Q-SW
SMPL-Q
OUT-SW-Q
25
2
R347
4.7k
7
6 113
112
ZA7
ZA6
ZOUT8
ZOUT7
137
136
8
7
1
12
M1
WE
2
3
36 98 7 7 5 6
7 7 ZA5 ZOUT6 OE-Q ZA5 ZOUT6 3 ZA5 ZOUT6 25 3
37 104 111 135 111 135 6 21 4 6 OE-Q 4 111 135 5 OE RST
6 6 ZA4 ZOUT5 ZA4 ZOUT5 ZA4 ZOUT5
38 IN3 OUT3 105 110 134 29 54 110 134 5 16 9 5 3 110 134 4
5 5 ZA3 ZOUT4 CK-A CK-P ZA3 ZOUT4 29 54 ZA3 ZOUT4
39 106 109 133 79 4 109 133 4 15 10 4 CK-A CK-P 2 109 133 3
4 4 ZA2 ZOUT3 CK-B CK-Q ZA2 ZOUT3 79 4 ZA2 ZOUT3
42 107 108 132 108 132 3 14 11 3 CK-B CK-Q 1 108 132 2
3 3 ZA1 ZOUT2 ZA1 ZOUT2 ZA1 ZOUT2
43 108 107 131 51 107 131 2 13 12 2 0 107 131 1
2 2 ZA0 ZOUT1 OP-IN ZA0 ZOUT1 51 ZA0 ZOUT1
44 109 130 52 77 130 6 5 OP-IN 130 0 IC301
1 1 ZOUT0 OP-CTL OP-OUT ZOUT0 52 77 ZOUT0 HM63021FP-28
45 110 16 53 76 16 19 20 OP-CTL OP-OUT 16
0 0 ZB20 OP-CK OP-GATE ZB20 53 76 ZB20
15 VSS 15 8 OP-CK OP-GATE 13 15
ZB19 ZB19 VSS ZB19 1 4 24 1
46 92 14 14 17 12 14
B DTO1 ZB18 5 15 30 40 55 66 80 90 ZB18 ZB18 0 5 23 0
47 93 13 13 5 15 30 40 55 66 80 90 11 13
A DTO2 ZB17 ZB17 ZB17 6 22
48 91 12 12 10 12
9 DTKO ZB16 ZB16 IC327 ZB16 7 21
49 118 11 5V 11 µPD42101G-3 F 11 5V
8 TSTO ZB15 ZB15 5V ZB15 8 20
50 10 10 5V C344 E 10
7 ZB14 ZB14 0.1 ZB14 9 19
51 9 106 9 106 D 9 106
6 ZB13 TNCON ZB13 TNCON ZB13 TNCON 10 18
52 IN4 8 8 C 8
5 ZB12 ZB12 18 7 ZB12 11 17
71 7 18 7 18 B 7 18 5V
4 ZB11 CLKH IC332(1/4) ZB11 CLKH 1 24 1 1 ZB11 CLKH
72 6 20 SN74HC08ANS 6 20 A 6 20
3 ZB10 CLK ZB10 CLK 0 23 2 0 ZB10 CLK 28 15
73 5 5 9 5 VDD DEC4
5V 2 ZB9 1 ZB9 22 3 ZB9 C352 16
74 4 3 IC322 4 8 4 0.1 DEC3
1 ZB8 2 µPD42101G-3 ZB8 21 4 ZB8 14 26
75 3 3 7 3 GND DEC2
R346 0 ZB7 5V ZB7 16 9 ZB7 13
22k 159 34 RESET C335 159 34 RESET 6 159 34 RESET DEC1
ZB6 RST 0.1 ZB6 RST 15 10 ZB6 RST 27
84 158 32 CKX 158 32 CKX 5 158 32 CKX M2
CLR0 ZB5 CKX ZB5 CKX 14 11 ZB5 CKX 1
85 157 33 CKD2 157 33 CKD2 4 157 33 CKD2 M1
EN0 5V ZB4 CKD 18 7 ZB4 CKD 13 12 ZB4 CKD 12 2
86 156 31 CS22 4 156 31 CS23 3 156 31 CS24 WE
CLR1 ZB3 CS 6 24 1 ZB3 CS 6 5 ZB3 CS 25 3
87 1 155 29 SADD1 5 155 29 SADD1 2 155 29 SADD1 OE RST
EN1 VDD ZB2 SADRS 23 2 ZB2 SADRS 19 20 ZB2 SADRS
88 18 154 30 SDIO 154 30 SDIO 1 154 30 SDIO
TN IN VDD ZB1 SDATA 22 3 ZB1 SDATA 8 ZB1 SDATA

82
DTI1
VDD
VDD
40
41
153
ZB0
IC332(2/4)
SN74HC08ANS 21
16
4
9
153
ZB0 17
0 153
ZB0 4
83 81 104 104 104 5V
DTI2 VDD C326 GZ12 5V 10 GZ12 5V GZ12
0.1 15
63 64 103 1 103 1 9 103 1
CKS VDD GZ11 VDD 14 11 GZ11 VDD GZ11 VDD
76 80 C327 102 40 102 40 102 40
OE0 VDD 0.1 GZ10 VDD 13 12 GZ10 VDD 3/11 GZ10 VDD
77 103 100 41 100 41 6/11 100 41
OE1 VDD GZ9 VDD 6 5 GZ9 VDD C337 GZ9 VDD
78 120 C328 98 61 C330 98 61 0.1 98 61 C347
OE2 VDD 0.1 GZ8 VDD 0.1 19 20 GZ8 VDD 10/11 ADV 1/2FS
≠≠≠≠≠
≠≠≠≠ GZ8 VDD 0.1
79 121 97 80 97 80 97 80
OE3 VDD GZ7 VDD 8 GZ7 VDD GZ7 VDD
139 C329 96 99 C331 96 99 C338 96 99 C348
VDD 0.1 GZ6 VDD 0.1 17 GZ6 VDD GZ6 VDD
60 160 95 120 95 120 0.1 95 120 0.1
CK VDD GZ5 VDD GZ5 VDD GZ5 VDD
CTIM 117 94 121 C332 94 121 C339 94 121 C349
CTIM GZ4 VDD 0.1 GZ4 VDD GZ4 VDD
RESET 119 62 93 140 9 93 140 0.1 93 140 0.1
RESET VSS GZ3 VDD 8 GZ3 VDD GZ3 VDD
CKX 113 20 92 160 C333 10 IC332(3/4) 92 160 C340 92 160 C350
CKX VSS GZ2 VDD 0.1 SN74HC08ANS GZ2 VDD 0.1 GZ2 VDD 0.1
SDIO 102 21 91 17 91 17 91 17
SDAT VSS GZ1 VDD 5V GZ1 VDD GZ1 VDD
CKD2 100 59 90 81 C355 90 81 90 81
CKD VSS GZ0 VDD 0.1 GZ0 VDD GZ0 VDD
SADD1 112 61
SADD VSS V SS V SS V SS
99 14
101
129
141
152

101
129
141
152

101
129
141
152
19
21
28
49
60
72
89

VSS
19
21
28
49
60
72
89

19
21
28
49
60
72
89
12 IC332(4/4)
CS1F 116 101 11 SN74HC08ANS
CS0 VSS 13
CS20 115 141
CS1 VSS 7
CS21 114 142
CS2 VSS
OVLP CTRL 1/11
CMB:1/2FS/OVLP:1/2FS
≠≠≠≠≠
≠≠≠≠
10/11
10/11 2FS B Combiner, lighting and Z recursive
2,10/11
10/11
1/2FS
ADV FS 8
CMB-1 (4/11)
BKDM-3050
BOARD NO. 1-652-569-14
LOT NO. 502- 5

14
B
FOR DME-3000/7000
B-¥BKDM3050-CMB1M

DME-3000/7000 4-9 4-9


I J K L M N O P
Combiner, lighting and Z recursive CMB-1 (5/11) CMB-1 (5/11) Combiner, lighting and Z recursive

BKDM-3050 (SY) : S/N 50001 and Higher

REC/FORE SELECT

IC401
4/11 CMB Z µPD42101G-3 IC404 IC405 IC434
CXD8838Q CXD8838Q IC439 CXD8838Q
CXD8838Q
5V 5V 5V 5V
5V C401 C404 C405 C406 C407 C480 C421 C430 C431
0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1

18 7 16 41 65 91 16 41 65 91 16 41 65 91 16 41 65 91
13 24 1 13
13 81 49 13 2 81 49 2 13 81 49 13 2 81 49 2
12 23 2 12 A16 P16 A16 P16 A16 P16 A16 P16
12 82 48 12 1 82 48 1 12 82 48 12 1 82 48 1
11 22 3 11 A15 P15 A15 P15 A15 P15 A15 P15
11 83 47 11 0 83 47 0 11 83 47 11 0 83 47 0
10 21 4 10 A14 P14 A14 P14 A14 P14 A14 P14
10 84 46 10 84 46 10 84 46 10 84 46
F 16 9 F A13 P13 A13 P13 A13 P13 A13 P13
F 85 45 F 85 45 F 85 45 F 85 45
E 15 10 E A12 P12 A12 P12 A12 P12 A12 P12
E 86 44 E 86 44 E 86 44 E 86 44
D 14 11 D A11 P11 A11 P11 A11 P11 A11 P11
2 C 13 12 C
D 87
88
A10 P10
43
42
D 87
A10 P10
43
42
D 87
88
A10 P10
43
42
D 87
88
A10 P10
43
42
C C 88 C C
C 6 5 A9 P9 A9 P9 A9 P9 A9 P9
B 89 39 B 89 39 B 89 39 B 89 39
C 19 20 A8 P8 A8 P8 A8 P8 A8 P8
A 92 38 A 92 38 A 92 38 A 92 38
8 A7 P7 A7 P7 A7 P7 A7 P7
9 93 37 9 93 37 9 93 37 9 93 37
17 A6 P6 A6 P6 A6 P6 A6 P6
8 94 36 8 94 36 8 94 36 8 94 36
A5 P5 A5 P5 A5 P5 A5 P5
7 95 35 7 95 35 7 95 35 7 95 35
A4 P4 A4 P4 A4 P4 A4 P4
IC402 6 96 34 6 96 34 6 96 34 6 96 34
µPD42101G-3 A3 P3 A3 P3 A3 P3 A3 P3
5 97 33 5 97 33 5 97 33 5 97 33
5V C402 A2 P2 A2 P2 A2 P2 A2 P2
0.1 4 98 32 4 98 32 4 98 32 4 98 32
A1 P1 A1 P1 A1 P1 A1 P1
3 99 31 3 99 31 3 99 31 3 99 31
A0 P0 A0 P0 A0 P0 A0 P0
18 7
B 24 1 B 13 74 6 2 74 6 13 74 6 2 74 6
B16 Q16 B16 Q16 B16 Q16 B16 Q16
A 23 2 A 12 73 7 1 73 7 12 73 7 1 73 7
B15 Q15 B15 Q15 B15 Q15 B15 Q15
9 22 3 9 11 72 8 0 72 8 11 72 8 0 72 8
B14 Q14 B14 Q14 B14 Q14 B14 Q14
8 21 4 8 10 71 9 71 9 10 71 9 71 9
B13 Q13 B13 Q13 B13 Q13 B13 Q13
7 16 9 7 F 70 10 70 10 F 70 10 70 10
B12 Q12 B12 Q12 B12 Q12 B12 Q12
6 15 10 6 E 69 11 69 11 E 69 11 69 11
B11 Q11 B11 Q11 B11 Q11 B11 Q11
5 14 11 5 D 68 12 68 12 D 68 12 68 12
B10 Q10 B10 Q10 B10 Q10 B10 Q10
4 13 12 4 C 67 13 67 13 C 67 13 67 13
B9 Q9 B9 Q9 B9 Q9 B9 Q9
3 C 6 5
20
B 64
63
B8 Q8
14
17
64
B8 Q8
14
17
B 64
63
B8 Q8
14
17
64
63
B8 Q8
14
17
C 19 A 63 A
B7 Q7 B7 Q7 B7 Q7 B7 Q7
8 9 62 18 62 18 9 62 18 62 18
B6 Q6 B6 Q6 B6 Q6 B6 Q6
17 8 61 19 61 19 8 61 19 61 19
B5 Q5 B5 Q5 B5 Q5 B5 Q5
7 60 20 60 20 7 60 20 60 20
B4 Q4 B4 Q4 B4 Q4 B4 Q4
6 59 21 59 21 6 59 21 59 21
B3 Q3 B3 Q3 B3 Q3 B3 Q3
5 58 22 58 22 5 58 22 58 22
IC403 B2 Q2 B2 Q2 B2 Q2 B2 Q2
µPD42101G-3 4 57 23 57 23 4 57 23 57 23
B1 Q1 B1 Q1 B1 Q1 B1 Q1
5V C403 3 56 24 56 24 3 56 24 56 24
0.1 B0 Q0 B0 Q0 B0 Q0 B0 Q0

100 50 100 50 5V 100 50 5V 100 50


18 7 SMPL-A SMPL-P 5V SMPL-A SMPL-P SMPL-A SMPL-P SMPL-A SMPL-P
5V 26 27 26 27 26 27 26 27
3 24 1 3 P-SW OUT-SW-P P-SW OUT-SW-P P-SW OUT-SW-P P-SW OUT-SW-P
78 28 78 28 78 28 78 28
2 23 2 2 DIR OE-P DIR OE-P DIR OE-P DIR OE-P
1 22 3 1
75 25 75 25 75 25 75 25
0 21 4 0 SMPL-B SMPL-Q SMPL-B SMPL-Q SMPL-B SMPL-Q SMPL-B SMPL-Q
1 2 1 2 1 2 1 2
16 9 Q-SW OUT-SW-Q Q-SW OUT-SW-Q Q-SW OUT-SW-Q Q-SW OUT-SW-Q
3 3 3 3
15 10 OE-Q OE-Q OE-Q OE-Q
14 11
29 54 29 54 29 54 29 54
13 12 CK-A CK-P CK-A CK-P CK-A CK-P CK-A CK-P
79 4 79 4 79 4 79 4
C 6 5 CK-B CK-Q CK-B CK-Q CK-B CK-Q CK-B CK-Q
4 C 19 20
51 51 51
51
8 OP-IN OP-IN OP-IN OP-IN
52 77 52 77 52 77 52 77
17 OP-CTL OP-OUT OP-CTL OP-OUT OP-CTL OP-OUT OP-CTL OP-OUT
53 76 53 76 53 76 53 76
OP-CK OP-GATE OP-CK OP-GATE OP-CK OP-GATE OP-CK OP-GATE
R491 C488
560 56p Vss Vss Vss Vss
IC428(1/4)
EPM7032LC44-3 5 15 30 40 55 66 80 90 5 15 30 40 55 66 80 90 5 15 30 40 55 66 80 90 5 15 30 40 55 66 80 90
5V 5V
C478 5V C479
0.1 0.1
R486 R487
22k 22k 3 15 23 35
CNZ1
4 7
KPC,Z1-31A 31A VBE2
5 44
KPC,Z1-31B 31B VTE2
6 1
10/11 REC.MODE
43 2
10/11 2FS B
C487
33p 10 22 30 42

10/11 KF STRB
10/11 DELAYED 2FS 1

5 10/11 ≠≠
FS

10/11 FM RP
1,2,6,10/11 VAR. DELAY RST

4-10 4-10 DME-3000/7000

A B C D E F G H
Combiner, lighting and Z recursive CMB-1 (5/11) CMB-1 (5/11) Combiner, lighting and Z recursive

RECURSIVE Z 6/11
IC416
5V 5V IC415 CXD8838Q
C483 IC442 CXD8838Q 5V
0.1 SN74HC157ANS C417 C418 C419 5V C420
0.1 0.1 0.1 0.1
IC412 R488
IC406 IC409 22k 16 8
MSM518221-30ZS MSM518221-30ZS HM63021FP-28
2
16 41 65 91 16 41 65 91
5
13 3 26 13 13 3 26 13 13 4 24 13
I7 O7 I7 O7 14 4 81 49 13 81 49 2
12 4 25 12 12 4 25 12 12 5 23 12 A16 P16 A16 P16
I6 O6 I6 O6 11 7 82 48 12 82 48 1
11 5 24 11 11 5 24 11 11 6 22 11 A15 P15 A15 P15
I5 O5 I5 O5 3 12 83 47 11 83 47 0
10 6 23 10 10 6 23 10 10 7 21 10 A14 P14 A14 P14
I4 O4 I4 O4 6 9 84 46 10 84 46
F 8 21 F F 8 21 F F 8 20 F A13 P13 A13 P13
I3 O3 I3 O3 13 1 85 45 F 85 45
E 9 20 E E 9 20 E E 9 19 E A12 P12 A12 P12
I2 O2 I2 O2 10 15 86 44 E 86 44
D 10 19 D D 10 19 D D 10 18 D A11 P11 A11 P11
C 11
I1 O1
18 C C 11
I1 O1
18 C C 11 17 C
87
A10 P10
43
42
D 87
A10 P10
43 2
I0 O0 I0 O0 88 C 88 42
5V 5V 5V IC443 A9 P9 A9 P9
SN74HC157ANS 89 39 B 89 39
7 13 7 13 28 15 A8 P8 A8 P8
VDD WR VDD WR VDD DEC4 5V 5V 92 38 A 92 38
C409 C412 C416 16 C484 A7 P7 A7 P7
0.1 0.1 0.1 DEC3 0.1 93 37 9 93 37
5V 22 28 5V 22 28 14 26 A6 P6 A6 P6
GND RD GND RD GND DEC2 94 36 8 94 36
2 17 2 17 13 R489 16 8 A5 P5 A5 P5
IE OE IE OE DEC1 22k 95 35 7 95 35
1 16 1 16 27 2 A4 P4 A4 P4
WE RE WE RE M2 96 34 6 96 34
12 27 12 27 1 5 A3 P3 A3 P3
WR RR WR RR M1 97 33 5 97 33
12 2 14 4 A2 P2 A2 P2
WE 98 32 4 98 32
25 3 11 7 A1 P1 A1 P1
OE RST 99 31 3 99 31
3 12 A0 P0 A0 P0
IC407 6
MSM518221-30ZS IC410 9
MSM518221-30ZS 13 74 6 2 74 6
13 1 B16 Q16 B16 Q16
12 73 7 1 73 7
B 3 26 B B 3 26 B 10 15 B15 Q15 B15 Q15
I7 O7 I7 O7 IC413 11 72 8 0 72 8
A 4 25 A A 4 25 A HM63021FP-28 B14 Q14 B14 Q14
I6 O6 I6 O6 10 71 9 71 9
9 5 24 9 9 5 24 9 IC444 B13 Q13 B13 Q13
I5 O5 I5 O5 B 4 24 B SN74HC157ANS F 70 10 70 10
8 6 23 8 8 6 23 8 B12 Q12 B12 Q12
I4 O4 I4 O4 A 5 23 A 5V 5V E 69 11 69 11
7 8 21 7 7 8 21 7 C485 B11 Q11 B11 Q11
I3 O3 I3 O3 9 6 22 9 0.1 D 68 12 68 12
6 9 20 6 6 9 20 6 B10 Q10 B10 Q10
I2 O2 I2 O2 8 7 21 8 R490 C 67 13 67 13
5 10 19 5 5 10 19 5 22k 16 8 B9 Q9 B9 Q9
4 11
I1 O1
18 4 4 11
I1 O1
18 4
7 8 20 7
2
B 64
B8 Q8
14 64
B8 Q8
14 3
I0 O0 I0 O0 6 9 19 6 A 63 17 63 17
5V 5V 5 B7 Q7 B7 Q7
5 10 18 5 9 62 18 62 18
7 13 7 13 14 4 B6 Q6 B6 Q6
VDD WR VDD WR 4 11 17 4 8 61 19 61 19
C410 C413 11 7 B5 Q5 B5 Q5
0.1 0.1 5V 7 60 20 60 20
5V 22 28 5V 22 28 3 12 B4 Q4 B4 Q4
GND RD GND RD 28 15 6 59 21 59 21
2 17 2 17 VDD DEC4 6 9 B3 Q3 B3 Q3
IE OE IE OE C414 16 5 58 22 58 22
1 16 1 16 0.114 DEC3 13 1 B2 Q2 5V B2 Q2
WE RE WE RE 26 4 57 23 57 23
12 27 12 27 GND DEC2 10 15 5V B1 Q1 B1 Q1
WR RR WR RR 13 3 56 24 56 24
DEC1 B0 Q0 B0 Q0
27 R403
M2 IC445 4.7k
1 SN74HC157ANS R401 100 50 100 50
M1 4.7k SMPL-A SMPL-P SMPL-A SMPL-P
12 2 5V 5V 26 27 26 27
WE C486 P-SW OUT-SW-P P-SW OUT-SW-P
25 3 0.1 78 28 78 28
OE RST DIR OE-P DIR OE-P
IC408 IC411 R402
MSM514221A-3PZ MSM514221A-3PZ 22k 16 8
75 25 75 25
2 SMPL-B SMPL-Q SMPL-B SMPL-Q
1 2 1 2
3 8 20 3 3 8 20 3 5 Q-SW OUT-SW-Q Q-SW OUT-SW-Q
3 3
2 13 19 2 2 13 19 2 14 4 OE-Q OE-Q
1 14 18 1 1 14 18 1 IC414 11 7
HM63021FP-28 29 54 29 54
0 15 17 0 0 15 17 0 3 12 CK-A CK-P CK-A CK-P
79 4 79 4
3 4 24 3 6 9 CK-B CK-Q CK-B CK-Q
5V
4 7
5V
4 7 2 5 23 2 13 1 4
VDD WR VDD WR 51 51
C408 C411 1 6 22 1 10 15 OP-IN OP-IN
0.1 16 0.1 52 77 52 77
1 16 1 0 7 21 0 OP-CTL OP-OUT OP-CTL OP-OUT
GND RD GND RD 53 76 53 76
5 3 5 3 8 20 OP-CK OP-GATE OP-CK OP-GATE
WE RE WE RE
6 2 6 2 9 19
WR RR WR RR Vss Vss
10 18
11 17 5 15 30 40 55 66 80 90 5 15 30 40 55 66 80 90
5V
28 15
VDD DEC4
C415 16
0.1 DEC3
14 26
GND DEC2
13
DEC1
27
M2
1
M1 REC.Z CTRL 1/11
10/11 FM EC 0 12 2
WE
10/11 FM EC 1 25 3
OE RST
10/11 FM EC 2
10/11 FM EC 3
10/11 ADV FS 6 Combiner, lighting and Z recursive
6,10/11
2,6,10/11
ADV FS 7
NEW/OLD
≠≠≠
≠≠ OUT CMB-1 (5/11) 5
10/11 FS
BKDM-3050
WR1

RR2

WR1

RR3

BOARD NO. 1-652-569-14


11

LOT NO. 502-


FOR DME-3000/7000
B-¥BKDM3050-CMB1M

DME-3000/7000 4-11 4-11


I J K L M N O P
Combiner, lighting and Z recursive CMB-1 (6/11) CMB-1 (6/11) Combiner, lighting and Z recursive

BKDM-3050 (SY) : S/N 50001 and Higher

4/11 CMB OUT KEY


REC.K/CMBK CTRL AXIS
4/11 CMB KOUT

5/11 RECURSIVE Z
IC418 IC419
CXD8838Q CXD8838Q
5V 5V 5V IC423 IC429 IC430
C422 C423 C424 C425 C426 C427 SN74HC574ANS IDT74FCT827ASO CXD8885Q
0.1 0.1 0.1 0.1 IC420 0.1 0.1 5V
CXD8838Q C437 C438
5V 5V 0.1 0.1
C432 C436
16 41 65 91 16 41 65 91 16 41 65 91 IC421 0.1 0.1

100
117
17
45
57
73
HM63021FP-28
9 81 49 9 13 81 49 13 2 81 49 2 20 10
A16 P16 A16 P16 A16 P16 24 12 9 116 V DD 56 9
8 82 48 8 12 82 48 12 1 82 48 1 9 4 24 9 9 2 V DD GND 19 9 Y9 O9
A15 P15 A15 P15 A15 P15 9 2 23 9 8 115 55 8
7 83 47 7 11 83 47 11 0 83 47 0 8 5 23 8 8 3 18 8 Y8 O8
A14 P14 A14 P14 A14 P14 8 3 22 8 7 114 54 7
6 84 46 6 10 84 46 10 84 46 7 6 22 7 7 4 17 7 Y7 O7
A13 P13 A13 P13 A13 P13 7 4 21 7 6 113 53 6
5 85 45 5 F 85 45 F 85 45 6 7 21 6 6 5 16 6 Y6 D6
2 4 86
A12
A11
P12
P11
44 4 E 86
A12
A11
P12
P11
44
43
E 86
A12
A11
P12
P11
44 5 8 20 5 5 6 15 5
6
5
5
6
20
19
6
5
5
4
112
111
Y5 D5
52
51
5
4
3 87 43 3 D 87 D 87 43 4 9 19 4 4 7 14 4 Y4 D4
A10 P10 A10 P10 A10 P10 4 7 18 4 3 110 50 3
2 88 42 2 C 88 42 C 88 42 3 10 18 3 3 8 13 3 Y3 D3
A9 P9 A9 P9 A9 P9 3 8 17 3 2 109 48 2
1 89 39 1 B 89 39 B 89 39 2 11 17 2 2 9 12 2 Y2 D2
A8 P8 A8 P8 A8 P8 2 9 16 2 1 108 47 1
0 92 38 0 A 92 38 A 92 38 5V OE Y1 D1
A7 P7 A7 P7 A7 P7 1 10 15 1 0 107 46 0
93 37 9 93 37 9 93 37 28 15 1 11 Y0 D0
A6 P6 A6 P6 A6 P6 VDD DEC4 0 11 14 0
94 36 8 94 36 8 94 36 C428 16 CN4
A5 P5 A5 P5 A5 P5 0.1 DEC3 9 13 13 58
95 35 7 95 35 7 95 35 14 26 OUT KEY OUT 9 23 U9 CKO
A4 P4 A4 P4 A4 P4 GND DEC2 13 1 8 12 12
96 34 6 96 34 6 96 34 13 OUT KEY OUT 8 24 U8
A3 P3 A3 P3 A3 P3 DEC1 7 11 11 61
97 33 5 97 33 5 97 33 27 IC424 OUT KEY OUT 7 25 U7 D PHS1
A2 P2 5V A2 P2 A2 P2 M2 SN74HC574ANS 6 10 9 60
98 32 4 98 32 4 5V 98 32 1 OUT KEY OUT 6 26 U6 D PHS0
A1 P1 A1 P1 A1 P1 M1 5V 5 F 8 62
99 31 3 99 31 3 99 31 12 2 C433 OUT KEY OUT 5 27 U5 TRS JST
A0 P0 R404 A0 P0 5V A0 P0 WE 0.1 4 E 6 63
750 R422 25 3 OUT KEY OUT 4 28 U4 SEL STAT1
4.7k OE RST 3 D 4 65
9 74 6 74 6 13 R405 4.7k 74 6 2 R423 4.7k OUT KEY OUT 3 29 U3 SEL STAT0
B16 Q16 B16 Q16 B16 Q16 20 10 2 C 3 75
8 73 7 73 7 12 R406 4.7k 73 7 1 R424 4.7k OUT KEY OUT 2 30 U2 TOUT
B15 Q15 B15 Q15 B15 Q15 1 2 V DD GND 19 1 1 B 2
7 72 8 72 8 11 R407 4.7k 72 8 0 R425 4.7k OUT KEY OUT 1 31 U1
B14 Q14 B14 Q14 B14 Q14 0 3 18 0 0 A 1 5V
6 71 9 71 9 10 R408 4.7k 71 9 OUT KEY OUT 0 32 U0
B13 Q13 B13 Q13 B13 Q13 4 17 95
5 70 10 70 10 F R409 4.7k 70 10 BLK MODE2
B12 Q12 B12 Q12 B12 Q12 5 16 CN3 9 31 94
4 69 11 69 11 E R410 4.7k 69 11 9 V9 BLK MODE1
B11 Q11 B11 Q11 B11 Q11 6 15 OUT KEY IN 9 23 8 30 93
3 68 12 68 12 D R411 4.7k 68 12 8 V8 BLK MODE0
B10 Q10 B10 Q10 B10 Q10 7 14 OUT KEY IN 8 24 7 29 97
2 67 13 67 13 C R412 4.7k 67 13 7 V7 MUX MODE1
B9 Q9 B9 Q9 B9 Q9 8 13 OUT KEY IN 7 25 6 28 96
1 64 14 64 14 B R413 4.7k 64 14 6 V6 MUX MODE0
B8 Q8 B8 Q8 B8 Q8 IC422 9 12 OUT KEY IN 6 26 5 26 98
0 63 17 63 17 A R414 4.7k 63 17 HM63021FP-28 5 V5 525/625
B7 Q7 B7 Q7 B7 Q7 OE OUT KEY IN 5 27 4 24 99
62 18 62 18 9 R415 4.7k 62 18 4 V4 D1/D2
B6 Q6 B6 Q6 B6 Q6 1 11 OUT KEY IN 4 28 3 23 104
61 19 61 19 8 R416 4.7k 61 19 1 4 24 1 3 V3 TRS SEL1
3 60
B5
B4
Q5
Q4
20 60
B5
B4
Q5
Q4
20
21
7 R417 4.7k 60
B5
B4
Q5
Q4
20
21
0 5 23 0 2
OUT
OUT
KEY
KEY
IN
IN
3
2
29
30
2
1
22
20
V2 TRS SEL0
102

59 21 59 6 R418 4.7k 59 6 22 1 V1
B3 Q3 B3 Q3 B3 Q3 OUT KEY IN 1 31 0 19 77
58 22 58 22 5 R419 4.7k 58 22 7 21 0 V0 RDCLR
B2 Q2 B2 Q2 B2 Q2 IC425 OUT KEY IN 0 32 78
57 23 57 23 4 R420 4.7k 57 23 8 20 SN74HC574ANS DR ON
B1 Q1 B1 Q1 B1 Q1 43 79
56 24 56 24 3 R421 4.7k 56 24 9 19 5V CK TRS EN
B0 Q0 B0 Q0 B0 Q0 C434 5V HD 33 80
10 18 0.1 HD BURST EN
5V 100 5V 50 5V FDD 34 81
50 100 100 50 11 17 FD SYNC EN
SMPL-A SMPL-P SMPL-A SMPL-P SMPL-A SMPL-P R426 CF 35 83
26 27 26 27 26 27 5V 20 10 22k CFP AUTO TRS
P-SW OUT-SW-P P-SW OUT-SW-P P-SW OUT-SW-P 101 85
78 28 78 28 78 28 28 15 9 2 V DD GND 19 9 BLK CKINV
DIR OE-P DIR OE-P DIR OE-P VDD DEC4 CMB PROC KEY 7/11 87
C429 16 8 3 18 8 CLIP
0.1 DEC3 H:KPC EXIST 10/11 SADD1 39 88
75 25 75 25 75 25 14 26 7 4 17 7 SADD LIMIT
SMPL-B SMPL-Q SMPL-B SMPL-Q SMPL-B SMPL-Q GND DEC2 NEW/OLD
≠≠≠
≠≠ OUT 10/11,2,5 SDIO 41 89
1 2 1 2 1 2 13 6 5 16 6 SDAT V BLK FIX
Q-SW OUT-SW-Q Q-SW OUT-SW-Q Q-SW OUT-SW-Q DEC1 CKD3 40 91
3 3 3 27 5 6 15 5 CKD DBLK/ABLK
OE-Q OE-Q OE-Q M2 CS25 38
1 4 7 14 4 CS
M1 CKX 37 72
29 54 29 54 29 54 12 2 3 8 13 3 CKX TNCON
CK-A CK-P CK-A CK-P CK-A CK-P WE RESET 36 71
79 4 79 4 79 4 25 3 2 9 12 2 PAR/SER RAMTEST
CK-B CK-Q CK-B CK-Q CK-B CK-Q OE RST SMPL 16 69
OE SAMPL TEST MOD1
5V 68
51 51 51 1 11 TEST MOD0
OP-IN OP-IN OP-IN 118
52 77 52 77 52 77 EWRST
OP-CTL OP-OUT OP-CTL OP-OUT OP-CTL OP-OUT 120 119
53 76 53 76 53 76 ERRST
OP-CK OP-GATE OP-CK OP-GATE OP-CK OP-GATE IC426 105
SN74HC574ANS V SS
Vss Vss Vss 5V
C435 15 32 42 59 66 76 92
5 15 30 40 55 66 80 90 0.1
5 15 30 40 55 66 80 90 5 15 30 40 55 66 80 90

20 10
4 1 2 V DD GND 19 1
0 3 18 0
4 17
7/11 REC.KEY 5 16
2,10/11 H:KPC EXIST 6 15
5,10/11 ADV FS 7 7 14
8 13
9 12
9/11 GRP
≠≠≠≠≠≠≠≠≠≠
≠≠≠≠≠≠≠≠≠
ON/OFF
OE
9/11 GRP ON/OFF
1 11 10/11 ADV FS A
10/11 ADV 1/2FS 3
10/11 ≠≠
D1/D2

10/11 ADV FS 9
3,4,10/11 ≠≠≠≠≠
1/2FS
≠≠≠≠
10/11 Z/KEY MULIPLEX
4,10/11 ADV 1/2FS 3

1,2,5,10/11 VAR. DELAY RST 6


4,5,10/11 ADV ≠≠≠
2FS
≠≠ 1

10/11 2FS C
2,9,10/11 ADV 2FS/FS 0

CNY1
9 R430 22
COMB KEY 9 3C KPC,Y1-3C
8 R431 22
COMB KEY 8 3D KPC,Y1-3D
7 R432 22
COMB KEY 7 4A KPC,Y1-4A
6 R433 22
COMB KEY 6 4B KPC,Y1-4B
5 R434 22
COMB KEY 5 4C KPC,Y1-4C
5 4
3
R435 22
R436 22
COMB KEY 4 4D KPC,Y1-4D
COMB KEY 3 5A KPC,Y1-5A
2 R437 22
COMB KEY 2 5B KPC,Y1-5B
1 R438 22
COMB KEY 1 5C KPC,Y1-5C
0 R439 22
COMB KEY 0 5D KPC,Y1-5D

4-12 4-12 DME-3000/7000

A B C D E F G H
Combiner, lighting and Z recursive CMB-1 (6/11) CMB-1 (6/11) Combiner, lighting and Z recursive

CMBED KEY 4/11

IC431 IC436 IC438


CXD8838Q IC432 IC433 CX22029 SBX1601A
CXD8838Q CXD8885Q L402
5V 5V IC440 1µH
C439 C440 C441 C442 IDT74FCT827ASO 5V 5V 5V
0.1 0.1 0.1 0.1 C443 C444 C445 IC435 C446 Q403 C474
0.1 0.1 0.1 74AC244SJ 0.1 C456 C460 R451 2SC3356 0.1 CNX1
5V 0.1 100 -5V 33

117
100
C481 R440 6.3V

17
45
57
73
0.1 680 C OUT KEY 27B CN,105-27B
16 41 65 91 16 41 65 91 20 10 14 28 26 27 R450 Q404
R452
116 V DD 56 9 2 V DD GND 18 4 3 6 V EE V EE 3 120 33 2SC3356
24 12 13 9 9 9 9 9
13 81 49 13 13 81 49 13 Y9 O9 D9X SX
A16 P16 A16 P16 12 115 55 8 8 4 16 8 8 6 5 8 7 R457 R458
12 82 48 12 12 82 48 12 13 2 23 13 Y8 O8 D9Y 75 75
A15 P15 A15 P15 11 114 54 7 7 6 14 7 7 8 7 7 8 8 4
11 83 47 11 11 83 47 11 12 3 22 12 Y7 O7 D8X SY R459
A14 P14 A14 P14 10 113 53 6 6 8 12 6 6 10 9 6 9 R447 R449 R453 C472 130 R462
Y6 D6 D8Y
10
F
84
85
A13
A12
P13
P12
46
45
10
F
10
F
84
85
A13
A12
P13
P12
46
45
10
F
11
10
4
5
21
20
11
10
F
E
112
111
Y5 D5
52
51
5
4
5
4
11
13
9
7
5
4
5
4
12
18
11
17
5
4
7 10
11
D7X
220 220 82
C468
0.1
5V
10k
2
86 44 86 44 6 19 Y4 D4 D7Y C464 C466 10
E E E E F F R448 0.1 0.1 16V 5V
A11 P11 A11 P11 D 110 50 3 3 15 5 3 3 20 19 3 6 12 1k
D 87 43 D D 87 43 D E 7 18 E Y3 D3 D6X
A10 P10 A10 P10 C 109 48 2 2 17 3 2 2 22 21 2 13 36
C 88 42 C C 88 42 C D 8 17 D Y2 D2 D6Y PCK DKO PCK 8/11
A9 P9 A9 P9 B 108 47 1 1 24 23 1 5 14 R460
B 89 39 B B 89 39 B C 9 16 C Y1 D1 D5X 22k
A8 P8 A8 P8 A 107 46 0 1 19 0 26 25 0 15 C458
A 92 38 A A 92 38 A B 10 15 B Y0 D0 D5Y 220p DKO LOCK 10/11
A7 P7 A7 P7 1 4 16 34 R461
9 93 37 9 93 37 A 11 14 A D4X TRP 22k
A6 P6 A6 P6 9 13 58 IC718(2/2) 15 17
8 94 36 8 94 36 U9 CKO 74AC244SJ -5V D4Y Q407
A5 P5 A5 P5 8 12 3 18 DTC114EK
7 95 35 7 95 35 13 1 U8 C448 D3X
A4 P4 A4 P4 7 11 61 13 27 0.1 19 1
6 96 34 6 96 34 U7 D PHS1 1 11 9 1 D3Y LST
A3 P3 A3 P3 6 9 60 2 20 C452 C476
5 97 33 5 97 33 U6 D PHS0 0 13 7 0 D2X 0.1 0.1
A2 P2 A2 P2 5 8 62 21 33
4 98 32 4 98 32 IC441 U5 TRS JST 15 D2Y FV
A1 P1 A1 P1 4 6 63 1 22
3 99 31 3 99 31 IDT74FCT827ASO U4 SEL STAT1 17 D1X -5V
A0 P0 A0 P0 3 4 65 23 3
5V C482 U3 SEL STAT0 D1Y D402
0.1 2 3 75 0 24 28 1S2835 R455
2 74 6 2 9 74 6 U2 TOUT 19 D0X RSE 1 33
B16 Q16 B16 Q16 1 2 25
1 73 7 1 8 73 7 U1 D0Y
B15 Q15 B15 Q15 0 1 5V 30 35 R456
0 72 8 0 7 72 8 24 12 U0 9/11 CKO KX PCX TNI 2 36
B14 Q14 B14 Q14 95 31 C453
71 9 6 71 9 9 2 23 9 BLK MODE2 9/11 CKO KY PCY 0.1 C471
B13 Q13 B13 Q13 31 94 R454 0.1
70 10 5 70 10 8 3 22 8 V9 BLK MODE1 33
B12 Q12 B12 Q12 30 93 ECL GND GND GND
69 11 4 69 11 7 4 21 7 V8 BLK MODE0
B11 Q11 B11 Q11 29 97 C450 R441 29 32 2 5
68 12 3 68 12 6 5 20 6 V7 MUX MODE1 0.1 220
B10 Q10 B10 Q10 28 96
67 13 2 67 13 5 6 19 5 V6 MUX MODE0 PSP RST ECL 7/11
B9 Q9 B9 Q9 26 98
64 14 1 64 14 4 7 18 4 V5 525/625 5V
B8 Q8 B8 Q8 24 99 KEY/Z 9/11
63 17 0 63 17 3 8 17 3 V4 D1/D2
B7 Q7 B7 Q7 23 104 EXT.V/KEYZ
≠≠≠≠
≠≠≠ 10/11
62
61
B6
B5
Q6
Q5
18
19
62
61
B6
B5
Q6
Q5
18
19
2
1
9
10
16
15
2
1
22
20
V3
V2
TRS SEL1
TRS SEL0
102 R442
22k Q401 3
60 20 60 20 11 14 0 V1 2SA812
0
B4 Q4 B4 Q4 19 77
59 21 59 21 V0 RDCLR 10/11 ≠≠
D1/D2

B3 Q3 B3 Q3 78 R443 R444
58 22 58 22 13 1 DR ON 10k 10k
B2 Q2 B2 Q2 43 79 C461
57 23 57 23 CK TRS EN 0.1
5V B1 Q1 5V B1 Q1 5V HD 33 80 R445 R446
56 24 56 24 HD BURST EN 15k 1000
B0 Q0 B0 Q0 FDD 34 81
FD SYNC EN
R427 R429 CF 35 83
4.7k 100 50 R428 100 50 22k CFP AUTO TRS
SMPL-A SMPL-P 4.7k SMPL-A SMPL-P 101 85 -5V
26 27 26 27 BLK CKINV
P-SW OUT-SW-P P-SW OUT-SW-P 87
78 28 78 28 CLIP 10/11 FV ADJ KOUT
DIR OE-P DIR OE-P SADD1 39 88
SADD LIMIT CKO Z 9/11
SDIO 41 89
75 25 75 25 SDAT V BLK FIX CKO K 9/11
SMPL-B SMPL-Q SMPL-B SMPL-Q CKD3 40 91
1 2 1 2 CKD DBLK/ABLK
Q-SW OUT-SW-Q Q-SW OUT-SW-Q CS26 38
3 3 CS
OE-Q OE-Q CKX 37 72 IC437 IC427
CKX TNCON CX22029 SBX1601A
RESET 36 71 L403
29 54 29 54 PAR/SER RAMTEST 5V 1µH
CK-A CK-P CK-A CK-P SMPL 16 69 C447
79 4 79 4 SAMPL TEST MOD1 0.1 Q405
CK-B CK-Q CK-B CK-Q 5V 68 C457 C462 R476 2SC3356 C475
TEST MOD0 0.1 100 -5V 33 0.1 CNX1
118 14 28 R463 6.3V
51 51 EWRST 680 C OUT Z 21B CN,105-21B
OP-IN OP-IN 120 119 26 27 R473 R475 Q406
52 77 52 77 ERRST 9 4 3 9 120 33 2SC3356
OP-CTL OP-OUT OP-CTL OP-OUT 105 9 6 V EE V EE 3
53 76 53 76 8 6 5 8 D9X SX
OP-CK OP-GATE OP-CK OP-GATE V SS 7 R480 R481
7 8 7 7 D9Y 75 75
15 32 42 59 66 76 92 8 8 4
Vss Vss 6 10 9 6 D8X SY R482
9 R470 R472 R477 C473 130 R483
5 12 11 5 D8Y 220 220 82 0.1 10k
5 15 30 40 55 66 80 90 5 15 30 40 55 66 80 90 7 10 5V
17 D7X
4
3
18
20 19
4
3
6
11
12
D7Y R471
C465
0.1
C467
0.1
C469
10
16V 5V
4
22 21 D6X 1k
2 2 36
13
1 24 23 1 D6Y PCK DZO PCK 8/11
5 14 R484
SERIAL CTRL 1/11 ,2,4,7,8,9,10 0 26 25 0 D5X 22k
15 C459
TIMING SIG 2/11 ,7,8,9,10 1 D5Y 220p DZO LOCK 10/11
4 16 34 R485
15 D4X TRP 22k
-5V 17
D4Y Q408
CN3 C449 3 18 DTC114EK
13 CN4 13 27 0.1 D3X
IC840(4/6) OUT Z IN 13 41 13 19 1
74AC04SJ 12 OUT Z OUT 13 41 D3Y LST
OUT Z IN 12 42 12 2 20 C454 C477
11 OUT Z OUT 12 42 D2X 0.1 0.1
9 8 OUT Z IN 11 43 11 21 33
10 OUT Z OUT 11 43 D2Y FV
OUT Z IN 10 44 10 1 22
F OUT Z OUT 10 44 D1X -5V
OUT Z IN F 45 F 23 3
E OUT Z OUT F 45 D1Y D401
OUT Z IN E 46 E 0 24 28 1S2835 R478
D OUT Z OUT E 46 D0X RSE 1 33
OUT Z IN D 47 D 25
C OUT Z OUT D 47 D0Y
OUT Z IN C 48 C 30 35 R479
B OUT Z OUT C 48 9/11 CKO ZX PCX TNI 2 36
OUT Z IN B 49 B 31 C455
A OUT Z OUT B 49 9/11 CKO ZY PCY 0.1 C470
OUT Z IN A 50 A R474 0.1
OUT Z OUT A 50 33
ECL GND GND GND
CN3
9 C451 R464 29 32 2 5
OUT Z IN 9 59 0.1 220
8
OUT Z IN 8 60 PSP RST ECL 7/11
7
OUT Z IN 7 61 5V
6
OUT Z IN 6 62
5
OUT Z IN 5 63
4 R465
3
OUT
OUT
Z
Z
IN
IN
4
3
64
65
22k Q402
2SA812 5
2
OUT Z IN 2 66 10/11 ≠≠
D1/D2
≠ Combiner, lighting and Z recursive
1 R466 R467
0
OUT
OUT
Z
Z
IN
IN
1
0
67
68
10k 10k

R468
15k
R469
1000
C463
0.1 CMB-1 (6/11)
BKDM-3050
-5V BOARD NO. 1-652-569-14
10/11 FV ADJ ZOUT LOT NO. 502-
FOR DME-3000/7000
B-¥BKDM3050-CMB1M

DME-3000/7000 4-13 4-13


I J K L M N O P
Combiner, lighting and Z recursive CMB-1 (7/11) CMB-1 (7/11) Combiner, lighting and Z recursive

BKDM-3050 (SY) : S/N 50001 and Higher

IC509
L502 CXD8337Q
1µH IC504
MC10H125M
5V IC511
C509 74AC574SJ
0.1 -5V 5V C526 C527
IC502 0.1 0.1 5V
SBX1602A C518 C522 C529
0.1 -5V 0.1 0.1
C510 IC513
100 2 24 27 30 8 9 1 30 51 65 79 HM63021FP-28
6.3V 7 23 8
R517 20 10
100 VEE GND VEE VDD
31 21 10 3 4 9 9 50 80 9 2 V DD GND 19 9 9 4 24 9
MON EVR IN9 VDD Y9
R508 R515 2 8 49 81 8 3 18 8 8 5 23 8
100k 110k IN8 Y8
29 9 10 9 7 5 8 7 48 82 7 4 17 7 7 6 22 7
CX D9 R524 1k IN7 Y7
R511 C511 10 9 6 6 47 83 6 5 16 6 6 7 21 6
Q501 100 10 D8 R525 1k IN6 Y6
2SC3356 16V 25 11 8 8 11 12 7 5 46 84 5 6 15 5 5 8 20 5
AIY D7 R526 1k IN5 Y5
C501 R501 R503 C504 C508 12 7 10 4 45 85 4 7 14 4 4 9 19 4
CNX1 0.1 68 22 47p 47p D6 R527 1k IN4 Y4
26 13 6 7 15 13 6 3 44 86 3 8 13 3 3 10 18 3
CN,105-17B 17B C IN VIDEO AIX D5 R528 1k IN3 Y3
R514 14 5 14 2 43 87 2 9 12 2 2 11 17 2
R502 R506 5V 10k D4 R529 1k IN2 Y2
220 75 L501 33 15 4 1 42 88 1 1 OE 5V
1µH DIX D3 R530 1k VBB GND IN1 Y1
C507 16 3 0 41 89 0 0 11 1 28 15
0.1 D2 R531 1k 1 16 IC505 IN0 Y0 VDD DEC4
C502 C503 C505 17 2 MC10H125M VI 29 91 C532 16
0.1 0.1 100 D1 R532 1k WCK UV9 0.1 DEC3
2 6.3V 5V
34
DIY
D0
PCK
18
19
1
0
R533 1k
R534 1k
C515
0.1 5V
5V 19
20
DMODE1
DMODE0
UV8
UV7
92
93 IC519
14
GND DEC2
DEC1
26
13
C519 C523
59 94
74AC574SJ 27
R509 R510 R512 0.1 -5V 0.1 525 /625 UV6 M2
22k 10k 10k 5 60 5V C540 1
-5V 95 0.1
10/11 ≠≠
D1/D2
≠ Q502 JS 8 9 D1/D2 UV5 M1
2SA812 20 31 96 12 2
R513 SYN VEE VDD TRS CUT UV4 WE
15k 22 6 3 4 5 32 97 20 10 25 3 4
RSE FW CTL UV3 OE RST
R516 2 33 98 1 2 V DD GND 19 1
1000 HSFTFC UV2
36 5 7 5 4 34 99 0 3 18 0
FV HSFTAT UV1
10/11 FV ADJ VIN 6 35 100 4 17 IC514
3 -5V OFS SY SX DPR ADS TNI ESO ESI MJ CTL UV0 HM63021FP-28
4 11 12 3 36 63 5 16
28 3 4 35 32 6 1 37 DR ON TEST2
D501 1 10 23 62 6 15 1 4 24 1
1S2835 BLK MODE1 TEST1 5V
R507 3 15 13 2 24 61 7 14 0 5 23 0
0 BLK MODE0 TEST0
2 14 25 64 8 13 6 22
MBLK/SBLK TNCON
R505 R523 C513 27 66 9 12 7 21
0 10k 0.1 VBB GND VBLK FIX TOUT
26 37 OE 8 20
C506 1 16 IC506 DBLK/ABLK DR CLR
R504 0.1 MC10H125M 21 38 11 1 9 19
100 5V -5V DIAGMODEA1 BLK GATE
C516 22 2 10 18
0.1 5V DIAGMODEA0 RCK
15 CF 11 17
R518 R519 R520 C520 C524 CFP
1000 10k 10k 0.1 -5V 0.1 RESET 58 16 FDD 5V
Q503 PARA/SERI FD
DTC114EK Q504 SADD1 54 17 VD 28 15
2SA812 8 9 SADRS VD VDD DEC4
SDIO 52 C531 16
R521 VEE VDD SDATA 0.1 DEC3
10/11 PSP RST TTL 15k PSP RST ECL 1/8 4/8 7/8 2 3 4 1 CS1B 57 18 HD 14 26
R522 CS HD GND DEC2
1000 2 CKD3 55 39 SMPL 13
CKD SMPL DEC1
1 7 5 0 CKX 56 27
D502 CKX M2
1S2835 6 GND 1
-5V M1
3 0 11
10
12 VI
3 14 28 40 53 67 78 90
12
25
WE
OE RST
2
3 4
15 13 VO
2/11 DVO PCK
14

VBB GND PSP PCK 10/11


1 16

RESET C517
0.1

1,2,4,6,8,9,10/11 SERIAL CTRL

2,6,8,9,10/11 TIMING SIG


8,9,10/11 ADV 2FS/FS 1
10/11 NEW/OLD
≠≠≠
≠≠ IN

9/11 EXT.C
2,10/11 D1:0/D2:FS
10/11 ADV ≠≠≠
2FS
≠≠ 2

10/11 2FS C

IC501 IC520 IC508 IC521


74AC574SJ 74AC574SJ IC503 IC507 74AC574SJ 74AC574SJ
5V 5V 5V µPD42101G-3 5V µPD42101G-3 5V 5V 5V IC510 5V IC512
C512 C541 C514 C521 C525 C542 C528 µPD42101G-3 C530 µPD42101G-3
4 2/11 CMB PROC VIDEO 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1

R535 R536 R537 R538 R539 R540 R541 R542 R543 R544 20 10 20 10 18 7 18 7 20 10 20 10 18 7 18 7
CNY1 1k 1k 1k 1k 1k 1k 1k 1k 1k 1k
9 2 V DD GND 19 9 1 2 V DD GND 19 1 9 24 1 9 1 24 1 1 9 2 V DD GND 19 9 1 2 V DD GND 19 1 9 24 1 9 1 24 1 1
VIF,Y1-20C 18A PROC VIDEO 9
8 3 18 8 0 3 18 0 8 23 2 8 0 23 2 0 8 3 18 8 0 3 18 0 8 23 2 8 0 23 2 0
VIF,Y1-20D 18B PROC VIDEO 8
7 4 17 7 4 17 7 22 3 7 22 3 7 4 17 7 4 17 7 22 3 7 22 3
VIF,Y1-21A 18C PROC VIDEO 7
6 5 16 6 5 16 6 21 4 6 21 4 6 5 16 6 5 16 6 21 4 6 21 4
VIF,Y1-21B 18D PROC VIDEO 6
5 6 15 5 6 15 5 16 9 5 16 9 5 6 15 5 6 15 5 16 9 5 16 9
VIF,Y1-21C 19A PROC VIDEO 5
4 7 14 4 7 14 4 15 10 4 15 10 4 7 14 4 7 14 4 15 10 4 15 10
VIF,Y1-21D 19B PROC VIDEO 4
3 8 13 3 8 13 3 14 11 3 14 11 3 8 13 3 8 13 3 14 11 3 14 11
VIF,Y1-22A 19C PROC VIDEO 3
2 9 12 2 9 12 2 13 12 2 13 12 2 9 12 2 9 12 2 13 12 2 13 12
VIF,Y1-22B 19D PROC VIDEO 2
1 1 OE OE 2 6 5 2 6 5 OE OE 3 6 5 3 6 5
VIF,Y1-22C 20A PROC VIDEO 1
0 0 11 1 11 1 2 19 20 2 19 20 11 1 11 1 3 19 20 3 19 20
VIF,Y1-22D 20B PROC VIDEO 0
8 8 8 8
17 17 17 17
6/11 CMB PROC KEY

R545 R546 R547 R548 R549 R550 R551 R552 R553 R554
CNY1 1k 1k 1k 1k 1k 1k 1k 1k 1k 1k
9
VIF,Y1-23A 20C PROC KEY 9
8
VIF,Y1-23B 20D PROC KEY 8
7
VIF,Y1-23C 21A PROC KEY 7
6
VIF,Y1-23D 21B PROC KEY 6
5
VIF,Y1-24A 21C PROC KEY 5
4
VIF,Y1-24B 21D PROC KEY4
3
VIF,Y1-24C 22A PROC KEY 3
5 VIF,Y1-24D
VIF,Y1-25A
22B
22C
PROC KEY 2
PROC KEY 1
2
1
0
VIF,Y1-25B 22D PROC KEY 0

10/11 2FS D
10/11 VAR. DELAY RST
10/11 ≠≠
D1/D2

4-14 4-14 DME-3000/7000

A B C D E F G H
Combiner, lighting and Z recursive CMB-1 (7/11) CMB-1 (7/11) Combiner, lighting and Z recursive

IC515
CXD8838Q IC518
CXD8838Q
C534
C533 5V 0.1 C537 5V C538
0.1 0.1 0.1

16 41 65 91 16 41 65 91
EXT CMB VIDEO 2/11
9 81 49 9 9 81 49 9
A16 P16 A16 P16
8 82 48 8 8 82 48 8
A15 P15 A15 P15
7 83 47 7 7 83 47 7
A14 P14 A14 P14
6 84 46 6 6 84 46 6
A13 P13 A13 P13
5 85 45 5 5 85 45 5
A12 P12 A12 P12
4 86 44 4 4 86 44 4
A11 P11 A11 P11
3 87 43 3 3 87 43 3 CN1
A10 P10 A10 P10 9
2 88 42 2 2 88 42 2 IN VIDEO IN 9 5
A9 P9 A9 P9 8
1 89 39 1 1 89 39 1 IN VIDEO IN 8 6
A8 P8 A8 P8 7
0 92 38 0 0 92 38 0 IN VIDEO IN 7 7
A7 P7 A7 P7 6
93 37 93 37 IN VIDEO IN 6 8
A6 P6 A6 P6 5
36 36
94
95
A5
A4
P5
P4
35
IC516
HM63021FP-28
94
95
A5
A4
P5
P4
35 4
3
IN VIDEO IN 5
IN VIDEO IN 4
9
10 2
96 34 96 34 IN VIDEO IN 3 11
A3 P3 9 4 24 9 A3 P3 2
97 33 97 33 IN VIDEO IN 2 12
A2 P2 8 5 23 8 A2 P2 1
98 32 98 32 IN VIDEO IN 1 13
A1 P1 7 6 22 7 A1 P1 0
99 31 99 31 IN VIDEO IN0 14
A0 P0 6 7 21 6 A0 P0
5 8 20 5
9 74 6 9 74 6
B16 Q16 4 9 19 4 B16 Q16
8 73 7 8 73 7 CN2
B15 Q15 3 10 18 3 B15 Q15 9
7 72 8 7 72 8 IN VIDEO OUT 9 5
B14 Q14 2 11 17 2 B14 Q14 8
6 71 9 6 71 9 IN VIDEO OUT 8 6
B13 Q13 5V B13 Q13 7
5 70 10 5 70 10 IN VIDEO OUT 7 7
B12 Q12 28 15 B12 Q12 6
4 69 11 VDD DEC4 4 69 11 IN VIDEO OUT 6 8
B11 Q11 C535 16 B11 Q11 5
3 68 12 0.1 DEC3 3 68 12 IN VIDEO OUT 5 9
B10 Q10 14 26 B10 Q10 4
2 67 13 GND DEC2 2 67 13 IN VIDEO OUT 4 10
B9 Q9 13 B9 Q9 3
1 64 14 DEC1 1 64 14 IN VIDEO OUT 3 11
B8 Q8 27 B8 Q8 2
0 63 17 M2 0 63 17 IN VIDEO OUT 2 12
B7 Q7 1 B7 Q7 1
62 18 M1 62 18 IN VIDEO OUT 1 13
B6 Q6 12 2 B6 Q6 0
61 19 WE 61 19 IN VIDEO OUT 0 14
B5 Q5 25 3 5 B5 Q5
60 20 OE RST 60 20
B4 Q4 B4 Q4
59 21 59 21
B3 Q3 B3 Q3
58 22 IC517 58 22
B2 Q2 HM63021FP-28 B2 Q2
57 23 57 23
B1 Q1 B1 Q1
56 24 56 24
5V B0 Q0 1 4 24 1 5V B0 Q0
0 5 23 0
100
26
SMPL-A
P-SW
SMPL-P
OUT-SW-P
50
27
6
7
22
21
R556
22k
100
26
SMPL-A
P-SW
SMPL-P
OUT-SW-P
50
27 3
78 28 78 28
DIR OE-P 8 20 DIR OE-P
R555 9 19
22k 75 25 75 25
SMPL-B SMPL-Q 10 18 SMPL-B SMPL-Q
1 2 1 2
Q-SW OUT-SW-Q 11 17 Q-SW OUT-SW-Q
3 3
OE-Q 5V OE-Q
28 15
29 54 VDD DEC4 29 54
CK-A CK-P C536 16 CK-A CK-P
79 4 0.1 DEC3 79 4
CK-B CK-Q 14 26 CK-B CK-Q
GND DEC2
13
51 DEC1 51
OP-IN 27 OP-IN
52 77 M2 52 77
OP-CTL OP-OUT 1 OP-CTL OP-OUT
53 76 M1 53 76
OP-CK OP-GATE 12 2 OP-CK OP-GATE
WE
25 3 5
Vss OE RST Vss

5 15 30 40 55 66 80 90 5 15 30 40 55 66 80 90

Y/C MULTIPLEX

4
5V

14 IC9(6/6)
13 12 74AC04SJ
7

IC9(5/6)
11 10 74AC04SJ

PK 1/11
REC.VIDEO 2/11
REC.KEY 6/11

Combiner, lighting and Z recursive 5


CMB-1 (7/11)
BKDM-3050
BOARD NO. 1-652-569-14
LOT NO. 502-
FOR DME-3000/7000
B-¥BKDM3050-CMB1M

DME-3000/7000 4-15 4-15


I J K L M N O P
Combiner, lighting and Z recursive CMB-1 (8/11) CMB-1 (8/11) Combiner, lighting and Z recursive

BKDM-3050 (SY) : S/N 50001 and Higher


L603
1µH
IC603 IC609 5V
C615 MC10H125M CXD8337Q
0.1 -5V 5V C641 C643
IC601 0.1 0.1
1 C616
SBX1602A C629
0.1 -5V
C635
0.1
100 2 24 27 30 8 9 1 30 51 65 79
6.3V 7 23 8
R617 VEE GND VEE VDD
100 21 3
31 10 4 9 9 50 VDD 80 9 IC612
MON EVR IN9 Y9 74AC244SJ
2 8 49 81 8
IN8 Y8 5V
C617 29 9 10 9 7 5 8 7 48 82 7 C645
10 CX D9 R624 1k IN7 Y7 0.1
R608 R611 R615 16V 10 9 6 6 47 83 6
Q602 100k 100 110k D8 R625 1k IN6 Y6
25 11 8 8 11 12 7 5 46 84 5
2SC3356 AIY D7 R626 1k IN5 Y5 20 10
C601 R601 R603 C610 C613 12 7 10 4 45 85 4
CNX1 0.1 68 22 47p 47p D6 R627 1k IN4 Y4 9 2 18 9
26 13 6 7 15 13 6 3 44 86 3
CN,105-13B 13B C IN Z AIX D5 R628 1k IN3 Y3 8 4 16 8
R602 R605 5V R614 14 5 14 2 43 87 2
220 75 10k D4 R629 1k IN2 Y2 7 6 14 7
33 15 4 1 42 88 1
DIX D3 R630 1k VBB GND IN1 Y1 6 8 12 6
C604 C606 L602 16 3 0 41 89 0
0.1 0.1 1µH D2 R631 1k 1 16 IC604 IN0 Y0 5 11 9 5
5V 17 2 MC10H125M ZI 29 91
C609 D1 R632 1k WCK UV9 4 13 7 4
100 18 1 C623 5V 19 92
6.3V D0 R633 1k 0.1 5V DMODE1 UV8 3 15 5 3
R609 34 19 0 20 93
22k DIY PCK R634 1k C630 C636 DMODE0 UV7 2 17 3 2
R610 R612 0.1 -5V 0.1 59 94
10k 10k 525 /625 UV6
5 -5V 60 95
10/11 ≠≠
D1/D2
≠ Q603 JS 8 9 D1/D2 UV5 1 19
2SA812 20 31 96
10/11 FV ADJ ZIN R613 SYN VEE VDD TRS CUT UV4
15k 22 6 3 4 5 32 97
D602 3 RSE FW CTL UV3
1S2835 R616 2 33 98
1000 HSFTFC UV2
1 36 5 7 5 4 34 99
FV HSFTAT UV1
R606 6 35 100
0 -5V OFS SY SX DPR ADS TNI ESO ESI MJ CTL UV0
2 4 11 12 3 36 63
28 3 4 35 32 6 1 37 DR ON TEST2
C612 10 23 62
BLK MODE1 TEST1 5V IC611(1/2)
2 R604
R607
0
0.1
3 15
14
13 2 24
25
BLK MODE0 TEST0
61
64
74AC244SJ
100 MBLK/SBLK TNCON 5V
R623 C621 27 66 C646
10k 0.1 VBB GND VBLK FIX TOUT 0.1
26 37
1 16 IC605 DBLK/ABLK DR CLR
MC10H125M 21 38
5V DIAGMODEA1 BLK GATE 20 10
-5V C624 22 2
0.1 5V DIAGMODEA0 RCK 1 2 18 1
15 CF
R618 R619 R620 C631 C637 CFP 0 4 16 0
1000 10k 10k 0.1 -5V 0.1 RESET 58 16 FDD
Q605 PARA/SERI FD 6
DTC114EK Q607 SADD2 54 17 VD
2SA812 8 9 SADRS VD 8
SDIO 52
R621 VEE VDD SDATA
10/11 PSP RST TTL 15k 2 3 4 1 CS2A 57 18 HD
R622 CS HD 1
1000 2 CKD3 55 39 SMPL
CKD SMPL
1 7 5 0 CKX 56
D603 CKX
1S2835 6 GND
-5V 11
0 12 ZI
3 14 28 40 53 67 78 90
10
15 13 ZO
6/11 DZO PCK
14

VBB GND
1 16

RESET
C625
0.1

1,2,4,6,7,8,9,10/11 SERIAL CTRL


2,6,7,9,10/11 TIMING SIG
3 7,9,10/11 ADV 2FS/FS 1

10/11 ≠≠≠
KEY/KEYZ
≠≠
10/11 NEW/OLD
≠≠≠
≠≠ IN

L604 IC606 IC610 5V


C618 1µH MC10H125M CXD8337Q
0.1 -5V 5V C642 C644
IC602 0.1 0.1
SBX1602A C632 C638
0.1 -5V 0.1
C619
100 2 24 27 30 8 9 1 30 51 65 79
6.3V 7 23 8
R651 VEE GND VEE VDD
100 21 3
31 10 4 9 9 50 VDD 80 9
MON EVR IN9 Y9
2 8 49 81 8
IN8 Y8
C620 29 9 10 9 7 5 8 7 48 82 7
10 CX D9 R658 1k IN7 Y7
Q601 R642 R645 R649 16V 10 9 6 6 47 83 6
2SC3356 100k 100 110k D8 R659 1k IN6 Y6
25 11 8 8 11 12 7 5 46 84 5
AIY D7 R660 1k IN5 Y5 IC613
C602 R635 R637 C608 C614 12 7 10 4 45 85 4 74AC244SJ
CNX1 0.1 68 22 47p 47p D6 R661 1k IN4 Y4
26 13 6 7 15 13 6 3 44 86 3 5V
CN,105-19B 19B C IN KEY AIX D5 R662 1k IN3 Y3 C647
R636 R639 5V R648 14 5 14 2 43 87 2 0.1
220 75 10k D4 R663 1k IN2 Y2
33 15 4 1 42 88 1
DIX D3 R664 1k VBB GND IN1 Y1
C603 C605 L601 16 3 0 41 89 0 20 10
0.1 0.1 1µH D2 R665 1k 1 16 IC607 IN0 Y0
C607 5V 17 2 MC10H125M KI 29 91 9 2 18 9
100 D1 R666 1k WCK UV9
6.3V 18 1 C626 5V 19 92 8 4 16 8
D0 R667 1k 0.1 5V DMODE1 UV8
R643 34 19 0 20 93 7 6 14 7
22k DIY PCK R668 1k C633 C639 DMODE0 UV7
R644 R646 0.1 -5V 0.1 59 94 6 8 12 6
525 /625 UV6
4 10/11 D1/D2
≠≠

10k 10k
Q604
2SA812
5
JS
20
-5V 8 9
60
31
D1/D2 UV5
95
96
5
4
11
13
9
7
5
4
10/11 FV ADJ KIN R647 SYN VEE VDD TRS CUT UV4
D601 15k 22 6 3 4 5 32 97 3 15 5 3
1S2835 3 RSE FW CTL UV3
R650 2 33 98 2 17 3 2
1000 HSFTFC UV2
1 36 5 7 5 4 34 99 1
FV HSFTAT UV1
R640 6 35 100 0 1 19
0 -5V OFS SY SX DPR ADS TNI ESO ESI MJ CTL UV0
2 4 11 12 3 36 63
28 3 4 35 32 6 1 37 DR ON TEST2
C611 10 23 62
R641 0.1 BLK MODE1 TEST1 5V
0 3 15 13 2 24 61
BLK MODE0 TEST0
R638 14 25 64
100 MBLK/SBLK TNCON
R657 C622 27 66
10k 0.1 VBB GND VBLK FIX TOUT
26 37
1 16 IC608 DBLK/ABLK DR CLR
MC10H125M 21 38
5V DIAGMODEA1 BLK GATE
-5V C627 22 2
0.1 5V DIAGMODEA0 RCK
15 CF
R652 R653 R654 C634 C640 CFP IC611(2/2)
1000 10k 10k 0.1 -5V 0.1 RESET 58 16 FDD 74AC244SJ
Q606 PARA/SERI FD
DTC114EK Q608 SADD2 54 17 VD
2SA812 8 9 SADRS VD
SDIO 52 1 11 9 1
R655 VEE VDD SDATA
10/11 PSP RST TTL 15k 2 3 4 1 CS29 57 18 HD 0 13 7 0
R656 CS HD
1000 2 CKD3 55 39 SMPL 15
CKD SMPL
1 7 5 0 CKX 56 17
D604 CKX
1S2835 6 GND
-5V 11
0 12 KI 19
3 14 28 40 53 67 78 90
10
15 13 KO
6/11 DKO PCK
5 14

VBB GND
1 16
RESET

C628
0.1

1,2,4,6,7,8,9,10/11 SERIAL CTRL


2,6,7,9,10/11 TIMING SIG
10/11 ADV ≠≠≠
2FS
≠≠ 2
10/11 KEY/KEYZ
≠≠≠≠
≠≠≠
10/11 VAR. DELAY RST

4-16 4-16 DME-3000/7000

A B C D E F G H
Combiner, lighting and Z recursive CMB-1 (8/11) CMB-1 (8/11) Combiner, lighting and Z recursive

5V
C654 C655 CMB EXT Z 4/11
IC616
HM63021FP-28
0.1 0.1
1
16 41 65 91
IC614
74AC574SJ 9 4 24 9
9 81 49 13
8 5 23 8 A16 P16 CN2
5V 8 82 48 12 9
C648 7 6 22 7 A15 P15 IN Z OUT 9 41
0.1 7 83 47 11 8
6 7 21 6 A14 IC620 P14 IN Z OUT 8 42
6 84 CXD8838Q 46 10 7
20 10 5 8 20 5 A13 P13 IN Z OUT 7 43
5 85 45 F 6
4 9 19 4 A12 P12 IN Z OUT 6 44
9 2 V DD GND 19 9 4 86 44 E 5
3 10 18 3 A11 P11 IN Z OUT 5 45
8 3 18 8 3 87 43 D 4
2 11 17 2 A10 P10 IN Z OUT 4 46
7 4 17 7 2 88 42 C 3
5V A9 P9 IN Z OUT 3 47
6 5 16 6 1 89 39 B 2
28 15 A8 P8 IN Z OUT 2 48
5 6 15 5 VDD DEC4 0 92 38 A 1
C653 16 A7 P7 IN Z OUT 1 49
4 7 14 4 0.1 DEC3 93 37 0
14 26 A6 P6 IN Z OUT 0 50
3 8 13 3 GND DEC2 94 36
13 A5 P5
2 9 12 2 DEC1 95 35
27 A4 P4
OE M2 96 34
1 A3 P3
11 1 M1 97 33
12 2 A2 P2 CN1
WE 98 32 9
25 3 E A1 P1 IN Z IN 9 59
OE RST 99 31 8
A0 P0 IN Z IN 8 60
7
IN Z IN 7 61
9 74 6 9 6
B16 Q16 IN Z IN 6 62
8 73 7 8 5
IC621 B15 Q15 IN Z IN 5 63
74AC574SJ IC617 7 72 8 7 4
HM63021FP-28 B14 Q14 IN Z IN 4 64
6 71 9 6 3
5V
C656
0.1
1 4 24 1 5 70
B13
B12
Q13
Q12
10 5 2
IN
IN
Z
Z
IN
IN
3
2
65
66
2
0 5 23 0 4 69 11 4 1
B11 Q11 IN Z IN 1 67
20 10 6 22 3 68 12 3 0
B10 Q10 IN Z IN 0 68
7 21 2 67 13 2
1 2 V DD GND 19 1 B9 Q9
8 20 1 64 14 1
0 3 18 0 B8 Q8
9 19 0 63 17 0
4 17 B7 Q7
10 18 62 18
5 16 B6 Q6
11 17 61 19
6 15 B5 Q5
5V 60 20
7 14 B4 Q4
28 15 59 21
8 13 VDD DEC4 B3 Q3
C650 16 58 22
9 12 0.1 DEC3 B2 Q2
14 26 57 23
OE GND DEC2 B1 Q1
13 56 24
11 1 DEC1 B0 Q0
27
M2 5V 100
1 50
M1 SMPL-A SMPL-P
12 2 26 27
WE P-SW OUT-SW-P D1/D2
≠≠
≠ 10/11
25 3 E 78 28
OE RST DIR OE-P

75 25
SMPL-B SMPL-Q
1 2
Q-SW OUT-SW-Q ≠≠
D1/D2
≠ 10/11
3
OE-Q

29 54
CK-A CK-P
79 4
CK-B CK-Q D1:FS/D2:1/2FS 10/11

51
OP-IN
3
52 77
OP-CTL OP-OUT
53 76
OP-CK OP-GATE

Vss

5 15 30 40 55 66 80 90

≠≠≠≠ 10/11
D1:FS/D2:1/2FS
≠≠≠≠≠
IC618
HM63021FP-28 D1:FS/D2:1/2FS
≠≠
≠ 10/11

9 4 24 9
8 5 23 8
7 6 22 7
PSP PCK 10/11
6 7 21 6 CMB EXT KEY 4/11
IC615 5 8 20 5
74AC574SJ 9 19 CN2
4 4
9
5V 3 10 18 3 IN KEY OUT 9 23
C649 8
0.1 2 11 17 2 IN KEY OUT 8 24
7
5V IN KEY OUT 7 25
20 10 6
28 15 IN KEY OUT 6 26
VDD DEC4 5
9 2 V DD GND 19 9 C651 16 IN KEY OUT 5 27
0.1 DEC3 4
8 3 18 8 14 26 IN KEY OUT 4 28
GND DEC2 3
7 4 17 7 13 IN KEY OUT 3 29
DEC1 2
6 5 16 6 27 IN KEY OUT 2 30
M2 1
5
4
6
7
15
14
5
4
1
12
M1
2
0
IN
IN
KEY
KEY
OUT
OUT
1
0
31
32
4
WE
3 8 13 3 25 3 F
OE RST
2 9 12 2
CN1
OE 9
IN KEY IN 9 23
11 1 8
IN KEY IN 8 24
IC619 7
HM63021FP-28 IN KEY IN 7 25
6
IN KEY IN 6 26
IC622 4 24
5
IN KEY IN 5 27
74AC574SJ 1 1
5V 4
C657 0 5 23 0 IN KEY IN 4 28
0.1 3
6 22 IN KEY IN 3 29
2
20 10 7 21 IN KEY IN 2 30
1
8 20 IN KEY IN 1 31
1 2 V DD GND 19 1 0
9 19 IN KEY IN 0 32
0 3 18 0
10 18
4 17
11 17 CN1
5 16 9
5V IN KEY Z IN 9 41
6 15 8
28 15 IN KEY Z IN 8 42
7 14 VDD DEC4 7
C652 16 IN KEY Z IN 7 43
8 13 0.1 DEC3 6
14 26 IN KEY Z IN 6 44
9 12 GND DEC2 5
OE
27
DEC1
13
4
IN
IN
KEY
KEY
Z
Z
IN
IN
5
4
45
46
Combiner, lighting and Z recursive
11 1
1
12
M2
M1
WE
2
3
2
1
IN
IN
KEY
KEY
Z
Z
IN
IN
3
2
47
48
CMB-1 (8/11)
IN KEY Z IN 1 49
25
OE RST
3 F
0
IN KEY Z IN 0 50
BKDM-3050 5
BOARD NO. 1-652-569-14
LOT NO. 502-
FOR DME-3000/7000
PSP PCK 10/11
B-¥BKDM3050-CMB1M

DME-3000/7000 4-17 4-17


I J K L M N O P
Combiner, lighting and Z recursive CMB-1 (9/11) CMB-1 (9/11) Combiner, lighting and Z recursive

BKDM-3050 (SY) : S/N 50001 and Higher

IC705
CXD8337Q Y/C DEMULTIPLEX
L702 IC702
1µH MC10H125M IC706 5V
5V 5V IDT74FCT827ASO
C725 C726 5V
C709 C716 C719 C722 C723 0.1 0.1 C727
0.1 -5V IC701 0.1 -5V 0.1 0.1 0.1 5V 0.1
SBX1602A C724
0.1 IC708
C710 ZA4041 1 36
100 2 24 27 30 8 9 1 30 51 65 79 16 41 65 91
6.3V 7 23 8 24 12
R717 VEE GND VEE VDD VDD VDD VDD
100 21 3 2 23 81 49 29
31 10 4 9 9 50 80 9 9 DIN7 17 9
MON EVR IN9 Y9 A16 P16 DOUT17
2 8 49 81 8 3 22 8 82 IC707 48 8 DIN6 16 8
IN8 Y8 A15 CXD8838Q P15 DOUT16
C711 29 9 10 9 7 5 8 7 48 82 7 4 21 7 83 47 30 DIN5 15 7
10 CX D9 R724 1k IN7 Y7 A14 P14 DOUT15
R708 R711 R715 16V 10 9 6 6 47 83 6 5 20 6 84 46 7 DIN4 14 6
Q701 100k 100 110k D8 R725 1k IN6 Y6 A13 P13 DOUT14
2SC3356 25 11 8 8 11 12 7 5 46 84 5 6 19 5 85 45 31 DIN3 13 5
AIY D7 R726 1k IN5 Y5 A12 P12 DOUT13
C701 R701 R703 C704 C708 12 7 10 4 45 85 4 7 18 4 86 44 6 DIN2 12 4
CNX1 0.1 68 22 47p 47p D6 R727 1k IN4 Y4 A11 P11 DOUT12
26 13 6 7 15 13 6 3 44 86 3 8 17 3 87 43 32 DIN1 11 3 IC712
CN,105-15B 15B C IN C AIX D5 R728 1k IN3 Y3 A10 P10 DOUT11 SN74HC157ANS
R714 14 5 14 2 43 87 2 9 16 2 88 42 5 DIN0 10 2
R702 R706 5V 10k D4 R729 1k IN2 Y2 A9 P9 DOUT10
220 75 L701 33 15 4 1 42 88 1 10 15 1 89 39 1
1µH DIX D3 R730 1k VBB GND IN1 Y1 A8 P8 5V
C707 16 3 0 41 89 0 11 14 0 92 38 0 3 20 9 C732
0.1 D2 R731 1k 1 16 IN0 Y0 A7 P7 DOUT27 C730 5V 0.1
2 C702
0.1
C703
0.1
C705
100
6.3V 5V
D1
D0
17
18
2
1
R732 1k
R733 1k C713
0.1 IC703
5V
29
19
WCK
DMODE1
UV9
UV8
91
92 13 1
93
94
A6
A5
P6
P5
37
36 4
RST0
DOUT26
DOUT25
21
22
8
7
0.1
16
34 19 0 MC10H125M 20 93 95 35 34 23 6
DIY PCK R734 1k 5V DMODE0 UV7 A4 P4 RST1 DOUT24 2 V0 VCC
R709 R710 R712 59 94 96 34 33 24 5
525 /625 UV6 A3 P3 RST2 DOUT23 1 14 2 3 V1 VC 4
22k 10k 10k 5 C717 C720 97 33
-5V 0.1 -5V 0.1 60 95 25 4
10/11 ≠≠
D1/D2
≠ Q702 JS D1/D2 UV5 A2 P2 DOUT22
20 31 96 98 32 2 26 3 7
2SA812 SYN TRS CUT UV4 A1 P1 OE1 DOUT21 5 W0
R713 22 32 97 99 31 35 27 2
15k RSE 8 9 FW CTL UV3 A0 P0 OE2 DOUT20 6 W1 WC 7
R716 33 98
1000 VEE VDD HSFTFC UV2 VSS VSS IC810(1/6)
36 6 3 4 5 34 99 9 74 6 9 74AC04SJ
FV HSFTAT UV1 B16 Q16 11 X0
10/11 FV ADJ CIN 2 35 100 8 73 7 8 18 19
3 OFS SY SX DPR ADS TNI ESO ESI MJ CTL UV0 B15 Q15 10 X1 XC 9
-5V 5 7 5 4 36 63 7 72 8 7
28 3 4 35 32 6 1 37 DR ON TEST2 B14 Q14
1 6 23 62 6 71 9 6
D701
1S2835 BLK MODE1 TEST1 5V B13 Q13 IC709 5V C728
0.1 14 Y0
R707 4 11 12 3 24 61 5 70 10 5 ZA4041
0 C712 BLK MODE0 TEST0 B12 Q12 13 Y1 YC 12
2 0.1 10 25 64 4 69 11 4
MBLK/SBLK TNCON B11 Q11 36 1
R705 R723 3 15 13 2 27 66 3 68 12 3
0 10k VBLK FIX TOUT B10 Q10 VDD VDD
14 26 37 2 67 13 2
C706 DBLK/ABLK DR CLR B9 Q9 1 29 DIN7 17 1 A INH GND
R704 0.1 21 38 1 64 14 1 DOUT17
100 VBB GND DIAGMODEA1 BLK GATE B8 Q8 0 8 DIN6 16 0 1 15 8
-5V 22 2 0 63 17 0 DOUT16
1 16 DIAGMODEA0 RCK B7 Q7 1 30 DIN5 15 1
15 CF 62 18 DOUT15
CFP B6 Q6 0 7 DIN4 14 0
C714 RESET 58 16 61 19 DOUT14
0.1 IC704 PARA/SERI FD B5 Q5 31 DIN3 13
MC10H125M SADD2 54 17 VD 60 20 DOUT13
5V 5V SADRS VD B4 Q4 6 DIN2 12
SDIO 52 59 21 DOUT12
C718 C721 SDATA B3 Q3 32 DIN1 11
0.1 -5V 0.1 CS27 57 18 HD 58 22 DOUT11 IC713
R718 R719 R720 CS HD B2 Q2 5 DIN0 10 µPD42101G-3
1000 10k 10k CKD3 55 39 57 23 DOUT10
Q703 CKD SMPL B1 Q1 5V
DTC114EK Q704 CKX 56 56 24 C731
2SA812 8 9 CKX B0 Q0 3 20 1 5V 0.1
DOUT27
R721 VEE VDD GND 5V 21 0
10/11 PSP RST TTL 15k 2 3 4 1 100 50 DOUT26
R722 3 14 28 40 53 67 78 90 5V SMPL-A SMPL-P 4 22 1 R735 18 7
1000 2 26 27 RST0 DOUT25 22k
P-SW OUT-SW-P 34 23 0 24 1
1 7 5 0 78 28 RST1 DOUT24
DIR OE-P 33 2
3 RESET
D702
1S2835
-5V
0
6
11 12 CI 75
SMPL-B SMPL-Q
25
2
RST2 DOUT23
DOUT22
24
25
23
22 3
4
26 21
10 1 2 OE1 DOUT21
Q-SW OUT-SW-Q 35 27 16 9
15 13 CO 3 OE2 DOUT20
9/11 DCO PCK OE-Q 15 10
14 VSS VSS
PSP PCK 10/11 14 11
29 54
VBB GND CK-A CK-P 18 19 13 12
79 4
1 16 CK-B CK-Q 6 5
5V 19 20
C715 51 C729
0.1 OP-IN 0.1 8
SMPL 52 77 IC710
OP-CTL OP-OUT ZA4041 17
53 76 1 36
OP-CK OP-GATE

10/11 TIMING SIG Vss VDD VDD


9 29 DIN7 17 9
DOUT17
10/11 ADV FD 5 15 30 40 55 66 80 90 8 8 DIN6 16 8
DOUT16
7,8,10/11 ADV 2FS/FS 1 7 30 DIN5 15 7
DOUT15
10/11 ≠≠
FS
≠ 6 7 DIN4 14 6
DOUT14
5 31 DIN3 13 5
DOUT13
4 6 DIN2 12 4
3,5,10/11 FS DOUT12
3 32 DIN1 11 3
DOUT11
2 5 DIN0 10 2
DOUT10

3 20 9
DOUT27
21 8
DOUT26
4 22 7
RST0 DOUT25
34 23 6
RST1 DOUT24
33 24 5
RST2 DOUT23
25 4
DOUT22

WR0
RR0
RR1
IC840(3/6) 2 26 3
OE1 DOUT21
4 5,10/11 FM RP
74AC04SJ 35
OE2 DOUT20
27 2

5 6 VSS VSS
10/11 0/1 FRAME
18 19
10/11 NEW/OLD
≠≠≠
≠≠ IN

10/11 NEW/OLD
≠≠≠
≠≠ OUT

10/11 ADV FS B
10/11 ≠≠≠
525/625
≠≠
CNZ1
WKG,Z1-29C 29C AXIS 0
1,2,4,6,7,8,10/11 SERIAL CTRL

10/11 ADV ≠≠≠


2FS
≠≠ 1
EXT.C 7/11
10/11 ADV 2FS/FS 0
10
10/11 VAR. DELAY RST
CN1 CN2
9 9 1/11 MULTIPLEXED C
77 IN C IN 9 IN C OUT 9 59
8 8 10/11 AXIS ON/OFF
78 IN C IN 8 IN C OUT 8 60
7 7 1/11 CKO V
79 IN C IN 7 IN C OUT 7 61
6 6 6/11 CKO K
80 IN C IN 6 IN C OUT 6 62
5 5 6/11 CKO Z
81 IN C IN 5 IN C OUT 5 63 FD
4 4 10/11 TIMING SIG
82 IN C IN 4 IN C OUT 4 64
3 3 10/11 2FS E
83 IN C IN 3 IN C OUT 3 65
2 2
84 IN C IN 2 IN C OUT 2 66
1 1 10/11 ≠≠≠≠≠
EXT.V/KEYZ
≠≠≠≠
85 IN C IN 1 IN C OUT 1 67
0 0 6/11 KEY/Z
86 IN C IN 0 IN C OUT 0 68

4-18 4-18 DME-3000/7000

A B C D E F G H
Combiner, lighting and Z recursive CMB-1 (9/11) CMB-1 (9/11) Combiner, lighting and Z recursive

Y/C MULTIPLEX IC715 IC719


CXD8838Q IC716 74AC244SJ IC717 IC720 IC723
74AC574SJ CXD8885Q CX22029 SBX1601A
5V 5V
C733 C734 C735 C736 5V 5V L703
0.1 0.1 0.1 0.1 5V C738 C739 5V 1µH
C737 C740 0.1 0.1 C744
0.1 0.1 0.1 Q706
IC724 C748 C749 R766 2SC3356 C759 CNX1

100
117
16 41 65 91 HM63021FP-28 16 41 65 91 0.1 100 -5V 33 0.1

17
45
57
73
20 10 20 10 14 28 R751 6.3V C OUT C 23B CN,105-23B
680 26 27
49 24 49 V DD GND V DD GND 18 V DD R765 R767 Q707
9 81 4 81 9 2 19 9 9 2 9 116 56 4 3 9 120 33 2SC3356
A16 P16 A16 P16 Y9 O9 9 6 V EE V EE 3 R773
8 82 48 5 23 82 48 8 3 18 8 8 4 16 8 115 55 6 5 8 D9X SX 75
A15 IC714 P15 A15 P15 Y8 O8 7 R772
7 83 CXD8838Q 47 6 22 83 47 7 4 17 7 7 6 14 7 114 54 8 7 7 D9Y 75
A14 P14 A14 P14 Y7 O7 8 8 4
6 84 46 7 21 84 46 6 5 16 6 6 8 12 6 113 53 10 9 6 D8X SY R774
A13 P13 A13 P13 Y6 D6 9 R762 R764 R768 C757 130 R777
5 85 45 8 20 85 45 5 6 15 5 5 11 9 5 112 52 12 11 5 D8Y 220 220 82 0.1 10k
A12 P12 A12 P12 Y5 D5 7 10 5V
4 86 44 9 19 86 44 4 7 14 4 4 13 7 4 111 51 18 17 4 D7X C756
A11 P11 A11 P11 Y4 D4 11 C754 C755 10
3 87 43 10 18 87 43 3 8 13 3 3 15 5 3 110 50 20 19 3 D7Y R763 0.1 0.1 16V 5V
A10 P10 A10 P10 Y3 D3 6 12 1k
2 88 42 11 17 88 42 2 9 12 2 2 17 3 2 109 48 22 21 2 D6X
A9 P9 A9 P9 Y2 D2 13 36
1 89 39 5V 89 39 1 OE 1 108 47 24 23 1 D6Y PCK DCO PCK 9/11
A8 P8 A8 P8 Y1 D1 5 14 R775
0 92 38 28 15 92 38 0 11 1 1 19 0 107 46 26 25 0 D5X 22k
A7 P7 C761 VDD DEC4 A7 P7 Y0 D0 15 C752
37 16 D5Y 10/11
2
93 0.1 93 37 1 220p DCO LOCK
A6 P6 DEC3 A6 P6 4 16 34 R776
94 36 14 26 94 36 13 58 15 D4X TRP 22k
A5 P5 GND DEC2 A5 P5 U9 CKO -5V 17
95 35 13 95 35 12 D4Y Q708
A4 P4 DEC1 A4 P4 U8 C746 3 18 DTC114EK
96 34 27 96 34 IC726 11 61 13 27 0.1 D3X
A3 P3 M2 A3 P3 74AC574SJ IC718(1/2) U7 D PHS1 19 1
97 33 1 97 33 74AC244SJ 9 60 D3Y LST
A2 P2 M1 A2 P2 U6 D PHS0 2 20 C750 C760
98 32 12 2 98 32 5V 8 62 D2X 0.1 0.1
A1 P1 WE A1 P1 5V U5 TRS JST 21 33
99 31 25 3 99 31 C763 C741 6 63 D2Y FV
A0 P0 OE RST A0 P0 0.1 0.1 U4 SEL STAT1 1 22
4 65 D1X -5V
U3 SEL STAT0 23 3 R770
9 74 6 9 74 6 20 10 3 75 D1Y 33
B16 Q16 B16 Q16 20 10 U2 TOUT 0 24 28 D703
8 73 7 8 73 7 2 D0X RSE 1S2835 1
B15 Q15 B15 Q15 1 2 V DD GND 19 1 1 2 18 1 U1 5V 25
7 72 8 IC725 7 72 8 1 D0Y R771
B14 Q14 HM63021FP-28 B14 Q14 0 3 18 0 0 4 16 0 U0 30 35 36
6 71 9 6 71 9 95 PCX TNI 2
B13 Q13 B13 Q13 4 17 6 BLK MODE2 31 C751
5 70 10 5 70 10 31 94 PCY 0.1
B12 Q12 4 24 B12 Q12 5 16 8 V9 BLK MODE1 R769 C758
4 69 11 4 69 11 30 93 33 0.1
B11 Q11 5 23 B11 Q11 6 15 V8 BLK MODE0 ECL GND GND GND
3 68 12 3 68 12 29 97 IC721
B10 Q10 6 22 B10 Q10 7 14 1 V7 MUX MODE1 MC10H124M C747 R752 29 32 2 5
2 67 13 2 67 13 28 96 0.1 220
B9 Q9 7 21 B9 Q9 8 13 V6 MUX MODE0
1 64 14 1 64 14 26 98 5V PSP RST ECL 7/11
B8 Q8 8 20 B8 Q8 9 12 V5 525/625 C743
0 63 17 0 63 17 24 99 0.1
B7 Q7 9 19 B7 Q7 OE V4 D1/D2
62 18 62 18 23 104
B6 Q6 10 18 B6 Q6 11 1 V3 TRS SEL1 9
61 19 61 19 22 102 5V
B5 Q5 11 17 B5 Q5 V2 TRS SEL0 V DD
60 20 60 20 20
B4 Q4 5V B4 Q4 V1 6 15 10/11 FV ADJ COUT
59 21 59 21 19 77
B3 Q3 28 15 B3 Q3 V0 RDCLR 10 12
58 22 VDD DEC4 58 22 78
B2 Q2 C762 16 B2 Q2 DR ON 14
57 23 0.1 DEC3 57 23 43 79 CKO KX 6/11
B1 Q1 14 26 B1 Q1 CK TRS EN 11 13
56 24 GND DEC2 56 24 5V HD 33 80 CKO KY 6/11
B0 Q0 13 B0 Q0 HD BURST EN 2
DEC1 FDD 34 81 CKO ZX 6/11
5V 27 5V FD SYNC EN 5 4
100 50 M2 100 50 R778 CF 35 83 CKO ZY 6/11
SMPL-A SMPL-P 1 SMPL-A SMPL-P 4.7k CFP AUTO TRS 1
26 27 M1 5V 26 27 101 85 CKO VX 1/11
P-SW OUT-SW-P 12 2 P-SW OUT-SW-P BLK CKINV 7 3
78 28 WE 78 28 R736 87 CKO VY 1/11
DIR OE-P 25 3 DIR OE-P 22k CLIP

75 25
OE RST
75 25
SADD2
SDIO
39
41
SADD LIMIT
88
89
V EE GND R737
390
R738
390
R749
390
R750
390
R753
390
R754
390
R755
390
R758
390 3
1
SMPL-B SMPL-Q
2 1
SMPL-B SMPL-Q
2 40
SDAT V BLK FIX
91 C742 8 16
CKD3 0.1
Q-SW OUT-SW-Q Q-SW OUT-SW-Q CKD DBLK/ABLK -5V
3 3 CS28 38 5V
OE-Q OE-Q CS -5V Q705
CKX 37 72 2SA812
CKX TNCON
29 54 29 54 RESET 36 71 R756
CK-A CK-P CK-A CK-P PAR/SER RAMTEST 22k
79 4 79 4 SMPL 16 69 R759
CK-B CK-Q CK-B CK-Q SAMPL TEST MOD1 10k
5V 68 10/11 ≠≠
D1/D2
≠ C753
TEST MOD0 IC722 R757 0.1
51 51 118 AM29C821ASC 10k R760 R761
OP-IN OP-IN EWRST 15k 1000
52 77 52 77 120 119 5V
OP-CTL OP-OUT OP-CTL OP-OUT ERRST
53 76 53 76 105 C745
OP-CK OP-GATE OP-CK OP-GATE 0.1
V SS
Vss Vss 15 32 42 59 66 76 92 -5V
24 12
EXT.V 1/11
5 15 30 40 55 66 80 90 9 2 23 R739 22 9
5 15 30 40 55 66 80 90 GRP ON/OFF 6/11
8 3 22 R740 22 8
GRP
≠≠≠≠≠≠≠≠≠≠
≠≠≠≠≠≠≠≠≠
ON/OFF 6/11
7 4 21 R741 22 7
6 5 20 R742 22 6
CN4
5 6 19 R743 22 5 9
OUT C OUT 9 59
4 7 18 R744 22 4 8
OUT C OUT 8 60
3 8 17 R745 22 3 7
OUT C OUT 7 61
2 9 16 R746 22 2 6
OUT C OUT 6 62
1 10 15 R747 22 1 5
OUT C OUT 5 63
0 11 14 R748 22 0 4
OUT C OUT 4 64
3
OUT C OUT 3 65
13 1 2
OUT C OUT 2 66
IC840(2/6) 1
OUT C OUT 1 67
74AC04SJ 0
OUT C OUT 0 68
3 4
13 12
9
OUT C IN 9
CN3
77
4
IC801(6/6) 8
OUT C IN 8 78
74AC04SJ 7
OUT C IN 7 79
6
OUT C IN 6 80
5
OUT C IN 5 81
4
OUT C IN 4 82
3
OUT C IN 3 83
2
OUT C IN 2 84
1
OUT C IN 1 85
0
OUT C IN 0 86

17

HD FDD Combiner, lighting and Z recursive


CMB-1 (9/11)
BKDM-3050
BOARD NO. 1-652-569-14
LOT NO. 502- 5
FOR DME-3000/7000
B-¥BKDM3050-CMB1M

DME-3000/7000 4-19 4-19


I J K L M N O P
Combiner, lighting and Z recursive CMB-1 (10/11) CMB-1 (10/11) Combiner, lighting and Z recursive

BKDM-3050 (SY) : S/N 50001 and Higher

ADV FD 9/11
CN3
D801 NEW /OLD OUT 95
CNX1 1SS226 L801 5V CN1
5.6µH
CPU,X1-3B 3B FUSE(+5V) NEW /OLD IN 95
L802 VAR. DELAY RST 1/11 ,4,7,8,9
1C +5V 5.6µH
2C +5V F801
5V 5V IC817
3C +5V C857 C858 C859 C866 C813 5V IC808 C815 5V IC811 C818 5V IC814 C821 CXD8058Q 5V
100 100 100 0.1 0.1 CXD8058Q 0.1 CXD8058Q 0.1 CXD8058Q 0.1
4C +5V 6.3V 6.3V 6.3V IC848
CXD8058Q IC819 C828
1A -5V F802 L803 19 43 19 43 KEY SEL 4/11 19 43 19 43 19 43 MB88346BPF C827 10 R837
5.6µH 0.1 16V 33
4
2A -5V CN3 V DD V DD V DD V DD UNDER ON/OFF 1/11 V DD V DD V DD V DD V DD V DD C822 5V
C860 C861 C862 HD 37 33 28 3 37 33 0 37 33 8 37 33 14 0.1 R838
CPU,X1-3A 3A FUSE(-5V) 100 100 100 -5V D1/D2 96 CK1 PLS1 A7 WASH ON/OFF 1/11 CK1 PLS1 CK1 PLS1 CK1 PLS1 1 6200
6.3V 6.3V 6.3V IC847 34 29 2 34 34 34 8
D802 CN1 CXD8052Q EN1 A6 EXT. VIDEO ON/OFF 1/11 EN1 EN1 EN1 R839
1SS226 IC804 FD 35 30 1 1 35 35 35 11 10 6 10k
CXD8052Q D1/D2 96 LD1 A5 MAT ON/OFF 4/11 LD1 LD1 LD1
HD 38 29 32 0 0 38 29 1 38 29 9 38 29 15 VCC VDD 7 7
57 CK2 PLS2 A4 OVER ON/OFF 1/11 CK2 PLS2 CK2 PLS2 CK2 PLS2 DA8
57 GENO 30 33 30 30 30 6 6
GENO D1/D2
≠≠
≠ 2/11 ,7,8,9 43 EN2 A3 EN2 EN2 EN2 DA7
43 5V THMO 32 34 2 32 32 32 5 5 IC824
THMO ≠≠≠
525/625
≠≠ 9/11 LD2 A2 LD2 LD2 LD2 DA6 TL431CM
5V IC9(3/6) 39 26 35 1 39 26 2 39 26 A 39 26 16 2 15 4 4
74AC04SJ 33 41 CK3 PLS3 A1 CK3 PLS3 CK3 PLS3 CK3 PLS3 LD DA5
33 41 CS4 VDD Y04 27 36 0 27 27 27 1 16 3 3
VDD Y04 5 6 C865 73 40 EN3 A0 EN3 EN3 EN3 CK DA4
73 40 D1/D2
≠≠
≠ 8/11 0.1 VDD Y05 28 20 28 28 28 0 17 2 2
VDD Y05 39 LD3 B7 LD3 LD3 LD3 DI DA3
IC802 C808 39 CS6 5V Y06 40 21 21 40 21 3 40 21 B 40 21 17 19 1
74AC241SJ 0.1 Y06 38 CK4 PLS4 B6 CK4 PLS4 CK4 PLS4 CK4 PLS4 DA2
5V 38 CS7 5V Y07 22 22 22 22 22 18 0
5V Y07 IC846 C864 58 37 EN4 B5 EN4 EN4 EN4 DA1
5V 58 37 CS8 74AC241SJ 0.1 MODE Y08 23 23 4 23 23 23 14
2
C807 MODE Y08 36 LD4 B4 LD4 LD4 LD4 DO
0.1 36 Y09 CKX 41 24 3 CKX 41 CKX 41 CKX 41 GND VSS
Y09 20 35 CKX B3 CKX CKX CKX
R801 R804 R808 20 35 CSA Y0A CKD 45 25 2 CKD4 45 CKD4 45 CKD4 45 20 1
CNX1 100k 100k 100k Y0A 2 V DD 18 64 34 CKD B2 CKD CKD CKD
2 V DD 18 64 34 CSB CKDI Y0B SDAT 46 26 1 SDAT 46 SDAT 46 SDAT 46
CPU,X1-4A 4A CKD CKDI Y0B 4 16 53 32 DIO B1 DIO DIO DIO
4 16 53 32 CSC ADRI Y0C SADD 47 27 0 SADD2 47 SADD2 47 SADD2 47
CPU,X1-4B 4B SADD ADRI Y0C 6 14 54 31 ADR B0 ADR ADR ADR
6 14 54 31 CSD DIN Y0D 48 10 CS31 48 CS33 48 CS3B 48
CPU,X1-5A 5A WDATA DIN Y0D 8 12 30 CS C7 PZ SEL 1 4/11 CS CS CS
R803 8 12 30 CSE Y0E 11
CNX1 22 Y0E 3 17 56 29 C6 PZ SEL 0 4/11
3 17 56 29 CSF DOUT Y0F 44 12 RESET 44 RESET 44 RESET 44
CPU,X1-5B 5B RDATA DOUT Y0F 5 15 28 RST C5 RST RST RST
5 15 28 CS14 Y14 13
CNX1 R811 5V Y14 7 13 27 GND GND GND GND C4 Z/KEY MULIPLEX 6/11 GND GND GND GND GND GND GND GND GND GND GND GND
22k 7 13 27 CS15 Y15 14
CPU,X1-6A 6A RST Y15 9 11 26 6 18 31 42 C3 6 18 31 42 6 18 31 42 6 18 31 42
9 11 26 CS16 Y16 15
C805 Y16 1G GND 2G 25 C2 ≠≠≠≠≠≠
SHADOW/OVER
≠≠≠≠≠ 10/11
100p 1G GND 2G 25 CS17 Y17 16
Y17 1 10 19 24 C1 AXIS ON/OFF 9/11
1 10 19 24 CS18 55 Y18 17
55 Y18 OEN 21 C0 ≠≠≠≠
OVLP/CMB
≠≠≠ 1/11 ,4
OEN 21 CS19 Y19 1
Y19 20 D7 KF STRB 5/11
5V 20 CS1A Y1A CKX 41 2
5V 5V C863 Y1A 19 CKX D6 REC.MODE 5/11
IC845 0.1 19 CS1B Y1B CKD4 45 3
SN74HC240ANS Y1B 18 CKD D5 0/1 FRAME 9/11 1 R821 R823 R825 R827
18 CS1C Y1C SDAT 46 4 C816 5V IC812 C819 5V IC815 1k 1k 1k 1k
R867 R868 20 10 Y1C 17 DIO D4 PSP RST TTL 5/8 ,7,8,9 0.1 CXD8058Q 0.1 CXD8058Q 8
CNZ1 100k 100k 17 CS1D Y1D SADD2 47 5 IC820(1/2)
2 18 Y1D 16 ADR D3 NEW/OLD
≠≠≠
≠≠ IN 5/8 ,7,8,9 6 TL082CPS
WKG,Z1-17C 17C SPARE22 16 CS1E 5V Y1E CS2B 48 7 IC818
4 16 Y1E 15 CS D2 NEW/OLD
≠≠≠
≠≠ OUT 2/11 ,5,6 19 43 19 43 TL431CM R822 C823
WKG,Z1-16C 16C SPARE25 15 CS1F C812 Y1F 8 2k 0.1 5V R840 R848
6 14 Y1F 0.1 14 D1 V DD V DD V DD V DD C829 10k 100
14 CS20 IC807 Y20 RESET RESET 44 9 37 33 4 37 33 C 0.1
8 Y20 MC74HC595AF 10 RST D0 ≠≠≠≠≠
EXT.V/KEYZ
≠≠≠≠ 9/11 CK1 PLS1 CK1 PLS1 R820 R824 R826 R828
10 CS21 Y21 34 34 100 2k 2k 2k Q801
R869 11 Y21 5V 16 8 9 GND GND GND GND EN1 EN1 3 8 2SA812
CNZ1 1k

Das könnte Ihnen auch gefallen