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V DSS 60 V 60 V
ID 16 A 11 A
TYPICAL RDS(on) = 0.08 AVALANCHE RUGGED TECHNOLOGY 100% AVALANCHE TESTED 175oC OPERATING TEMPERATURE HIGH dV/dt CAPABILITY APPLICATION ORIENTED CHARACTERIZATION TO-220
3 1 2
1 2
DESCRIPTION This Power Mosfet is the latest development of SGS-THOMSON unique "Single Feature Size" process whereby a single body is implanted on a strip layout structure. The resulting transistor shows extremely high packing density for low onresistance, rugged avalance characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. APPLICATIONS DC MOTOR CONTROL s DC-DC & DC-AC CONVERTERS s SYNCHRONOUS RECTIFICATION
s
TO-220FP
Unit V V V A A A W
o W/ C
V V/ns
o o
C C
() Pulse width limited by safe operating area New RDS (on) spec. starting from JULY 98
June 1998
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THERMAL DATA
TO-220 R thj-case R thj-amb R thc-sink Tl Thermal Resistance Junction-case Max 2.5 62.5 0.5 300 TO-220FP 5
o o o
Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature For Soldering Purpose
AVALANCHE CHARACTERISTICS
Symbol I AR E AS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by T j max) Single Pulse Avalanche Energy (starting T j = 25 o C, I D = I AR , VDD = 25 V) Max Value 16 80 Unit A mJ
Zero Gate Voltage V DS = Max Rating Drain Current (V GS = 0) V DS = Max Rating o C Gate-body Leakage Current (V DS = 0) V GS = 20 V
T c = 125
I GSS
ON ()
Symbol V GS(th) R DS(on) ID(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance V DS = VGS V GS = 10V Test Conditions ID = 250 A ID = 8 A 16 Min. 2 Typ. 3 0.080 Max. 4 0.100 Unit V A
DYNAMIC
Symbol g fs () C iss C oss C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions V DS > I D(on) x R DS(on)max V DS = 25 V f = 1 MHz I D =8 A V GS = 0 Min. Typ. 6 760 100 30 1000 140 45 Max. Unit S pF pF pF
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ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON
Symbol t d(on) tr Qg Q gs Q gd Parameter Turn-on Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions V DD = 30 V R G =4.7 W V DD = 40 V ID = 8 A V GS = 10 V I D = 16 A VGS = 10 V Min. Typ. 10 35 20 5 7 Max. 80 40 30 Unit ns ns nC nC nC
SWITCHING OFF
Symbol t r(Voff) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Conditions V DD = 48 V I D = 16 A R G =4.7 V GS = 10 V Min. Typ. 7 18 30 Max. 10 25 45 Unit ns ns ns
() Pulsed: Pulse duration = 300 s, duty cycle 1.5 % () Pulse width limited by safe operating area
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Thermal Impedance for TO-220 Thermal Impedance for TO-220FP
Output Characteristics
Transfer Characteristics
Transconductance
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Gate Charge vs Gate-source Voltage Capacitance Variations
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Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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D1
L2
F1
G1
Dia. L5 L7 L6 L4
P011C
L9
F2
H2
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L3 L6 L7
F1
G1
E F2
1 2 3 L2 L4
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 1998 STMicroelectronics Printed in Italy All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. .
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