The 33rd Annual Conference of the IEEE Industrial Electronics Society (IECON) Nov.

5-8, 2007, Taipei, Taiwan

A DSP-Based Implementation of a Nonlinear Model Reference Adaptive Control for a 1.5 kW Three-

Phase Three-Level Boost-Type Vienna Rectifier

Nesrine Bel Haj Youssef: IEEE student member, Kamal Al-Haddad: IEEE fellow member Ecole de Technologie Superieure Canada Research Chair of Electric Energy Conversion and Power Electronics (CRC-EECPE)

1100, Rue Notre-Dame Ouest, H3C 1K3, Montreal, Canada

Tel: (514) 396-8874; Fax: (514) 396-8684, Emails: kamal ele.etsmtl.ca

Abstract- In this paper, the design and implementation of a model

reference adaptive control (MRAC) applied to a three-phase three-level boost-type Vienna rectifier are presented. The proposed adaptive controllers are designed for inner loops, targeting to balance partial output DC bus voltages, while maintaining unity power factor and minimum AC line currents harmonics. The dqo nonlinear multiple-input multiple-output (MIMO) state space model of the rectifier is first overparameterized. Then, the controllers are designed based on adequate input-to-output linearization and Lyapunov-based parameters adaptation scheme, with a view to track the reference model and compensate the system parametric variations. The outer voltage loop is set consequently, assuming fast inner loops dynamics. The proposed control law is designed in Simulink/Matlab and executed in real- time on a 1.5 kW laboratory prototype using the DS1104 controller board of dSPACE. The experimental results are given under various operating conditions, including steady state operation at different power levels, unbalanced DC load steps, temporary phase loss and - 30% AC supply voltage dip/ swell. The proposed control law ensures low output voltage ripple, minimum AC line-current THD, small overshoots and fast settling times, face to a wide clan of disturbances.

I.

INTRODUCTION

errors, thanks to its switch-diode commutation mode. These merits have encouraged its incorporation in diverse high and medium unidirectional power applications, notably in telecommunications and welding. Consequently, new inquiries, related to the development of efficient control techniques, appeared, aiming to achieve high efficiency utilization of this converter. Nevertheless, in the quasi-totality of related works, the nonlinear aspect of the converter has been ignored and conventional linear controllers were used to master the converter dynamics. The latter controllers were designed using either empiric, or model-based approaches. This opting for conventional linear control is nourished by its relative design and implementation simplicity, reduced sensing efforts and especially its quite good performance in steady-state. In digital control, optimized computational complexity is also a key advantage to take into consideration, especially if the PWM is fulfilled numerically. However, the negligence of the converter nonlinear dynamics and parametric variations is not, undoubtedly, without considerable effects on the converter performance. These effects manifest as important currents/ voltages overshoots and stabilization times, especially during transients or after disturbances occurrence, which is not very tolerable in some sensitive applications.
In this paper, it is shown that significant improvement of the

Fig.1, is one of the most interesting Factor Correction converter performance may be achieved using an adaptive Switched-Mode Rectifiers, allowing to meet the IEEE nonlinear control technique, without exaggerating the requirements in terms of high input power factor, low line computational complexity. current distortion, fixed output voltage and robustness to load and utility disturbances [1-6]. It is characterized by its low The design of the proposed control scheme is based on the switches count and blocking voltage stresses, thus minimizing over-parameterization of the converter discrete nonlinear design and realization efforts and costs. It is also known for its averaged model, previously developed by the authors in the relatively low control complexity, compared to its three-level continuous-time domain and consisting of four state-space counterparts, and for its immunization against eventual control equations [7]. Then, new coordinates are defined as a nonlinear

The three-phase/switch/level (Vienna) rectifier, shown in

1-4244-0783-4/07/$20.00 C 2007 IEEE

1743

diffeomorphism transform involving the system state variables, necessiting an adaptive algorithm for the estimation of the parameters. These new variables are, after that, differentiated until at least one control input appears, based on which, the linearizing control law is defined; thus decomposing the overall system into m canonical subsystems, where m is the number of control inputs. Stabilizing inputs are finally designed to ensure desired dynamics in closed loops. The parameters adaptation scheme is defined in a way to ensure global asymptotic stability of the point (E = 0), where E is the tracking error between the new coordinates and their references. The whole control system is arranged into a multiple-loop configuration. The inner loops ensure the shaping of the AC currents, through the control of dq current components, as well as the compensation of the DC load unbalance. The outer loop regulates the total output DC voltage to its set reference and provides the current reference to the inner currents loops. The steady state and dynamic performances of the controlled converter are experimentally evaluated on a 1.5 kW laboratory prototype, using the DS 1104 controller board of dSPACE. Satisfactory results, such as low AC current Total Harmonic Distortion (THD), low voltage ripple at the DC side, fast step response and high robustness face to both load and utility disturbances, are obtained.
The paper is organized as follows: in section II, the converter continuous-time state-space model is briefly recalled, and then its discretized version is derived. In section III, the nonlinear adaptive control strategy is decorticated. Finally, experimental results showing both steady state and dynamic performance of the proposed control technique are exposed and analysed.
II. NONLINEAR DISCRETE-TIME AVERAGED MODEL OF THE VIENNA CONVERTER

Av0(k+1)=Av((k)k

do(k)d (k)F3 T

) (dd (k)id (k)+dq(k)iq(k)) -io h(k)+iol (k)J

d vo(k+l) =v(k)+3 (dd (k)id (k) +dq'(k)iq(k))-aAv0~~~~~~~(k)(k)d (k) ()do(id)

-,h(kc)',
(1 .d)

where k denotes the sampling instants kTU and:

[Vd Vq Vso] =

[d'd dq d0]T = K [d1 d2 d3]T

K [Va Vb V],

[lid iq io]T = K [ia ib ic]

(2)

K being the abc! dqo transform matrix. The original power switches duty cycles dk are transformed into new control variables d'k, such as:

dk=

I-dk[sgn(ix)_AVo ],xe
vo

{a, b, c},ke {1,2,3}

(3)

Note that both abc/dqo and duty cycles transforms allow cancelling time-dependency of the converter dynamics with respect to mains currents, thus considerably simplifying the design of currents controllers. io,h, i0,j are respectively the upper and lower DC load currents. vo defines the total DC output voltage and z1vO the partial DC bus voltages unbalance, i.e.:
V0 =

V,,h+ v0,,, and Avo = Vo,h Vo,l

-

(4)

Regarding mathematical computation leading to the coefficient a, it is based on averaging the non-stationary matrix "SGN" within a network period, where SGN ( ix) denotes the square matrix, whose diagonal elements are constituted by the currents signs, i.e.:
(sgn(ia)
SGN (ix ) =
0 0

A fourth-order state-space averaged model of the three-phase Vienna rectifier in the continuous-time domain has been developed and detailed in [7]. In summary, the modeling approach uses the state-space-averaging technique, applied on two time-basis: the input stage state equations that involve the line currents are averaged over a switching period Td, whereas the output stage state equations that involve the DC voltages are averaged over a mains period To. This last assumption is allowed by the adequate rating of output filtering capacitors that minimizes DC voltages ripples, in a way that both DC split voltages may be considered as ripple-free along a mains period. Since the proposed control technique is digitally implemented in the present paper, the discretized version of the pre-mentioned nonlinear averaged model is derived by replacing the states time derivatives by their incrementation from the previous to the present sample within a sampling time Ts, which yields:
id (k + 1) =id (k)+L Vd (k) + Lwojq (k) - v() dd (k)) (ia)
b)

sgn(ib )
0

(5)

sgn(i, )

The following assumption of considering the average within a

network period of the matrix [KSGN- KT] instead of its instantaneous expression is made in order to simplify computations:
0 0 0

[K SG-1KT] 1([K SGN41KT]

Cosl

) To

a0

sin

cosqo sino

0O

a:

2
z

(6)

Where To is the network period,

(.)T

is the average value

within a network period of the term between brackets and y is the phase shift between each phase voltage and its corresponding current, assumed to be quasi-null.
III. NONLINEAR ADAPTIVE CONTROL DESIGN

iq(k+1) =iq(k)+

vq (k) - LaOid (k) -

d(k)

1744

In this paper, the same nonlinear adaptive control theory as in [8-9] is used. It consists of four main steps, detailed in the following subsections.
A. State Space Model Parameterization Considering the system parameters as unknown and timevarying, the state space representation of Eq. (1) can be rewritten in the following parameterized form:

Taking into consideration the estimation error and the model given in Eqs. (7), the new coordinates state model is given by:

Z4(k+1) KZ (k)+l+02Z2(k) -03X4(k)ul (k) +KA6

A A A A A A A

+A02Z2(k) -A03X4(k)ul
A

(k)j;
A A

Z2(k+1)

KZ2(k)+04- 02Z(k) -3X4(k)u2(k) +KA4 -A92Z2(k) -A6SX4(k)u2(k)2;

A A A A A A

XI (k+]) = XI (k) + 01 + 02 X2(k) - 03 X4(k) ul(k) (7.1) X2 (k+]) = X2 (k) + 04 - 02 Xl(k) - 03 X4(k) u2(k) (7.2) X3 (k+]) = X3 (k) - 05X3 (k) [XI (k) ul(k)+ X2 (k) U2(k)]/X4 (k) + 06XA(k) u3(k) + 08 X4(k) + 07X3(k) (7.3) X4 (k+]) = X4 (k) + 05 [XI (k) ul(k)+ X2 (k) U2(k)] - 06 X3 (k) XI (k) u3(k)AX4 (k) + 07 X4(k) + 08 X3 (7.4)
Where X = [X1, X2, X3, X4]T = [id, it 4Vo, Vo]T iS the state vector and u = [u1, u2, u3]T= [d'd,d'q,d'o] is the control inputs vector. The parameter vector 0 = [0 ,02, 03, 04, 05, 06, 07, 08]T is defined as: 01 = VdT/L; 02 = Zo Ts; 03 = TJ(2L); 04 = vqTs/L; 05 = 3T/(2CO); 06 = aT/CO; 07 = -Ts(Ro,h+RO,l)/(2CO Ro,h Ro,l); 08 = -Ts(Ro,h-ROjl)/(2CO Ro h Ro 1);
Initial conditions for those parameters are given in the appendix (A, Eq. (19)). Coordinates Transform and New State Model This second step consists on setting new coordinates and differentiating them until at least one input variable appears. During this procedure, the whole system should be decomposed into 3 subsystems, as the number of inputs in this case is equal to 3. From the converter state space model, it may be observed that the system is not square, i.e. the number of inputs and outputs are different. Moreover, the control inputs appear in all the state equations, i.e. in the first derivative of the state variables. This may be dealt with by deducing the control vector u from the three first state equations. In this case, the total relative degree is equal to 3, which is less than the system order, equal to 4. Zero dynamics relative to the variable (X4 = vo), rendered unobservable by this partial linearization should, therefore, be studied and vo may be controlled using simply a lead/lag discrete controller Hv (z). The reference current generation is based on power balance considerations. All these elements are reported in the appendix (B and C, Eqs (20-23)).
B.

A A A A A A A A Az-3 (k)A A Z3(k+1) rZ3(k)+06zl(k)ul(k)+07Z3(k) + 08 X4(k) -5 X jj zl(k)ul (k) + Z2(k)u2(k)j

rA06zl(k)ul (k) + 4Z (k) + AqX4(k) A05 X

-

Z(k)ul (k) +Z2(k)u2(k

(10) C. Linearizing Control Law Design In this step, the system should be linearized into a canonical form. The control vector should, therefore, be defined as:
ul(k)
A

63 X4(k)
-

FL- Z1(k) 6?1 -6?2 Z2(k) +vd(k )];

A A A A A

u2 (k)
A

03 X4(k)
6A

L - Z2(k) 64+ 02 Z2(k) + v2(k)];

A

AA

(1 1)

U3

(k )

L Z Z1(k) 242()+2 V(k)j 61

03 6X4 (k)

65 Z2(k) Z3 (k) 03 06 Z, (k) X 42 (k)

A A

A2() A+2Zk)v2k) Z 2 ( k) - 0 4 + 0 2 Z , ( k) + V2 (k)

6A
A

)A 06 Z, (k)

07 Z 3 (k)

608 X 4 (k)+ V3(k)

where vi are linear controllers, ensuring the tracking between the new coordinates Zi and their references Zi,ref as follows:
A A

v j (k) = -ai Z X (k) +

8iZi,ref (k);

i = {1, 2,3}

(12)

ai and /i are given in the appendix (E, Eqs. (27-28)).

D. Model Reference Adaptive Control Design: In general, the reference model to be tracked by the system is defined as:

Zref (k+1)= Aref Zref (k) + Bref r(k)

(13)

Based on the previous statement, the new coordinates Zi are defined as diffeomorphisms Ti of state variables and parameters estimates, i.e.:
A A

Where r is the vector of bounded input references. In order to satisfy stability for each subsystem, the symmetric definite positive matrix P should be chosen to satisfy the discrete Lyapunov equation:
A reP Aref_P + Q = 0 f

Z1 =Tj X},

(14)

X1, Z2 =

X2, Z3

Xi, y

X3

(8)

i=t{1...4}; j {1...8} Let us define the estimation error as:

Q being a definite positive matrix. Numerical expressions of Aref, Bref, P and Q are all given in the appendix (D, Eqs. (2425.b)).
E. Parameter Adaptation Scheme Design

AOi =0j

Oj;

j 11 ......
=

81 .

(9)

1745

The adaptation scheme should be designed to ensure the convergence of the tracking error between reference and current models, expressed as: (15) E(k) = Z(k) -Zref (k)

fo = 60 Hz fd = 2.04 kHz
CO = 470 gF Kri = 0.05 n-'

Vs= 110v VO = 500 V Ro n = 80 Q

L = 20 mH

Taking into account Eqs (10) and (13), the dynamics of the tracking error are such as:
E(k+1) ArejE(k)+W IAO(k)

KrAv = Krv = 5/500

(16)

which is the same as the augmented error expression given in [12]. A Lyapunov function candidate is:

V(E, JO) = ET P E+ ST Fjo

(17)

F is a symmetric definite positive constant matrix. The expressions of matrices W4 and F are both given in the appendix (D, Eqs. (25.c- 26)). Considering negative derivative of the Lyapunov function V(E, JO), The adaptation scheme is chosen as:
A

9(k + 1) = 9(k) + F-1WT PE

(18)

The whole control scheme is described by the block diagram shown in Fig. 1.

The DSP performs in a multitasking mode: a basic sampling time T, of 39 gs is used for PWM saw-tooth carriers and IGBT gate signals generation, whereas the sensed variables acquisition is performed at a slower sampling rate of four times T, The supply voltage is measured downstream an AC transformer and is, therefore, measured with a 0.032 transformation ratio. Its THD is about 8%. Note that all the following experiments were adjusted to fit with the current limit of Is<to 10 A, imposed by the initial rating of the power stage PCB. Fig. 2 exhibits the steady state waveforms of phase (a) voltage Va and current ia, the upper and lower output voltages Vo,h and v0,1, the harmonic spectrum of current ia, and the three-phase currents ia, ib and i, As depicted in Fig. 2. (a), the converter operates, at nominal power, with a unity displacement factor, high power factor estimated at 0.99, and a quite good sinewave shaping of the AC line current. Furthermore, upper and lower output voltages are symmetrical and equal to VO*/2, with relatively low ripples. Low harmonic content of AC current is also observed in Fig. 2. (b), with a fundamental component of nearly 99.8% of the overall current RMS value Is*. The current total harmonic distortion is evaluated to 7%. Referring to Fig. 2. (c), the mains currents ia, ib and i, are nearly sinusoidal and well balanced in magnitude and phase. Fig. 3 graphically represents the variations of AC current THD, power and displacement factors, respectively PF and DPF, with respect to load power.
Run Tekf-l-

mgd

TekStop

krtm

F-T
Te

v0

MF4.o0M Si, A[

C hf4_rl.SA

M[llO.OMS,: A[

Ch 4

1.30oA

(a)

'p:
a

(b)

Eq. (18)

Fig. 1: MRAC scheme block diagram

IV. EXPERIMENTAL RESULTS

IONJ | Xo Wlkfjf
......;....;....
at

The proposed control scheme is experimented on a 1.5 kW prototype of the Vienna rectifier, using the DS 1104 controller board driven by the RTW toolbox of Matlab/ Simulink. The experimental setup has the following specifications:

--------.M >4.....

i.

Ch'3F7U M. h

10O.0O A

ME

10 0

4 0 O -ri

amjf..f0

c..f

(c)

2 0 0 % i1

Af2Bl
5: 0

:4

20 07

Fig. 2: Steady state results, (a): AC current and voltage, partial DC voltages, (b): Ac current harmonic spectrum, (c): AC line currents

1746

1.2
A

-h-

IL

I-

0.8 0.6 0.4 0.2 0

other phases are adjusted in order to maintain the DC bus voltage at its required value. As shown in Fig. 5, the limitation of the circuit current to 10 A yields a 4% steady state error on the DC bus voltage. A 27% increase of voltage ripples is also observed. As a whole, the converter continues performing well despite the loss of supply in phase (a) voltage, as noticed in the zoomed waveforms views given in Fig. 5. (a) and Fig. 5. (b).
Tek

Stop

0.4

0.9 Load Power (kW)

1.4
1 ~ ~ ~ E 0 v0

i'

rai W:~~~~~~~~~~~~~

a :~~~~ :, .: ':

Fig. 3: variation of THD (+), PF (.)and DPF (A) with DC load power

Regarding robustness of the control law towards DC side disturbances, three step changes are applied to the lower side load Ro01 , which corresponds to three different power levels. Ro0, is first varied from 300 % to 100% of its nominal value Ro,n at 30% of the rated power. Then, from 200 % to 100% of Ro,n at 50% of nominal power and finally, from 100 % to 60% of Ro,n at full nominal power. The variations of current ia and split DC bus voltages are reported respectively in Fig. 4. (a), Fig. 4. (b) and Fig. 4. (c). As a whole, the converter response is very satisfactory in terms of reference tracking capabilities, steady state error compensation, stabilization times and overshoots.
TekPreVu_ _
TekPreVu

lgjan 2007

Tek P

1 4:03:43

vo,h, Vo,1
;

vo:h, IVol
I

Jm d j
V

X
1 to

~,

v| hf _
:....

Vaia
h. j.. _~
Chl

1.80 OmsE Ag ftx4 . . . . . . . . . . EMt40

v. .

(a)
M20mA

(b)

3A.:i,

Fig. 5: Results for phase (a) loss, (a): disconnexion, (b): reconnexion

Ch

V. ij

.....

i..
C

1.0oV

7id

ov

M20.Oms

Al

CM

r 300mA

Tek PrVu

(a)
Va

(b)

v h; v

Finally, the converter is subjected to a temporary 30% dip/ swell of the AC supply voltages during 4s, at nominal power. Fig. 6 and Fig. 7 respectively present the AC line currents and partial DC voltages waveforms during these two disturbances. In both cases, the overall DC voltage is maintained to 500 V and the AC currents remain balanced, with quasi-unity power factor operation in each phase.
Tek PreVu
Tek PreVu

. 1 1 Ah~I
Ch
.0V

v: o,h, V0,1 la a

X2m0

A dh4 r

.90A

16 Jan 2007 17:21:36

(C)

Fig. 4: Results for low-level load step change, (a): Ro1: 300 % -*100% Ro
at 30%

i1d

Pnom, (b): Ro1: 200 %

100%

60% Ron at 100% Pnom.

Ro,7,

at 50%

Pnom, (c): Ro1: 100 %

In the last shutter of experiments, utility disturbances are applied on the converter AC side for a complete evaluation of the system robustness. A total loss of supply phase (a) is first considered. As expected, no current flows through the disconnected phase (ia = 0), whereas, the currents in the two

I00V Chl

M2

Al

Ah4

1.80A

Chif

CpoV

(a)
Fig.
6: 30% AC
source

(b)
voltage dip, (a)
:

110V

Vs:

110

80V, (b)

1747

.'f\
,

19.

hl'

i1M40.#m Al

Ch4 f

1.80

tl- ig
!,f

...'.e

a:'.

i;

M20.Oms

Alf..4 I

1.SOA

Vs: 80

TekpreVu

Vo,h; VjV
1if g I
J.,
i...

D. Analytical and numerical expressions of the adaptive scheme parameters (Aref, Bref, P, Q, F, w):
-o
0
0

-.001

Aref =
I

O
0

- q

-aJ
0

O
!1

0 -.00 1 0
0 0

0'~
;
0

-.1
0

B ;,ef = O

"A

O O

0 O

(.999 0 0 0 .999 0

(24)

9O

t.
.i

(25.a-25.c)

Q= 0 1

;P = 0 1

.I
Chi
N1atElh

10
T
At Ih 1.8AA

.005'
X2T,
0
-

<10
-X3T Ul 0

.0051'
0
A

4 r=p(8.8);

0.5

0 0
A A

0 0

0 0

(26)

w(.)= o X1T, X3T, U2 T,

.0O

h;0
00A

50 .n

Mt20.OmsX .h f 1.80 A A. AAtC4 . .8 .......................... U[1 C ..... ;...-,""I121

M 2fl.A . M0....~--W .

4 -TsXU1+ X2 1U2
3

(a)

Math

F7iT K7

XIT, Ut3 X4T, X3T,

(b)

Fig. 7: + 30% AC source voltage swell, (a): Vs: 110 -* 140V, (b): Vs: 140 -* 110V

V. CONCLUSION

In this paper, a model reference nonlinear adaptive control, using both input-to-output linearization and Lyapunov-based adaptation scheme, is proposed for the three-phase/ switch/ level boost-type rectifier. The current and voltage stabilizing regulators are after that calculated to ensure tracking of the controlled variables with their references. The control technique is evaluated in real-time through experimental analysis and proves quite high efficiency in steady state and face to utility/load disturbances. These improvements are achieved without significant increase of the computational complexity. In future works, a solution for reducing the number of sensors in feedback loops will be proposed, by numerical reconstruction of the maximum possible of state variables. APPENDIX

Dq currents regulators: a, = a2 = .001; PI = 32 = .999; (27) DC voltages unbalance regulator: a3 = .1; 33 = .9; (28) = 9.5844; zv = .9446; (29) Voltage regulator: HV(z) Kv
=
,

E.

Stabilizing controllers expressions:

(z z, )

ACKNOWLEDGEMENTS

The authors gratefully thank the FCAR, NSERC and Canada Research Chair in Energy Conversion and Power Electronics for their financial support.
REFERENCES
[1] H. Ertl and J. W. Kolar, "A Constant Output Current Three-Phase Diode Bridge Rectifier Employing a Novel "Electronic Smoothing Inductor", IEEE trans. On Ind. Electronics, Vol. 52, No. 2, April 2005, pp. 454-461. [2] D. Alexa, A. Sirbu and D. M. Dobrea, "An Analysis of Three-Phase Rectifiers With Near-Sinusoidal Input Currents", IEEE trans. On Ind. Electronics, Vol. 51, No. 4, August 2004, pp. 884-891. [3] R. Teichmann, M. Malinowski and S. Bernet, "Evaluation of ThreeLevel Rectifiers for Low-Voltage Utility Applications", IEEE trans. On Ind. Electronics, Vol. 52, No. 2, April 2005, pp. 471-481. [4] K. Mino, G. Gong and J. W. Kolar, "Novel Hybrid 12-Pulse BoostType Rectifier with Controlled Output Voltage", IEEE trans. On Aerospace and Electronic Systems, Vol. 41, No. 3 July 2005, pp. 1008-1018. [5] J. R. Rodrigue, J. W. Dixon, J. R. Espinoza, J. Pontt and P. Lezana, "PWM Regenerative Rectifiers: State of the Art", IEEE trans. On Ind. Electronics, Vol. 52, No. 1, February 2005, pp. 5-22. G. M. Martins, J. A. Pomilio, S. Buso and G. Spiazzi, "Three-Phase [6] Low-Frequency Commutation Inverter for Renewable Energy Systems", IEEE trans. On Ind. Electronics, Vol. 53, No. 5, October 2006, pp. 1522-1528. H. Y. Kanaan, K. Al-Haddad and F. Fnaiech, "Modelling and [7] control of a three-phase/switch/level fixed-frequency PWM rectifier: statespace averaged model", IEE Proceedings - Electric Power Applications, Vol. 152, No. 03, May 2005, pp. 551-557. [8] A. Kaddouri, 0. Akhrif, and H. Le-Huy, "Adaptive nonlinear control for speed regulation of a permanent-magnet synchronous motor," in Proc.25th Annu. Conf IEEE Industrial Electronics Soc. (IECON'99), vol. 3,San Jose, CA, Nov./Dec. 1999, pp. 1079-1084. L. Yacoubi, K. Al-Haddad, L. -A. Dessaint and F. Fnaiech, "A [9] DSP-Based Implementation of a Nonlinear Model Reference Adaptive Control for a Three-Phase Three-Level NPC Boost Rectifier Prototype", IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 20, NO. 5, SEPTEMBER 2005, pp. 1084-1092. J. -J. E. Slotine and W. Li, Applied Nonlinear Control. Englewood [10] Cliffs, NJ: Prentice-Hall, 1991. M. Krstic, I. Kanellakopoulos, and P. V. Kokotovic, "Adaptive [11] nonlinear control without overparametrization," Syst. Contr. Lett., vol. 19, pp. 177-185, Sep. 1992. S. Sastry and M. Bodson, Adaptive Control Stability, Convergence [12] and Robustness. Englewood Cliffs, NJ: Prentice-Hall, 1991, ch. III.

01(0) = 1.17; 02(0) =.0588; 03 (0) = .0039; 04 (0) =0; 05 (0) =.4979; 06 (0) = .2124; 07 (0) = -.0041; 08 (0) = 0; (19)
The system's zero dynamics correspond to the dynamics describing the internal behavior of the system when input and initial condition are chosen to zero the output. According to Eq. (ld), it is written as:
V

A.

Initial conditions for parameters:

B.

Internal dynamics asymptotic stability:

(k+1) =vo(k)[

2COKRoh

R12]
+ R1

(20)

which is asymptotically stable for [-Ts C1

L2CO tRo,h

]l -

Ro',l

C.

Currents generation scheme C VCv (k)u, (k) + vo (k)(io,h (k) + iol (k)) I8 (k)
3X; v (k)2v(k)

(21)
(22)

id(k) = a

S (k) |V d (k) + Vqd(k)

I*

iq (k) = X2

UV being the control signal delivered by the total DC voltage controller HV(z), given later in Eq. (29).

CVd (k)

vq(k)

vq (k)

(3

1748