6.

012 - Electronic Devices and Circuits

Lecture 17 - Linear Amplifier Basics - Outline Announcements

Handouts - Lecture Outline and Summary Web posting - Expanded Lecture 16 foil set Exam 2 - Wednesday night, November 5, Room 10-250

Review - CMOS inverters

Noise Margins: when {dvOUT/dvIN| > 1, disturbance grows Gate delay: often defined as average, i.e. (tLO-HI + tHI-LO)/2 (We leave the 2 out) Power density: PD = Pave@fmax/Area (Maximum power density is what matters)
Using Pave = f CLVDD2, and noting fmax 1/GD, and Area WnLmin): PD me eox VDD(VDD - VT)2/tox Lmin2 (Must reduce dimensions and voltage - Lec 25)

Biasing transistors
Current source biasing Transistors as current sources Current mirror current sources and sinks

Linear amplifiers
Performance metrics: gains (voltage, current, power)
input and output resistances power dissipation bandwidth (We'll save this for later - Lec. 22)
Clif Fonstad, 10/03

Possible amplifier connections of transistors

Lecture 17 - Slide 1

 Linear equivalent circuits:

pn diodes:
gd b a Cd

gd = q|ID|/kT Cd = gdtd + Cdpl(VAB)

BJTs: (in FAR)

b gp e
g

Cm Cp gmv p go

+ vp -

e
Cgd
(in saturation)

gm = q|IC|/kT gp = gm/bF go = |IC/VA| [or l |IC|] Cp = gmtb + Cdpl,be(VBE) [tb = wB2/2De] Cm = Cdpl,bc(VBC) gm = K(VGS - VT) = (2K|ID|)1/2 gmb = hgm [h = {eSiqNA/2(|2fp| - VBS)}1/2/Cox*] go = |ID/VA| [or l |ID|] Cgs = (2/3) WL Cox* Cgd: G-D fringing and overlap capacitance, all parasitic Csb, Cgb, Cdb: depletion capacitances
Lecture 17 - Slide 2

MOSFETs:
+ v gs sv bs b+

Cgs

gmv gs

gmb v bs Cdb

d + v go ds -s

Csb

Cgb

Clif Fonstad, 10/03

 Identifying the incremental parameters in the characteristics

BJT:
IC iC ln iB, ln iC IC iC

Q
b

iB

b Q

go

Inc. i B

vCE

vCE

gm = qIC/kT; gp = bgm with b = diC/diB|Q; go = diC/dvCE|Q MOSFET:

iD (iD)1/2 Inc. |v BS |

gm Q go
Inc. v GS vDS

VT

vGS = vDS

gm = diD/dvGS|Q; gmb = hgm with h = -dVT/dvBS|Q; go = diD/dvDS|Q

Clif Fonstad, 10/03 Lecture 17 - Slide 3

 BJTs and MOSFETs biased for linear amplifier applications

+V +V IBIAS +V +V IBIAS

IBIAS -V -V -V

IBIAS -V

npn
Clif Fonstad, 10/03

pnp

n-MOS

p-MOS
Lecture 17 - Slide 4

 Getting IBIAS: Making a transistor into a current source/sink*

ISINK V REF + V REF + V REF npn pnp

ISINK n-MOS

V REF

ISOURCE

ISOURCE
p-MOS

BJT current sources/sinks

Must maintain VCE > 0.2V [VEC in case of pnp] ISOURCE/SINK = [bF/(bF+1)] IES(eqVREF/kT-1) IESeqVREF/kT
Clif Fonstad, 10/03

MOSFET current sources/sinks

Must maintain VDS > (VREF - VT) [VSD > (VREF + VT) in case of p-MOS] ISOURCE/SINK = K(VREF - |VT|)2/2

* Some people make a distinction between a "sink" and a "source"; you can call them all "sources" if you wish.

Lecture 17 - Slide 5

 Current mirror sources and sinks

V+

BJT mirrors
Q1 Q2 ISOURCE RREF
ISOURCERREF = (AQ2/AQ1)(V+ - V- - 0.6)

V+ RREF
ISINKRREF = (AQ2/AQ1)(V+ - V- - 0.6)

ISINK Q1 Q2

V-

NOTE: Base currents have not been accounted for in these expressions

VV+
ISINKRREF = (KQ2/KQ1)[V+ - V- - VT - (2ISINK/KQ1)1/2]

V+

MOSFET mirrors
Q2 ISOURCE

RREF

Q1

ISINK Q1 Q2

RREF

ISOURCERREF = (KQ2/KQ1)[V+ - V- - VT - (2ISOURCE/KQ1)1/2]

V-

Clif Fonstad, 10/03

V-

Lecture 17 - Slide 6

 Examples of current mirror biased BJT circuits:

V+
+V

V+

RREF

IC Q1

RREF

IC Q1

IBIAS -V
Above: Concept Right: Implementations

Q2

Q3

Q2

Q3

V-

BJT Mirror
IC (AQ3/AQ2) IREF
Clif Fonstad, 10/03

MOSFET Mirror
IC (KQ3/KQ2) IREF
Lecture 17 - Slide 7

V-

 Resistor biasing: An older biasing techniques used in discrete

circuits where transistors are expensive.

V+

Resistor biasing
IC [(V+-V-)RB2/(RB1+RB2) - 0.6]/RE You might call this "poor man's current source biasing" because it uses three resistors and only one transistor. The resistor, RE, with a constant voltage, (V+-V-)RB2/(RB1+RB2) - 0.6V, across it looks like a current source of magnitude: [(V+-V-)RB2/(RB1+RB2) - 0.6V]/RE.
Clif Fonstad, 10/03

RB1 IC Q1

RB2

RE

V-

Lecture 17 - Slide 8

 Final comments on current sources:

What do they look like incrementally?

They look like a resistor with conductance go

For example, consider an n-MOS sink: g ISINK + gmb v bs v gs = 0 gmv gs =0 =0 s+ v bs = 0 V REF b+
V+ RREF

d go s

d go s, b, g

ISINK

How do you do better? The Wilson connection:

check it out for yourself

Q1

Q2

Q3

Q4

Clif Fonstad, 10/03

V-

Lecture 17 - Slide 9

 Linear amplifier performance metrics:

The characteristics of linear amplifiers that we use to compare different amplifier designs, and to judge their performance and suitability for a given application are given below:
iin + vin iout

Linear Amplifier

+ vout -

Rest of circuit

Voltage gain, Av = vout/vin Current gain, Ai = iout/iin Power gain, Apower = Pout/Pin = voutiout /viniin = AvAi Input resistance, rin = vin/iin
itest

Linear Amplifier

+ vtest -

Clif Fonstad, 10/03

Output resistance, rout = vtest/itest with vin = 0 DC Power dissipation, PDC = (V+ - V-)(SIBIAS's)

Lecture 17 - Slide 10

 Three BJT single-transistor amplifiers

V+ V+ V+

+ vin IBIAS

CO + vout CE VCOMMON EMITTER Input: base Output: collector Common: emitter

CO vout CI + vIN +

+ vin IBIAS V-

CO + vout -

IBIAS V-

EMITTER FOLLOWER Input: base Output: emitter Common: collector

COMMON BASE Input: emitter Output: collector Common: base

+ vin Lecture 17 - Slide 11

+ + vin vout Clif Fonstad, 10/03

+ vin -

+ vout -

+ vout -

 Three MOSFET single-transistor amplifiers

V+ V+ V+

+ vin -

CO + vout IBIAS CE VCOMMON SOURCE Input: gate Output: drain Common: source Substrate: to source

CO + vout CI + vIN -

+ vin IBIAS V-

CO + vout -

IBIAS V-

COMMON GATE Input: source; Output: drain Common: gate; Substrate: to ground

SOURCE FOLLOWER Input: gate Output: source Common: drain Substrate: to source

+ + vin + vout Lecture 17 - Slide 12

+ + vin vout Clif Fonstad, 10/03

vin

+ vout -

 Single-transistor amplifiers with feedback

V+

V+

+ vin IBIAS

CO + vout RF CE

RF + vin -

CO + vout CE V-

IBIAS

also termed "emitter degeneration"

Parallel feedback
+

V-

Series feedback
RF + + vin vout Lecture 17 - Slide 13

+ vin Clif Fonstad, 10/03

vout RF -

6.012 - Electronic Devices and Circuits

Lecture 17 - Linear Amplifier Basics - Summary Biasing transistors

Current source biasing: a current source is used to establish a stable bias pt.
large signals models are used in this analysis Transistors as current sources: great as long as in saturation or FAR Current mirror current sources and sinks: it takes one to know one

Linear amplifiers
Performance metrics: gains (voltage, current, power)
Av = vout/vin, Ai = iout/iin, Apower = voutiout /viniin input and output resistances rin = vin/iin, rout = vtest/itest with vin = 0 dc power dissipation: (V+ - V-)(SIBIAS's) bandwidth (We'll save this for later - Lec. 22)

Possible amplifier connections of transistors: Simple stages: Common emitter, common source
Common base, common gate Emitter follower, Source follower

Stages with feedback: Parallel (Degeneracy in emitter/source)

Series
Clif Fonstad, 10/03 Lecture 17 - Slide 14