DIGITAL ELECTRONICS (EE008-3-2)

INDIVIDUAL ASSIGNMENT

CAR PARK DIGITAL CONTOLLER CIRCUIT FOR 99 CAR PARKING SLOTS

MECHATRONIC ENGINEERING

CONTENTS

1. SCREEN SHOTS OF MY COUNTER MADE ON MULTISIM 2. TRANSITION STATE DIAGRAMS UP AND DOWN 3. TRANSITION TABLE 4. TRUTH TABLE FOR UP AND DOWN COUNTER 5. K-MAPS FOR THE FLIP-FLOPS USED 6. SCREEN SHOT OF THE FLIP-FLOPS 7. TRUTH TABLE FOR BCD TO 7 SEGMENT DISPLAY DECODER 8. K-MAP FOR THE DIFFERENT SEGMENTS 9. SCREEN SHOT OF THE DECODER IN USE 10.TABLE FOR ACTIVATION OF 7 SEG TO SHOW FULL 11.SCREEN SHOT WHEN FULL BEING DISPLAYED 12.BRIEF EXPLAINATION OF THE THEORY 13.DESIGN OF CASCADED COUNTER USED IN PRACTICAL 14.EXPLAINATION WHAT HAS BEEN DONE IN PRACTICAL 15.PICTURES OF THE ACTUAL MODEL OF THE SYSTEM

Above we have the circuit designed to count from 00 to 99 or from 99 to 00, when car enters and when car leaves respectively. The car park is full when the counter shows 00. In above 3 figures we have, a) When counter shows 00 it means all car slots are occupied and the output as FULL is shown. b) When counter shows 98 it means 98 car slots are free. c) When counter shows 21 it means 21 car slots are free. 1. State Diagram when counting up

0000 1000 0001

0111

0010

0110

0011

0101 0100

0100

2. State Diagram when counting down

0000 0001 1001

0010

1000

0011

0111

0100

0110

0101

Output Transitions First state Qn 0 0 1 1 Next state Qn+1 0 1 0 1 Flip-Flop input state (short) Jk 0 1 1 0

Above is the flip-flop transition table when output goes from one state to another.its given for when Jk are shorted or connected together.

Present State Decimal No. 0 1 2 3 4 5 6 7 8 9 10 Q3 0 0 0 0 0 0 0 0 1 1 R Q2 0 0 0 0 1 1 1 1 0 0 R Q1 0 0 1 1 0 0 1 1 0 0 R Q0 0 1 0 1 0 1 0 1 0 1 R

Next State ( UP ) Q3 0 0 0 0 0 0 0 1 1 0 R Q2 0 0 0 1 1 1 1 0 0 0 R Q1 0 1 1 0 0 1 1 0 0 0 R Q0 1 0 1 0 1 0 1 0 1 0 R

JK3

JK2

JK1

JK0

0 0 0 0 0 0 0 1 0 1

0 0 0 1 0 0 0 1 0 0

0 1 0 1 0 1 0 1 0 0

1 1 1 1 1 1 1 1 1 1

Present State Decimal No. 0 1 2 3 4 5 6 7 8 9 10 Q3 0 1 1 0 0 0 0 0 0 0 R Q2 0 0 0 1 1 1 1 0 0 0 R Q1 0 0 0 1 1 0 0 1 1 0 R Q0 0 1 0 1 0 1 0 1 0 1 R

Next State ( DOWN ) Q3 1 1 0 0 0 0 0 0 0 0 R Q2 0 0 1 1 1 1 0 0 0 0 R Q1 0 0 1 1 0 0 1 1 0 0 R Q0 1 0 1 0 1 0 1 0 1 0 R

JK3

JK2

JK1

JK0

1 0 1 0 0 0 0 0 0 0

0 0 1 0 0 0 1 0 0 0

0 0 1 0 1 0 1 0 1 0

1 1 1 1 1 1 1 1 1 1

R Recycle..After nine counter goes to zero

Above is the Truth Table for the up\down counter when the car is leaving or entering

Q1Q0 Q3Q2
00 01 11 00 1 1 X 01 1 1 X 11 1 1 X 10 1 1 X

10

Down ( 1 )

Q1Q0 Q3Q2
00 01 11 00 1 1 X 01 1 1 X 11 1 1 X 10 1 1 X

10

Up ( 1 )

Jo = Ko = 1

[Final equation]

THESE ARE THE KARNAUGH MAPS OF UP AND DOWN STATE FOR J0 & K0

Q1Q0 Q3Q2
00 01 11 00 0 1 X 01 0 0 X 11 0 0 X 10 1 1 X

10

Down ( Q1 Q0/

+ Q3 Q0/

+ Q2 Q0/ )

Q1Q0 Q3Q2
00 01 11 00 0 0 X 01 1 1 X 11 1 1 X 10 0 0 X

10

Up (Q3/Q0)

J1 = K1 = ( Q1 Q0/ + Q3 Q0/

+ Q2 Q0/ ).down + (Q3/ Q0).up

[Final logical equation]

THESE ARE THE KARNAUGH MAPS OF UP AND DOWN STATE FOR J1 & K1

Q1Q0 Q3Q2
00 01 11 00 0 1 X 01 0 0 X 11 0 0 X 10 0 0 X

10

Down (Q2 Q1/ Q0/

Q3 Q0/)

Q1Q0 Q3Q2
00 01 11 00 0 0 X 01 0 0 X 11 1 1 X 10 0 0 X

10

Up (Q1 Q0) J2 = K2 = (Q2 Q1/ Q0/ + Q3 Q0/).down + (Q1 Q0).up [Final logical equation]

THESE ARE THE KARNAUGH MAPS OF UP AND DOWN STATE FOR J2 & K2

Q1Q0 Q3Q2
00 01 11 00 1 0 X 01 0 0 X 11 0 0 X 10 0 0 X

10

Down ( Q2/ Q1/ Q0/ )

Q1Q0 Q3Q2
00 01 11 00 0 0 X 01 0 0 X 11 0 1 X 10 0 0 X

10

Up ( Q3 Q0 J3 = K3 = ( Q2/ Q1/ Q0/ ).down +

Q2 Q1 Q0) [Final logical equation]

(Q3 Q0 + Q2 Q1 Q0).up

THESE ARE THE KARNAUGH MAPS OF UP AND DOWN STATE FOR J3 & K3

Here is a screenshot of the 2*4 Jk FLIP-FLOPS which form 2 Bcd counter to count upto 99.

Dec. No. 0 1 2 3 4 5 6 7 8 9

Q3 0 0 0 0 0 0 0 0 1 1

Q2 0 0 0 0 1 1 1 1 0 0

Q1 0 0 1 1 0 0 1 1 0 0

Q0 0 1 0 1 0 1 0 1 0 1

A 1 0 1 1 0 1 1 1 1 1

B 1 1 1 1 1 0 0 1 1 1

C 1 1 0 1 1 1 1 1 1 1

D 1 0 1 1 0 1 1 0 1 1

E 1 0 1 0 0 0 1 0 1 0

F 1 0 0 0 1 1 1 0 1 1

G 0 0 1 1 1 1 1 0 1 1

Truth Table for BCD to 7-segment display decoding

F GGG

B G

This is how a 7-Segment display looks like

Now we have the logical equation of each segment to be activated below -

Q1Q0 Q3Q2
00 01 11 00 1 0 X 01 0 1 X 11 1 1 X 10 1 1 X

10

A = ( Q2/ Q0/ ) +

( Q2 Q0 ) +

(Q1) +

(Q3)

[final logical equation]

Q1Q0 Q3Q2
00 01 11 00 1 1 X 01 1 0 X 11 1 1 X 10 1 0 X

10

B = ( Q2/ )

+ { (Q1 Q0)

(Q1/ Q0/) }

[final logical equation]

Q1Q0 Q3Q2
00 01 11 00 1 1 X 01 1 1 X 11 1 1 X 10 0 1 X

10

C = ( Q1/

Q2

+ QO)

[final logical equation]

Q1Q0 Q3Q2
00 01 11 00 1 0 X 01 0 1 X 11 1 0 X 10 1 1 X

10

1
+

X
( Q2/ Q1 )

X
+ (Q2/ Q0/) + (Q3) + (Q2 Q1/ Q0)

D = ( Q1 QO/ )

[final logical equation]

Q1Q0 Q3Q2
00 01 11 00 1 0 X 01 0 0 X 11 0 0 X 10 1 1 X

10

E = ( Q1 QO/ )

(Q2/ QO/ )

[final logical equation]

Q1Q0 Q3Q2
00 01 11 00 1 1 X 01 0 1 X 11 0 0 X 10 0 1 X

10

F = ( Q3 ) +

( Q1/ QO/ )

( Q2 Q0/)

(Q2 Q1/)

[final logical equation]

Q1Q0 Q3Q2
00 01 11 00 0 1 X 01 0 1 X 11 1 0 X 10 1 1 X

10

G = ( Q3 )

(Q2 Q1/ )

( Q1 Q0/ )

(Q2/ Q1)

[final logical equation]

Here is the decoders screen shot which are responsible to display the result of the counters after the car enters or leave.

To display Full in 7 segment display we activate the following portions

F U L L

A 1 0 0 0

B 0 1 0 0

C 0 1 0 0

D 0 1 1 1

E 1 1 1 1

F 1 1 1 1

G 1 0 0 0

Here is the screenshot of 7 segment displays which shows FULL when output from both the counter shows 00.

Now I will explain what is actually happening in the circuit. Using 8 synchronous Jk flip-flops (7473N) we form 2 BCD counter. Each able to count till 16 but we need just to count upto 9. So we cascade the 2 BCD counters together by which they will be able to count from 00 to 99.We use synchronous Jk flip-flops so that the output changes together at single clock pulse not separately. So for Jk flip-flops to be synchronous we have commom clock pulse to the clock input of all the flip-flops forming a counter. The first counter is LSB counter and the second one is the MSB counter. We have shorted J and k because to make the up down counter they should be in toggle or no change state.

In the circuit when we press UP it means car is leaving hence the number display increases from 31 to 32.UP represents the exit sensor. When we press DOWN it means the car enters hence the number display decreases if it was 32 it becomes 31.DOWN represent the entery sensor.

From the logical expressions of JK0 , JK1 ,JK2 AND JK3 found above we design the inputs of the respective flip-flops. Then we NOR the output of UP and DOWN switch together to form the input for the CLOCK of LSB counter. Till here we have build a flip-flop which can count upto 9 n back.

But now we need to count ahead so we cascade the 2 counters. We take all the NOT outputs from each flip-flop (LSB) which we AND together. Which is when Q0 ,Q1 ,Q2 and Q3 are 0 the NOT outputs will be 1.Similarly we And the Q0 and Q3 output. Which means when the counter reaches 9 the output at the respective output will be 1.Now we AND the output of NOT ANDS with the down switch of the MSB counter, we also AND the outputs from the AND of Q0 and Q3 to the up switch of the MSB counter. Then we OR the outputs from 1 of each 2 AND gates and give it as the input to the CLOCK of MSB counter. So it means counter will go from 0 to 9 and 9 to 0 respectively when cascaded. E. g from 19 to 20 and 20-19.

Now from the logical expressions found out for the BCD to 7 SEGMENT DISPLAY decoder we construct the circuit for the decoder. Which activates set of segments in the 7 segment display according to the input from the counters.

To display FULL when the 2-7 segment displays from the counter are showing 0 each, we AND the NOTS of each Flip-Flop on both sides. So using 2-4 AND gates. After ANDING the inputs

from both sides we AND the outputs of the previous 2 AND gates and give their output (SHORTED) to the 4-7 segment displays. Which display FULL when connected to the right segments.

Now PRACTICALLY showing how is the circuit connected and its working.

This is the basic representation how are the 2-4510 BCD counter connected practically on the bread board.

I have connected the 2- resets to 2 separate switches

2- up/down to 2 separate switches

And for the clock I have connected it to pulse switch

The outputs of the 2 counters are connected to the display input ports

If you have done till here you can count up and down using the counter . But this is just half our task done. We even need to display FULL using 4-7 SEGMENT DISPLAYS on the bread board for that we need 2-HD74LS04p IC chips which work as INVERTOR having NOT gates in them. The outputs from the 2 BCD counters are connected to the 2 IC chips so as to get the inverted outputs which can be A/ B/ C/ D/ for a counter similarly for the other.

Now we need to AND the 4 outputs from the IC chip HD74LS04p (1) and, AND 4 outputs from the IC chip HD74LS04p (2).For doing this we use the 2-HD74LS08 IC chips which work as AND gates.

The outputs from HD74LS04p IC chips are connected into the 2-HD74LS08 IC chips respectively. The outputs from 2-HD74LS08 IC chips are again AND together. There would only be 2 outputs which are AND together again.

The final output is used as power driving source for the 7-segment displays when the counter reaches 00. The final output is connected in series with 51ohm resistance which is then connected to the pins, which need to be activated except pin 9 which is ground, of the 7segment displays so that high value voltage does not cause the display to burn out. Similarly all the 4-7 segment displays are shorted together to cause it to light up when counter output display shows 00.

HD74LS04p

HD74LS08

7-segment display

Ground

Here are some pictures of my actual model:

References

1. www.doctronics.co.uk 2. www.allaboutcircuits.com 3. Digital Fundamentals by Floyd