Altera Digital Logic Lab Exercises

Introduction
This document presents a set of ten laboratory exercises for use on the Altera DE2 Development and Education board. These exercises are intended for use in a rst course on Digital Logic Design, which is included as part of the curriculum in most Computer Engineering, Electrical Engineering, and Computer Science programs. Circuits are designed for implementation on the DE2 board by using Alteras state-of-the-art Quartus II CAD system. To teach students how to use this software, which is provided at no charge for educational use, we have developed a set of step-by-step tutorials that are available in the Educational Materials section of Alteras University Program web site. There is a tutorial that introduces the use of the DE2 board, and a set of tutorials that show how to develop circuits with the Quartus II software by using Verilog HDL as the design entry method. Students should work through these tutorials as a preparation for the lab exercises. There is also a basic tutorial on using schematic capture in the Quartus II software. Although we do not provide a version of the lab exercises that use schematic capture, a course Instructor could easily adapt the material for this purpose if desired. Overview of Lab Exercises The ten exercises begin with fundamental concepts and perform simple operations on the DE2 board, like using switches and controlling LEDs and 7-segment displays. These exercises assume that students are just beginning to learn about digital logic concepts, and require solutions that use simple logic expressions. Subsequent exercises progress to more advanced topics such as arithmetic circuits, ip-ops, counters, state machines, memory devices, data paths, and simple processors. Instructors of courses may choose to adopt the entire sequence of exercises, only selected exercises, or just parts of some exercises. We have tried to make the material as modular as possible so that instructors can combine these exercises with their own teaching material. Each exercise consists of multiple parts. In most cases the solution required for the early parts can be reused in a modular fashion for later parts. Also, the solutions produced for early exercises are often reusable for parts of more advanced exercises. Our basic approach is to encourage students to develop their circuits in small increments and to build larger circuits in a modular, hierarchical fashion. As an aid for the Instructor, this document provides complete solutions in Verilog code for all ten lab exercises. Obtaining the Source Code Files To make it easier for Instructors to modify the lab exercises as needed, we provide the original source les that were used to create this PDF document. The lab exercises are written in ASCII text les that include formatting information for the LaTex word processing system. Instructors who are not familiar with LaTex may choose to import the text into some other word processing system of their choice. The gures used in the exercises were created using Adobe FrameMaker. They are provided to course Instructors in both the FrameMaker format as well as in Adobe PDF format, which can be edited using programs other than FrameMaker. We also provide the Verilog source les for all of the suggested solutions, and the Quartus II project les that are needed to compile the code for implementation on the DE2 board. To obtain the source les for both the lab exercises and solutions, go to the Educational Materials section of Alteras University Program web site at www.altera.com. You will nd instructions for obtaining this information, which is protected from access by students. Please do not freely distribute the suggested solutions on the Internet, and protect this material as you would other similar educational materials that are assigned by Instructors to students as a part of their course grade.

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