Digilent XC2-XL System Board Reference Manual

Revision: May 11, 2004

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Overview The Digilent XC2-XL is self-contained circuit development platform that contains a Xilinx CoolRunner-II XC2C256 CPLD and a Xilinx XC9572XL CPLD. The XC2-XL is an ideal platform for CPLD-based circuit design using the latest Xilinx CAD tools. It provides a JTAG programming circuit, power supplies, a clock source, and basic I/O devices, so that circuits can be implemented immediately without the need for any other components. All CPLD signals are brought to expansion connectors, allowing accessory circuits to be constructed in the on-board prototype area, or attached via an expansion board. The XC2-XL is compatible with all versions of Xilinx CAD tools, including the free WebPack tools available at the Xilinx website. XC2-XL features include: A Xilinx CoolRunner-II XC2C256 CPLD in a TQ144 package; A Xilinx XC9572XL CPLD in a VQ44 package; JTAG ports to both CPLDs that can be independently enabled or disabled; Flexible power delivery using a wall-plug transformer, batteries, or external supplies; A socketed oscillator (1.8432MHz included; clocks up to 100+MHz can be used); Full routing of all I/O signals from both CPLDs to expansion connectors; A button and two LEDs for basic I/O; Non-volatility as with all Xilinx CPLDs, designs remain after power is removed.
JTAG port Pushbutton Clock Power supplies & jumpers

CoolRunner-II XC2C256 TQ144

XC9572XL VQ44

LED

Expansion A Expansion B Expansion C

Expansion D LED

Figure 1. XC2-XL circuit board block diagram

Functional Description The XC2-XL provides a minimal system that can be used to rapidly implement CPLD-based circuits, and to gain exposure to Xilinx CAD tools and CPLD-oriented design methods. The XC2-XL provides only the essential circuits needed to support the CPLDs, including power supplies, a clock source, and basic I/O (a pushbutton and two LEDs). All available I/O signals are routed to expansion connectors that mate with 40-pin, 100 mil spaced DIP headers available from several distributors. The on-board power supplies and clock source can easily be disconnected from the CPLDs so that external power and clock signals can be used. Power supply design and decoupling follow recommended design practices, so the XC2-XL has stable, low noise supplies regardless of the power source used. CPLD programming is accomplished via a 6pin, 3.3V JTAG programming header that is
6 pages Doc: 500-028

Several expansion boards containing a variety of I/O devices are available for the XC2-XL. These fully assembled and tested boards can be used to quickly and easily enhance the features of the XC2-XL. See the Digilent website at www.digilentinc.com/xc2xl for more information.

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compatible with a variety of cables, including the JTAG3 cable from Digilent, the Parallel-3 or 4 cables from Xilinx, as well as cables from other vendors. The XC2-XL measures 5.25 x 5.25, and it contains an 18-hole x 46-hole wire wrap area. The wire-wrap area can accommodate a selfadhesive solderless breadboard, allowing flexibility in accessory circuit construction. Both CPLDs on the XC2-XL board are loaded with a sample configuration during board test. This basic configuration flashes the on-board LEDs at different rates that are selectable using the on-board button. This configuration, which can be downloaded from the Digilent or Xilinx websites, serves as a quick board check as well as a basic reference design. Power Supplies The CoolRunner-II requires three power supplies (VCORE, VIO1, and VIO2), so the XC2-XL has three separate circuits for power delivery. The VCORE and VIO1 supplies are routed only to the CoolRunner 2, and they are set to 1.8V and 3.3V respectively. VIO2 is routed to both CPLDs, and it is also set to 3.3V. VCORE is generated from a 1.8V LM1117 LDO regulator that can supply up to 800mA of current. Jumper block JP3 allows VCORE to be disconnected from the on-board regulator so that it can be brought in from an external supply. VIO1 and VIO2 both arise from the same
2.8V to 3.6V

3.3V LM317 regulator that can supply up to 1.5A of current. Jumper-blocks JP2 and JP4 can disconnect VIO1 and VIO2 from the on-board regulators so that external I/O supplies can be used. Jumper block JP1 selects whether VIO is supplied from the 3.3V regulator, or from a source connected to J2. Regardless of the JP1 setting, the VCORE regulator is used to generate the 1.8V supply. Jumper blocks JP2, JP3, and JP4 select whether VIO1, VCORE, and VIO2 are supplied from on-board or external supplies. The figure below shows the power supply routing and typical jumper settings. Power can be supplied to the XC2-XL using any one of three modes. Wall-plug mode supplies power from any 5VCD-9VDC wallplug-transformer supply connected to the power jack (J9) on the XC2-XL. The supply must source at least 250mA of current, and it must use a center-positive, 2.1mm ID/5.5mm OD connector. Battery mode supplies power from a battery pack (or other DC source) connected to the J2 header on the XC2-XL. The batteries must output between 2.8V and 3.6V. External mode uses the J8 header to bring regulated supplies from any external source. In the wall-plug mode, the VCORE and VIO regulators are used, so there is little chance of damaging the CPLDs by using incorrect supply voltages (both regulators can handle up to 18VDC). In battery mode, the VCORE regulator is used, but the supplied
Bat Vreg Bat Vreg
JP1

JP1 VCORE
1.8V Regulator

Bat Vreg
JP1

J2
2-pin header (battery connector)

JP3 V CORE JP2 V IO2 JP4

Battery mode

JP1

IC5 VIO
3.3V

Ext

Vreg JP2 JP3 JP4

Ext

Vreg JP2 JP3 JP4

Ext

Vreg JP2 JP3 JP4

J9
Power jack (wall transformer)

Regulator

IC4

VIO2 VCORE VIO1 J8

4-pin header (external supplies)

Wall-plug mode = jumper shorting block

External mode

V IO1

Figure 2. Power supply routing Page

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voltage directly drives the VIO connections, so care must be taken to ensure no more than 3.8V is applied. In external mode, no regulators are used, so care must be taken to ensure CPLD voltage requirements are met. CPLD Configuration The CPLDs on the XC2-XL are connected in a JTAG scan chain as shown in the figure below. Either device can be removed from the chain by setting jumper blocks P5, JP6, JP9, and JP10 appropriately. The scan chain originates from a 6-pin header connector that is compatible with the JTAG3 cable from Digilent, and the P-3 and P-4 cables from Xilinx.

The XC2-XL uses a half-size 8-pin DIP oscillator in an 8-pin socket. The board ships with a 1.842MHz oscillator, but oscillators from 32KHz to 100MHz can be used. The oscillator is connected to the GCK2 input on both CPLDs.
XC2C256 P38 IC2 JP8 JP7 OSC1

XC9572XL P1 IC1

IC1

IC2

Figure 4. Clock signals

Vdd

TMS XC2C256 JTAG connector TMS TDI TDO TCK GND VDD J1 JP9 TDI TCK JP5 TDO
IC1

Note: The IC1 and IC2 legends are incorrect on the circuit board silkscreen; they are correct in the figure above.
TDO
IC2

JP10 TDI TCK

Pushbutton and LEDs A pushbutton and two LEDs provide basic I/O functions on the XC2-XL. The LED can be illuminated to verify that configuration was successful, or flashed at a given rate to indicate a particular status. The pushbutton can be used to provide a basic reset function, or to select an operating mode. The pushbutton drives the GSR input on both CPLDs, and the LED is driven from a general I/O pin.
Vdd

JP6 TMS XC9572XL

JP5/JP10

JP5/JP10

JP5/JP10

JP5/JP10

JP6/JP9

JP6/JP9

JP6/JP9

JP6/JP9

4.7K 4.7K LD3 390

P143 XC2C256 P92 IC2

Pin 1

Both ICs

IC2 only

IC1 only

Invalid

4.7K Push button

P33 XC9572XL

= jumper shorting block

LD2

390 P44 IC1

Figure 3. JTAG signal routing

Oscillator

Figure 5. Pushbutton and LEDs

Expansion Connectors
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Four expansion connectors have been provided to allow XC2 designs to be expanded on the included prototype area, or by attaching peripheral boards. The connectors use 2 x 20, 100-mil spaced right-angle sockets so that standard headers can be used on peripheral boards. Several Digilent expansion boards can be used with the XC2-XL, including solderless breadboards, wire-wrap boards, and analog and digital I/O boards. See Digilents website at www.digilentinc.com/xc2xl for more information on available expansion boards. All available signals are routed from the two CPLDs to the connectors as shown in the figure below. VCC (3.3V regulated), VU (depends on power supply used), and GND are also routed to the connector so that attached devices can draw power from the XC2-XL board. If the 3.3V regulated supply is used, no more than 1.5A should be drawn. Table 1 below shows XC2-XL expansion connector pinouts.

The XC2-XL contains a Xilinx XC2C256 CoolRunner II CPLD in a TQ144 package, and an XC9572 CPLD in a VQ44 package. Both CPLDs have a clock source, pushbutton input, LED output, and connections to the JTAG programming signals. Other than these connections, all I/O signals are routed to the expansion connectors. CPLD pinouts are provided in tables 2 and 3 below. The CPLDs can be programmed using the Xilinx ISE/WebPack software and the JTAG3 cable from Digilent (the P-3 or P-4 programming cable from Xilinx can also be used). Please see the data sheets for the CPLDs available at the Xilinx web site for more information.

Pin 39

Pin 3: 3.3V

Pin 1: GND

Pin 39

Pin 40

Pin 4

Pin 2: VU

Pin 40

XC2-XL
33

XC9572XL

IC1

XC2C256

37 D

IC2 37 37

Figure 5. Expansion Connectors

CPLDs

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A Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

connector (J3) Signal CR2 pin GND VU VDD33 A4 A5 A6 A7 A8 XCCLK A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 43 42 41 39 40 38 34 35 33 32 31 30 28 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 7 6 5 4 3 2

Table 1. XC2-XL board expansion connector pinouts B connector (J4) C connector (J5) Pin Signal CR2 pin Pin Signal XC95 pin 1 GND 1 GND 2 VU 2 VU 3 VDD33 3 VDD33 4 B4/GSR 5 B5 6 B6 7 B7 8 B8 9 B9 10 B10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 143 142 140 139 138 137 136 135 134 133 132 131 130 129 128 126 125 124 121 120 119 118 117 116 115 114 113 112 111 110 107 106 105 104 103 102 101 4 C4/LD3 5 C5 6 C6 7 C7 8 C8 9 C9 10 C10 11 C11 12 C12 13 C13 14 C14/GSR 15 C15 16 C16 17 C17 18 C18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 XLCLK C33 C34 C35 C36 C37 C38 C39 C40 44 43 42 41 40 39 38 37 36 34 33 32 31 30 29 28 27 23 22 21 20 19 7

D connector (J6) Pin Signal CR2 pin 1 GND 2 VU 3 VDD33 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 D4 L5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 91 88 87 86 85 83 82 81 80 79 78 77 76 75 74 71 70 69 68 66 64 61 60 59 58 57 56 54 53 52 51 50 49 48 46 45 44

3 2 1 18 16 14 13 12 8 6 5

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Table 2. XC2C256-TQ144 pinout

Pin Function Pin Function Pin Function Pin Function

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

VCORE A40 A39 A38 A37 A36 A35 VAUX A34 A33 A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 A17 VIO1 A16 GND A15 A14 A13 A12 A10 A11 GND

37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72

VCORE XCCLK A7 A8 A6 A5 A4 D40 D39 D38 GND D37 D36 D35 D34 D33 D32 D31 VIO1 D30 D29 D28 D27 D26 D25 GND TDI D24 TMS D23 TCK D22 D21 D20 D19 GND

73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108

VIO1 D18 D17 D16 D15 D14 D13 D12 V18 V16 V14 VCORE V13 V12 V8 V6 GND GND V5 LD2 VIO1 SCK SDO SDI C32 V2 GND V3 B40 B39 B38 B37 B36 B35 B34 GND

109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144

VIO2 B33 B32 B31 B30 B29 B28 B27 B26 B25 B24 B23 B22 TDO GND B21 B20 B19 VIO2 B18 B17 B16 B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 VIO2 B5 BTN GND

Table 3. XC9572XL-VQ44 pinout

Pin Function Pin Function Pin Function Pin Function

1 2 3 4 5 6 7 8 9 10 11

XLCLK (A9) C31 C30 GND C40 C39 C26 C38 TDI TMS TCK

12 13 14 15 16 17 18 19 20 21 22

C37 C36 C35 VCORE C34 GND C33 C25 C24 C23 C22

23 24 25 26 27 28 29 30 31 32 33

C21 TDO GND VIO C20 C19 C18 C17 C16 C15 BTN

34 35 36 37 38 39 40 41 42 43 44

C13 VCORE C12 C11 C10 C9 C8 C7 C6 C5 LD3

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