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Course 2. Basic Electronics (Video Course) Faculty Coordinator(s) : 1. Prof.

Chitralekha Mahanta Department of Electronics and Communication Engineering Indian Institute of Technology, Guwahati Guwahati - 781039 Email :chitra@iitg.ernet.in Telephone : (91-361) Off : 2582507 2584507, 2690970

Res : Detailed Syllabus : 1. Semiconductor Diodes

Semiconductor materials- intrinsic and extrinsic types Ideal Diode Terminal characteristics of diodes: p-n junction under open circuit condition p-n junction under forward bias and reverse bias conditions p-n junction in breakdown region Diode small signal model Zener diode and applications Rectifier Circuits Clipping and Clamping circuits

2. Bipolar Junction Transistors (BJTs) Physical structure and operation modes Active region operation of transistor D.C. analysis of transistor circuits Transistor as an amplifier Biasing the BJT: fixed bias, emitter feedback bias, collector feedback bias and voltage divider bias Basic BJT amplifier configuration: common emitter, common base and common collector amplifiers Transistor as a switch: cut-off and saturation modes High frequency model of BJT amplifier 3. Field Effect Transistor (FET) Enhancement-type MOSFET: structure and physical operation, current-voltage characteristics Depletion-type MOSFET D.C. operation of MOSFET circuits MOSFET as an amplifier Biasing in MOSFET amplifiers Basic MOSFET amplifier configuration: common source, common gate and common drain types High frequency model of MOSFET amplifier Junction Field-Effect Transistor (JFET)

4. Operation Amplifier (Op-amps) Ideal Op-amp Differential amplifier: differential and common mode operation common mode rejection ratio (CMRR) Practical op-amp circuits: inverting amplifier, non -inverting amplifier, weighted summer, integrator, differentiator Large signal operation of op-amps Other applications of op-amps: instrumentation circuits, active filters, controlled sources, logarithmic amplifiers, waveform generators, Schmitt triggers, comparators

5. Power Circuits and Systems Class A large signal amplifiers, second-harmonic distortion Transformer coupled audio power amplifier Class B amplifier Class AB operation Power BJTs Regulated power supplies Series voltage regulator Four layer diodes: p-n-p-n characteristics Silicon controlled rectifier

Course: VLSI Circuits (Video Course) Faculty Coordinator(s) :

Prof. S. Srinivasan Department of Electrical Engineering Indian Institute of Technology Madras Chennai 600036

Email Telephone

: srinis@iitm.ac.in , srini@ee.iitm.ernet.in : (91-44) 2257 4401 (Office) (91-44) 2257 6413 (Residence)

Detailed Syllabus :
1 Introduction to VLSI Design Introduction 2 Combinational Circuit Design Components of Combinational Design - Multiplexer and Decoder Multiplexer Based Design of Combinational Circuits Implementation of Full Adder using Multiplexer Decoder Implementation of Full Adder using Decoder 3 Programmable Logic Devices Types of Programmable Logic Devices Combinational Logic Examples PROM - Fixed AND Array and Programmable OR Array Implementation of Functions using PROM PLA - Programmable Logic Array PLA Implementation Example 4 Programmable Array Logic PAL - Programmable Array Logic Comparison of PROM, PLA and PAL Implementation of a Function using PAL Types of PAL Outputs Device Examples 5 Review of Flip-Flops Introduction to Sequential Circuits R-S Latch and Clocked R-S Latch D Flip Flop J-K Flip Flop Master Slave Operation Edge Triggered Operation

Sequential Circuits Clocking of Flip-flops Setup and Hold Times Moore Circuit Mealy Circuit Clocking Rules Sequential Circuits Design Rules

Sequential Circuit Design Sequential Circuit Design Basics Design of a 4-bit Full Adder using D Flip-flop Pattern Identifier State Graph Transition Table

MSI Implementation of Sequential Circuits Implementation of Pattern Identifier revisited MUX Based Realization ROM Based Realization PAL Implementation

Design of Sequential Circuits using One Hot Controller Design of a Vending Machine as an example State Graph State Table Implementation using PAL

10

Verilog Modeling of Combinational Circuits Introduction to Verilog Levels of Abstraction Realization of Combinational Circuits Verilog Code for Multiplexers and Demultiplexers Realization of a Full Adder Behavioral, Data Flow and Structural Realization Realization of a Magnitude Comparator Design Example

11

Modeling of Verilog Sequential Circuits - Core Statements Design of a D Flip Flop Realization of a Register Realization of a Counter Realization of a Nonretriggerable Monoshot

12

Modeling of Verilog Sequential Circuits - Core Statements (Continued) Realization of a Right Shift Register Realization of a Parallel to Serial Converter Realization of a Model State Machine Pattern Sequence Detector as a Design Example

13

RTL Coding Guidelines RTL Coding Guidelines Introduction Dos and Donts for Asynchronous and Synchronous Logic Circuit Design RTL Coding Style Separation of Combinational and Sequential Circuits if - else if else statements for MUX and Priority Encoder Realizations Verilog Directives Case Statements Operators

14

Coding Organization - Complete Realization Introduction to Coding Organization Design Module a Model Complete Code for Combinational and Sequential Circuits

15

Coding Organization - Complete Realization (Continued) Complete Code for Sequential Circuits - Right Shift Register - Parallel to Serial Converter - Model State Machine - Pattern Sequence Detector Test Bench for Combinational Circuits

16

Writing a Test Bench Test bench for simple design AND gate Test bench for Combinational Circuits Test bench for Sequential Circuits

17

System Design using ASM Chart Top-down Design Methodology ASM Chart Rules of Drawing ASM Chart

18

Example of System Design using ASM Chart Design of Bus Arbiter ASM Chart State Table Implementation of Bus Arbiter using MUX and D Flip-flops Specification of a Traffic Light Controller State Graph ASM Chart of Traffic Light Controller

19

Examples of System Design using Sequential Circuits Algorithm of Traffic Light Controller ASM Table Hardware Realization using MUX and D Flip-flops Traffic Light Controller ROM Realization - ROM Table

20

Examples of System Design using Sequential Circuits (Continued) Dice Game - Introduction Algorithm for Dice Game Architecture

ASM Chart for Dice Game 21 Microprogrammed Design Introduction to Microprogrammed Design of Digital Systems ASM Chart for a Microprogrammed Design Microprogrammed ROM Table Comparison of the Conventional ROM and the Microprogrammed ROM Approaches Single Qualifier, Double address Design 22 Microprogrammed Design (Continued) Single Qualifier, Single Address (SQSA) System Design ASM chart for SQSA Microprogrammed Implementation Microprogrammed Table Implementation of SQSA System using Microprogrammed ROM, MUX and a Counter Dice Game using Microprogrammed SQSA System ASM Chart and Microprogrammed Table for Dice game 23 Design Flow of VLSI Circuits Top-down Design Methodology Bottom-up Design Methodology Simulation of Verilog Codes using Modelsim Test Bench and Simulation of a Simple Design 24 Simulation of Combinational Circuits Simulation of Combinational Circuits Simulation Waveforms - Simple Gates - Simple Boolean Expressions - Shift Register - MUX and DEMUX

25

Simulation of Combinational and Sequential Circuits Simulation Waveforms - a Magnitude Comparator - a Design Example - a D Flip-flop - Registers - a Counter

26

Analysis of Waveforms using Modelsim Analysis of Waveforms - a Counter - a Non-retriggerable Monoshot - a Right Shift Register - a Parallel to Serial Converter - a Model State Machine

27

Analysis of Waveforms using Modelsim (Continued) Analysis of Waveforms of a Model State Machine (Continued) Analysis of Waveforms of a Pattern Sequence Detector

28

ModelSim Simulation Tool ModelSim Command Summary

29

Synthesis Tool More Features of Modelsim Synplify Synthesis Tool Features of Synplify Tool

30

Synthesis Tool (Continued) Synthesis Tool Command Summary Analysis of Design Example using Synplify Tool

31

Synplify Tool - Schematic Circuit Diagram View Analysis of the Report File generated by Synplify Tool Commands Continued Optimized Verilog File using Synplify Tool Viewing Verilog Code as RTL Schematic Circuit Diagrams

32

Technology View using Synplify Tool Technology View using Synplify Tool Warnings and Errors Log Report Comparison of FPGA Performance of different Vendors for a Design Creation of Errors Deliberately and Correction using Modelsim and Synplify Tools

33

Synopsys Full and Parallel Cases Compilation/Load Errors and Correction using Modelsim and Synplify Tools (Continued) Synopsys Full Case - RTL View Synopsys Parallel Case - RTL View Xilinx Place & Route Tool Design Manager Xilinx Place & Route Tool Command Summary Place & Route Tool Report

34

Xilinx Place & Route Tool Xilinx Place & Route Tool Report Creation of Bit File Synthesis Revisited Waveform Analysis of Optimized File Various Report Files of Xilinx Place & Route Tool Back Annotation in DOS Mode using Xilinx Place & Route Commands

35

Xilinx Place & Route Tool (Continued) Back Annotation in DOS Mode using Xilinx Place & Route Commands (Continued) Simulation of Back Annotated File using Modelsim Tool Analysis of Back Annotated Waveforms to get the Gate Delays of a Design User Constraint File Xilinx Floor Planner Design of PCI Arbiter using ASM Chart - Introduction

36

PCI Arbiter Design using ASM Chart Design of PCI Arbiter (Continued) ASM Chart Verilog Code of PCI Arbiter Test Bench for the PCI Arbiter Design Simulation Results after Back annotation Synplify Results Xilinx Place and Route Results

37

Design of Memories

- ROM

On-chip Dual Address ROM Design Test Bench for Dual Address ROM Design Simulation Results Synplify and Place & Route Results On-chip Single Address ROM Design Test Bench for Single Address ROM Design Simulation Results Synplify and Place & Route Results 38 Design of Memories - RAM

Design of On-chip Dual RAM RTL Verilog Code Test Bench for Dual RAM Design Simulation Results Synplify and Xilinx Place & Route Results 39 Design of External RAM Controller Design for External RAM Verilog Code for Controller of External RAM Test Bench for External RAM GO-No GO Test Simulation Waveform Synplify and Xilinx Place & Route Results 40 Design of Arithmetic Circuits Principle of Pipelining Partitioning of a Design Serial Signed Adder Design Synplify and Xilinx Place & Route Results Test Bench for Serial Adder Comparison of a Serial Adder and a Parallel Adder Implementation Simulation Waveform

41

Design of Arithmetic Circuits (Continued) Design of Eight Inputs Signed Parallel Adder Design Partition Verilog Code for the Signed Parallel Adder Test Bench for Parallel Adder Simulation Waveform Synplify and Xilinx Place & Route Results Parallel, Pipelined Multiplier Design A new Algorithm for Fast Implementation Verilog Code for the Parallel, Pipelined Multiplier

42

Design of Arithmetic Circuits (Continued) Verilog Code for Parallel Multiplier (Continued) Test Bench for Parallel Multiplier Simulation Results of Back Annotated Parallel Multiplier Design Synplify and Xilinx Place & Route Results

43

System Design Examples Verilog Code for Traffic Light Controller Simulation Results of Traffic Light Controller Design Synplify and Xilinx Place & Route Results

44

System Design Examples (Continued) Test Bench for Traffic Light Controller Introduction to Image/Video Compression Block Diagram of a Video Encoder A Novel, Parallel Algorithm for Fast Evaluation of Discrete Cosine Transform and Quantization (DCTQ)

45

System Design Examples (Continued) Design of Discrete Cosine Transform and Quantization Processor DCTQ Processor Block Diagram Signal Description of DCTQ Processor Architecture of DCTQ Processor Sequence of Operations of a Host Processor and the DCTQ Processor Verilog Codes for DCTQ Design

46

System Design Examples (Continued) Verilog Codes for DCTQ Design (Continued) DCTQ Top Design Code Partial Products Register Code DCTQ Controller Code

47

System Design Examples (Continued) Verilog Code for DCTQ Design - DCTQ Controller Code (Continued) Test Bench for DCTQ Design Synplify Results Xilinx Place and Route Results Analysis of Waveforms of DCTQ Design Verification of Verilog DCTQ IQIDCT Cores Matlab Codes for Pre-processing and Post-processing of an Image Results Original and Reconstructed Image Example Implementation Results of DCTQ, IQIDCT, DCT and IDCT Cores on FPGA/ASIC Capabilities of IP Cores

48

System Design Examples using FPGA Board Design Applications using FPGA Board - Traffic Light Controller and Real Time Clock XSV FPGA Board Features Testing of FPGA Board Setting the XSV Board Clock Oscillator Frequency Downloading Configuration Bit Streams

49

System Design Examples using FPGA Board (Continued) Features of Digital Input/Output Card Typical Push Button Debouncing Circuit and Switch Interface Circuits Typical Driving Circuit for Seven Segment and Discrete LEDs Problem on FPGA Boards and its Solution Hardware Setup for Traffic Light Controller Demo of Traffic Light Controller Revised Verilog Code Incorporating Blink Control and Pedestrian Crossing

50

Advanced Features of Xilinx Project Navigator User Constraint File for Traffic Light Controller Place and Route and Back Annotation Using Xilinx Project Navigator - Command Summary of Navigator Floor Plan Simulation of Back Annotated File

51

System Design Examples using FPGA Board (Continued) Real Time Clock Design Features and Specification Block Diagram and Signal Descriptions of Real Time Clock Simplified Architecture of Real Time Clock Verilog RTL Code for Real Time Clock

52

System Design Examples using FPGA Board (Continued) Verilog RTL Code for Real Time Clock (Continued) - Real Time Clock Code - Stop Watch Code

53

System Design Examples using FPGA Board (Continued) Stop Watch Implementation (Continued) Alarms routine Display ROM Sub-module Test Bench for Real Time Clock

54

System Design Examples using FPGA Board (Continued) Test Bench for Real Time Clock Design User Constraint File for Real Time Clock Design Synplify Results Xilinx Place and Route Results Waveform Analysis of the Real Time Clock Design Demo of the Real Time Clock

55

Project Design Suggested for FPGA/ASIC Implementations Projects Suggested for FPGA/ASIC Implementations Issues Involved in Digital VLSI System Design Detailed Specification for Electrostatic Precipitator Controller Detailed Specification for JPEG/H.261/MPEG Codec References Conclusions

Course 37. Digital Image Processing (Video Course) Faculty Coordinator(s) : 1. Prof. P .K. Biswas Department of Electronics and Communication Engineering Indian Institute of Technology, Kharagpur Kharagpur - 721302 Email : mpkb@ece.iitkgp.ernet.in Telephone : (91-3222) Off : 283506 283507

Res : Detailed Syllabus : Topic 1. Introduction to Digital Image Processing & Applications 2. Sampling,Quantization 3. Basic Relationship Between Pixels 4. Imaging Geometry 5. Image Transforms 6. Image Enhancement 7. Image Restoration 8. Image Segmentation 9. Morphologyical Image Processing 10. Shape Representation and Description 11. Object Recognition and Image Understanding 12. Texture Image Analysis 13. Motion Picture Analysis 14. Image Data Compression Total:

No. of Hours 1 2 2 3 5 3 4 4 2 3 3 3 2 3 -----------40

Course 33. Digital Systems Design (Video Course) Faculty Coordinator(s) : 1. Prof. D. RoyChowdhury Department of Electronics and Communication Engineering Indian Institute of Technology, Kharagpur Kharagpur - 721302 Email : drc@cse.iitkgp.ernet.in Telephone : (91-3222) Off : 283490 283497 277597 Detailed Syllabus : 1. Introduction to Digital Design (4hr.) - What is Digital ? Specification and Implementation of digital design Structured and Trial-Error methods in design Digital Computer Aided Design (CAD) tools Digital Logic (8hr.) Binary Number System Octal, Hexa-decimal and BCD Codes Number System Conversion Use of different number systems in digital design Logic gates AND, OR, NOT, NAND, NOR etc. NAND and NOR implementation of real life digital circuits Digital Circuit Characterization Fan-in/Fan-out, Switching Switching times, Noise margin etc.

Res :

2.

functions,

3.

Boolean Algebra (8hr.) AND, OR and other relations DeMorgans law Karnaugh Maps Minimization of Sum of Products and Product of Sums Design of minimal two-level gate networks Design of multiple output two level gate networks Combinational Circuit Design (5hr.) Design Procedure Design of Multiplexer, Decoder, Encoder, Comparator Design of Seven-segment display, Parity generator Design of large circuits using the above modules Synchronous Sequential Circuit Design ( 5hr.) Design of sequential modules SR, D, T and J-K Flip-flops Flip-flop applications Clock generation, Counters, Registers Basic State machine concepts Design of Programmable Logic (4hr.) Introduction to Programmable circuits

4.

5.

6.

7. Digital -

Design of Read-Only Memory (ROM), Programmable Logic Arrays (PLA), Programmable Array Logic (PAL) Computing (6hr.) Introduction to digital computer Design of Arithmetic circuits Adders, Multipliers Design of Memory ROM/RAM Design of a simple CPU

Course 31. Digital Signal Processing (Video Course) Faculty Coordinator(s) : 1. Prof. S. C. Dutta Roy Department of Electrical Engineering Indian Institute of Technology, Delhi Hauz Khas New Delhi -110 016 Email : mscdroy@ee.iitd.ernet.in Telephone : (91-11) Off : 26591080 26561619

Res : Detailed Syllabus: Introduction to DSP Digital Systems Characterization, Description and Testing FIR and IIR : Recursive and Non Recursive Discrete Fourier Transform Z Transform Discrete Time Systems in Frequency Domain Simple Digital Filters Digital Processing of Continuous Time Signals Analog Filter Design Digital Filter Structure, Synthesis and Design

2 Lectures 4 Lectures 2 Lectures 4 Lectures 4 Lectures 1 Lecture 4 Lectures 1 Lecture 4 Lectures 14 Lectures

Course 27. Optical Communication System (Video Course) Faculty Coordinator(s) : 1. Prof. Yatindra N. Singh Department of Electrical Engineering Indian Institute of Technology, Kanpur Kanpur - 208016 Email : ynsingh[AT]iitk.ac.in Telephone : (91-512) Off : 259-7944 259-8796 259 0063

Res : Fax : Detailed Syllabus : Number of lectures are given in brackets

Introduction to vector nature of light, propagation of light, propagation of light in a cylindrical dielectric rod, Ray model, wave model. (1) Different types of optical fibers, Modal analysis of a step index fiber. Signal degradation on optical fiber due to dispersion and attenuation. (3) Optical sources - LEDs and Lasers, (2) Modulators, electro-optic and accousto-optic effects (3) Modulation schemes OOK, PSK, FSK, Polarisation shift keying, Pulse modulation schemes. (2) Photo-detectors pin-detectors, APDs, detector responsivity, (2) noise sources and modelling (2) Optical receivers for OOK. (1) Optical link design - BER calculation, quantum limit, power panelities, link design examples (3) Coherent and Noncoherent communication issues and comparisons (2) Phase and polorisation noise (2) Phase diversity receivers, Polarisation diversity receivers (3) Phase locked loops (2)

Homodyne and heterodyne receivers (2) Optical amplifiers -SOA, EDFA (2) Subcarrier multiplexed systems (1) WDM systems- Concept and introduction (2) Bit parrallel WDM systems (1) Optical TDM (1) Optical CDM (1) Nonlinear effects in fiber optic links. Concept of self-phase modulation, group velocity dispersion and solition based communication. (2)

Course 27. Broadband Networks : Concepts and Technology (Video Course) Faculty Coordinator(s) : 1. Prof. Abhay Karandikar Department of Electrical Engineering Indian Institute of Technology, Bombay Powai, Mumbai 400 076 Email : karandi@ee.iitb.ac.in Telephone : (91-22) Off : 2567 7439, 2567 8439

Res : Detailed Syllabus :

1.Overview of internet concepts, challenges and history. 2. Next Generation Internet- challenges and problems. 3. Multicasting in Internet. 4. Real time communication over Internet. 5. Packet scheduling Algorithms- requirements and choices. 6. Admission control in internet. 7. Differentiated Services in internet. 8. Internet Telephony and voice over IP (VoIP)- RTP and RTCP. 9. Broadband ISDN and ATM Networks- ATM protocols. 10. IP switching and MPLS- Overview of IP over ATM and its evolution to IP switching. 11. Policy based Networking. Policy servers. 12. Web in Qos domain. Architecture for Web Qos. 13. Web Acess Intelligent web browsing and web caching. 14. Internet and web Traffic measuremnt and characterization. Prediction for network management. 15. Optical communication networks- DWDM based transport network. Issues in IP over DWDM optical IP routers and switching.

Course 22. Principles of Communication (Video Course) Faculty Coordinator(s) : 1. Prof. Surendra Prasad Department of Electrical Engineering Indian Institute of Technology, Delhi Hauz Khas New Delhi -110 016 Email : sprasad@ee.iitd.ernet.in Telephone : (91-11) Off : 26591115 26591876 26581369

Res :

Detailed Syllabus: Introduction to Communication Engineering Brief Review of Signals and Systems The Hilbert Transform Fundamentals of Analog Signal Transmission Amplitude Modulation Single Side Band, Suppressed Side Band & VSB Modulation Superhetrodyne Receivers Angle Modulations Frequency Modulation Generation and Detection Demodulation of Modulated Signals Feedback Demodulators FM Receivers TV Transmission Review of Probability Theory and Random Variables Random Processes Behavior of Communication System in the presence of Noise PWM and PPM Delta Modulation PCM 2 1 2 1 2 Lectures Lecture Lectures Lecture Lectures

2.5 Lectures 2.5 Lectures 2 Lectures 2 3 3 1 1 2 3 6 1 1 1 Lectures Lectures Lectures Lecture Lecture Lectures Lectures Lectures Lecture Lecture Lecture

Course 19. Signals and Systems (Video Course) Faculty Coordinator(s) : 1. Prof. K .S. Venkatesh Department of Electrical Engineering Indian Institute of Technology, Kanpur Kanpur - 208016 Email : venkats@iitk.ac.in Telephone : (91-512) Off : 2597468 2598354

Res : Detailed Syllabus :

What is Signal and System Theory? The black-box approach. Physical instances and their adaptation in the framework. Formal definition of 'signal' and 'system'. The domain and range variables, continuous and discrete signals and cont. and discrete systems. Cont./discrete vs analog/digital. Domain and range operations and transformaations, and their effects upon signals. Characterization of systems: memory, linearity, causality, time-invariance, stability. Examples and counterexamples. Linear and time invariant systems. The Dirac impulse as a limit of a sequence of cont. fns. Mathematical difficulties with handling Dirac impulsers: brief, adequate discussion. Representation of cont. signals using impulses. Kronecker impulses and representation of discrete signals using Kronecker impulses. The general 'impulse response' of any system. Impulse response of linear time-varying systems. Impulse response of linear time-invariant systems. Evolution of the convolution integral and the convolution sum. Algebraic properties of the convolution operation. Block diagram representations for interconnections of systems. Characterizing a system from its impulse response. Characterizing interconnected systems. Differential Equations review. To represent a system using differential equations. Nonuniqueness. The need for auxiliary conditions. Reflection of linearity and time-invariance. Causality: initial rest and final rest constraints. Difference equations, introduction. Forward and backward solution. Non-uniqueness, auxiliary conditions. Reflection of linearity, timeinvariance, causality. A discussion of the continuous-time complex exponential, various cases. Cont. time systems and complex exponentials. Periodic signals: definition, sums of periodic signals, periodicity of the sum. Harmonically related periodics. Expressing a periodic signal as a sum of complex exponentials. The Fourier series: analysis and synthesis equations, orthogonality of the Fourier basis. Signal approximation using truncated Fourier series. Brief discussion of convergence issues and conditions for existence of the FS. Aperiodic signals and their representation: the transition from the FS to the Fourier Transform. Finite power and finite energy signals. Brief discussion of convergence issues and conditions for existence of the FT. Extension of the FT for finite power signals: frequency domain Dirac impulses. Properties of the FS and FT: particular emphasis on convolution.

A discussion of the discrete-time complex exponential, various cases. Discrete time systems and complex exponentials. Periodic discrete signals: sampling periodic cont.-time signals. Periodic signal as a sum of complex exponentials. The discrete-time Fourier series: analysis and synthesis equations, orthogonality of the Fourier basis. Signal approximation using truncated Fourier series. Convergence issues and the interpretation of the FS as a set of simultaneous linear equations. The DFT: N-point DFT of an M-point signal. Aperiodic signals and their representation: the transition from the DTFS to the discrete-time Fourier Transform. Finite power and finite energy signals. Brief discussion of convergence issues and conditions for existence of the DTFT. Extension of the DTFT for finite power signals: frequency domain Dirac impulses. Properties of the DTFS and DTFT: particular emphasis on convolution. The principle of cont. signal sampling. The primary objective: perfect reconstruction. Ideal sampling and the sampling theorem: over- and under-sampling. Reconstruction theory: finite order interpolators and reconstruction distortion; ideal reconstruction. Non-ideal sampling and reconstruction. Sampling of discrete-time signals. Laplace Transform as a generalization of the FT. The region of convergrnce and its properties. Pole-zero plots. Inverse transformation: role of the ROC in ensuring uniqueness. Properties of the LT. Inference of the FT from the LT. System characterization from the pole-zero plot. Onesided LT. The z-Transform as a generalization of the DTFT. The region of convergrnce and its properties. Pole-zero plots. Inverse transformation: role of the ROC in ensuring uniqueness. Properties of the ZT. Inference of the DTFT from the LT. System characterization from the pole-zero plot. Cont. to discrete system transformations. One-sided ZT.

Course 15. Solid State Devices (Video Course) Faculty Coordinator(s) : 1. Prof. S. Karmalkar Department of Electrical Engineering Indian Institute of Technology, Madras Chennai Email : karmal@ee.iitm.ernet.in Telephone : (91-44) Off : 2257 8387

Res : Detailed Syllabus :

TOPIC Introduction Evolution and uniqueness of Semiconductor Technology Equilibrium carrier concentration Thermal Equilibrium and wave particle duality Intrinsic semiconductor Bond and band models Extrinsic semiconductor Bond and band models Carrier transport Random motion Drift and diffusion Excess carriers Injection level Lifetime Direct and indirect semiconductors Procedure for analyzing semiconductor devices Basic equations and approximations P-N Junction Device structure and fabrication Equilibrium picture DC forward and reverse characteristics Small-signal equivalent circuit Switching characteristics Solar cell P-N Junction Device structure and fabrication Equilibrium picture DC forward and reverse characteristics Small-signal equivalent circuit Switching characteristics Solar cell Bipolar Junction Transistor History Device structures and fabrication Transistor action and amplification Common emitter DC characteristics Small-signal Equivalent circuit Ebers-Moll model SPICE model

No. of lectures 1 1 5

2 2

1 6

MOS Junction C-V characteristics, threshold voltage, body effect Metal Oxide Field Effect Transistor History Device structures and fabrication Common source DC characteristics Small-signal equivalent circuit SPICE level-1 model Differences between a MOSFET and a BJT Junction FET and MESFET Recent Developments Heterojunction FET Hetrojunction bipolar transistor Summary Total number of lectures

3 8

2 2 1 40

Course 13. High Speed Devices and Circuits (Video Course) Faculty Coordinator(s) : 1. Prof. K.N. Bhat Department of Electrical Engineering Indian Institute of Technology, Madras Chennai Email : knbhat@ee.iitm.ernet.in Telephone : (91-44) Off : 2257 8362

Res : Detailed Syllabus :

1. Important parameters governing the high

speed performance of

devices and circuits:- Transit time of charge carriers, junction capacitances, ON-resistances and their dependence on the device geometry and size, carrier mobility, doping concentration and temperature. Circuits. (4 hours) Contact resistance and interconnection/interlayer capacitances in the Integrated Electronics

2. Silicon based MOSFET and BJT circuits for high speed operation and their limitations:- Emitter coupled Logic (ECL) and CMOS Logic circuits with scaled down devices. Silicon On Insulator (SOI) wafer preparation methods and SOI based devices and SOICMOS circuits for high speed low power applications. (8 hours) 3. Materials for high speed devices and circuits:- Merits of III V binary and ternary compound semiconductors (GaAs, InP, InGaAs, AlGaAs ETC.), silicon-germanium alloys and silicon carbide for high speed devices, as Brief outline of the crystal structure, Material and device process (8 hours) 4. Metal semiconductor contacts and Metal Insulator Semiconductor and MOS devices: Native oxides of Compound semiconductors for MOS devices and the interface state density related issues. Metal semiconductor contacts, Schottky barrier diode. Thermionic Emission model for current transport and current-voltage (I-V) characteristics. Effect of interface states and interfacial thin electric layer on the Schottky barrier height and the I-V characteristics. (6 hours) 5. Metal semiconductor Field Effect Transistors (MESFETs): Pinch off voltage and threshold voltage of MESFETs. D.C. characteristics of drain current. GaAs, InP and GaN based devices for high speed operation. and analysis Sub threshold Velocity overshoot effects and the related advantages of compared to silicon based devices.

dopants and electrical properties such as carrier mobility, velocity versus electric field characteristics of these materials. technique with these III-V and IV IV semiconductors.

characteristics, short channel effects and the performance of scaled down devices. (6 hours)

6. High Electron Mobility Transistors (HEMT): Hetero-junction devices. The generic Modulation Doped FET(MODFET) structure for high electron mobility realization. Principle of operation and the unique features of HEMT. ( 6 hours) 7. Hetero junction Bipolar transistors (HBTs): Principle of operation and the benefits of hetero junction BJT for high speed applications. GaAs and InP based HBT device structure and the surface passivation for stable high gain high frequency performance. SiGe HBTs and the concept of strained layer devices. (6 hours) 8. High speed Circuits: GaAs Digital Integrated Circuits for high speed InGaAs/InP HEMT structures.

operation- Direct Coupled Field Effect Transistor Logic (DCFL), Schottky Diode FET Logic (SDFL), Buffered FET Logic(BFL). GaAs FET Amplifiers. Monolithic Microwave Integrated Circuits (MMICs) (4 hours)

9. High Frequency resonant tunneling devices. Resonant-tunneling hot


electron transistors and circuits. (2 hours)

Analog Circuits (Video Course) Faculty Coordinator(s) : 1. Prof. R. N. Biswas Indian Institute of Technology Kanpur Kanpur - 208016 2. Prof. J. John Department of Electrical Engineering Indian Institute of Technology Kanpur Kanpur - 208016 Email : jjohn@iitk.ac.in Telephone : (91-512) Off : 2597088 Res : 2598488 Fax : 2590063 3. Prof. B. Mazahari Department of Electrical Engineering Indian Institute of Technology, Kanpur Kanpur - 208016 Email : baquer@iitk.ac.in Telephone : (91-512) Off : 2597924

Res : 2598528 Fax : 2590063 Detailed Syllabus : Preamble: The three major courses in the Analog Electronics areas, listed in the NPTEL syllabus are Basic Electronics, Analog Electronics and Solid State Devices. The proposed syllabus for the Analog Electronics course assumes that an average student taking this course has good grasp of the Basic Electronics course. Hence repetition is avoided except where it is essential to revise what was already covered in the previous course. Also, new trends in Analog Electronics, especially the increasing use of MOS/CMOS devices in circuits, are brought. MODULE 1: POWER SUPPLIES (4 lectures) Rectifiers Analysis and design of Half wave and full wave circuits; Ripple and its reduction; Need for Voltage regulators, Regulation, Zener regulators, Series

Voltage regulator, IC regulators, Current limiting and protection circuits, Switched mode power supplies.

MODULE 2: BASIC AMPLIFIER STAGES (6 lectures) Small signal equivalent and large signal models of BJT, JFET and MOSFET. Biasing for discrete circuit design, Common Emitter, Common Base and Common Collector BJT amplifier stages; JFET Common source amplifier; Common Source, Common Gate and Common Drain MOSFET stages. MODULE 3: FREQUENCY RESPONSE (5 lectures) Small-signal high-frequency hybrid- model of a BJT. Amplifier transfer function low- frequency, mid, and high-frequency bands. General expressions for the low-frequency and high frequency responses. Millers theorem. Short-circuit and Open-circuit time constants methods for the approximate determination of break-frequencies, Frequency response of BJT amplifiers configurations. MODULE 4: DIFFERENTIAL AMPLIFIERS (4 lectures) BJT Differential pair Large-signal operation, transfer characteristics, Small-signal operation of BJT differential amplifier, Input common-mode and differential resistances, Common-mode and differential gains, non-ideal characteristics, Biasing in BJT integrated circuits the basic BJT current mirror, current-steering circuits, Wilson current mirror, Widlar current source. BJT differential amplifier with active load, the Cascode configuration. The MOSFET differential pair transfer characteristics, MOSFET current mirrors basic, Cascode, Wilson. Frequency response of the differential amplifier, The differential pair as a wideband amplifier MODULE 5: OUTPUT STAGES AND POWER AMPLIFIERS (3 lectures) Classification, Transfer characteristics, power dissipation, power conversion efficiency of Class A and B output stages. Cross-over distortion and its reduction. Class AB output stage transfer characteristics, biasing circuits. VBE multiplier and its use in biasing Class AB stage. Power BJTs thermal resistance, power dissipation vs temperature, Use of heat sinks. Short- circuit protection of output stages. CE, CC and CB configurations. Frequency response of JFET and MOSFET amplifiers. Cascode

MODULE 6: OPERATIONAL AMPLIFIER (3 lectures) General configuration and basic stages of an operational amplifier (Opamp). Analysis of simple BJT and CMOS opamps. Opamp parameters ideal and practical. Examples

of commercial BJT and CMOS opamps. Compensated and un-compensated opamps.

MODULE 7: FEEDBACK IN ANALOG CIRCUITS (4 lectures) Advantages and of negative feedback, Loop gain, Shunt, feedback factor, Closed-loop Shunt-Shunt

gain. Basic feedback

topologies:

Series-

Series-Series,

Shunt-Series configurations. Derivation of input resistance, output resistance and practical amplifiers.

and closed-loop gain of the above for both the ideal

Stability of feedback amplifiers, Gain and Phase-margins. Frequency compensation. MODULE 8: (3 lectures) ANALOG-TO-DIGITAL ANDDIGITAL-TO-ANALOG CONVERTERS binary weighted resistors, and R-2R

Digital-to-analog (D/A)circuits circuits with Flash and Dual- slope types.

ladders. Analog-to-Digital (A/D)circuits Counting type, successive approximation,

MODULE 9: FILTERS AND TUNED AMPLIFIERS (3 lectures) Filter types, Filter transfer function, Butterworth and Chebyshev filters, First and second order Active tuning MODULE 10: SIGNAL GENERATORS CIRCUITS (3 Lectures) AND WAVEFORM SHAPING filters. Biquad filters, Switched-capacitor filters. Tuned amplifiers, amplifiers with multiple tuned circuits, synchronous tuning and stagger

Sinusoidal oscillators RC and LC oscillators. Multivibrators astable, monostable and bistable types. Generation of square and triangular waveforms. The 555 Timer circuit and its uses. Precision rectifier circuits and their applications. MODULE 11: NOISE ANALYSIS (2 Lectures) Noise in resistors, BJTs and MOSFETs. Noise analysis of a basic amplifier.

Course 9. Digital Circuits and Systems (Video Course) Faculty Coordinator(s) : 1. Prof. S. Srinivasan Department of Electrical Engineering Indian Institute of Technology, Madras Chennai- 600036 Email : srini@ee.iitm.ernet.in Telephone : (91-44) Off : 22578374 22579374 Detailed Syllabus : 1. Introduction Digital Systems; Data representation and coding; Logic circuits, integrated circuits; Analysis, design and implementation of digital systems; CAD tools. 2. Number Systems and Codes Positional number system; Binary, octal and hexadecimal number systems; Methods of base conversions; Binary, octal and hexadecimal arithmetic; Representation of signed numbers; Fixed and floating point numbers; Binary coded decimal codes; Gray codes; Error detection and correction codes - parity check codes and Hamming code. 3. Combinatorial Logic Systems Definition and specification; Truth table; Basic logic operation and logic gates. 4. Boolean Algebra and Switching Functions Basic postulates and fundamental theorems of Boolean algebra; Standard representation of logic functions - SOP and POS forms; Simplification of switching functions - K-map and Quine-McCluskey tabular methods; Synthesis of combinational logic circuits. 5. Logic families Introduction to different logic families; Operational characteristics of BJT in saturation and cut-off regions; Operational characteristics of MOSFET as switch; TTL inverter circuit description and operation; CMOS inverter - circuit description and operation; Structure and operations of TTL and CMOS gates; Electrical characteristics of logic gates logic levels and noise margins, fan-out, propagation delay, transition time, power consumption and power-delay product. 6. Combinational Logic Modules and their applications Decoders, encoders, multiplexers, demultiplexers and their applications; Parity circuits and comparators; Arithmetic modules- adders, subtractors and ALU; Design examples. 7. Sequential Logic systems: Definition of state machines, state machine as a sequential controller; Basic sequential circuits- latches and flip-flops: SR-latch, D-latch, D flip-flop, JK flip-flop, T flip-flop; Timing hazards and races; Analysis of state machines using D flip-flops and JK flipflops; Design of state machines - state table, state assignment, transition/excitation table, excitation maps and equations, logic realization; Design examples

8. State machine design approach Designing state machine using ASM charts; Designing state machine using state diagram; Design examples 9. Sequential logic modules and their applications Multi-bit latches and registers, counters, shift register, application examples. 10. Memory Read-only memory, read/write memory - SRAM and DRAM 11.Programmable Logic Devices: PLAs, PALs and their applications; Sequential PLDs and their applications; Statemachine design with sequential PLDs; Introduction to field programmable gate arrays (FPGAs)

Course 7. Transmission Lines and EM waves (Video Course) Faculty Coordinator(s) : 1. Prof. R. K. Shevgaonkar Department of Electrical Engineering Indian Institute of Technology, Bombay Powai, Mumbai 400 076 Email : rks@ee.iitb.ac.in Telephone : (91-22) Off : 2567 7440, 2567 8440

Res : Detailed Syllabus : 1.Applications of Electromagnetic waves 2.Transmission Lines 3.Maxwells Equations 4.Uniform Plane Wave 5.Plane Waves at a Media Interface 6.Waveguides 7.Dielectric Wave Guide 8.Radiation 9.Antenna Arrays. 10.Propagation Of Radio Waves

Course 4. Probability and Random Variables (Video Course) Faculty Coordinator(s) : 1. Prof. Mrityunjoy Chakraborty Department of Electronics and Communication Engineering Indian Institute of Technology, Kharagpur Kharagpur - 721302 Email mrityun@ece.iitkgp.ernet.in Telephone : (91-3222) Off : 283512 283513 278001

Res : Detailed Syllabus : 1. Introduction to Probability

Definitions, scope and history; limitation of classical and relative-frequency-based definitions Sets, fields, sample space and events; axiomatic definition of probability Combinatorics: Probability on finite sample spaces Joint and conditional probabilities, independence, total probability; Bayes and applications rule

2. Random variables Definition of random variables, continuous and discrete random variables, cumulative distribution function (cdf) for discrete and continuous random variables; probability mass function (pmf); probability density functions (pdf) and properties Jointly distributed random variables, conditional and joint density and distribution functions, independence; Bayes rule for continuous and mixed random variables Function of random a variable, pdf of the function of a random variable; Function of two random variables; Sum of two independent random variables Expectation: mean, variance and moments of a random variable Joint moments, conditional expectation; covariance and correlation; independent, uncorrelated and orthogonal random variables Random vector: mean vector, covariance matrix and properties Some special distributions: Uniform, Gaussian and Rayleigh distributions; Binomial, and Poisson distributions; Multivariate Gaussian distribution Vector-space representation of product, Schwarz Inequality random variables, linear independence, inner

Elements of estimation theory: orthogonality principle in estimation;

linear minimum mean-square error and

Moment-generating and characteristic functions and their applications Bounds and approximations: Chebysev inequality and Chernoff Bound

3. Sequence of random variables and convergence: Almost sure (a.s.) convergence and strong law of large numbers; convergence in mean square sense with examples from parameter estimation; convergence in probability with examples; convergence in distribution Central limit theorem and its significance

4. Random process Random process: realizations, sample paths, discrete and continuous time processes, examples Probabilistic structure of a random process; mean, autocorrelation and autocovariance functions Stationarity: strict-sense stationary (SSS) and wide-sense stationary (WSS) processes Autocorrelation function of a real WSS process and its properties, cross-correlation function Ergodicity and its importance

Spectral representation of a real WSS process: power spectral density, properties of power spectral density ; cross-power spectral density and properties; autocorrelation function and power spectral density of a WSS random sequence Linear time-invariant system with a WSS process as an input: sationarity of the output, auto-correlation and power-spectral density of the output; examples with white-noise as input; linear shift-invariant discrete-time system with a WSS sequence as input Spectral factorization theorem Examples of random processes: white noise process Gaussian process; Poisson process, Markov Process and white noise sequence;

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