LM57 Resistor-Programmable Temperature Switch and Analog Temperature Sensor

May 11, 2009

LM57 Resistor-Programmable Temperature Switch and Analog Temperature Sensor

General Description
The LM57 is a precision, dual-output, temperature switch with integrated analog temperature sensor. The trip temperature (TTRIP) is programmable by using two external 1% resistors. Using extremely small packaged resistors (0.5 mm x 1 mm), the LM57 can be programmed to any of 256 trip temperatures while consuming very little board space. The VTEMP output delivers an analog output voltage which is inversely proportional to the measured temperature. Built-in temperature hysteresis (THYST) keeps the output stable in an environment of thermal oscillation. The digital temperature switch outputs will go active when the die temperature exceeds TTRIP and will release when the temperature falls below a temperature equal to TTRIP minus THYST. One of the digital outputs, TOVER, is active-high with a push-pull structure. The other digital output, TOVER, is active-low with an opendrain structure. Driving the TRIP-TEST input high will make the digital outputs active. A processor can read the logic level of the temperature switch outputs, confirming that they changed to their active state. This allows for in-situ verification that the comparator and output circuitry are functional after system assembly. When the TRIP-TEST pin is high, the trip-level reference voltage appears at the Vtemp pin. The system could then use this voltage to calibrate the sensor for even tighter accuracy. Tying TOVER to TRIP-TEST will latch the output after it trips. It can be cleared by forcing TRIP-TEST low or powering off the LM57. As it draws only 28A max from its supply, it has very low selfheating, about 0.02C in still air.

Applications

Cell phones Wireless transceivers Digital cameras Personal digital assistants (PDA's) Battery management Automotive Disk drives Games Appliances

Features

Trip temperature set by external resistors External resistor tolerance contributes zero error Push-pull and open-drain temperature switch outputs Wide operating temperature and trip-temperature range of 50C to 150C Very linear analog VTEMP temperature sensor output Analog and digital outputs are short-circuit protected TRIP-TEST pin allows in-system testing Latching function for the digital outputs Very small 2.5 mm by 2.5 mm 8-Pin LLP package

Key Specifications

Supply voltage Supply current Temperature switch accuracy Analog (VTEMP) Accuracy Operating temperature Hysteresis magnitude 2.4V to 5.5V 24 A (typ) 1.5C 0.7C 50C to 150C 5C, 10C

Connection Diagram
8 Pin LLP

Typical Application

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Top View

30080502

FIGURE 1. Over-Temperature Output to Microcontroller Digital Input

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Block Diagram

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Typical Application

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Pin Descriptions
Pin No. 1 2 3 4 Name GND RSENSE1 RSENSE2 VDD Power Type Ground Equivalent Circuit Power Supply Ground Trip-Point Resistor Sense. One of two sense pins which selects the temperature at which TOVER and TOVER will go active. Trip-Point Resistor Sense. One of two sense pins which selects the temperature at which TOVER and TOVER will go active. Supply Voltage TRIP TEST pin. Active High input. If TRIP TEST = 0 (Default), then the VTEMP output has the analog temperature sensor output voltage. If TRIP TEST = 1, then TOVER and TOVER outputs are asserted and VTEMP = VTRIP, the Temperature Trip Voltage. Tie this pin to ground if not used. Over Temperature Switch output Active High, Push-Pull Asserted when the measured temperature exceeds the Trip Point Temperature or if TRIP TEST = 1 This pin may be left open if not used. Description

TRIP TEST

Digital Input

TOVER

Digital Output

TOVER

Digital Output

Over Temperature Switch output Active Low, Open-drain (See Section 2.1 regarding required pullup resistor.) Asserted when the measured temperature exceeds the Trip Point Temperature or if TRIP TEST = 1 This pin may be left open if not used. VTEMP Analog Voltage Output If TRIP TEST = 0, then VTEMP = VTS, Temperature Sensor Output Voltage If TRIP TEST = 1, then VTEMP = VTRIP, Temperature Trip Voltage This pin may be left open if not used.

VTEMP

Analog Output

Ordering Information
Package Part Number LM57BISD5 LM57BISDX5 LM57BISD10 8-Pin LLP LM57BISDX10 LM57CISD5 LM57CISDX5 LM57CISD10 LM57CISDX10 Note: The -5 suffix is for 5C hysteresis The -10 suffix is for 10C hysteresis Contact National Semiconductor Corporation for high temperature die (above 150C). Package Marking 57B5 57B5 57B9 57B9 57C5 57C5 57C9 57C9 Transport Media 1k Units Tape and Reel 4.5k Units Tape and Reel 1k Units Tape and Reel 4.5k Units Tape and Reel 1k Units Tape and Reel 4.5k Units Tape and Reel 1k Units Tape and Reel 4.5k Units Tape and Reel NSC Drawing SDA08B SDA08B SDA08B SDA08B SDA08B SDA08B SDA08B SDA08B

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Absolute Maximum Ratings (Note 1)

Supply Voltage Voltage at TOVER Voltage at TOVER , VTEMP, TRIP-TEST, RSENSE1, and RSENSE2 Current at any pin Storage Temperature Range ESD Susceptibility (Note 2) Human Body Model 0.3V to 6V 0.3V to 6V 0.3V to (VDD + 0.3V) 5 mA 65C to 150C 5500V

Machine Model 450V Charged Device Model 1250V Soldering process must comply with National's Reflow Temperature Profile specifications. Refer to www.national.com/ packaging. (Note 3)

Operating Ratings
Specified Temperature Range Supply Voltage Range

(Note 1) 50C to 150C +2.4 V to 5.5V

Accuracy Characteristics
Ranges. J3 is for Trip Points 52C to 97C. J4 for 97C to 119C. J5 for 119C to 150C.

There are four gains corresponding to each of the four Temperature Trip Point

J2 is the sensor gain used for Temperature Trip Point 41C to 51.8C.

Trip Point Accuracy

Parameter J2 Trip Point Accuracy (Includes 1% set-resistor tolerance) (Note 9) J3 J4 J5 Condition TA = 41C to 52C TA = 52C to 97C TA = 97C to 119C TA = 119C to 150C VDD = 2.4V to 5.5V VDD = 2.4V to 5.5V VDD = 2.4V to 5.5V VDD = 2.4V to 5.5V LM57B 1.5 1.5 1.5 1.5 LM57C 2.3 2.3 2.3 2.3 Units (M ax) C C C C

VTEMP Analog Temperature Sensor Output Accuracy

These limits do not include DC load regulation. These stated accuracy limits are with reference to the values in the LM57 VTEMP Temperature-to-Voltage Table. Parameter J2 J3 VTEMP Accuracy (These stated accuracy limits are with reference to the values in the LM57 Temperature-to-Voltage Table) (Note 9) J4 Condition TA = 50C to 150C TA = 50C to 150C TA = 20C to 50C TA = 0C to 150C TA = 50C to 0C TA = 60C to 150C J5 TA = 20C to 50C TA = 0C to 150C TA = 50C to 0C VDD = 2.4V to 5.5V VDD = 2.4V to 5.5V VDD = 2.4V to 5.5V VDD = 2.7V to 5.5V VDD = 3.1V to 5.5V VDD = 2.4V to 5.5V VDD = 2.9V to 5.5V VDD = 3.2V to 5.5V VDD = 4.0V to 5.5V LM57B 0.95 0.8 0.7 0.7 0.8 0.7 0.7 0.7 0.8 LM57C 1.3 1.3 1.3 1.3 1.3 1.3 1.3 1.3 1.3 C C Units (Max) C C

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Electrical Characteristics
Unless otherwise noted, these specifications apply for VDD = 2.4V to 5.5V. Boldface limits apply for TA = TJ = TMIN to TMAX; All other limits apply to TA = TJ = +25C , unless otherwise noted. Symbol Temperature Sensor J2 VTEMP Sensor Gain J3 J4 J5 Line Regulation DC: Supply-toVTEMP (Note 6) 41C to 52C 52C to 97C 97C to 119C 119C to 150C 5.166 7.752 10.339 12.924 0.18 58 84 1 1 1 1100 24 28 mV pF A mV V/V dB mV/C Parameter Conditions Min (Note 5) Typ (Note 4) Max (Note 5) Units

VDD = 2.4V to 5.5V, Gain = J4, Temp = 90C Source 240 A, (VDD - VTEMP) 200 mV Sink 300 A, VTEMP 360 mV Source or Sink = 100 A No output series resistor required (See section 5.2)

Load Regulation: VTEMP Output (Note 10) Load Capacitance: VTEMP Output (Note 11) IS Supply Current: Quiescent (Note 7) Logic 1 Threshold Voltage Logic 0 Threshold Voltage Logic 1 Input Current Logic 0 Input Leakage Current (Note 8)

TRIP-TEST Input VIH VIL IIH IIL VDD - 0.5 0.5 1.4 0.001 3 1 V V A A

TOVER (Push-Pull, Active-High) Output VOH VOL Logic 1 Push-Pull Output Voltage Source 600 A Source 1.2 mA Sink 600 A Sink 1.2 mA Sink 600 A Sink 1.2 mA Temperature = 30C 0.001 VDD- 0.2 VDD - 0.45 0.2 0.45 0.2 0.45 1 V A V V

Logic 0 Output Voltage

TOVER (Open-Drain, Active-Low) Output VOL IOH Logic 0 Output Voltage Logic 1 Output Leakage Current (Note 8)

Hysteresis THYST Timing tEN tVTEMP Time from power on to Digital Output Enabled (Note 11) Time from Power on to Analog Temperature (VTEMP) valid (Note 11) 1.0 2.9 ms Hysteresis Temperature 5C hysteresis option 10C hysteresis option 4.7 9.6 5 10 5.4 10.6 C C

1.0

2.9

ms

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Note 1: Absolute Maximum Ratings indicate limits beyond which damage may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics. Note 2: The Human Body Model (HBM) is a 100 pF capacitor charged to the specified voltage then discharged through a 1.5 k resistor into each pin. The Machine Model (MM) is a 200 pF capacitor charged to the specified voltage then discharged directly into each pin. The Charged Device Model (CDM) is a specified circuit characterizing an ESD event that occurs when a device acquires charge through some triboelectric (frictional) or electrostatic induction processes and then abruptly touches a grounded object or surface. Note 3: Reflow temperature profiles are different for lead-free and non-lead-free packages. Note 4: Typicals are at TJ = TA = 25C and represent most likely parametric norm. Note 5: Limits are guaranteed to National's AOQL (Average Outgoing Quality Level). Note 6: Line regulation (DC) is calculated by subtracting the output voltage at the highest supply voltage from the output voltage at the lowest supply voltage. The typical DC line regulation specification does not include the output voltage shift discussed in Section 5.3. Note 7: Supply Current refers to the quiescent current of the LM57 only and does not include any load current Note 8: This current is leakage current only and is therefore highest at high temperatures. Prototype test indicate that the leakage is well below 1 A over the full temperature range. This 1 A specification reflects the limitations of measuring leakage at room temperature. For this reason only, the leakage current is not guaranteed at a lower value. Note 9: Accuracy is defined as the error between the measured and reference output voltages, tabulated in the Conversion Table at the specified conditions of supply gain setting, voltage, and temperature (expressed in C). Accuracy limits include line regulation within the specified conditions. Accuracy limits do not include load regulation; they assume no DC load. Note 10: Source currents are flowing out of the LM57. Sink currents are flowing into the LM57. Load Regulation is calculated by measuring Vtemp at 0 A and subtracting the value with the conditions specified. Note 11: Guaranteed by design and characterization.

Definitions of tEN and tVTEMP

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Typical Performance Characteristics

Supply Current vs. Supply Voltage Supply Current vs. Temperature

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Load Regulation: Change in VTEMP vs. Source Current Overhead is Vdd-Vtemp

Load Regulation: Change in VTEMP vs. Sink Current

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Line Regulation: VTEMP vs. Supply Voltage

Line Regulation: Hysteresis vs. Supply Voltage 30C

30080572 30080526

Start - Up Response

Hysteresis vs. Temperature

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30080527

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Application Information
1.0 RESISTOR PROGRAMMING

Trip Point (C) vs. Set-Resistor Values ()

RSENSE2 J2 976k 976k -40.7 825k -39.1 698k -37.6 590k -36.0 499k -34.5 412k -32.9 340k -31.4 RSENSE1 280k -29.9 226k -28.3 178k -26.8 140k -25.3 105k -23.8 75k -22.3 46.4k -20.8 22.6k -19.3 0.01k -17.8 825k -16.3 -14.8 -13.3 -11.8 -10.3 -8.8 -7.3 -5.8 -4.3 -2.9 -1.4 0.0 1.5 3.0 4.4 5.9 698k 7.3 8.8 10.2 11.7 13.1 14.6 16.1 17.5 18.9 20.4 21.8 23.2 24.7 26.1 27.5 28.9 590k 30.4 31.8 33.2 34.7 36.1 37.5 39.0 40.4 41.8 43.2 44.7 46.1 47.5 48.9 50.3 51.8 499k 52.7 53.7 54.6 55.6 56.5 57.4 58.4 59.3 60.3 61.2 62.1 63.1 64.0 65.0 65.9 66.8 J3 412k 67.8 68.7 69.6 70.6 71.5 72.5 73.4 74.3 75.3 76.2 77.1 78.1 79.0 79.9 80.9 81.8 340k 82.7 83.7 84.6 85.5 86.5 87.4 88.3 89.3 90.2 91.1 92.1 93.0 93.9 94.8 95.8 96.7 280k 97.5 98.2 98.9 99.6 100.3 100.9 101.6 102.3 103.0 103.7 104.4 105.1 105.8 106.5 107.2 107.9 J4 226k 108.6 109.3 110.0 110.7 111.4 112.1 112.8 113.5 114.2 114.9 115.6 116.3 117.0 117.6 118.3 119.0 178k 119.6 120.2 120.7 121.3 121.8 122.4 122.9 123.5 124.0 124.6 125.2 125.7 126.3 126.8 127.4 127.9 140k 128.5 129.0 129.6 130.1 130.7 131.2 131.8 132.3 132.9 133.4 134.0 134.5 135.1 135.6 136.2 136.7 J5 105k 137.3 137.8 138.4 138.9 139.5 140.0 140.6 141.1 141.7 142.2 142.8 143.3 143.9 144.4 145.0 145.5 75k 146.1 146.6 147.2 147.7 148.3 148.8 149.3 149.9

VTEMP (mV) at the Trip Point vs. Set-Resistor Value ()

RSENSE2 J2 976k 976k 825k 698k 590k 499k 412k 340k RSENSE1 280k 226k 178k 140k 105k 75k 1306.2 1298.5 1290.7 1283.0 1275.3 1267.6 1259.9 1252.2 1244.6 1237.0 1229.4 1221.8 1214.1 825k 1183.8 1176.2 1168.7 1161.2 1153.6 1146.1 1138.6 1131.0 1123.5 1116.0 1108.6 1101.2 1093.7 1086.3 1078.9 1071.4 698k 1064.0 1056.6 1049.1 1041.7 1034.3 1026.8 1019.4 1012.0 1004.6 997.3 989.9 982.5 975.2 967.8 960.4 953.1 590k 499k J3 412k 340k 280k J4 226k 178k J5 140k 105k 75k

945.6 1243.7 1125.3 1006.8 1185.3 1066.0 1184.0 1064.6 944.8 825.0 938.2 1236.3 1117.9 999.3 930.8 1228.9 1110.5 991.9 923.4 1221.5 1103.1 984.5 916.0 1214.1 1095.7 977.1 908.6 1206.7 1088.3 969.7 901.2 1199.3 1080.9 962.2 893.8 1191.9 1073.5 954.8 886.4 1184.5 1066.0 947.3 879.0 1177.1 1058.6 939.9 871.6 1169.7 1051.2 932.5 864.2 1162.3 1043.8 925.0 856.8 1154.9 1036.4 917.6 849.4 1147.5 1029.0 910.2 842.0 1140.1 1021.6 902.7 834.6 1132.7 1014.2 895.3 1177.8 1058.5 1176.6 1057.1 937.3 817.5 1170.4 1051.0 1169.1 1049.6 929.8 810.1 1163.0 1043.6 1161.6 1042.1 922.3 802.7 1155.5 1036.1 1154.2 1034.6 914.8 795.2 1148.1 1028.6 1146.7 1027.2 907.3 787.8 1140.7 1021.1 1139.2 1019.7 899.8 780.3 1133.2 1013.6 1131.7 1012.2 892.3 772.9 1125.8 1006.1 1124.3 1004.7 884.8 1118.3 998.7 1110.9 991.2 1103.5 983.7 1096.0 976.2 1088.6 968.7 1081.2 961.2 1073.7 953.8 1116.8 997.2 1109.3 989.7 1101.8 982.2 1094.4 974.8 1086.9 967.3 1079.4 959.8 1072.0 952.3 877.3 869.8 862.3 854.8 847.3 839.8 832.3

46.4k 1206.5 22.6k 1198.9 0.01k 1191.3

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1.1 Selection of RSET Resistors To set the trip point: (1) Locate the desired trip temperature on the Trip Point Table. (2) Identify the corresponding RSENSE2 value by following the column up to the resistor value. (3) Identify the corresponding RSENSE1 value by following the row leftwards to the resistor value. (4) Use only the standard resistor values from the list. (5) Use only the resistor with 1% tolerance and a temperature coefficient of 100ppm (or better). These restrictions are nec2.0 LM57 VTEMP TEMPERATURE-TO-VOLTAGE TABLE VTEMP (mV) Temperature (C) 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 J2 1353 1348 1343 1338 1333 1328 1323 1318 1313 1308 1303 1298 1293 1288 1283 1278 1273 1268 1263 1258 1253 1248 1243 1238 1233 1228 1223 1218 1213 1208 1203 1198 1193 1188 1182 1177 1172 1167 J3 2029 2021 2014 2006 1999 1992 1984 1977 1969 1962 1954 1947 1939 1932 1924 1917 1909 1902 1894 1887 1879 1872 1864 1857 1849 1841 1834 1826 1819 1811 1804 1796 1789 1781 1773 1766 1758 1751 J4 2705 2695 2685 2675 2665 2655 2646 2636 2626 2616 2606 2596 2586 2576 2566 2556 2546 2536 2526 2516 2506 2495 2485 2475 2465 2455 2445 2435 2425 2415 2405 2395 2385 2375 2365 2354 2344 2334 J5 3381 3369 3357 3344 3332 3319 3307 3294 3282 3269 3257 3244 3232 3219 3207 3194 3182 3169 3157 3144 3132 3119 3107 3094 3082 3069 3056 3044 3031 3019 3006 2993 2981 2968 2956 2943 2930 2918
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essary to stay at the selected setting, and not to slip into an adjacent setting. (6) This is consistent with using resistors from the Thick Film Chip Resistors CRCW0402 family. These are available with very small dimensions of L = 1.0mm, W = 0.5mm, H = 0.35mm. (7) Note that the resistor tolerance does not diminish the accuracy of the trip point. See patent #6, 924, 758.

VTEMP (mV) Temperature (C) 12 11 10 9 8 7 6 5 4 3 2 1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 J2 1162 1157 1152 1147 1142 1137 1132 1127 1122 1117 1112 1106 1101 1096 1091 1086 1081 1076 1071 1066 1061 1055 1050 1045 1040 1035 1030 1025 1020 1015 1009 1004 999 994 989 984 979 973 J3 1743 1735 1728 1720 1713 1705 1697 1690 1682 1675 1667 1659 1652 1644 1636 1629 1621 1613 1606 1598 1590 1583 1575 1567 1560 1552 1544 1537 1529 1521 1514 1506 1498 1490 1483 1475 1467 1460 J4 2324 2314 2304 2294 2284 2273 2263 2253 2243 2233 2223 2212 2202 2192 2182 2172 2161 2151 2141 2131 2121 2110 2100 2090 2080 2069 2059 2049 2039 2028 2018 2008 1997 1987 1977 1967 1956 1946 J5 2905 2892 2880 2867 2854 2842 2829 2816 2803 2791 2778 2765 2753 2740 2727 2714 2702 2689 2676 2663 2650 2638 2625 2612 2599 2586 2574 2561 2548 2535 2522 2509 2497 2484 2471 2458 2445 2432
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VTEMP (mV) Temperature (C) 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 J2 968 963 958 953 948 942 937 932 927 922 917 911 906 901 896 891 885 880 875 870 865 859 854 849 844 839 833 828 823 818 812 807 802 797 791 786 781 776 770 765 760 755 749 744 739 734 728 723 J3 1452 1444 1436 1429 1421 1413 1405 1398 1390 1382 1374 1367 1359 1351 1343 1335 1328 1320 1312 1304 1296 1289 1281 1273 1265 1257 1249 1242 1234 1226 1218 1210 1202 1194 1187 1179 1171 1163 1155 1147 1139 1131 1124 1116 1108 1100 1092 1084 J4 1936 1925 1915 1905 1894 1884 1874 1863 1853 1843 1832 1822 1811 1801 1791 1780 1770 1759 1749 1739 1728 1718 1707 1697 1687 1676 1666 1655 1645 1634 1624 1613 1603 1592 1582 1571 1561 1550 1540 1529 1519 1508 1498 1487 1477 1466 1456 1445 J5 2419 2406 2394 2381 2368 2355 2342 2329 2316 2303.0 2290 2277 2264 2251 2238 2225 2212 2199 2186 2173 2160 2147 2134 2121 2108 2095 2082 2069 2056 2043 2030 2016 2003 1990 1977 1964 1951 1938 1925 1911 1898 1885 1872 1859 1846 1833 1819 1806 Temperature (C) 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 J2 718 713 707 702 697 691 686 681 675 670 665 660 654 649 644 638 633 628 622 617 612 606 601 596 590 585 580 574 569 564 558 553 548 542 537 531 526 521 515 510 505 499 494 488 483 478 472 467

VTEMP (mV) J3 1076 1068 1060 1052 1044 1036 1028 1021 1013 1005 997 989 981 973 965 957 949 941 933 925 917 909 901 893 885 877 869 861 853 845 837 829 821 813 805 797 788 780 772 764 756 748 740 732 724 716 708 700 J4 1435 1424 1413 1403 1392 1382 1371 1360 1350 1339 1329 1318 1307 1297 1286 1276 1265 1254 1244 1233 1222 1212 1201 1190 1180 1169 1158 1148 1137 1126 1115 1105 1094 1083 1073 1062 1051 1040 1030 1019 1008 997 986 976 965 954 943 933 J5 1793 1780 1767 1753 1740 1727 1714 1700 1687 1674 1661 1647 1634 1621 1607 1594 1581 1568 1554 1541 1528 1514 1501 1488 1474 1461 1448 1434 1421 1407 1394 1381 1367 1354 1340 1327 1314 1300 1287 1273 1260 1246 1233 1219 1206 1192 1179 1165

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VTEMP (mV) Temperature (C) 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 J2 461 456 451 445 440 434 429 424 418 413 407 402 396 391 386 380 J3 692 683 675 667 659 651 643 635 627 618 610 602 594 586 578 570 J4 922 911 900 889 878 868 857 846 835 824 813 803 792 781 770 759 J5 1152 1138 1125 1111 1098 1084 1071 1057 1044 1030 1017 1003 989 976 962 949 Temperature (C) 138 139 140 141 142 143 144 145 146 147 148 149 150 J2 375 369 364 358 353 347 342 336 331 326 320 315 309

VTEMP (mV) J3 561 553 545 537 529 520 512 504 496 488 480 471 463 J4 748 737 726 716 705 694 683 672 661 650 639 628 617 J5 935 921 908 894 881 867 853 840 826 812 799 785 771

Note: The Rset resistors select a trip point and a corresponding Vtemp gain (J2, J3, J4, or J5). The trip point range associated with a given gain is shown in bold on this table. The Vtemp gain is selected by the Rset resistors. Vtemp is valid over the entire temperature range.

2.1 LM57 VTEMP Voltage -To-Temperature Equations Trip-Point Region J2 J3 J4 J5 LM57 Trip Point Range 41C to 52C 52C to 97C 97C to 119C 119C to 150C VTEMP (mV) Equations T(C) VTEMP = 947.6 5.166(T-30) - 0.00129(T-30)2 VTEMP = 1420.9 7.752(T-30) - 0.00191(T-30)2 VTEMP = 1894.3 10.339(T-30) - 0.00253(T-30)2 VTEMP = 2367.7 12.924(T-30) - 0.00316(T-30)2

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3.0 TOVER AND TOVER DIGITAL OUTPUTS The TOVER Active High, Push-Pull Output and the TOVER Active Low, Open-Drain Output both assert at the same time whenever the Die Temperature reaches the Trip Point. They also assert simultaneously whenever the TRIP TEST pin is set high. Both outputs de-assert when the die temperature goes below the (Temperature Trip Point) - (Hysteresis). These two types of digital outputs enable the user the flexibility to choose the type of output that is most suitable for his design. Either the TOVER or the TOVER Digital Output pins can be left open if not used. The TOVER Active Low, Open-Drain Digital Output, if used, requires a pull-up resistor between this pin and VDD. 3.1TOVER and TOVER Noise Immunity The LM57 has some noise immunity to a premature trigger due to noise on the power supply. With the die temperature at 1C below the trip point, there are no premature triggers for a square wave injected into the power supply with a magnitude of 100 mVPP over a frequency range of 100 Hz to 2 MHz. Above the frequency a premature trigger may occur. With the die temperature at 2C below the trip point, and a magnitude of 200 mVPP, there are no premature triggers from 100 Hz to 300 kHz. Above that frequency a premature trigger may occur. Therefore if the supply line is noisy, it is recommended that a local supply decoupling cap be used to reduce that noise. 4.0 TRIP TEST DIGITAL INPUT The TRIP TEST pin provides a means to test the digital outputs by causing them to assert, regardless of temperature. In addition, when the TRIP TEST pin is pulled high the VTEMP pin will be at the VTRIP voltage. 5.0 VTEMP ANALOG TEMPERATURE SENSOR OUTPUT The VTEMP push-pull output provides the ability to sink and source significant current. This is beneficial when, for example, driving dynamic loads like an input stage on an analogto-digital converter (ADC). In these applications the source current is required to quickly charge the input capacitor of the ADC. See the Applications Circuits section for more discussion of this topic. The LM57 is ideal for this and other applications which require strong source or sink current. 5.1 VTEMP Noise Considerations A load capacitor on VTEMP can help to filter noise. For noisy environments, a 100nF supply decoupling cap placed closed across VDD and GND pins of LM57 is recommended. 5.2 VTEMP Capacitive Loads The VTEMP Output handles capacitive loading well. In an extremely noisy environment, or when driving a switched sampling input on an ADC, it may be necessary to add some filtering to minimize noise coupling. Without any precautions, the VTEMP can drive a capacitive load less than or equal to 1100 pF as shown in Figure 2. For capacitive loads greater than 1100 pF, a series resistor is required on the output, as shown in Figure 3, to maintain stable conditions.

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FIGURE 2. LM57 No Isolation Resistor Required

30080517

CLOAD 1.1 nF to 99 nF 100 nF to 999 nF 1 F

Minimum RS 3 k 1.5 k 750

FIGURE 3. LM57 with Series Resistor for Capacitive Loading greater than 1100 pF. 5.3 VTEMP Voltage Shift The LM57 is very linear over temperature and supply voltage range. Due to the intrinsic behavior of an NMOS/PMOS railto-rail buffer, a slight shift in the output can occur when the supply voltage is ramped over the operating range of the device. The location of the shift is determined by the relative levels of VDD and VTEMP. The shift typically occurs when VDD VTEMP = 1.0V. This slight shift (a few millivolts) takes place over a wide change (approximately 200 mV) in VDD or VTEMP. Since the shift takes place over a wide temperature change of 5C to 20C, VTEMP is always monotonic. The accuracy specifications in the Electrical Characteristics table already includes this possible shift. 6.0 MOUNTING AND TEMPERATURE CONDUCTIVITY The LM57 can be applied easily in the same way as other integrated-circuit temperature sensors. It can be glued or cemented to a surface. To ensure good temperature conductivity, the backside of the LM57 die is directly attached to the exposed pad. The temperatures of the lands and traces to the other leads of the LM57 will also affect the temperature reading. Alternatively, the LM57 can be mounted inside a sealed-end metal tube, and can then be dipped into a bath or screwed into a threaded hole in a tank. As with any IC, the LM57 and accompanying wiring and circuits must be kept insulated and dry, to avoid leakage and corrosion. This is especially true if the circuit may operate at cold temperatures where condensation can occur. If moisture creates a short circuit from the

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VTEMP output to ground or VDD, the VTEMP output from the LM57 will not be correct. Printed-circuit coatings are often used to ensure that moisture cannot corrode the leads or circuit traces. The LM57's junction temperature is the actual temperature being measured. The thermal resistance junction-to-ambient (JA) is the parameter (from Figure 4) used to calculate the rise of a device junction temperature due to its power dissipation. The equation used to calculate the rise in the LM57's die temperature is

two Rsense pins with a voltage equal to the value generated by the resistor and the internal current-source and have the same switch point. Thus one can use an external DAC to drive each Rsense pin, allowing for the temperature trip point to be set dynamically by the system processor. The table shows the Rset value and its corresponding generated Rsense pin voltage (the Center Value"). Rset Values (k) vs Rsense Voltage (mV) Rset () 976k 825k 698k 590k 499k 412k 340k 280k 226k 178k 140k 105k 75k 46.4k 22.6k 0.01k Rsense Voltage (mV) Center Value 1875 1585 1341 1134 959 792 653 538 434 342 269 202 146 87 43 0

where TA is the ambient temperature, IQ is the quiescent current, IL is the load current on Vtemp. For example, in an application where TA = 30 C, VDD = 5.5 V, IDD = 28 A, J5 gain, VTEMP = 2368 mV, and IL = 0 A, the total temperature rise would be [152C/W*5.5V*28A] = 0.023C. To minimize self-heating, the load current on Vtemp should be minimized. Device Number LM57 Thermal Resistance (JA) 152 C/W NS Package Number SDA08B

FIGURE 4. LM57 Thermal Resistance 7.0 Rset TABLE The LM57 uses the voltage at the two Rsense pins to set the trip point for the temperature switch. It is possible to drive the

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Applications Circuits

30080561

FIGURE 5. Temperature Switch Using Push-Pull Output

30080562

FIGURE 6. Temperature Switch Using Open-Drain Output

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LM57

30080528

Most CMOS ADCs found in microcontrollers and ASICs have a sampled data comparator input structure. When the ADC charges the sampling cap, it requires instantaneous charge from the output of the analog source such as the LM57 temperature sensor and many op amps. This requirement is easily accommodated by the addition of a capacitor (CFILTER). The size of CFILTER depends on the size of the sampling capacitor and the sampling frequency. Since not all ADCs have identical input stages, the charge requirements will vary. This general ADC application is shown as an example only. FIGURE 7. Suggested Connection to a Sampling Analog-to-Digital Converter Input Stage

30080560

FIGURE 8. TRIP TEST Digital Output Test Circuit

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LM57

30080573

When Tover goes active high, it drives Trip Test high. Trip Test high causes Tover to stay high. It is therefore latched. To release the latch: Power down then power up. The LM57 always comes up in a released condition. FIGURE 9. Simple Latch Circuit

30080565

The TRIP TEST pin, normally used to check the operation of the TOVER and TOVER pins, may be used to latch the outputs whenever the temperature exceeds the programmed limit and causes the digital outputs to assert. As shown in the figure, when TOVER goes high the TRIP TEST input is also pulled high and causes TOVER output to latch high and the TOVER output to latch low. Momentarily switching the TRIP TEST input low will reset the LM57 to normal operation. The resistor limits the current out of the TOVER output pin. FIGURE 10. Latch Circuit using TOVER Output

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LM57

Physical Dimensions inches (millimeters) unless otherwise noted

8-Pin LLP NS Package Number SDA08B

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LM57 Resistor-Programmable Temperature Switch and Analog Temperature Sensor

Notes

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