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Computer Architecture Sachin Chandra

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Question 1:
Examine the architectural configuration of your computer and produce a detailed
report which should contain the following:

(i) Type of micro-processors

• Its instruction formats and data formats
• Addressing modes
• Instruction Categories
• What are HLL (High Level Language) support and assembly directions?
(ii) No. of I/O Ports and its uses.
(iii) Specification of Network cards.
(iv) Resolution of monitor
(v) Bus Specification

Answer:
The main components in a typical system are the processor, memory, input/output devices,
and the communication channels that connect them.
The processor is the workhorse of the system; it is the component that executes a
program by performing arithmetic and logical operations on data. It is the only component
that creates new information by combining or modifying current information. In a typical
system there will be only one processor, known at the central processors, often have more
than one processor. Systems with only one processor are serial processors, or, especially
among computational scientists, scalar processors.
Memory is a passive component that simply stores information until it is requested by
requested by another part of the system. During normal operations it feeds instructions and
data to the processor, and at other times it do I/O devices transfer the source or destination of
data. Information in a memory is accessed by its address. In programming language terms,
one can view memory as a one-dimentional array M. A processor’s request to the memory
might be “send the instruction at location M[1000]” or a disk controller’s request might be
“store the following block of data in locations M[0] through M[255]”.
Input/output (I/O) devices transfer information without altering between the external
world and one or more internal components. I/O devices can be secondary memories, for eg:-
disks and Tapes, or devices used to communicate directly with users, such as video displays,
keyboards, and mouses.
The communication channels that tie the system together can either be simple links
that connect two devices or more complex switches that interconnect several components and
allow any two of them to communicate at a given point in time. When a switch is configured
to allow two devices to exchange information, all other devices that rely on the switch are
blocked i.e., they must wait until the switch can be re-configured.
PROCESSORS
The operation of a processor is characterized by a fetch-decode-execute cycle. In the
first phase of the cycle, the processor fetches an instruction from memory. The address of the
instruction to fetch is stored in an internal register named the program counter, or PC. As the
processor is waiting for the memory to respond with the instruction, it increments the PC.
This means the fetch phase of the next cycle will fetch the instruction in the next sequential
location in memory (unless the PC is modified by a later phase of the cycle).
In the decode phase the processor stores the information returned by the memory in
another internal register, known as the instruction register, or IR. The IR now holds a single
machine instruction, encoded as a binary number. The processor decodes the value in the IR
in order to figure out which operations to perform in the next stage.

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In the execution stage the processor actually carries out the instruction. This step often
requires further memory operations; for example, the instruction may direct the processor to
fetch two operands from memory, add them, and store the result in a third location (the
address of the operands and the result are also encoded as part of the instruction) .At the end
of this phase the machine starts the cycle over again by entering the fetch phase for the next
instruction.
Instructions can be classified as one of three major types: arithmetic/logic, data
transfer, and control. Arithmetic and logic instructions apply primitive functions of one or
two arguments, for example addition, multiplication, or logical AND. In some machines the
arguments are fetched from main memory and the result is returned to main memory, but
more often the operands are all in registers inside the CPU. Most machines have a set of
general purpose registers that can be used for holding such operands. For eg:- the HP-PA
processor in Hewlett-Packard workstations has 32 such registers, each of which holds a single
number.
MEMORIES
Memories are characterized by their function, capacity, and response times.
Operations on memories are called reads and writes, defined from the perspective of a
processor or other device, and a write transfers information into the memory. A memory that
performs both reads and writes is often just called a RAM, for random access memory. The
term “random accesss” means that if location m[x] is accessed at time, t, there are no
memory. The term “random access” means that if location M[x] is accessed at time t, there
are no restrictions on the address of the item accessed at time t + 1 . Other types of memories
commonly used in systems are read-only memory, or ROM, and programmable read-only
memory, or PROM (information in a ROM is set when the chips are designed: information in
a PROM can be written later, one time only, usually just before the chips are inserted into the
system). For eg:- The Apple Macintosh, shown in Figure 1, had a PROM called the
“Toolbox” that contained code for commonly used operating system functions.
BUSES
A bus is used to transfer information between several different modules. Small and
mid-range computer systems. Such as the Macintosh shown in Fig-1 have a single bus
connecting all major components. Super-computers and other high performance machines
have more complex interconnections, but many components will have internal buses.
Communication on a bus is broken into discrete transactions. Each transaction has a
sender and receiver. In order to initiate a transaction, a module has to gain control of the bus
and become (temporarily, at least) the bus master. Often several devices have the ability to
become the master, for eg:- The processor controls transactions that transfer instructions and
data between memory and CPU, but a disk controller becomes the bus master to transfer
blocks between disk and memory. When two or more devices want to transfer information at
the same time, an arbitration protocol is used to decide which will be given control first. A
protocol is a set of signals exchanged between devices in order to perform some task, in this
case to agree which device will become the bus master.
Once a device has control of the bus, it uses a communication protocol to transfer the
information. In an asynchronous (unlocked) protocol the transfer can begin at any time, but
there is some overhead involved in notifying potential receivers that information needs to be
transferred. In a synchronous protocol transfers are controlled by a global clock and being
only at well-known times.

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OPERATING SYSTEMS
The user’s view of a computer is of a complex set of services that are provided by a
combination of hardware (the architecture and its organization) and software (the operating
system). Attributes of the operating system also affect the performance of user programs.
Operating systems for all the simplest personal computers are multi-tasking operating
systems. This means the computer will be running several jobs at once. A program is a static
description of an algorithm. To run a program, the system will decide how much memory it
needs and then start a process for this program; a process (also known as a task) can be
viewed as a dynamic copy of a program. For eg, the C compiler is a program. Several
different users can be compiling their code at the same time; There will be a separate process
in the system for each of these invocations of the compiler.
Processes in a multi-tasking operating system be in one of three states. A process is
active if the CPU is executing the corresponding program. In a single processor system there
will be only one active process at any time. A process is idle if it is waiting to run. In order to
allocate time on the CPU fairly to all processes, the operating system will let a process run for
a short time (Known as a time slice; typically around 20cms) and then interrupt it, change its
status to idle, and install one of the other idle tasks as the new active process. The previous
task goes to the end of a process queue to wait for another time slice.
The third state for a process is blocked. A blocked process is one that is waiting for
some external event. For eg: if a process needs a piece of data from a file, it will call the
operating system routine that retrieves the information and then voluntarily give up the
remainder of its time slice. When the data is ready, the system changes the process state
blocked to idle, and it will be resumed again when its turn comes.
REGISTER SET
The purpose of the register is to hold temporary results, and control the execution of
the program. General purpose registers in Pentium are EAX, ECX, EDX, ESP, EBP, ESI or
EDI.
The 32-bit registers are named with prefix E, EAX, etc, and the least 16 bits 0-15 of
these registers can be accessed with names such as AX, SI similarly the lower eight bits(0-7)
can be accessed with names such as AL & BL. The higher eight bits (-8-15) with names such
as AH & BH. The insertion pointer EAP known as program counter (PC) in 8-bit
microprocessor is a32-bit register to handle 32-bit memory addresses, and the lower 16-bit
segment IP is used for 16-bit memory address.
The flag register is a 32-bit register, however 14-bits are being used at present for 13
different tasks; these flags are upward compatible with those of the 8086 and 80286. The
comparison of the available flags in 16 bit and 32 bit microprocessor is may provide some
clues related to capabilities of these processors. The 8086 have 9 flags, the 80286 have 11
flags, and the 80286 have 13 flags. All of these flag registers include 6 flags related to data
conditions (sign, zero, carry, auxiliary, carry, overflow, and parity) and three flags related to
machine operations. (Interrupts, single-step and strings). The 80286 have two additional: I/O
Privilege and Nested Task. The I/O Privilege uses two bits in protected mode to determine
which I/O instructions can be used, and the nested task is used to show a link between two
tasks. The processor also includes control registers and system address registers, debug and
test registers, debug and test registers for system and debugging operations.

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ADDRESSING MODE & TYPES OF INSTRUCTIONS

Instruction set is divided into 9 categories of operations and has 11 addressing modes.
In addition to commonly available instructions in an 8-bit microprocessor and this includes
operations such as bit manipulation and string operations, high-level language support and
operating system support. An instruction may have 0-3 operands and the operand can be 8,16,
or 32 bits long. The 80386 handles various types of data such as single bit, string of bits,
signed and unsigned 8,16,32 and 64 bit data, ASCII character and BCD numbers.
High-level language support group includes instructions such as ENTER and LEAVE.
The ENTER instruction is used to ENTRE from a high level language and it assigns memory
location on the stack for the routine being entered and manages the stack. On the other hand
the LEAVE generates a return procedure for a high-level language. The operating system
support group includes several instructions, such as APRL. (Adjust Requested Privilege
Level) and the VERR/W (Verify Segment for Reading Writing). The APRL is designed to
prevent the operating system from gaining access to routines with a higher priority level and
the instructions VERR/W verify whether the specified memory address can be reached from
the current privilege level.
Instruction Opcode ModR/M SIB Displacement Immediate
Prefixes

Up to four 1 or 2 byte 1 byte 1 byte Address Immediate

Prefixes of opcode (if required) (if required) displacement of data of 1, 2, or
1-byte each 1, 2, or 4 bytes 4 bytes or none
(optional) or none
7 6.5 3.2 0 7 6.5 3.2 0
Mod Reg/ R/M Scale Index Base
Opcode

Intel Architecture Instruction Format

GENERAL INSTRUCTION FORMAT

All Intel Architecture instruction encoding are subsets of the general instruction
format shown in figure 2-1. Instructions consist of optional instruction prefixes (in any
order), one or two primary opcode bytes, an addressing-form specifier (if required) consisting
of the ModR/M byte and sometimes the SIB (Scale Index Base) byte, a displacement (if
required), and an immediate data field(if required).
Meanings of the operand specifications
Reg-Register mode operand, 32-bit register
Reg8 –register mode operand, 8-bit register
R/m – general addressing mode, 32-bit
R/m8- general addressing mode, 8-bit
Immed-32-bit immediate is in the instruction
Immed-9-bit immediate is in the instruction
m-symbol(label) in the instruction is the effective address
Floating Point Arithmetic
Since the newer architecture have room for floating point hardware on chip, Intel
defined a simple-to-implement extension to the architecture to do floating point arithmetic. In
their usual Zeal, they have included MANY instructions to do floating point operations.
The mechanism is simple. A set of 8 registers are organised and maintained (by
hardware) as a stack of floating point values. ST refers to the stack top. ST(1) refers to the
register within the stack that is next to ST. ST and ST(0) are synonyms.

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Input/Output
The only instructions which actually allow the reading and writing of I/O devices are
priviledged. The OS must handle these things. But, in writing programs that do something
useful, we need input and output. Therefore, there are some simple macros defined to help us
do I/O. These are used just like instructions.
put_ch r/m ; print character in the least significant
; byte of 32-bit operand
get_ch r/m ; character will be in AL
put_str m ; print null terminated string given
Control Instructions
These are the same control instructions that all started with the character ‘b’ in SASM.
jmp m ; unconditional jump
jg m ; jump if greater than 0
jge m ; jump if greater than or equal to 0
jl m ; jump if less than 0
jle m ; jump if less than or equal to 0.
INSTRUCTION PREFIXES
The instruction prefixes are divided into four groups, each with a set of allowable
prefix codes:
Lock and repeat prefixes.
- F0H - LOCK prefix.
- F2H - REPNE/REPNZ prefix (used only with string instructions).
- F3H - REP prefix (used only with string instructions).
- F3H - REPE/REPZ prefix (used only with string instructions).
- F3H - Streaming SIMD Extensions prefix.
Segment override.
- 2EH - CS segment override prefix.
- 36H - SS segment override prefix.
- 3EH - DS segment override prefix.
- 26H - ES segment override prefix.
- 64H - FS segment override prefix.
- 65H - GS segment override prefix.
• Operand size override, 66H
• Address size override, 67H
For each instruction, one prefix may be used from each of these groups and be placed
any order. The effect of redundant prefixes (more than one prefix from a group) is undefined
and may vary from processor to processor.
HIGH LEVEL LANGUAGE SUPPORT
The advantages of programming in a high level language include abstraction and
portability. Abstraction means programmers can describe algorithms in a “high level”
notation that is independent of details about the machine that will execute the algorithm.
Portability is a by-product of abstraction that allows programs to be run on a wide variety of
computers as long as there is a compiler that will translate them for each machine.
In most programming situations reality is close to the ideal. Compilers for many high
level languages and expect them to run efficiently on almost any machine. There may be a
few isolated places where a programmer who invests a lot of effect may be able to write a
more efficient routine in assembly language (the native language of the machine), but it is
hardly ever worth the effort to write an entire program in assembly language. Obviously
when all or part of a program is written in assembler it is not as abstract, since assembly
language is the language of the machine and not the language of the application, and it is no
longer portable from one machine to another.

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The main data-processing functions of a computer involve its CPU and external
(cache-main) memory M. The CPU fetches instructions and data M, processes them and
eventually stores the results back in M. The other system components – secondary memory,
user interface devices, and so on – constitute the input-output (IO) system.
I/O AND SYSTEM CONTROL
The main data-processing functions of a computer involve its CPU and external
(cache-main) memory M. The CPU fetches instructions and data M, processes them, and
eventually stores the results back in M. The other system components – secondary memory,
user interface devices, and so on – constitute the input-output (IO) system.
I/O Control Methods
Input-output operations are distinguished by the extent to which the CPU is involved
in their execution. (IO operation refers to data transfer between an IO device and M, or
between an IO device and the CPU). If such operations are completely controlled by the
CPU, that is, the CPU executes programs that initiate, direct, and terminate the IO operations,
the computer is said to be using programmed IO. This type of IO control can be implemented
with little or no special hardware but causes the CPU to spend a lot of time performing
relatively trivial IO - related functions. One such function is testing the status of IO devices to
determine if they require servicing by the CPU.
A modest increase in the hardware enables an IO device to transfer a block of
information to or from M without CPU intervention. This task requires the IO device to
generate memory addresses and transfer data to or from the bus (system or local) connecting
it to M via its interface controller; in other words, the IO device must be able to act as a bus
master. The CPU is till responsible for initiating each block transfer. The IO device interface
controller can then carry out the transfer without further program execution by the CPU. The
CPU and IO controller interact only when the CPU must yield control of the memory bus to
the IO controller in response to requests from the later, this level of IO control is called DMA
controller.
Programmed I/O
First we examine programmed IO, a method included in every computer for
controlling IO operations. It is most useful in small, low-speed systems where hardware costs
must be minimized. Programmed IO requires that all IO operations be executed under the
direct control of the CPU; in other words, every data-transfer operation involving an IO
device requires the execution of an instruction by the CPU. Typically the transfer is between
two programmable registers: one a CPU register and the other attached to the IO device, The
IO device does not have direct access to main memory M. A data transfer from an IO device
to M requires the CPU to execute several instructions, including a input instruction to transfer
a word from the IO device to the CPU and a store instruction to transfer the word from the
CPU to M. One or two additional instructions may be needed for address computation and
data word counting.
I/O Addressing
In systems employing programmed IO, the CPU, M, and IO devices usually
communicate via the system bus. The address lines of the system bus that are used to select
memory locations can also be used to select IO devices. An IO device is connected to the bus
via an IO port, which, is from the CPU’s perspective, is an addressable register, thus making
it little different from a main-memory location. A technique used in many machines, such as
Motorola 680X0 series, is to assign a part of the main-memory address space to IO ports.
This technique is called memory-mapped IO. A memory-referencing instruction that causes
data to be fetched from or stored at address X automatically becomes an IO instruction if X is
made is made the address of an IO port. The usual memory load and store instructions are
used to transfer data words to or from IO ports; no special IO instructions are needed. The

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control lines READ and WRITE, which are activated by the CPU when processing a memory
reference instruction, are used to initiate either a memory access cycle or an IO transfer.
I/O Instructions
As few as two IO instructions implement programmed IO. For eg:- members of the
Intel 80x86 series have two IO instructions called IN and OUT. The instruction IN X causes a
word to be transferred from IO port X to the 80X86’s accumulator register A. The instruction
OUT X transfers a word from the A register to IO port X. The CPU assigns no special
meaning to the words transferred to IO devices, but the programmer can do so. Some words
may indicate IO device IO device status and others may be control information (commands)
for the IO device.
When the CPU executes an IO instruction such as IN or OUT, the addressed IO port is
expected to be ready to respond to the instruction. Therefore, the IO device must transfer data
to or from the CPU-IO data bus within a specified period. To prevent loss of information or
an indefinitely long IO instruction execution time, the CPU must know the IO device’s status
before initiating an IO data transfer. Often the status is specified by a single bit of information
that the IO device makes available on a continuous basis, for eg:- by setting a flip-flop
connected to the data lines at some IO port.
The CPU must perform the following steps to determine the status of an IO device:
1. Read the IO device’s status bit.
2. Test the status bit to determine if the device is ready to begin transferring data.
3. If not ready, return to step 1; otherwise, proceed with the data transfer.
I/O Interface Circuits
The task of connecting an IO device to a computer system is greatly eased by the use
of standard ICs variously known as IO interface circuits, peripheral interface adapters and
like. These circuits allow IO devices of widely different characteristics to be connected to a
standard bus with a minimum of special purpose hardware or software. The simplest interface
circuit is a one word, addressable register that serves as an IO port. The major microprocessor
families contain various general purpose and special purpose IO interface circuits. They are
called programmable if they can be modified under program control to match the
characteristics of different IO devices.
Among the most basic IO interface circuits are programmable circuits intended to act
as serial or parallel ports. Serial ports accommodate many types of slow peripheral devices
ranging from secondary memory units to network connections. Parallel ports are designed to
interface with IO devices employing multi-bit, bi-directional data paths.
Specification of Network Cards: Ethernet
Ethernet is the least expensive high-speed LAN alternative. Ethernet adapter cards for
a PC range from $60 to $120. They transmit and receive data at speeds of 10 million bits per
second through up to 300 feet of telephone wire to a “hub” device normally stacked in a
wiring closet. The hub adds less than $50 to the cost of each desktop connection. Data is
transferred between wiring closets using either a heavy coax cable (“Thicknet”) or fiber optic
cable.
Most textbook treatments of Ethernet would concentrate on Thicknet coax, because
that is the wiring arrangement used when Xerox invented the LAN. Today this is still used for
medium-long distances where medium levels of reliability are needed. Fiber goes farther and
has greater reliability, bur a higher cost. To connect a number of workstations within the same
room, a light duty coax cable called “Thinnet” is commonly used. These other media reflect
an older view of workstation computers in a laboratory environment.
However, the PC and Macintosh have changed the geography of networking.
Computers are now located on desktops, drom rooms, and at home. Telephone wire is the
clear choice (where possible) for the last hop from basement to desktop.
Drivers to support the PC Ethernet card come in four versions:

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• Access to the Internet under DOS can be provided using one of the Packet Driver
Programs. A collection of free drivers is available from various Internet servers.
• Support for Novell clients under DOS can be packaged as a module called IPX.COM.
• When Novell must share the Ethernet with other software, it supplies a proprietory
interface called ODI. Because of the large market share controlled by Novell, ODI
supports most adapter cards and is used by several other software vendors.
• All the major companies (Microsoft, IBM, DEC, AT&T) and all the other operating
systems (Windows for Workgroups, OS/2, NT, Chicago) use NDIS. Developed jointly by
Microsoft and 3Com, NDIS also supports most adaptor cards ans is the native choice for
Windows and OS/2 peer networks.
Through NDIS or ODI it is possible to support Novell IPX, IBM SNA, DECNET,
Appletalk, TCP/IP (for the Internet), and NETBIOS all simultaneously. Of course, it takes a
very large machine and an advanced operating system to squeeze all this software into
memory.
Definitions and Standards
The early development of Ethernet was done by Xerox research. The name “Ethernet”
was a registered trademark of Xerox Corporation. The technology was refined and a second
generation called Ethernet II was widely used. Ethernet from this period is often called DIX
after its corporate sponsors Digital, Intel, and Xerox. As the holder of the trademark, Xerox
established and published the standards.
Obviously, no technology could become an international standard for all sorts of
equipment if a single US corporation controlled the rules. The IEEE was assigned the task of
developing formal international standards for all Local Area Network technology. It formed
the “802” committee to look at Ethernet, Token Ring, Fiber Optic, and the other LAN
technology. The objective of the project was not just to standardize each LAN individually,
but also to establish rules that would be global to all types of LANs so that data could easily
move from Ethernet to Token Ring or Fiber Optics.
This larger view created conflicts with the existing practice under the old Xerox DIX
system. The IEEE was careful to separate the new and old rules. It recognized that there
would be a period when old DIX messages and new IEEE 802 messages would have to
coexist on the same LAN. It published a set of standards of which the most important are as
follows:-
• 802.3 – Hardware standards for Ethernet cards and cables
• 802.5 – Hardware standards for Token Ring cards and cables
• 802.2 – The new message format for data on any LAN.
The 802.3 standard further refined the electrical connection to the Ethernet. All the
hardware vendors immediately adopted it. Today all cards and other devices conform to this
standard.
RESOLUTION TO MONITOR SIZE CHART
Even wonder what the correct monitor sizes for a particular screen where? This chart
examines seven screen resolutions, and shows the “correct” size of monitor needed for each.
Reading the Chart
MacOS/Windows Screen Resolution: Lists seven standard hi-res SVGA screen resolutions,
in pixels across by pixels down. More pixels means higher-definition displays. When
someone talks about their screen “resolution”, they’re usually taking about this.
DPI (dots per inch): DPI refers to the number of Dots (pixels) per inch on a screen. If you
have a Macintosh computer (or MacOS compatible), you a 72dpi screen. If you have a
Windows PC, you have a 96dpi screen. DPI is also known as “resolution”, although
resolution is really a combination of dpi & the above.

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Viewable/”Correct” size: The diagonal size of the “correct” monitor for this resolution. This
will be advertised as the monitor’s “Viewable” area. Chances are you won’t be able to find
this exact size. The closer your monitor’s viewable area is to this, the closer you are to having
the screen inch be the same size as a real inch.
Changing your Monitor’s Resolution If the text appears to large on your screen your
monitor may be set at a resolution that makes viewing these pages difficult. You need to
change your screen resolution so that you can see more of each page without scrolling left to
right or up and down. If you have a PC with Windows, follow the instructions for “Windows”
below. IF you have a Macintosh (Apple), follow the instruction for “Macintosh” below.
PC with Windows Click the Start button in the bottom left-hand corner. Select settings and
then Control Panels. In the next window, double-click the Display icon. In the next window,
select the settings tab at the top. In the Desktop Area, move the slider to the right until you
see “1024 by 768 pixels”. This is just a suggested setting. You could try different settings to
find the one that best suits you. After you select a setting, click Apply.
Macintosh (Apple) Click the Apple in the top left-hand corner. Select Control Panels and
then Monitors. In the Resolution section of the window that pops up, select a higher
resolution. The higher the number, the more screen area you will have. As soon as you select
a different screen resolution, your monitor will change to this new resolution.

MACOS VIEWABLE/ CLOSEST Windows Viewable/ Closet

RESOLUTION “CORRECT” “ADVERTISED Resolution “Perfect” Size “Advertised”
(72 DPI) SIZE ” SIZE (96dpi) Size
640x480 11.1” 13” 640x480 8.3” 12” – 13”
800x600 13.9” 15” 800x600 10.4” 12” – 14”
832x624 14.4” 15” 832x624 10.8” 12” – 14”
1024x768 17.8” 19” 1024x768 13.3” 15”
1152x870 20” 21” 1152x870 15” 17”
1280x960 22.2” 21” – 24” 1280x960 16.7” 17” – 19”
1600x1200 27.8” Huge (24”+) 1600x1200 20.8” 21” or 24”
Resolution to Monitor Size Values for Resolution to Monitor Size Values for
Macintosh/72dpi Computers Windows/96dpi Computers

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QUESTION 2:
Survey the literature and write 2-3 pages note on new developments in Microprocessors
and Storage technologies?
ANS To meet the demands of the new business models and new applications, storage
technology is developing on several fronts and for different classes of products classes –
including optical, tape, and disk – are benefiting from these advances.
Optical Disk Drives
ANS Optical disk storage has the advantage of extremely large data storage capacity. the
digital information is written as pits in the surface of the disk, which are detected by a beam
of light from a laser. Optical disk storage techniques have been derived from techniques
developed for the audio compact disk players. Optical disks have been developed in three
different forms:-
- Optical ROM (OROM)
- Write once read many (WORM)
- Write many read always (WMRA)
Tape Drives
Although the death of tape has been predicted for many years, tape drives continue to
dominate the market for backup and archival applications. More new tape technologies have
been introduced in the past two years than ever before. Tape drives in the mid-range and
enterprise class continue to show growth as new products – such as virtual tape systems –
make tape and even more cost-effective storage medium, and developments –such as
intelligent tape cartridges that include built-in-flash memory chips-provide a much higher
performance for finding a record or a file.
Competition is heating up in the high-end tape arena with three relatively new formats
- Quantum’s Super DL Ttape, Exabyte Corporation’s Mammoth-2(M2), and the Linear Tape
Open (LTO) technology – set for widespread availability this year.
Disk Drives
Disk Drive development is moving in two directions: one direction emphasizes high
capacity, while the other aims at better performance. Magnetic disk drives show a
compounded 60 percent annual growth rate in density (and 35 percent decrease in the price
per megabyte). At this rate, 3.50inch drives are expected to reach 140GB by 2001, surpassing
the need for capacity on desktops, while 2.50inch drives will exceed 50GB. Leading
enterprise disk-drive manufacturers are moving from 7200rpm drives to 10,000rpm drives for
the professional market.
The new generation of disk drives will be intelligent, with microprocessors adding
computing power inside the device, providing more independence to the drive and reducing
some of the bottlenecks in the I/O path. Very small disk drives (e.g., IBM’s 340MB 1-inch
disk drive) may 7200rpm drives to 10,000rpm drives for the professional markets. The major
disk-drive manufacturers include Fujitsu, Hitachi, Samsung, IBM, Maxtor Corporation,
Quantum Corporation, Seagate Technology Inc., and Western Digital.
Solid State Disks
At the high point of the data storage hierarchy is SSD technology. While SSDs behave
like magnetic disk drives and appear to the host computer as disk drives, an SSD stores data
on high-density arrays of DRAM memory chips, not magnetic disk. Using DRAM instead of
disk eliminates the mechanical delays associated with spinning a hard disk and positioning
the read/write heads. Thus, an SSD drive’s access time measures in microseconds instead of
the millisecond access times seen in disk drives. Adding just one or two SSD drives to a disk
array system for hot files can significantly improve overall performance compared to the
performance to the performance of the disk system of all rigid disks.
However, the SSD market has so far been hindered by its high costs. By 2002, the
average cost per megabyte of SSD storage should fall into the $4 range from today’s $16

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range, popularizing it use. Despite the cost, ISPs have become large consumers of SSD
drives, adding them to their systems for cache purposes.
Flash Memory
Flash memory are usually organised to work with a microprocessor. The most
common Organisation is as byte wide device. Flash memory developed with the specific idea
of creating a solid state equivalent to the disk drive. Flash memories are an outgrowth of EE
PROM technology. Multiple Flash memory devices can be combined to create a larger flash
memory system. A common package for flash memory systems is the PCMCIA card.
Development in Microprocessors.
The advent of the microprocessor represented the beginning of distributed computing,
a paradigm shift that pushed the power of the computer to the desktop. Further advances in
miniaturization and electric storage have made Laptop computers more powerful than
mainframes were in the early 1980s.

George Glider’s Law of the Microcosm

• The power of the chip grows faster than the power of the host processor running a vast
system of many terminals.
• The power of the individual commanding a single workstation increases far faster than
the power of an overall bureaucratic system.
• The organization of enterprize follows the organization of the chip.
• The power of entrepreneurs using distributed information technology grows far faster
than the power of large institutions attempting to bring information to heel.
• Rather than pushing decisions up through the hierarchy, the power of microelectronics
pulls them remorselessly down to the individual.

The following figure shows the rapid growth in embedded microprocessors.

Embedded versus Computer

Microprocessor
250
Trends

200
150 Embedded
100
50 Computer
0
91 92 93 94 95
Year

Key developments in computing in recent years have been the following:-

• Processing
There is a continuous migration toward more powerful, smaller, and less expensive
processors. Aided by advances in very large scale integration (VLSI) or
microprocessors, computer hardware systems have evolved rapidly from the earlier
mainframe-based model toward one based on desktop computers, Laptops, and PDAs.
• Data Storage
The trend in data storage is toward greater capacity, easier access, and lower cost.
Paralleling the improvements in computer hardware, data storage capabilities are

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expanding, and their costs are declining. Contemporary systems are designed to
accommodate video images of ever-heigher resolution along with rapidly growing
amounts of alphanumeric data.
• Miniaturization of Component Technologies
Miniaturization is enabling manufacturers to incorporate computer on a chip
components into a wide variety of products that are becoming smarter through the use
of fuzzy logic, expert systems, and smart networks.
• Display
The dramatic improvements in processing power, storage capacity, and
miniaturization can be understood as a continuous process. Improvements in display
technology come in quantum leaps. As color replaced black and white television, the
next generation of flat-panel technology will replace cathode ray tubes in both
computer monitors and TV sets. Key developments in display technology include
improvements and cost reductions for active matrix color LCDs that are used in
Laptop computers.
• Software
Software is becoming easier to use and is more versatile. The widespread
popularization of graphical user interface(GUI) systems (such as Macintosh’s
operating system and Microsoft’s Windows 98) as made computers much more
accessible to inexperienced users. The number and variety of application programs
continues to grow rapidly, spurred, in part, by the availability of computer assisted
software engineering (CASE) and object oriented programming tools.

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