DESIGN AND IMPLEMENTATION OF ARITHMETIC LOGIC UNIT USING VHDL ASSIGNMENT ONE REPORT

By

KAWUMA SIMON

DEPARTMENT OF COMPUTER SCIENCE NORWEGIAN UNIVERSITY OF SCIENCE AND TECHNOLOGY

Abstract
The report starts with the description of all the operation performed by the ALU. This operation includes arithmetic, logical and bit shifting operation. The solution and methodology used to obtain the result of the ALU operation are discussed in this report. The ALU is in position to check and detect overflow and underflow. The ALU performs bit shifting for only unsigned inputs but performs subtraction and addition operation on both unsigned and signed input. It also performs logical operation such as AND, OR, XOR and NAND operations. I used a 32 bit constant to represent operation in VHDL design. The simulation result and tests are also discussed and described in this report. The report ends with the conclusion and challenges faced during the assignment.

CHAPTER ONE
1.1 Introduction
An Arithmetic Logic Unit (ALU) is a unit which performs arithmetic operations in a processor. The designed ALU performs these operation addition, subtraction, Logical operations such as OR, AND, XOR, and NAND operation and also performs Bit shifting. The ALU designed is a 32 bit ALU. The maximum length of both the inputs and outputs is 32 bits. It has alu_in_a, alu_in_b and alu_funct as inputs and alu_out and alu_status as outputs.

1.2 Addition and Subtraction Operation

Adding binary numbers is very similar to adding decimal numbers when adding, carry always occurs when we have two bits each with value 1 as described below:00000101 + 10000011 = 10001000 . Subtracting binary numbers is done by first taking the second value (the number to be subtracted) and apply two's complement, this is done by complement each digit in turn (change 1 for 0 and 0 for 1), then add 1 (one) to the result.

1.3 Logical Operations of the ALU

AND Operation A bitwise AND takes two binary representations of equal length and performs the logical AND operation on each pair of corresponding bits. For each pair, the result is 1 if the first bit is 1 AND the second bit is 1, otherwise the result is 0. For example: 00000101 AND 10000011 = 00000001 OR Operation A bitwise OR takes two bit patterns of equal length and performs the logical OR operation on each pair of corresponding bits. For each pair, the result is 1 if the first bit is 1 OR the second bit is 1 OR both bits are 1, otherwise the result is 0. For example 00000101 OR 00000011= 00000111

XOR Operation A bitwise exclusive OR takes two bit patterns of equal length and performs the logical XOR operation on each pair of corresponding bits. The result in each position is 1 if only the first bit is 1 or only the second bit is 1, but will be 0 if both are 1 or both are 0. This is equivalent to being 1 if the two bits are different, and 0 if they are the same. For example: 00000101 XOR 00000011 = 00000110. NAND Operation The Negated AND, or NAND operation is the opposite of the digital AND operation, and behaves in a manner that corresponds to the opposite of AND gate [3]. For example: 00000101 NAND 10000011 = 1000110

1.4 Bit shifting of the ALU

The bit shifts are sometimes considered bitwise operations, because they operate on the binary representation of an integer instead of its numerical value. In these operations the digits are moved, or shifted, to the left or right [1]. For convenience, I will describe the four bit shifting operations using 8 bit number as described below: Arithmetic Left and Right Shift In an arithmetic shift, the bits that are shifted out of either end are discarded. In a left arithmetic shift, zeros are shifted in on the right; in a right arithmetic shift, the sign bit is shifted in on the left, thus preserving the sign of the operand. Further on, while shifting right, the empty spaces will be filled up with a copy of the most significant bit (MSB). Lets perform Left and Right shift operation on this number 0011 1111, shifting it by one position to the right produces the following result: 0001 1111 To illustrate this better, I will use a pair of bars to mark the imaginary boundaries of the original 8 bit string: |0011 1111| After shifting it, the leftmost bits position becomes empty (marked by an underscore) whereas the rightmost bit is pushed outside the strings boundaries: |_0011 111|1

The second step consists of padding empty positions with zeros and discarding bits pushed outside the strings boundaries these rules apply to unsigned values and we get |00011 111| as our output. The opposite operations are true if I want to left shift a number by any given times. Logical shift In a logical shift, the bits that are shifted out are discarded, and zeros are shifted in (on either end). Therefore, the logical and arithmetic left-shifts are exactly the same operation. However, the logical right-shift inserts bits with value 0 instead of copying in the sign bit. Hence the logical shift is suitable for unsigned binary numbers, while the arithmetic shift is suitable for signed two's complement binary numbers. Logical shift right Logical shift left

CHAPTER TWO
Solution
2.1 Constants and Operations
The ALU uses the following constants to perform different operation depending on input alu_funct as described in the table below:CONSTANT 00000000000000000000000000000001 00000000000000000000000000000011 00000000000000000000000000000111 00000000000000000000000000001111 00000000000000000000000000011111 00000000000000000000000000111111 00000000000000000000000001111111 00000000000000000000000011111111 00000000000000000000000111111111 OPERATION TO BE PERFORMED Addition Subtraction AND OR NAND XOR Shift Left Logic and Arithmetic Shift Right Arithmetic Shift Logic Right

2. 2 ALU Addition and Subtraction Operations

The addition and subtraction operation can lead to either overflow or underflow .The maximum number that can be accommodated by a 32 bit vector is in the range -2147483647 to 2147483647 which is calculated from (231-1). If the result of the operation is outside the above range then we get an extra 33rd bit created thus the result of the operation leads to a wrong answer. Left shifting can also lead to a very big number which cant be accommodated by a given output vector hence overflow. In my VHDL design, I checked for both overflow and Underflow by first storing the result in a variable and comparing it with (231-1). If any operation leads to a result which is not in the above range, either a carry or both negative flag of the output alu_status is set. I also set the output alu_out to zero to indicate that the result is undefined.

If the result of the operation is in the above range, it implies that it can be accommodate by the output vector then alu_out will be set to the sum, difference of two numbers, or to the result of left shifting depending on the operation to be performed by the ALU. I used the following constant in my VHDL designs to set output alu_status to either a cary, zero or negative flags as described in the table below:Constant 00000000000000000000000000000001 00000000000000000000000000000010 00000000000000000000000000000100 Output alu_status flags Carry Flag Zero Flag Negative Flag

Zero flag is set whenever the result of addition or operation lead to zero.

2.3 Barrel Shifter

I only dealt with unsigned inputs to implement a barrel shifter. First I had to first covert input alu_in_b to a positive interger by using both the absolute funcion (abs) and CONV_INTEGER function then kept the result in a variable called shift. To implement the shift operation in VHDL design, I had to analysis and performed the three operations manually on the same input alu_in_a but with diferent input alu_in_b and came up with the following three expressions for shift left logic and arithmetic, shift right logic and shift right arithmetic. I tested the expressions and they really worked for any inputs. shift left logic and arithmetic alu_out<= alu_in_a(31-shift downto 0) & (shift-1 downto 0 => '0')) shift right logic alu_out<= ( (31 downto 32-shift => '0') & alu_in_a(31 downto shift)); shift right arithmetic alu_out<= ((31 downto 32-shift => alu_in_a(31)) & alu_in_a(31 downto shift)); If shift = 0 then it implies that no shift operation should be performed and the output alu_out is equivalent to input alu_in_a, and alu_stutus is set to zero as describe by the following piece of code from the VHDL design. if (shift=0) then -- check if input b is zero alu_out<=alu_in_a; -- if so the out put will be the same as input a i.e no left shift alu_status<=alu_status_extended;

Since left shifting leads to overflow, I had to check and detect for overflow before outputing the result, I converted the result of left shifting to an integer and compared it with (231-1) as describe by the following piece of code from the VHDL design. out_left_logical_arith := conv_integer(alu_in_a(31-shift downto 0) & (shift-1 downto 0 => '0')); if (out_left_logical_arith>((2**31)-1)) then -- check and detect overflow alu_status<=carry_flag; -- if so set the carry flag of alu_stastus alu_out<=alu_status_extended; -- output alu_out should be set zero else alu_out <=CONV_STD_LOGIC_VECTOR(out_left_logical_arith,32); --Legal left shifting alu_status<=alu_status_extended; -- if so set alu_stastus to zero end if;

2.4 Result
The following results were obtained after performing simulation and testing the different operations as described below:Addition Operation

Subtraction Operation

And Operation

OR Operation

Shift logic Left operation when input b is 0

Shift logic Left operation when input b is 2

Shift Right Logic when b is 25

Shift Right Arithmetic when b is 3

CHAPTER THREE
3.1 Discussion
In this assignment, I have managed to achieve and complete the following tasks, I have implemented an ALU which perform the following operations namely addition, subtraction and logic operation such as AND, OR, XOR and NAND operations. ALU is also in position to check and detect either overflow or underflow resulting from subtraction, addition and shift left operation. I have also managed to implement a barrel shifter as a component in the design ALU. As mentioned earlier, the designed ALU performs bit shifting for unsigned inputs. Given the same task, I would also implement bit shifting for signed numbers or inputs. I would also implement multiplication, division and floating point operations. I did simulate and tested all the above operation and I got the expected results.

3.2 Conclusion
This assignment being my first real exposure to VHDL, I was not quite used to it yet. All of my programming experience has been with high level language such as Computer programming and Java. I had to invested a lot of time to learning and teach myself both the language and the software tools. I have liked this assignment because I met new challenges every day. I managed to solve most of the challenges by myself and learnt a lot out of these challenges. I have also learnt that VHDL programming is interesting more so when everything runs out smoothly but stressing when everything fails to work as expected. Only one line had failed me to complete the barrel shifter component but only to discover that I had forgotten a semi colon. I had spent about 45 minutes until when a friend discovered it. I also tried to try to parameterize the barrel shifter component of the ALU using the generics by specifying the length of the input and output vectors as an integer variable n. It didnt work out as expected but I hope to find out why it failed. In summary, being my first assignment, I gained enough exposure to using the tool and VHDL and I hope to even perform better and learn, meet new challenges in my second assignment.

3.3 Bibliography
[1] http://en.wikipedia.org/wiki/Bitwise_operation [2]http://www.informit.com/guides/content.aspx?g=cplusplus&seqNum=163 [3] http://en.wikipedia.org/wiki/Negated_AND_gate