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Electronic System Design Practical Journal

Name of Laboratory: Electronic System Design Name of Faculty: Nikhil Damle (Lab-In charge)

For Faculty reference only

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Contents 1. Prerequisites 2. List of Experiments 1. Design an unregulated power supply. 2. Design a regulated power supply using IC based regulator 3. Design a zener Shunt regulator 4. Design transistor shunt voltage regulator. 5. Design of emitter follower type series regulator. 6. Design voltage regulator using IC723. 7. Design a Switch Mode Power supply. 8. Design class A audio power amplifier. 9. Design class AB complementary symmetry audio power amplifier. 10. Design a Wein Bridge Oscillator using op-amp LM741 11. Design a Phase Shift Oscillator using Op-amp LM741 12. Design a Hartley Oscillator using transistor. 13. Design a Colpitts Oscillator using transistor. 14. Design constant Current circuit. 15. Design Function Generator using Op-amp LM741 16. Design Butterworth filter 17. Design a RF Amplifier/tuned amplifier circuit 18. Format of journal

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Prerequisites
Awareness regarding identification of Components Awareness about breadboard connection Knowledge of Power supply configuration Knowledge of Cathode Ray Oscilloscope Usage Knowledge of component terminals i.e. Transistors, opamp, etc. Hands on Electronics Computer Aided Design (ECAD) tools used in previously

Should learn
Use of component datasheets, technical reference manuals & handbooks

Should possess the following during the practical


Notebook for Electronic System Design (should be made separate) Scientific Calculator, writing aids

The practical will be based on the syllabus. The design problems for any given practical will be evaluated first using Simulation (ECAD) tool & then the design will be done on breadboard using components.

Format of journal
Date Blank Page Experiment No Design Problem Equipments Required System Diagram (Printout) / Diagram Waveforms(Printout) Observation table with Calculated values-Practical values. Graph Results Date Line Page Experiment No Design Problem Equipments Required Design Steps (Analysis) Results

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Experiment no-1 Design an unregulated power supply Equipments Required: 1. Step down transformer (12-0-12 V/500mA) 2. Rectifier Circuit- IN4007 GP 2 No. 3. Filter Circuit- Electrolytic Capacitor 1000uF/25V System Diagram
V1 T1 TS_MIS C_25_TO_1 D1 1N4007 D2 GP 1N4007 GP C1

230 V 50 Hz 0Deg

1000uF -POL

Exp.No 1 Unregula ted Power S upply

Design Steps Step 1: Selection of Step-down transformer For designing of output 12V unregulated powers supply a step down transformer of 230V-120-12 /500mA should be selected. Step 2: Selection of rectifier device The diode (rectifier) used should be in full wave rectifier configuration. To obtain a faithful rectification the diode selected should satisfy the peak inverse voltage > Vm , so we have selected IN4007 Step 3: Selection of filter circuit The filter components are required for removal for the ripples in the rectified signal. The used of electrolytic capacitor will solve the purpose. The value of capacitor should be such that the output will not contain any ripple. The value selected is 1000uF/25V. Graph: The waveform for full wave rectifier, pulsating DC output, and filtered response can be observed on the oscilloscope. The output of the regulator is constant DC.

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Results: The full-wave rectifier output put after the filter is about 16V DC.

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Experiment no-2 Design a regulated power supply using IC based regulator Equipments Required: 1. Step down transformer (12-0-12 V/500mA) 2. Rectifier Circuit- IN4007 GP 2 No. 3. Filter Circuit- Electrolytic Capacitor 1000uF/25V 4. IC 78xx Positive voltage regulator 5. Multimeter/ cathode ray oscilloscope System Diagram
V1 230 V 50 Hz 0Deg T1 TS_MISC_25_TO_1* D1 1N4007GP* D2 1N4007GP* U1 LM7815CT LINE VREG VOLTAGE COMMON C2 470uF-POL

C1 1000uF-POL

Exp No.2 Regulated Power Supply

Design Steps Step 1: Selection of Step-down transformer For designing of output 12V unregulated power supply a step down transformer of 230V-120-12 /500mA should be selected. Step 2: Selection of rectifier device The diode (rectifier) used should be in full wave rectifier configuration. To obtain a faithful rectification the diode selected should satisfy the peak inverse voltage >Vm , so we have selected IN4007 Step 3: Selection of filter circuit The filter components are required for removal for the ripples in the rectified signal. The used of electrolytic capacitor will solve the purpose. The value of capacitor should be such that the output will not contain any ripple. The value selected is 1000uF/25V.

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Step 4: Selection of IC Based regulator. The required output voltage is 12V so an IC78xx positive regulator which will obtain an output of 12 volts should be selected. IC 7812 is selected. Graph: The waveform for full wave rectifier, pulsating DC output, and filtered response can be observed on the oscilloscope. The output of the regulator is constant DC.

Results: The IC based regulator output is for magnitude 12V DC.

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Experiment no-3 Design a zener Shunt regulator for 5.5V output voltage with load current of 50mA. The unregulated power supply is 152 V with source resistance of 5 . Determine the change in output voltage for given change in input voltage. Equipments Required: 1. Unregulated DC Power supply 2. Zener diode IN752A =Vz=5.6 V, Rz=11 , Izmin=20mA 3. Current limiting resistance 4. Multimeter / Cathode Ray Oscilloscope. System Diagram

Design Steps Step 1: Selection of Zener diode As Vo=5.5V Then Vz= Vo=5.6 V (std) For analysis Zener diode IN752A =Vz=5.6 V, Rz=11 , Izmin=20mA Step 2: Selection of current limiting resistance (RD) RD = Vi-Vo/ ID ID = Izmin+IL = 20+50mA=70 mA Vimin=Vimin roID min = 13 5*20mA = 12.9 V RDmax = Vimin roID min - Vo/ ID = 104.2857

Session 2010-2011

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Step 3: Calculation of Sv Sv = Rz/(Rz+ro+RD) = 11/ (11+5+ 104.2857) = 0.0914 Observation table with calculated values-Practical values. Calculated Values 5.5V 104.2857 0.0914 Practical Values 5.6V 100 0.0948

Vz RD Sv

Results: The zener shunt regulator output is of magnitude 5.5 V DC.

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Experiment no-4 Design a transistor shunt voltage regulator to provide 5V at 800mA. The unregulated input voltage is 15 10% V with a source resistance of 3 . The hfe of transistor is 40. If the output ripple is to be limited to 5%. Determine maximum allowable value of ripple at input. Equipments Required: 1. Unregulated DC Power supply 2. Zener diode IN4732 =Vz=4.7 V, Rz=19 , Izmin=20mA 3. Transister with hfe=40 and ICE >= 800 mA 4. Current limiting resistance 5. Multimeter / Cathode Ray Oscilloscope. System Diagram

Design Steps Step 1: Selection of Zener diode Vo = Vz + VBE Vz= Vo - VBE = 5 0.7 = 4.3 V [Vz= 4.7(standard)] Step 2: Selection of RD IDmin = Izmin + IC+ ILmax (IC=5mA for T1 to be active region and zener diode in breakdown region.) IDmin = IZmin + IC+ ILmax = 20 + 5+ 800 = 825 mA Vimin = (rs+RD) IDmin Vo (rs+RD) IDmin = Vimin Vo

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

(rs+RD) = (13.5 - 5) / 825 RD = 7.339 Step 3: Selection of R1. R1 = VBE / (IZmin - IB) = VBE / (IZmin IC/) = 0.7 / (20 5/40) = 35.22 Step 4: Calculation of power dissipation across RD and zener PD = (Vimax Vo ) IDmax = (Vimax Vo) (Vimax Vo)/ RD = 9.844665Watts. Power dissipation across zener PD = Vz x Izmax = 1.660watts [Izmax = IDmax (IC+IL)] [ = (Vimax Vo)/RD (IC+IL)] [ =8.5/ 7.339 - (805mA) ] [1.158196-805mA] .

Step 5: Calculation of Sv- Ro Sv = (Rz +hie) / [(Rz+hie)+(1+hfe) (rs+RD)] = (19+6.15027)/[ (19+6.15027)+(41)(3+7.339)] = 0.05600 [hie = nVThfe/ ICmax] [ICmax = IDmax- Izmin- ILmax] [ = 1.158196-820mA ] [ = 338.196mA ] [hie = 2*26mV*40 / 338.196mA] [ = 6.15027]

Ro = Rz +hie / (1+hfe)RD = 19+ 6.15027 / (41)(7.339) = 25.15027 / (41*7.339) = 0.08583 Step 6: Calculation of ripple Output ripple = 5% of Vo = 0.05 * 5 = 0.025 V Input ripple = output ripple / Sv = 0.025V/ 0.05600 = 0.4464 Observation Table: Calculated Value Practical Value Vz RD R1 T Sv Ro 4.3 V 7.339 35.22 Hfe=>40 0.05600 0.08583 4.7 V 7.5 33 BC107BP 0.055196 0.08178

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Results: The transistor shunt regulator with desired specifications is designed.

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Experiment no-5 Design an emitter follower series voltage regulator. The unregulated DC input is 12V and has a source resistance of 2 . The regulated output is to be 5V, supplying full load current of 200mA. The zener diode is of 5.6V, hfe=40 for transistor. Determine Ro. Equipments Required: 1. Unregulated DC power supply of 12V 2. Zener diode IN752A =Vz=5.6 V, Rz=11 , Izmin=20mA 3. Current limiting resistance 4. Multimeter / Cathode Ray Oscilloscope. System Diagram

Design Steps Step 1 Selection of RD RD = Vimin Vz / IDmin IDmin = IZmin + Ibmax IBmax = ILmax / 1+ hfe = 200mA/51 = 4.878048 mA ID = 24. 878049 mA Vimin = Vimin Rs(ILmax + IDmin ) = 12 2(24.878049mA) = 11.95024391 V RD = 11.95024391 5.6 / 24. 878049 mA = 255.2548998 Step 2 Determinations of Sv and Ro. Sv = Rz/ (Rz+Rs+RD) = 11/ (11+2+ 255.2548998) = 0.0410

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Ro = Sv { Rs + RD(1+hie/ Rz)/ (1+hfe)} = 0.5786 Observation table with calculated values-Practical values. Calculated Values 5V 255.254899 0.0410 0.5786 Practical Values 5.6V 240 0.0434 0.612

Vz RD Sv Ro Graph:

Results: The specifications for series voltage regulator are satisfied.

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Experiment no-6 Design voltage regulator using IC 723 to provide output voltage of 15V at 2A. Equipments Required: 1. Unregulated DC Power supply 2. IC 723 3. Current boasting transistor BD139 4. Resistors, filters 5. Multimeter/CRO System Diagram

Design Steps Step 1 Selection of R1, R2, and Rsc Assume Rsc = Vsense / ILmax = 0.7/2 A = 0.35 Assume ID = 5 mA R1 = Vo-VR / ID = 1.5 K R2 = VR/ ID = 1.5 K Rv = 20 % (R1+R2) = 0.2 (1.5 K R1 = R1 Rv/2 = 1.2 K R2 = R2 Rv/2 = 1.2 K + 1.5 K ) = 600

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Step 2 Selection of external pass transistor element. hfe = Ic/ Ib Ic = Ie = ILmax Ib = o/p current of Ic 723 (ILout= 150mA) i.e. hfe = ILmax / ILout = 13.33 (selet transistor having hfe > 13.33) Step 3 Selection of input voltage Voutmax = VBE + Vsec + Vo = 16.3 V But Vin Vo = 3V Vimin = Voutmax + 3 = 19.3 V Nominal i/p = Vinom = Vimin/ 0.9 = 21.42 V Hence select input voltage of 24 V Step 4 Power dissipation in external pass transistor. P.D max = Vimax * ILmax = 48 watts Observation table with calculated values-Practical values. Calculated Values 1.5 K 1.5 K 1.2 K 1.2 K 600 13.33 19.3V Practical Values 1.5 K 1.5 K 1.2 K 1.2 K 560 40 24 V

R1 R2 R1 R2 Rv Hfe Vin

Results: The specifications for IC723 voltage regulator are satisfied.

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Experiment no-7 Design SMPS to give 12V at 5A. The unregulated input is 25V. The switching frequency is 25 KHz. The transistor used for switching has switching time tsw=1s & Vsat =1V. The fast recovery diode has VDON= 1V & the reference voltage is of 1.8 V. It is desired to have peak to peak ripple of 30mV. Determine efficiency of smps. Equipments Required: 1. Unregulated DC Power supply 0-32 V 2. Series Pass Transistor 3. Filter components 4. Comparators 5. Multimeter / CRO System Diagram

Design Steps Step 1: Calculation of tON tOFF tON / tOFF


=

VD + Vo / Vin Vsat Vo = 1.08333

tON = 1.0833 tOFF T = 1/ fs = 1/ 25 KHz tON + tOFF = 40 sec tON = 20.8 sec & tOFF = 19.2 sec

Session 2010-2011

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Step 2: Calculation for L & C L = (VD + Vo) tOFF / 0.4 Io = 0.124 mH C = 0.4 Io / 8 * T / Vop = 333 F Step 3: Selection of R1 & R2 Under balance condition I1= 10mA R1 = Vo Vref / I1 = 1.02 K R2 = Vref / I1 = 180 Step 4: Power Dissipation in switching Transistor P.D = 1/ T [ Vsat * IcON* tON + Vcoff * Icoff * toff + Vcoff * IcON * tsw ] Since Vcoff = 26 V P.D = 1/ 40 sec [ 1*5 * 20.8 sec + 26 * 5 * 1 sec ] = 6.09 watts Output power = Vo * Io = 60 watts Input Power = Output power + PD = 66.09 watts % = out power / input power * 100 = 90. 77 % Observation table with calculated values-Practical values. Calculated Values 1.02 K 180 0.124 mH 333 F Practical Values 1K 180 910 mH 330 F

R1 R2 L C

Results: The specifications for switched mode power supply are satisfied.

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Experiment no-8 Design transformer coupled Class A power amplifier to deliver 2W power to a load of 4 . Input power supply is 9 V. hfe=40. Efficiency of transformer = 90% Equipments Required: 1. Regulated DC Power supply 0-9 V 2. Transistor NPN BD139 3. Function Generator 4. Audio Transformer 5. Multimeter / CRO System Diagram

Design Steps Step 1: Calculation of power Assume 10% Vcc appears across resistor RE. VRE = Vcc /10 = 0.9 V Assume saturation voltage of audio transformer = 1V Output swing = Vcc VRE Vsat = 7.1 V

Session 2010-2011

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Input power = Pi, Output Power Pout = 2Watts = Pout / Pi Pi = 2.22 watts Pi = Vcrms* Icrms ----------(1) Vcrms = Vm / 2 = 5.02 V RL = V1/ I1 = Vcrms / Icrms = 11.4 RL = RL / n2 Where n = turns ratio of transformer n2 = RL / RL = 0.59 Icrms = Pi / Vcrms = 0.44 A

Step 2: Selecting Re Im = 2 Icrms = 0.625 A ICQ = 1.1 Im = 0.6875 A Re = VRE / ICQ = 1.3 Step 3: Determination of R1 & R2 Assume S =15 For voltage divider bias S = 1 + RB/ Re RB/ Re = 14 RB = 14 Re = 18.2

Equivalent circuit of voltage divider bias VB = Vcc*R2 / R1+ R2 RB = R1*R2 / R1+R2 IB = ICQ / hfe = 0.0174 A

VB = IBRB + VBE + VRE = 1.809 V R1 = Vcc *RB / VB = 90.89 1/ R2 = 1/RB 1/ R1 = 22.94 Step 4: Calculation for efficiency of amplifier

Session 2010-2011

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% = Pout / Pi * 100 = 32. 34 % Observation table with calculated values-Practical values. Calculated Values 22.94 90.89 1.3 Practical Values 22 82 1.2

R1 R2 Re Graph:

Results: The specification for class A audio Power amplifier are satisfied.

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Experiment no-9 Design Complementary Symmetry Class AB audio power amplifier to deliver a maximum AC power of 5 watts to the of 8 . The matched pair of transistor has hfe=50. Design suitable driver stage using transistor of hfe=80. Equipments Required: 1. Regulated DC Power supply 2. Function Generator 3. Driver transistor 4. Power Transistor complementary pair 5. Resistance, capacitors 6. Multimeter/CRO System Diagram

Design Steps Step 1: Determination of peak load current (ILP) & voltage (VLP) Poac = (ILP / 2 )2 *RL => ILP = 2 Poac / RL = 1.118 A Step 2: Calculation for power stage VLP
=

ILP * RL = 8.9 V

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

hie1= * VT / Ic1max * hfe1 = 2 * 26 mV / ILP * 50 = 2.23 Ri = hie1 + (1+ hfe1) * RL = 410.23 Av = 1 hie1/ Ri = 0.994

Ic1mac = ILP

The ratio of load resistance to o/p resistance of the power stage is c/as damping factor. It is in the range of 6 to 10. Assume damping factor D =10 D = RL / Ro Ro = 0.8 (for power stage) Also Ro = Rs + hie1 / 1+ hie1 Here Rs = source resistance of power stage Rod = output resistance of driver stage Ro = Rod + hei1/ 1+ hie1 Rod = Ro (1+ hie1) hie1 = 38.57 Step 3: Source voltage requirement of power stage Vs2 = (1+ Rs/ Ri)* ( 1+ Ro/ RL) * Vo / Av = 10.77 V Vcc = 2* Vs2p + 1V (for keeping Q3 in active region) = 22.54 V Vcc = 24V (Select) Step 4: Selection of R1 VE1max = Vcc/2 + VLP VE1max = voltage drop across C + voltage drop across RL = 20.89 V VB1max = VE1max + VBE1 = 21.49 V Now IB1max = Ic1max / hfe1 = 22.36 mA

R1 = Vcc VB1max / IB1max = 112.25 Step 5: Selection of r

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Under quescient condition, when no i/p signal is applied the total current through R1 is the quescient collector current of Q3 i.e. Ic3Q VE1Q = Vcc/2 = 12 V VB1Q = VE1Q + VB1 = 12.6 V Ic3Q = Vcc - VB1Q / R1 = 114 mA Voltage drop across resistance r = 1V r = 1/ Ic3Q = 8.77 Step 6: Calculation of RF Rod = RF / hfe3 Step 7: Calculation of R2 IF = (Vcc/2 VBE3 ) / RF = 3.69 mA IB3Q = Ic3Q / hfe3 = 1.425 mA R2 = VBE3 / I2 = 265. 48 Step 8: Calculation of Rs1 Avs = - RF / Rs1 Also Avs = Vo/ Vs1 => Vs1 = 1.77 V => Rs1 = 616.8 => RF = 3.084

Step 9: Calculation for Capacitors Xc = 1/ 10 * RL at 100 Hz = 0.8 c = 1/ 2 fXc = 1989 F Step 10: Determination of efficiency Power dissipation for power stage (Pdcp) Pdc = Vcc * Icavg ( Icavg = ILP / ) = 8.54 watts Poac = 5 watts % = 58 .54 % Power dissipation for driver stage (Pdcd) Pdc = Vcc * IC3Q = 2.736 watts

Session 2010-2011

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=> Overall efficiency = Poac / (Pdcp+ Pdcd) = 44.37 % Observation table with calculated values-Practical values. Calculated Values 112.25 8.77 3.084K 265.48 616.8 22.54V Practical Values 100 8.2 2.7K 240 620 24V

R1 R RF R2 Rs1 Vcc Graph:

Results: The specifications of class AB complementary symmetry audio power amplifier are achieved.

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Experiment no-10 Design Wein bridge oscillator to give a frequency of 10KHz and peak-to-peak amplitude of 14 volts. If a phase shift of 1o is introduced. Determine the change in frequency. Equipments Required: 1. Regulated DC Power supply 2. Zener diode Vz=4.7 V 3. IC741 Operational Amplifier 4. Resistance , capacitors 5. Multimeter/ CRO System Diagram

Design Steps Step 1: Selection of R & C of feedback network R = 1/ 2foc = 1.59 K (Select c = 10nF for fo 100Hz to 30 KHz )

Step 2: Selection of zener diode Vop = 1.5* (Vz+VD) * RA+RB / RA+ 1.5RB Assume RB = 0

Session 2010-2011

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Vop = 1.5* (Vz+VD) Vz = 4.06 V

(Vop = Vpp/2 = 7 V)

Step 3: Selection of RF , RA ,RB A = Vop / Vin = 3 Vin = 2.33V Vx = Vop - (Vz+VD) = 1.7 V Assume current through RF & zener diode is 2mA each Hence RF = Vop Vn / IF = 2.33 K Neglecting current through opamp, current through RB will also be IF RB = Vn Vx / IF = 315 Current through RA = Iz+IF = IA = mA RA = Vx / IA = 425 0.5 RF - RA = 680

Hence condition RB 0.5 RF - RA satisfied Step 4: Calculation of change in frequency = 1o = 1 * / 180 = 0.0174 radians Hence new frequency is fo f = 9.73 KHz Observation table with calculated values-Practical values. Calculated Values 1.59 K 10 nF 4.06 V 0.6 V 2.33 k 425 315 - 261.25 KHZ 9.73 KHZ Practical Values 1.5 K 10 nF 4.7 V 0.6 V 2.2 k 420 300 As f = -3 / 4 RC = - 261. 25Hz

R C Vz VD RF RA RB f Fn

Graph:

Session 2010-2011

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Results: The specification of opamp based Wein bridge oscillator using RC feedback network with a phase shift of 1o is achieved.

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Experiment no-11 Design Phase Shift oscillator having frequency of oscillation 15Khz and output voltage of 12 Vpp . Equipments Required: 1. Regulated DC Power supply 2. Zener diode Vz=5.6 V 3. IC741 Operational Amplifier 4. Resistance , capacitors 5. Multimeter/ CRO System Diagram

Design Steps Step 1: Selection of R & C feedback N/W (C =10 nF.) R = 1 / 2 fC6 = 433.16 Assume C = 1nF As R < 1K; R = 1 / 2 fC6 = 4.3316 K

Step 2: Selection of zener diode Vop = Vz+ VD Vz = Vop - VD = 6 0.6 = 5.4 V

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Step 3: Selection of RF A= - RF / R1 - RF / R1 - 29 RF 29 R1 => RF 125.57 K Take RF > 10 % of calculated value RF = 138 K Step 4: Calculation of change in frequency = 1o = 1 * / 180 = 0.0174 radians / = - 2.49 RC f = - / 2.49 RC = - 256. 8Hz fnew = fo f = 15 KHz - 256. 8Hz = 14.74 KHz Observation table with calculated values-Practical values. Calculated Values 4.33 K 1nF 5.4 V 0.6 V 138.1 K 256.8 Hz 14.74 KHz Practical Values 4.2 K 1nF 5.6 V 0.6 V 120 K

R C Vz VD RF f Fn Graph:

Results: The specification of opamp based RC phase shift oscillator using RC Feedback network with a phase shift of 1o is achieved.

Session 2010-2011

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Experiment no-12 Design a Hartley oscillator for frequency of 9 KHz. Equipments Required: 1. Regulated DC Power supply 2. Transistor 3. Resistance, Capacitor 4. Multimeter / CRO System Diagram

Design Steps Step 1:Design of feedback n/w f = 9KHz, L1= 1mH, L2 = 10mH A = - L1/L2 f = 1/ 2 Lequ*C => c = 28 .429 nF Step 2: Amplifier Design For high frequency design Transistor in active region BF 195 should be selected (hfe = 67 200 = 100 typical) Ic = 30mA

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

VCE = Vcc / 2 = 6V Effective load resistance is given by RLeff = Rc / RL Emitter resistance is given by re = 26 mV / IE = 0.866666 hie = re = 86.6666 VE = Vcc /10 = 1.2 V Vcc = IcRc + VCE + IE RE Rc = 160 The voltage divider N/W VB = VBE+ VE S = 1+ RB/RE i.e. R1*R2 = 360 (R1+R2) R1 = Vcc. RB / VB = 2.4 K R2= 423. 529 RE = 40 VB = Vcc*R2 / R1+R2 10 = 1+ RB/RE => RB = 360

Step 3 : Coupling Capacitors Bypass Capacitors. Xci = 1/ 2f ci Ci = 534.094 nF Xco = (Rc|| RL)/ 10 = 119.365 Xce = RE / 10 = 4 => Co = 148.1496 nF => CE = 4.420 F ( Xci = (hie+(1+hfe) RE || RB ) / 10 = 33.11 )

Observation table with calculated values-Practical values. Calculated Values 28.429 nF 160 40 2.4 K 423.529 534.094 nF 148.1496 nF 4.420 F Practical Values 22 nF 150 39 2.2 K 420 500 nF 120 nF 4.2 F

C Rc RE R1 R2 Ci Co CE

Session 2010-2011

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Graph:

Results: The specification of Hartley oscillator using transistor is achieved.

Session 2010-2011

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Experiment no-13 Design a Colpit oscillator for frequency of 9 KHz. Equipments Required: 1. Regulated DC Power supply 2. Transistor 3. Resistance, Capacitor 4. Multimeter / CRO System Diagram

Design Steps Step 1: Design of feedback n/w f = 9 KHz , c1 = c2 A = - c2 / c1 L1 = 1mH

f = 1/ 2 CT L = 312.719 nF => CT = c1*c2 / c1+c2 = c1/2 Step 2: Amplifier Design For high frequency design BF 195 should be selected (hfe = 67 200 = 100 typical) => c1=c2 = 156. 3598513 nF

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Transistor in active region Ic = 30mA VCE = Vcc / 2 = 6V Effective load resistance is given by RLeff = Rc / RL Emitter resistance is given by re = 26 mV / IE = 0.866666 hie = re = 86.6666 VE = Vcc /10 = 1.2 V Vcc = IcRc + VCE + IE RE Rc = 160 The voltage divider N/W VB = VBE+ VE S = 1+ RB/RE i.e. R1*R2 = 360 (R1+R2) R1 = Vcc. RB / VB = 2.4 K R2= 423. 529 RE = 40

VB = Vcc*R2 / R1+R2 10 = 1+ RB/RE => RB = 360

Step 3 : Coupling Capacitors Bypass Capacitors. Xci = 1/ 2f ci Ci = 534.094 nF Xco = (Rc|| RL)/ 10 = 119.365 Xce = RE / 10 = 4 => Co = 148.1496 nF => CE = 4.420 F ( Xci = (hie+(1+hfe) RE || RB ) / 10 = 33.11 )

Observation table with calculated values-Practical values. Calculated Values 156.359 nF 156.359 nF 1mH 160 40 2.4K 423.59 534.094 nF 148.1496 nF 4.420 F Practical Values 150nF 150nF 1mH 150 39 2.2 K 420 500nF 120nF 4.2 F

C1 C2 L RL RE R1 R2 Ci Co Ce

Session 2010-2011

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Graph:

Results: The specification of colpit oscillator using transistor is achieved.

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Experiment no-14 Design a constant current source using a transistor whose hfe=50 to give a load current of 20mA. The supply available is of 30V 10 %. Determine the maximum power dissipated in the transistor & maximum resistance that can be connected to the load. Equipments Required: 1. Unregulated DC Power supply 2. Transistor PNP, zener 3. Resistances 4. Multimeter / CRO System Diagram

Design Steps Step 1: Selection of zener diode Take the zener of minimum breakdown voltage as far as possible. Select Vz=3.3 V, Izmin = 10mA, rz=5 Step 2: Selection of Re Re = Vz - VBE / Ic
=

{ Ie = IL/ } = hfe/ 1+hfe = 0.98

(Vz - VBE / IL) = 132.25

Step 3: Selection of R1 R1 = VBmin / I1 I1= Izmin + Io = 10mA+Ic/hfe = 10.4 mA

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Vbmin = Vimin Vz = 27 3.3 = 23.7 V R1 = 23.7 / 10.4 mA = 2.27 K Step 4: Power dissipation across transistor P.D = VCE*Ic Maximum power dissipation occur under short circuit condition Vemax = Vimax Vre = 30.3 V Step 5: Calculation of RLmax Vemin = Vimin Vre = 24.3 V Vcmin = Vemin 1.5 = 22.8 RLmax = Vcmin/ IL = 1.14 K Observation table with calculated values-Practical values. Calculated Values 3.3 V 132.25 2.27 K 1.14 k Practical Values 3.3 V 120 2.2 k 1k for VCE = 1.5 V => Vre = Vz- VBE = 2.7 V

Vz Re R1 RL Graph:

Results: The specification for constant current source with 20mA constant current is achieved.

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Experiment no-15 Design a Function generator using Op-amp. Vo = 10 cos ( /20) Vi Equipments Required: 1. Regulated DC Power supply 2. IC 741, 3. IN4007 Diodes 4. Resistances 5. Multimeter / CRO System Diagram

Table 1
Vi Vo = 10 cos(/20) Vi Vo = Vo-10 Slope=Vo/ Vi 0 10 0 0 1 9.87 2 9.51 3 8.91 -1.09 -0.82 4 8.09 -1.91 -0.82 5 7.07 -2.93 -1.02 6 5.87 -4.13 -1.2 7 4.53 -5.47 -1.34 8 3.09 -6.91 -1.44 9 1.56 -8.44 -1.58 10 0 -10 -1.56

-0.13 -0.49 -0.13 -0.36

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Curve

The curve is not passing through the origin, hence we have to shift the curve for the curve for input output characteristics as Vo = Vo 10V The slopes are continuously increasing as in table 1, hence connect diode across R. The points where the change in slope is small can be discarded. Modified Table
Vib1 Vi Vo = 10 cos(/20) Vi Vo = Vo-10 Slope 0 10 1 9.87 -0.13 -0.13 S0 Vib2 2 9.51 -0.49 -0.36 S1 Vib3 4 8.09 -1.91 -0.71 S2 Vib4 7 4.53 -5.47 -1.18 S3 Vib5 10 0 -10 -1.51 S4

When all diodes are off S0 = - RF / R1 = -0.13 When D1 diode is ON S1 = - RF / (R|| RA1) = -0.36 (R|| RA1) = RF / 0.36 = 36.11 Kohms RA1 (100 36.11) = (100 x 36.11) x 106

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

RA1 = 56.51 Kohms When D1 & D2 is ON S2 = - RF / (R|| RA1 || RA2) = -0.71 R|| RA1 || RA2 = 13 / 0.71 = 18.30 36.11 || RA2 = 18.30 RA2 = 18.30 x 36.11 x 106 / 36.11 18.3 = 37. 12Kohms When D1 , D2, D3 is ON S3 = -RF/( R|| RA1 || RA2 || RA3) = -1.18 R|| RA1 || RA2 || RA3 = 13/1.18 = 11.02 Kohms 18.3 || RA3 = 11.02 K RA3 = 11.02 x 18.3 x 106 / 18.3 11.02 = 27.70 Kohms When D1 D2 D3 D4 is ON S4 = - RF / (R||RA1|| RA2||RA3||RA4) = -1.51 R||RA1|| RA2||RA3||RA4 = 8.60 11.02|| RA4 = 8.60 (11.02 - 8.60) RA4 = 8.60 x 11.02 x 106 RA4 = 39. 16 Kohms. Select Vr = - 15V

RB1 = RA1(0.6 Vr) / Vib1-0.6 = 56.51 (0.6 + 15) / 1-0.6 = 2.20 Mohms RB2 = RA2(0.6 Vr) / Vib2-0.6 = 37.12K(0.6+15)/ 2-0.6 = 413.62 Kohms RB3 = RA3(0.6 Vr) / Vib3-0.6 = 27.70K(0.6 + 15) / 4- 0.6 = 127K RB4 = RA4(0.6 Vr) / Vib4-0.6 = 39.16K(0.6+15) / 7-0.6 = 95.45 K

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Observation Table Calculated Value Practical Value R RF RA1 RA2 RA3 RA4 RB1 RB2 RB3 RB4 100 K 13 K 56.51 K 37.12 K 27.70 K 39.16 K 2.2 M 413.62K 127K 95.45K 100 K 12K 56K 33K 27K 39K 2.2K 390K 120K 92K

Results: The specified function is obtained by the function generator.

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Experiment no-16 Design a second order low pass Butterworth filter at a high cutoff frequency of 1 KHz. Equipments Required: 1. Regulated DC Power supply 2. IC 741, 3. Capacitors 4. Resistances 5. Multimeter / CRO System Diagram

Design Steps Step 1: The value for the high cutoff frequency fH. Step 2: Calculation for value of R & C To simplify the design R2 = R3 = R. C2 = C3 =C. Choose C 1 F C2 = C3 = 0.0047 F Step 3: Selecting value of R R = 1/ 2 fH C

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

= 1 / 2 x 103 x 47x 10-10 = 33.86 Kohms Step 4: Selection of RF. Since RF must be equal to 0.586 R1 Let R1= 27 ohms. RF = 0.586 R1 = 15.82 Kohms. (Use RF = 20 Kohms pot.) Step 5: Frequency response of filter Frequency response of the filter can be obtained by | Vo/ Vin | = AF / [ ( 1+ f/fH)4] Where f = 10 Hz to 100 Hz fH = 1KHz. AF = 1.586 Observation Table: Calculated Value Practical Value R2 R3 C2 C3 RF 33. 86 K 33. 86 K 0.0047 F 0.0047 F 15.82 K 33K 33K 0.0047 F 0.0047 F 20K pot Magnitude = (20 log (Vo/Vin) 4.01 4.01 4.00 3.07 1 -15.13 -29.80 -35.99 -55.08 -75.99

Frequency Vo / Vin (Hz) 10 100 200 700 1,000 3,000 7,000 10,000 30,000 100,000 1.59 1.59 1.58 1.42 1.12 0.18 0.03 0.02 1.76 x 10-3 1.59x10-4

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Graph:

Results: The specification for 2nd order Butterworth filter for cutoff frequency is designed.

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Experiment no-17 Design a RFAmplifier/tuned amplifier circuit to resonate at 800 kHz and bandwidth of 20 KHz. Stability factor of transistor is 2-10. Equipments Required: 1. Regulated DC Power supply 2. Transistor BF 195 (hfe = 67 200 = 100 typical) 3. Capacitors 4. Resistances 5. Multimeter / CRO System Diagram
VCC 12V

R6 120Ohm_5%

L1 1.0mH R3 2.2kOhm_5% Q1 R5 V1 590Ohm_1% 5mV 1MHz 0Deg C3

C1 1.0pF C4

120nF

510nF R4 422Ohm_1%

BC107BP* R2 39.2Ohm_1%

R1 24Ohm_5% C2 4.7uF-POL

Design Steps For Q =5, L =1mH, Vcc =12V, Ic = 30mA Step 1: Design of tuned circuit. f2 f1= Bandwidth = 1/ 2 * R/L Assume L = 1mH, Bandwidth = 20 KHz R = 20 * 2 * L = 125.66

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

w02 = 1/ LC R2 / L2 f = 1 / 2 (LC) C = 1/ 4 f2L2 Q = RL/wL RL = Q*wL = 25.13 Step 2: Amplifier Design For high frequency design Transistor in active region VCE = Vcc / 2 = 6V
=

w0 = 2f ]

0.0395 nF = 39.5 pF

BF 195 should be selected (hfe = 67 200 = 100 typical) Ic = 30mA

Emitter resistance is given by re = 26 mV / IE = 0.866666 hie = re = 86.6666 VE = Vcc /10 = 1.2 V Vcc = IcRc + VCE + IE RE Rc = 160 The voltage divider N/W VB = VBE+ VE S = 1+ RB/RE i.e. R1*R2 = 360 (R1+R2) R1 = Vcc. RB / VB = 2.4 K R2= 423. 529 VB = Vcc*R2 / R1+R2 10 = 1+ RB/RE => RB = 360 RE = 40

Step 3: Coupling Capacitors Bypass Capacitors. Xci = 1/ 2f ci Ci = 534.094 nF Xco = (Rc|| RL)/ 10 = 119.365 Xce = RE / 10 = 4 => Co = 148.1496 nF => CE = 4.420 F ( Xci = (hie+(1+hfe) RE || RB ) / 10 = 33.11 )

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

Observation table with calculated values-Practical values. Calculated Values 39 .578 pF 1mH 125.66 25.15 40 2.4K 423.59 534.094 nF 148.1496 nF 4.420 F Practical Values 33 pF 1mH 120 24 39 2.2 K 420 500nF 120nF 4.2 F

C L R RL RE R1 R2 Ci Co Ce Graph:

Results: The specification of tuned amplifier using transistor is achieved.

Session 2010-2011

Designed by: Nikhil Damle Lab Incharge

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