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a Low Noise, Low Drift

Single-Supply Operational Amplifiers


OP113/OP213/OP413
FEATURES PIN CONNECTIONS
Single- or Dual-Supply Operation
Low Noise: 4.7 nV/÷Hz @ 1 kHz 8-Lead Narrow-Body SO 8-Lead Plastic DIP
Wide Bandwidth: 3.4 MHz
Low Offset Voltage: 100 V NULL 1 8 NC
NULL 1 8 NC
Very Low Drift: 0.2 V/C
–IN A OP113 V+ –IN A V+
Unity Gain Stable 2 7
+IN A OUT A
No Phase Reversal +IN A
V– 4 5 NULL 3 6 OUT A

APPLICATIONS NC = NO CONNECT
V– 4 5 NULL
Digital Scales OP113
Multimedia NC = NO CONNECT
Strain Gages
Battery-Powered Instrumentation
Temperature Transducer Amplifier
8-Lead Narrow-Body SO 8-Lead Plastic DIP
GENERAL DESCRIPTION
The OP113 family of single supply operational amplifiers OUT A 1 8
OUT A 1 8 V+
V+
features both low noise and drift. It has been designed for –IN A OP213 OUT B –IN A 2 7 OUT B
systems with internal calibration. Often these processor-based +IN A –IN B
systems are capable of calibrating corrections for offset and gain, V– 4 5 +IN B +IN A 3 6 –IN B
but they cannot correct for temperature drifts and noise. Opti-
mized for these parameters, the OP113 family can be used to V– 4 5 +IN B
OP213
take advantage of superior analog performance combined with
digital correction. Many systems using internal calibration oper-
ate from unipolar supplies, usually either 5 V or 12 V. The
OP113 family is designed to operate from single supplies from 4 V 14-Lead Plastic DIP 16-Lead Wide-Body SO
to 36 V, and to maintain its low noise and precision performance.
The OP113 family is unity gain stable and has a typical gain OUT A 1 14 OUT D
OUT A 1 16 OUT D
bandwidth product of 3.4 MHz. Slew rate is in excess of 1 V/ms. –IN A –IN D
–IN A 2 13 –IN D
Noise density is a very low 4.7 nV/÷Hz, and noise in the 0.1 Hz to +IN A +IN D

10 Hz band is 120 nV p-p. Input offset voltage is guaranteed +IN A 3 12 +IN D V+ OP413 V–

and offset drift is guaranteed to be less than 0.8 mV/∞C. Input V+ 4 OP413 11 V–
+IN B +IN C

common-mode range includes the negative supply and to within –IN B –IN C
+IN B 5 10 +IN C OUT B
1 V of the positive supply over the full supply range. Phase reversal OUT C
NC 8 9 NC
protection is designed into the OP113 family for cases where –IN B 6 9 –IN C

input voltage range is exceeded. Output voltage swings also include OUT B 7 8 OUT C NC = NO CONNECT
the negative supply and go to within 1 V of the positive rail. The
output is capable of sinking and sourcing current throughout
its range and is specified with 600 W loads.
Digital scales and other strain gage applications benefit from the
very low noise and low drift of the OP113 family. Other applica-
tions include use as a buffer or amplifier for both A/D and D/A The OP113 family is specified for single 5 V and dual ± 15 V
sigma-delta converters. Often these converters have high resolu- operation over the XIND—extended industrial (–40∞C to +85∞C)
tions requiring the lowest noise amplifier to utilize their full temperature range. They are available in plastic and SOIC
potential. Many of these converters operate in either single supply surface mount packages.
or low supply voltage systems, and attaining the greater signal
swing possible increases system performance.

REV. E
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
may result from its use. No license is granted by implication or otherwise Tel: 781/329-4700 www.analog.com
under any patent or patent rights of Analog Devices. Fax: 781/326-8703 © Analog Devices, Inc., 2002
OP113/OP213/OP413–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (@ V = 15.0 V, T = 25C unless otherwise noted.
S A

E Grade F Grade
Parameter Symbol Conditions Min Typ Max Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS OP113 75 150 mV
–40∞C £ TA £ +85∞C 125 225 mV
OP213 100 250 mV
–40∞C £ TA £ +85∞C 150 325 mV
OP413 125 275 mV
–40∞C £ TA £ +85∞C 175 350 mV
Input Bias Current IB VCM = 0 V, 240 600 600 nA
–40∞C £ TA £ +85∞C 700 700 nA
Input Offset Current IOS VCM = 0 V
–40∞C £ TA £ +85∞C 50 50 nA
Input Voltage Range VCM –15 +14 –15 +14 V
Common-Mode Rejection CMR –15 V £ VCM £ +14 V 100 116 96 dB
–15 V £ VCM £ +14 V,
–40∞C £ TA £ +85∞C 97 116 94 dB
Large Signal Voltage Gain AVO OP113, OP213,
RL = 600 W,
–40∞C £ TA £ +85∞C 1 2.4 1 V/mV
OP413, RL = 1 kW,
–40∞C £ TA £ +85∞C 1 2.4 1 V/mV
RL = 2 kW,
–40∞C £ TA £ +85∞C 2 8 2 V/mV
Long-Term Offset Voltage1 VOS Note 1 150 300 mV
Offset Voltage Drift2 DVOS/DT Note 2 0.2 0.8 1.5 mV/∞C
OUTPUT
CHARACTERISTICS
Output Voltage Swing High VOH RL = 2 kW 14 14 V
RL = 2 kW,
–40∞C £ TA £ +85∞C 13.9 13.9 V
Output Voltage Swing Low VOL RL = 2 kW –14.5 –14.5 V
RL = 2 kW,
–40∞C £ TA £ +85∞C –14.5 –14.5 V
Short Circuit Limit ISC ± 40 ± 40 mA
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = ± 2 V to ± 18 V 103 120 100 dB
VS = ± 2 V to ± 18 V
–40∞C £ TA £ +85∞C 100 120 97 dB
Supply Current/Amplifier ISY VOUT = 0 V, RL = •,
VS = ± 18 V 3 3 mA
–40∞C £ TA £ +85∞C 3.8 3.8 mA
Supply Voltage Range VS 4 ± 18 4 ± 18 V
AUDIO PERFORMANCE
THD + Noise VIN = 3 V rms, RL = 2 kW
f = 1 kHz, 0.0009 0.0009 %
Voltage Noise Density en f = 10 Hz 9 9 nV/÷Hz
f = 1 kHz 4.7 4.7 nV/÷Hz
Current Noise Density in f = 1 kHz 0.4 0.4 pA/÷Hz
Voltage Noise en p-p 0.1 Hz to 10 Hz 120 120 nV p-p
DYNAMIC PERFORMANCE
Slew Rate SR RL = 2 kW 0.8 1.2 0.8 1.2 V/ms
Gain Bandwidth Product GBP 3.4 3.4 MHz
Channel Separation VOUT = 10 V p-p
RL = 2 kW, f = 1 kHz 105 105 dB
Settling Time tS to 0.01%, 0 V to 10 V Step 9 9 ms
NOTES
1
Long-term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at 125 ∞C, with an LTPD of 1.3.
2
Guaranteed specifications, based on characterization data.
Specifications subject to change without notice.

–2– REV. E
OP113/OP213/OP413

ELECTRICAL CHARACTERISTICS (@ V = 5.0 V, T = 25C unless otherwise noted.)


S A

E Grade F Grade
Parameter Symbol Conditions Min Typ Max Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS OP113 125 175 mV
–40∞C £ TA £ +85∞C 175 250 mV
OP213 150 300 mV
–40∞C £ TA £ +85∞C 225 375 mV
OP413 175 325 mV
–40∞C £ TA £ +85∞C 250 400 mV
Input Bias Current IB VCM = 0 V, VOUT = 2 300 650 650 nA
–40∞C £ TA £ +85∞C 750 750 nA
Input Offset Current IOS VCM = 0 V, VOUT = 2
–40∞C £ TA £ +85∞C 50 50 nA
Input Voltage Range VCM 0 +4 +4 V
Common-Mode Rejection CMR 0 V £ VCM £ 4 V 93 106 90 dB
0 V £ VCM £ 4 V,
–40∞C £ TA £ +85∞C 90 87 dB
Large Signal Voltage Gain AVO OP113, OP213,
RL = 600 W, 2 kW
0.01 V £ VOUT £ 3.9 V 2 2 V/mV
OP413, RL = 600, 2 kW,
0.01 V £ VOUT £ 3.9 V 1 1 V/mV
Long-Term Offset Voltage1 VOS Note 1 200 350 mV
Offset Voltage Drift2 DVOS/DT Note 2 0.2 1.0 1.5 mV/∞C
OUTPUT
CHARACTERISTICS
Output Voltage Swing High VOH RL = 600 kW 4.0 4.0 V
RL = 100 kW, 4.1 4.1 V
–40∞C £ TA £ +85∞C
RL = 600 W, 3.9 3.9 V
–40∞C £ TA £ +85∞C
Output Voltage Swing Low VOL RL = 600 W, 8 8 mV
–40∞C £ TA £ +85∞C
RL = 100 kW, 8 8 mV
–40∞C £ TA £ +85∞C
Short Circuit Limit ISC ± 30 ± 30 mA
POWER SUPPLY
Supply Current ISY VOUT = 2.0 V, No Load 1.6 2.7 2.7 mA
ISY –40∞C £ TA £ +85∞C 3.0 3.0 mA
AUDIO PERFORMANCE
THD + Noise VOUT = 0 dBu, f = 1 kHz 0.001 0.001 %
Voltage Noise Density en f = 10 Hz 9 9 nV/÷Hz
f = 1 kHz 4.7 4.7 nV/÷Hz
Current Noise Density in f = 1 kHz 0.45 0.45 pA/÷Hz
Voltage Noise en p-p 0.1 Hz to 10 Hz 120 120 nV p-p
DYNAMIC PERFORMANCE
Slew Rate SR RL = 2 kW 0.6 0.9 0.6 V/ms
Gain Bandwidth Product GBP 3.5 3.5 MHz
Settling Time tS to 0.01%, 2 V Step 5.8 5.8 ms
NOTES
1
Long-term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at 125 ∞C, with an LTPD of 1.3.
2
Guaranteed specifications, based on characterization data.
Specifications subject to change without notice.

REV. E –3–
OP113/OP213/OP413
ABSOLUTE MAXIMUM RATINGS 1 ORDERING GUIDE
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V Temperature Package Package
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . ± 10 V Model Range Description Options
Output Short-Circuit Duration to GND . . . . . . . . . Indefinite OP113ES –40∞C to +85∞C 8-Lead SOIC SO-8
Storage Temperature Range OP113FP* –40∞C to +85∞C 8-Lead Plastic DIP N-8
P, S Packages . . . . . . . . . . . . . . . . . . . . . . –65∞C to +150∞C OP113FS –40∞C to +85∞C 8-Lead SOIC SO-8
Operating Temperature Range OP213EP* –40∞C to +85∞C 8-Lead Plastic DIP N-8
OP113/OP213/OP413E, F . . . . . . . . . . . . . –40∞C to +85∞C OP213ES –40∞C to +85∞C 8-Lead SOIC SO-8
Junction Temperature Range OP213FP –40∞C to +85∞C 8-Lead Plastic DIP N-8
P, S Packages . . . . . . . . . . . . . . . . . . . . . . –65∞C to +150∞C OP213FS –40∞C to +85∞C 8-Lead SOIC SO-8
Lead Temperature Range (Soldering, 60 sec) . . . . . . . 300∞C
OP413ES –40∞C to +85∞C 16-Lead Wide SOIC R-16
Package Type JA2 JC Unit OP413FP* –40∞C to +85∞C 14-Lead Plastic DIP N-14
OP413FS –40∞C to +85∞C 16-Lead Wide SOIC R-16
8-Lead Plastic DIP (P) 103 43 ∞C/W
8-Lead SOIC (S) 158 43 ∞C/W *Not for new designs; obsolete April 2002.
14-Lead Plastic DIP (P) 83 39 ∞C/W
16-Lead SOIC (S) 92 27 ∞C/W
NOTES
1
Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted.
2
qJA is specified for the worst-case conditions, i.e., qJA is specified for device in
socket for cerdip, P-DIP, and LCC packages; qJA is specified for device sol-
dered in circuit board for SOIC package.

CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although WARNING!
the OP113/OP213/OP413 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions
ESD SENSITIVE DEVICE
are recommended to avoid performance degradation or loss of functionality.

–4– REV. E
Typical Performance Characteristics–OP113/OP213/OP413
100 150

VS = 15V VS = 15V
TA = 25C –40C TA +85C
80 120
400  OP AMPS 400  OP AMPS
PLASTIC PKG PLASTIC PKG

60 90

UNITS
UNITS

40 60

20 30

0 0
–50 –40 –30 –20 –10 0 10 20 30 40 50 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
INPUT OFFSET VOLTAGE, VOS – V TCVOS – V

TPC 1a. OP113 Input Offset (VOS) Distribution TPC 2a. OP113 Temperature Drift (TCVOS)
@ ± 15 V Distribution @ ± 15 V

500 500

VS = 15V
TA = 25C VS = 15V
400 896 (PLASTIC)  OP AMPS 400 –40C TA +85C
896 (PLASTIC)  OP AMPS

300 300
UNITS

UNITS

200 200

100 100

0 0
–100 –80 –60 –40 –20 0 20 40 60 80 100 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
INPUT OFFSET VOLTAGE, VOS – V TCVOS – V

TPC 1b. OP213 Input Offset (VOS) Distribution TPC 2b. OP213 Temperature Drift (TCVOS)
@ ± 15 V Distribution @ ± 15 V

500 600
VS = 15V
TA = 25C
500 VS = 15V
400 1220  OP AMPS
PLASTIC PKG –40C TA +85C
1220  OP AMPS
400 PLASTIC PKG
300
UNITS

UNITS

300

200
200

100
100

0 0
–60 –40 –20 0 20 40 60 80 100 120 140 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
INPUT OFFSET VOLTAGE, VOS – V TCVOS – V

TPC 1c. OP413 Input Offset (VOS) Distribution TPC 2c. OP413 Temperature Drift (TCVOS)
@ ± 15 V Distribution @ ± 15 V

REV. E –5–
OP113/OP213/OP413
1000 500

800 400
INPUT BIAS CURRENT – nA

INPUT BIAS CURRENT – nA


VCM = 0V VS = 5.0V
600 300

VS = 15V
VS = 5.0V
400 VCM = 2.5V 200

200 VS = 15V 100


VCM = 0V

0 0
–75 –50 –25 0 25 50 75 100 125 –75 –50 –25 0 25 50 75 100 125
TEMPERATURE – C TEMPERATURE – C

TPC 3. OP113 Input Bias Current vs. Temperature TPC 6. OP213 Input Bias Current vs. Temperature

5.0 2.0 15.0


VS = 5.0V VS = 15V +SWING
14.5 RL = 2k

POSITIVE OUTPUT SWING – Volts


POSITIVE OUTPUT SWING – Volts

NEGATIVE OUTPUT SWING – mV

14.0
4.5 1.5
+SWING 13.5
RL = 2k
13.0 +SWING
RL = 600
–SWING
4.0 RL = 2k 1.0 12.5
+SWING
RL = 600

–13.5 –SWING
3.5 0.5 RL = 2k
–14.0 –SWING
–SWING RL = 600
RL = 600 –14.5

3.0 0 –15.0
–75 –50 –25 0 25 50 75 100 125 –75 –50 –25 0 25 50 75 100 125
TEMPERATURE – C TEMPERATURE – C

TPC 4. Output Swing vs. Temperature and RL @ 5 V TPC 7. Output Swing vs. Temperature and RL @ ±15 V

60 20
VS = 15V VS = 5.0V
40 18
TA = 25C VO = 3.9V
20 16
CHANNEL SEPARATION – dB

RL = 2k
OPEN-LOOP GAIN – V/V

0 14

–20 12

–40 10

–60 8 RL = 600

–80 6

–100 4
105
–120 2

0
10 100 1k 10k 100k 1M 10M –75 –50 –25 0 25 50 75 100 125
FREQUENCY – Hz TEMPERATURE – C

TPC 5. Channel Separation TPC 8. Open-Loop Gain vs. Temperature @ 5 V

–6– REV. E
OP113/OP213/OP413
12.5 10
VS = 15V VS = 15V
9
RL = 2k VD = 10V VO = 10V
10.0 8
OPEN-LOOP GAIN – V/V

OPEN LOOP GAIN – V/V


RL = 2k
7

7.5 6
RL = 1k
5

5.0 4
RL = 600 3
RL = 600
2.5 2

0 0
–75 –50 –25 0 25 50 75 100 125 –75 –50 –25 0 25 50 75 100 125
TEMPERATURE – C TEMPERATURE – C

TPC 9. OP413 Open-Loop Gain vs. Temperature TPC 12. OP213 Open-Loop Gain vs. Temperature

100 100
V+ = 5V TA= 25C
V– = 0V VS = 15V
80 TA = 25C 0 80 0
OPEN-LOOP GAIN – dB

OPEN-LOOP GAIN – dB
60 45 60 45
PHASE – Degrees

PHASE – Degrees
GAIN GAIN

40 90 40 90
PHASE PHASE

20 m = 57 135 20 m = 72 135

0 180 0 180

–20 225 –20 225


1k 10k 100k 1M 10M 1k 10k 100k 1M 10M
FREQUENCY – Hz FREQUENCY – Hz

TPC 10. Open-Loop Gain, Phase vs. Frequency @ 5 V TPC 13. Open-Loop Gain, Phase vs. Frequency @ ± 15 V

50 50
V+ = 5V
V– = 0V TA= 25C
40 40
TA = 25C VS = 15V
AV = 100 AV = 100
CLOSED-LOOP GAIN – dB

CLOSED-LOOP GAIN – dB

30 30

20 20
AV = 10 AV = 10
10 10

0 0
AV = 1 AV = 1
–10 –10

–20 –20
1k 10k 100k 1M 10M 1k 10k 100k 1M 10M
FREQUENCY – Hz FREQUENCY – Hz

TPC 11. Closed-Loop Gain vs. Frequency @ 5 V TPC 14. Closed-Loop Gain vs. Frequency @ ± 15 V

REV. E –7–
OP113/OP213/OP413
70 5 70 5
V+ = 5V VS = 15V
V– = 0V

GAIN-BANDWIDTH PRODUCT – MHz


GAIN-BANDWIDTH PRODUCT – MHz
PHASE MARGIN – Degrees

65 4 65

PHASE MARGIN – Degrees


GBW 4

GBW
m
60 3 60 3
m

55 2 55 2

50 1 50 1
–75 –50 –25 0 25 50 75 100 125 –75 –50 –25 0 25 50 75 100 125
TEMPERATURE – C TEMPERATURE – C

TPC 15. Gain Bandwidth Product and Phase Margin vs. TPC 18. Gain Bandwidth Product and Phase Margin vs.
Temperature @ 5 V Temperature @ ± 15 V

30 3.0
TA = 25C TA = 25C
VS = 15V VS = 15V
VOLTAGE NOISE DENSITY – nV/ Hz

CURRENT NOISE DENSITY – pA/ Hz


25 2.5

20 2.0

15 1.5

10 1.0

5 0.5

0 0
1 10 100 1k 1 10 100 1k
FREQUENCY – Hz FREQUENCY – Hz

TPC 16. Voltage Noise Density vs. Frequency TPC 19. Current Noise Density vs. Frequency

140 140
V+ = 5V TA= 25C
V– = 0V VS = 15V
120 TA = 25C 120
COMMON-MODE REJECTION – dB

COMMON-MODE REJECTION – dB

100 100

80 80

60 60

40 40

20 20

0 0
100 1k 10k 100k 1M 100 1k 10k 100k 1M
FREQUENCY – Hz FREQUENCY – Hz

TPC 17. Common-Mode Rejection vs. Frequency @ 5 V TPC 20. Common-Mode Rejection vs. Frequency @ ± 15 V

–8– REV. E
OP113/OP213/OP413
140 40
TA = 25C TA = 25C
VS = 15V VS = 15V
120
POWER SUPPLY REJECTION – dB

30
100
+PSRR

IMPEDANCE – 
80
20
60
–PSRR

40 AV = 100
10
AV = 10
20
AV = 1

0 0
100 1k 10k 100k 1M 100 1k 10k 100k 1M
FREQUENCY – Hz FREQUENCY – Hz

TPC 21. Power Supply Rejection vs. Frequency @ ± 15 V TPC 24. Closed-Loop Output Impedance vs. Frequency
@ ± 15 V

6 30
VS = 5V VS = 15V
RL = 2k RL = 2k
5
MAXIMUM OUTPUT SWING – Volts

25

MAXIMUM OUTPUT SWING – Volts


TA = 25C TA = 25C
AVCL = 1 AVOL = 1

4 20

3 15

2 10

1 5

0 0
1k 10k 100k 1M 10M 1k 10k 100k 1M 10M
FREQUENCY – Hz FREQUENCY – Hz

TPC 22. Maximum Output Swing vs. Frequency @ 5 V TPC 25. Maximum Output Swing vs. Frequency @ ± 15 V

50 20
VS = 5V VS = 15V
45 18
RL = 2k RL = 2k
40 VIN = 100mV p-p VIN = 100mV p-p
16
TA = 25C TA = 25C
35 AVCL = 1 14 AVCL = 1 POSITIVE
OVERSHOOT – %

EDGE
OVERSHOOT – %

30 12

25 NEGATIVE NEGATIVE
10
EDGE EDGE
20 8
POSITIVE
15 6
EDGE
10 4

5 2

0 0
0 100 200 300 400 500 0 100 200 300 400 500
LOAD CAPACITANCE – pF LOAD CAPACITANCE – pF

TPC 23. Small Signal Overshoot vs. Load TPC 26. Small Signal Overshoot vs. Load
Capacitance @ 5 V Capacitance @ ± 15 V

REV. E –9–
OP113/OP213/OP413
2.0 2.0
VS = 5, 0 VS = 15V
VOUT = 10V +SLEW RATE
0.5V VOUT 4.0V

1.5 1.5
–SLEW RATE
SLEW RATE – V/s

SLEW RATE – V/s


+SLEW RATE

1.0 1.0

–SLEW RATE

0.5 0.5

0 0
–75 –50 –25 0 25 50 75 100 125 –75 –50 –25 0 25 50 75 100 125
TEMPERATURE – C TEMPERATURE – C

TPC 27. Slew Rate vs. Temperature @ 5 V TPC 30. Slew Rate vs. Temperature @ ± 15 V
(0.5 V  VOUT  4.0 V) (–10 V £ VOUT £ +10.0 V)

1s 1s
100
100
90
90

10
10 0%
0%
20mV 20mV

TPC 28. Input Voltage Noise @ ± 15 V (20 nV/div) TPC 31. Input Voltage Noise @ 5 V (20 nV/div)

4
SUPPLY CURRENT – mA

909
VS = 18V
VS = 15V
100
3
0.1Hz–10Hz
AV = 1000 VS = 5.0V

2
AV = 100 tOUT

0
–75 –50 –25 0 25 50 75 100 125
TEMPERATURE – C

TPC 29. Noise Test Diagram TPC 32. Supply Current vs. Temperature

–10– REV. E
OP113/OP213/OP413
APPLICATIONS range may be somewhat excessive. Reducing the trimming
The OP113, OP213, and OP413 form a new family of high potentiometer to a 2 kW value will give a more reasonable range
performance amplifiers that feature precision performance in of ± 400 mV.
+15V
standard dual supply configurations and, more importantly, –15V
maintain precision performance when a single power supply is R5 +10.000V
2 16
8 14
used. In addition to accurate dc specifications, it is the lowest 1k 3 1
2N2219A 1 A2 15
noise single supply amplifier available with only 4.7 nV/÷Hz 2
3
AD588BD
1/2 8
typical noise density. 9
OP213 10
Single supply applications have special requirements due to the 4 6 11 12 13 7
+10.000V
generally reduced dynamic range of the output signal. Single R3 10F
supply applications are often operated at voltages of 5 V or 12 V, 17.2k R4
0.1% 500
compared to dual supply applications with supplies of ± 12 V or 350
LOAD CMRR TRIM
± 15 V. This results in reduced output swings. Where a dual CELL 10-TURN
T.C. LESS THAN 50ppm/C
6
supply application may often have 20 V of signal output swing, 100mV
A1 7 OUTPUT
F.S.
single supply applications are limited to, at most, the supply range 5 4 1/2 0 10V
FS
and, more commonly, several volts below the supply. In order to OP213
–15V
attain the greatest swing, the single supply output stage must
swing closer to the supply rails than in dual supply applications. R1 R2
17.2k 301
The OP113 family has a new patented output stage that allows 0.1% 0.1%
the output to swing closer to ground, or the negative supply,
Figure 1. Precision Load Cell Scale Amplifier
than previous bipolar output stages. Previous op amps had
outputs that could swing to within about ten millivolts of the APPLICATION CIRCUITS
negative supply in single supply applications. However, the A High Precision Industrial Load-Cell Scale Amplifier
OP113 family combines both a bipolar and a CMOS device in The OP113 family makes an excellent amplifier for conditioning
the output stage, enabling it to swing to within a few hundred a load-cell bridge. Its low noise greatly improves the signal reso-
microvolts of ground. lution, allowing the load cell to operate with a smaller output
range, thus reducing its nonlinearity. Figure 1 shows one half of
When operating with reduced supply voltages, the input range is
the OP113 family used to generate a very stable 10.000 V bridge
also reduced. This reduction in signal range results in reduced
excitation voltage while the second amplifier provides a differential
signal-to-noise ratio, for any given amplifier. There are only two
gain. R4 should be trimmed for maximum common-mode rejection.
ways to improve this: increase the signal range or reduce the
noise. The OP113 family addresses both of these parameters. A Low Voltage Single Supply, Strain-Gage Amplifier
Input signal range is from the negative supply to within one The true zero swing capability of the OP113 family allows the
volt of the positive supply over the full supply range. Com- amplifier in Figure 2 to amplify the strain-gage bridge accurately
petitive parts have input ranges that are a half a volt to five even with no signal input while being powered by a single 5 V
volts less than this. Noise has also been optimized in the OP113 supply. A stable 4.000 V bridge voltage is made possible by the
family. At 4.7 nV/÷Hz, it is less than one fourth that of competi- rail-to-rail OP295 amplifier, whose output can swing to within a
tive devices. millivolt of either rail. This high voltage swing greatly increases
the bridge output signal without a corresponding increase in
Phase Reversal
bridge input.
The OP113 family is protected against phase reversal as long
as both of the inputs are within the supply ranges. However, if 5V
there is a possibility of either input going below the negative
2
supply (or ground in the single supply case), the inputs should IN
be protected with a series resistor to limit input current to 2 mA. 8
3
2.500V
6 OUT REF43
1/2
2N2222A 1
OP113 Offset Adjust OP295
2
GND
4 4
The OP113 has the facility for external offset adjustment,
using the industry standard arrangement. Pins 1 and 5 are used 4.000V
350 5V
in conjunction with a potentiometer of 10 kW total resistance, 35mV
R8 R7
12.0k 20.0k
connected with the wiper to V– (or ground in single supply FS 8 OUTPUT
0V 3.5V
5
applications). The total adjustment range is about ± 2 mV using 1/2
OP295
7
this configuration. 6
4
R3
Adjusting the offset to zero has minimal effect on offset drift 3
1/2 20k
(assuming the potentiometer has a tempco of less than 1000 ppm/ OP213 1
R4
∞C). Adjustment away from zero, however, (like all bipolar 2 R2 100k
20k
amplifiers) will result in a TCVOS of approximately 3.3 mV/∞C
for every millivolt of induced offset.
R1
R5 R6
It is therefore not generally recommended that this trim be 100k
2.10k 27.4
used to compensate for system errors originating outside of the RG = 2,127.4
OP113. The initial offset of the OP113 is low enough that external
trimming is almost never required but, if necessary, the 2 mV trim Figure 2. Single Supply Strain-Gage Amplifier

REV. E –11–
OP113/OP213/OP413
A High Accuracy Linearized RTD Thermometer Amplifier A High Accuracy Thermocouple Amplifier
Zero suppressing the bridge facilitates simple linearization of the Figure 4 shows a popular K-type thermocouple amplifier with
RTD by feeding back a small amount of the output signal to the cold-junction compensation. Operating from a single 12 V supply,
RTD (Resistor Temperature Device). In Figure 3, the left leg of the OP113 family’s low noise allows temperature measurement
the bridge is servoed to a virtual ground voltage by amplifier to better than 0.02∞C resolution from 0∞C to 1000∞C range.
A1, while the right leg of the bridge is also servoed to zero volt The cold-junction error is corrected by using an inexpensive silicon
by amplifier A2. This eliminates any error resulting from common- diode as a temperature measuring device. It should be placed as
mode voltage change in the amplifier. A 3-wire RTD is used to close to the two terminating junctions as physically possible. An
balance the wire resistance on both legs of the bridge, thereby aluminum block might serve well as an isothermal system.
reducing temperature mismatch errors. The 5.000 V bridge
excitation is derived from the extremely stable AD588 reference
5.000V
device with 1.5 ppm/∞C drift performance. 12V 2 REF02EZ 6
0.1F R9
Linearization of the RTD is done by feeding a fraction of the 4
R1 R5 124k
output voltage back to the RTD in the form of a current. With 10.7k 40.2k
12V
1N4148 10F
just the right amount of positive feedback, the amplifier output +
D1
will be linearly proportional to the temperature of the RTD. 0.1F
R2 R8
– – 2.74k 453
–15V +15V 2 8
K-TYPE
THERMOCOUPLE 1/2
+ + 1
16 2 40.7V/C R6
OP213
3
0V TO 10.00V
11 200 4
(0C TO 1000C)
14 R4 R3
12
15 5.62k 53.6
13 AD588BD

4 1
R3 RG FULL SCALE ADJUST
6 3 50 Figure 4. Accurate K-Type Thermocouple Amplifier
R2 R5 R7
7 9 8 10 8.25k 4.02k 100 R6 should be adjusted for a zero-volt output with the thermo-
R1
10F
8.25k
couple measuring tip immersed in a zero-degree ice bath. When
+15V
calibrating, be sure to adjust R6 initially to cause the output to
RW1
6 8 swing in the positive direction first. Then back off in the nega-
100 R4 A2 7 VOUT (10mV/C) tive direction until the output just stops changing.
RTD 100 5 –1.50V = –150C
4 1/2
RW2
OP213 +5.00V = +500C An Ultralow Noise, Single Supply Instrumentation Amplifier
–15V
Extremely low noise instrumentation amplifiers can be built
R9
RW3 5k
using the OP113 family. Such an amplifier that operates off a
R8
49.9k LINEARITY single supply is shown in Figure 5. Resistors R1–R5 should be
ADJUST
2 @1/2 FS of high precision and low drift type to maximize CMRR perfor-
A1 1 mance. Although the two inputs are capable of operating to zero
3
1/2 volt, the gain of –100 configuration will limit the amplifier input
OP213 common mode to not less than 0.33 V.
Figure 3. Ultraprecision RTD Amplifier 5V TO 36V
To calibrate the circuit, first immerse the RTD in a zero-degree +
ice bath or substitute an exact 100 W resistor in place of the VIN
1/2
VOUT
OP213
RTD. Adjust the ZERO ADJUST potentiometer for a 0.000 V –
1/2
output, then set R9 LINEARITY ADJUST potentiometer to OP213
the middle of its adjustment range. Substitute a 280.9 W resistor *R1 *R2 *R3 *R4
(equivalent to 500∞C) in place of the RTD, and adjust the 10k 10k 10k 10k

FULL-SCALE ADJUST potentiometer for a full-scale voltage *RG


of 5.000 V. 20k
(200 + 12.7) GAIN = +6
RG
To calibrate out the nonlinearity, substitute a 194.07 W resistor *ALL RESISTORS 0.1%, 25ppm/C
(equivalent to 250∞C) in place of the RTD, then adjust the
LINEARITY ADJUST potentiometer for a 2.500 V output. Figure 5. Ultralow Noise, Single Supply Instrumentation
Check and readjust the full-scale and half-scale as needed. Amplifier
Once calibrated, the amplifier outputs a 10 mV/∞C temperature
coefficient with an accuracy better than ± 0.5∞C over an RTD
measurement range of –150∞C to +500∞C. Indeed the amplifier
can be calibrated to a higher temperature range, up to 850∞C.

–12– REV. E
OP113/OP213/OP413
Supply Splitter Circuit Low Noise Voltage Reference
The OP113 family has excellent frequency response characteris- Few reference devices combine low noise and high output drive
tic that makes it an ideal pseudo-ground reference generator as capabilities. Figure 7 shows the OP113 family used as a two-pole
shown in Figure 6. The OP113 family serves as a voltage follower active filter that band limits the noise of the 2.500 V reference.
buffer. In addition, it drives a large capacitor that serves as a charge Total noise measures 3 mV p-p.
reservoir to minimize transient load changes, as well as a low
impedance output device at high frequencies. The circuit easily
supplies 25 mA load current with good settling characteristics. 5V

VS+ = 5V 12V 5V
10F
+ 8
2
2
R3 1/2 OUTPUT
IN 1
2.5k
10k 10k
OP213 2.500V
OUT 6 3
C1 + 4 3V p-p NOISE
0.1F REF43 C2
GND 10F
R1
5k 4
8
2 R4
1/2 100 VS+
Figure 7. Low Noise Voltage Reference
1 OUTPUT
OP213 + 2 5 V Only Stereo DAC for Multimedia
3 C2

R2
4 1F The OP113 family’s low noise and single supply capability are
5k ideally suited for stereo DAC audio reproduction or sound
synthesis applications such as multimedia systems. Figure 8
shows an 18-bit stereo DAC output setup that is powered from a
Figure 6. False Ground Generator single 5 V supply. The low noise preserves the 18-bit dynamic
range of the AD1868. For DACs that operate on dual supplies,
the OP113 family can also be powered from the same supplies.

5V SUPPLY

AD1868
VBL
1 VL 16
18-BIT 8
LL DAC 220F LEFT
2 15 1/2
1 CHANNEL
7.68k 9.76k OP213 + – OUTPUT
18-BIT 14 47k
3
DL SERIAL VOL
REG. 330pF
4 VREF 13 100pF
CK
DR
5 AGND 12 7.68k
18-BIT
LR SERIAL 7.68k
6 REG. VREF 11

VOR
7 DGND 10 100pF
18-BIT
DAC 7.68k 9.76k
8 VS 9 6
220F RIGHT
VBR 330pF 1/2
7 CHANNEL
OP213 + – OUTPUT
5 47k

Figure 8. 5 V Only 18-Bit Stereo DAC

SoundPort is a registered trademark of Analog Devices, Inc.

REV. E –13–
OP113/OP213/OP413
Low Voltage Headphone Amplifiers Precision Voltage Comparator
Figure 9 shows a stereo headphone output amplifier for the With its PNP inputs and zero volt common-mode capability, the
AD1849 16-bit SoundPort® Stereo Codec device. The pseudo- OP113 family can make useful voltage comparators. There is
reference voltage is derived from the common-mode voltage only a slight penalty in speed in comparison to IC comparators.
generated internally by the AD1849, thus providing a conve- However, the significant advantage is its voltage accuracy. For
nient bias for the headphone output amplifiers. example, VOS can be a few hundred microvolts or less, combined
with CMRR and PSRR exceeding 100 dB, while operating on 5 V
OPTIONAL supply. Standard comparators like the 111/311 family operate
GAIN
1k 5k on 5 V, but not with common-mode at ground, nor with offset
VREF
below 3 mV. Indeed, no commercially available single supply
10F
5V comparator has a VOS less than 200 mV.
LOUT1L 31 1/2 220F
16 + Figure 11 shows the OP113 family response to a 10 mV over-
L VOLUME HEADPHONE
CONTROL OP213 LEFT drive signal when operating in open loop. The top trace shows
10k
47k the output rising edge has a 15 ms propagation delay, while the
bottom trace shows a 7 ms delay on the output falling edge. This
5V ac response is quite acceptable in many applications.
AD1849

1/2 10mV OVERDRIVE 5V


VREF
OP213 +2.5V
25k
0V
1/2
CMOUT 19 –2.5V 100 OP113
tr = tf = 5ms
10k 220F
1/2 16 + HEADPHONE
OP213 RIGHT
LOUT1R 29
10F 47k
R VOLUME
CONTROL 5k 2V 5s
1k OPTIONAL 100

GAIN 90

VREF

Figure 9. Headphone Output Amplifier for Multimedia


Sound Codec
Low Noise Microphone Amplifier for Multimedia 10

The OP113 family is ideally suited as a low noise microphone 0%

preamp for low voltage audio applications. Figure 10 shows a 2V


gain of 100 stereo preamp for the AD1849 16-bit SoundPort
Stereo Codec chip. The common-mode output buffer serves as
Figure 11. Precision Comparator
a “phantom power” driver for the microphones.
The low noise and 250 mV (maximum) offset voltage enhance the
10k overall dc accuracy of this type of comparator. Note that zero
crossing detectors and similar ground referred comparisons can be
5V
implemented even if the input swings to –0.3 V below ground.
1/2
10F 50 OP213 17 MINL
LEFT
ELECTRET
CONDENSER
MIC 20
10k 100
INPUT AD1849

5V
19 CMOUT
1/2
OP213
100
20
10k
10F 50
1/2
RIGHT OP213 15 MINR
ELECTRET
CONDENSER
MIC
INPUT 10k

Figure 10. Low Noise Stereo Microphone Amplifier for


Multimedia Sound Codec

SoundPort is a registered trademark of Analog Devices, Inc.

–14– REV. E
OP113/OP213/OP413
* SECOND CURRENT NOISE SOURCE
DN5 27 28 DIN
DN6 28 29 DIN
+IN
VN5 27 0 DC 2
VN6 0 29 DC 2
9V 9V *
OUT * GAIN STAGE & DOMINANT POLE AT .2000E+01 HZ
–IN
G2 34 36 19 20 2.65E–04
R7 34 36 39E+06
V3 35 4 DC 6
D4 36 35 DX
VB2 34 4 1.6
*
* SUPPLY/2 GENERATOR
ISY 7 4 0.2E–3
R10 7 60 40E+3
R11 60 4 40E+3
C3 60 0 1E–9
*
* CMRR STAGE & POLE AT 6 kHZ
ECM 50 4 POLY(2) 3 BΠ60 2 60 0 1.6 0 1.6
Figure 12. OP213 Simplified Schematic CCM 50 51 26.5E–12
RCM1 50 51 1E6
RCM2 51 4 1
*OP113 Family SPICE Macro-Model *
* *
OUTPUT STAGE
*Copyright 1992 by Analog Devices, Inc.
R12 37 36 1E3
*
R13 38 36 500
*Node Assignments
C4 37 6 20E–12
*
C5 38 39 20E–12
* Noninverting Input
M1 39 36 4 4 MN L=9E–6 W=1000E–6 AD=15E–9 AS=15E–9
* Inverting Input M2 45 36 4 4 MN L=9E–6 W=1000E–6 AD=15E–9 AS=15E–9
D5 39 47 DX
* Positive Supply D6 47 45 DX
Q3 39 40 41 QPA 8
* Negative Supply
VB 7 40 DC 0.861
* Output R14 7 41 375
* Q4 41 7 43 QNA 1
.SUBCKT OP113 Family 3 2 7 4 6 R17 7 43 15
* Q5 43 39 6 QNA 20
* INPUT STAGE Q6 46 45 6 QPA 20
R3 4 19 1.5E3 R18 46 4 15
R4 4 20 1.5E3 Q7 36 46 4 QNA 1
C1 19 20 5.31E–12 M3 6 36 4 4 MN L = 9E–6 W=2000E–6 AD=30E–9 AS=30E–9
I1 7 18 106E–6 *
IOS 2 3 25E–09 * NONLINEAR MODELS USED
EOS 12 5 POLY(1) 51 4 25E–06 1 *
Q1 19 3 18 PNP1 .MODEL DX D (IS=1E–15)
Q2 20 12 18 PNP1 .MODEL DY D (IS=1E–15 BV=7)
CIN 3 2 3E–12 .MODEL PNP1 PNP (BF=220)
D1 3 1 DY .MODEL DEN D(IS=1E–12 RS=1016 KF=3.278E–15 AF=1)
D2 2 1 DY .MODEL DIN D(IS=1E–12 RS=100019 KF=4.173E–15 AF=1)
EN 5 2 22 0 1 .MODEL QNA NPN(IS=1.19E–16 BF=253 VAF=193 VAR=15 RB=2.0E3
GN1 0 2 25 0 1E–5 + IRB=7.73E–6 RBM=132.8 RE=4 RC=209 CJE=2.1E–13 VJE=0.573
GN2 0 3 28 0 1E–5 + MJE=0.364 CJC=1.64E–13 VJC=0.534 MJC=0.5 CJS=1.37E–12
* + VJS=0.59 MJS=0.5 TF=0.43E–9 PTF=30)
* VOLTAGE NOISE SOURCE WITH FLICKER NOISE .MODEL QPA PNP(IS=5.21E–17 BF=131 VAF=62 VAR= 15 RB=1.52E3
DN1 21 22 DEN + IRB=1.67E–5 RBM=368.5 RE=6.31 RC=354.4 CJE=1.1E–13
DN2 22 23 DEN + VJE=0.745 MJE=0.33 CJC=2.37E–13 VJC=0.762 MJC=0.4
VN1 21 0 DC 2 + CJS=7.11E–13 VJS=0.45 MJS=0.412 TF=1.0E–9 PTF=30)
VN2 0 23 DC 2 .MODEL MN NMOS(LEVEL=3 VTO=1.3 RS=0.3 RD=0.3 TOX=8.5E–8
* + LD=1.48E–6 WD=1E–6 NSUB=1.53E16 UO=650 DELTA=10 VMAX=2E5
* CURRENT NOISE SOURCE WITH FLICKER NOISE + XJ=1.75E–6 KAPPA=0.8 ETA=0.066 THETA=0.01 TPG=1 CJ=2.9E–4
DN3 24 25 DIN + PB=0.837 MJ=0.407 CJSW=0.5E–9 MJSW=0.33)
DN4 25 26 DIN *
VN3 24 0 DC 2 .ENDS OP113 Family
VN4 0 26 DC 2
*

REV. E –15–
OP113/OP213/OP413
OUTLINE DIMENSIONS

8-Lead Plastic Dual-in-Line [PDIP] 14-Lead Plastic Dual-in-Line [PDIP]


(N-8) (N-14)
Dimensions shown in inches and (millimeters) Dimensions shown in inches and (millimeters)

C00286–0–9/02(E)
0.375 (9.53) 0.685 (17.40)
0.365 (9.27) 0.665 (16.89) 0.295 (7.49)
0.355 (9.02) 0.645 (16.38) 0.285 (7.24)
0.275 (6.99)
8 5 14 8
0.295 (7.49)
0.285 (7.24) 1 7

1 4 0.275 (6.98)
0.325 (8.26) 0.100 (2.54)
0.310 (7.87) BSC 0.325 (8.26)
0.100 (2.54) 0.150 (3.81) 0.310 (7.87)
0.300 (7.62)
BSC 0.015 (0.38)
0.135 (3.43) 0.300 (7.62) 0.150 (3.81)
0.015 MIN
0.120 (3.05) 0.135 (3.43)
0.180
(4.57) (0.38) 0.180 (4.57) 0.120 (3.05)
MAX MIN MAX
0.015 (0.38) 0.150 (3.81)
0.150 (3.81) SEATING 0.010 (0.25) 0.130 (3.30) SEATING
PLANE 0.015 (0.38)
0.130 (3.30) PLANE 0.008 (0.20) 0.110 (2.79) 0.022 (0.56) 0.060 (1.52) 0.010 (0.25)
0.110 (2.79) 0.060 (1.52) 0.018 (0.46) 0.050 (1.27) 0.008 (0.20)
0.022 (0.56) 0.050 (1.27) 0.014 (0.36) 0.045 (1.14)
0.018 (0.46) 0.045 (1.14)
0.014 (0.36) COMPLIANT TO JEDEC STANDARDS MO-095-AB
CONTROLLING DIMENSIONS ARE IN INCH; MILLIMETERS DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MO-095AA (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
(IN PARENTHESES)

8-Lead Standard Small Outline Package [SOIC] 16-Lead Standard Small Outline Package [SOIC]
Narrow Body Wide Body
(R-8) (R-16)
Dimensions shown in millimeters and (inches) Dimensions shown in millimeters and (inches)

10.50 (0.4134)
5.00 (0.1968) 10.10 (0.3976)
4.80 (0.1890)
16 9
8 5
4.00 (0.1574) 6.20 (0.2440) 7.60 (0.2992)
3.80 (0.1497) 1 4 5.80 (0.2284) 7.40 (0.2913)
10.65 (0.4193)
1 8
10.00 (0.3937)
1.27 (0.0500) 0.50 (0.0196)
1.75 (0.0688) ⴛ 45ⴗ
BSC 0.25 (0.0099)
0.25 (0.0098) 1.35 (0.0532) 2.65 (0.1043)
1.27 (0.0500) 0.75 (0.0295)
0.10 (0.0040) BSC 2.35 (0.0925) ⴛ 45ⴗ
0.25 (0.0098)
0.51 (0.0201) 8ⴗ 0.30 (0.0118)
COPLANARITY 0.33 (0.0130) 0.25 (0.0098) 0ⴗ 1.27 (0.0500) 0.10 (0.0039)
0.10 SEATING 0.41 (0.0160)
PLANE 0.19 (0.0075) 8ⴗ
0.51 (0.0201) SEATING 0ⴗ 1.27 (0.0500)
COPLANARITY 0.32 (0.0126)
0.33 (0.0130) PLANE
COMPLIANT TO JEDEC STANDARDS MS-012AA 0.10 0.23 (0.0091) 0.40 (0.0157)
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS

PRINTED IN U.S.A.
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR COMPLIANT TO JEDEC STANDARDS MS-013AA
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN

Revision History
Location Page
8/02—Data Sheet changed from REV. D to REV. E.
Edits to Figure 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Edits to Figure 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Edits to OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
9/01—Data Sheet changed from REV. C to REV. D.
Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

–16– REV. E