Courses In Electrical Engineering

Volume II DIGITAL ELECTRONICS FIRST SEQUENCE EXAM WITH SOLUTION

By Jean-Paul NGOUNE DIPET I (Electrotechnics), DIPET II (Electrotechnics) DEA (Electrical Engineering) Teacher in the Electrical Department, GTHS KUMBO, Cameroon.

GTHS KUMBO_Electrical Department_First sequence examoct.2011

REPUBLIC OF CAMEROON Peace Work Fatherland GTHS KUMBO/ ELECT DPT

FIRST SEQUENCE EXAM Class: F36 Option: Electrotechnology Duration: 2H30 Coefficient: 4

DIGITAL CIRCUITS
No document is allowed except the one given to the candidates by the examiners I TECHNOLOGY

1.1 Give the meaning of the following abbreviations: TTL, CMOS, SSI, LSI,VLSI. 1.2 Give the rated voltage used to supply TTL integrated circuits. 1.3 Give the rated voltage used to supply CMOS integrated circuits. 1.4 Give the difference between digital representation and analogue representation. 1.5 Give two examples of digital apparatus and two examples of analogue apparatus. 1.6 Define the following notions used in the field of integrated circuits: a. Noise immunity; b. Celerity; c. Integration scale.

II

DIGITAL CIRCUITS

Exercise 1: Numeration systems and codes. The information stored in a register of a ROM is given as follows: X = F8DA. 1. What is the meaning of ROM? 2. What is the numeration system used to codify that information? 3. Convert X into binary. 4. Convert X into octal. 5. Convert X into decimal. 6. X is made up of how many bits? 7. Knowing that one byte = 8 bits, Give the length of the memory word X in terms of bytes.

Exercise 2: Logic gates. The following figure is a digital circuit having four inputs A, B, C, D and one output X.
GTHS KUMBO_Electrical Department_First sequence examoct.2011

B C D

1. Determine the expression of the output X. 2. Draw the truth table of the digital circuit. 3. Draw the logic circuit above using exclusively 2 input AND gates, 2 input OR gates and 2 input NAND gates. 4. Knowing that the IC 4081 is a quad 2-input AND gate, the IC 4011 is a quad 2input NAND gate and the IC 4071 is a quad 2-input OR gate, determine the number of IC 4081,IC 4011 and IC 4071 that should be used to realise the digital circuit above.

Exercise 3: Realisation of gate circuits. Realise the logic circuit corresponding to each of the following expressions:
X = A.B(C + D) Y = A + B + C D E + BC D Z = A + B + PQ C D

Proposed by Mr. NGOUNE Jean-Paul, PLET Electrotechnics, GTHS KUMBO.

GTHS KUMBO_Electrical Department_First sequence examoct.2011

PROPOSITION OF SOLUTION

TECHNOLOGY

1.1 Meaning of the abbreviations: TTL: Transistor Transistor Logic. CMOS: Complementary Metal Oxide Semiconductor. SSI: Small Scale Integration. LSI: Large Scale Integration. VLSI: Very Large Scale Integration. MSI: Medium Scale Integration.

1.2 Rated voltage for the supply of TTL integrated circuit: 5V+/-0.25V. 1.3 Rated voltage used for the supply of CMOS IC: 5V, 15V, 18V. 1.4 Difference between analogue representation and digital representation: Analogue representation Infinitely divisible Prone to errors of precision Digital representation Discrete (Step by step) Absolute precision

1.5 Examples of digital apparatus: electronic watch, computer, mobile phone, digital camera Examples of analogue apparatus: radio, oscilloscope, some model of TV, analogue multimeter. 1.6 Definitions: Noise immunity: It is the ability of an integrated circuit not to be disturbed in his functioning by an external signal (electromagnetic signal). A noise can be defined as a signal that disturbs the useful signal of being well treated by an electronic device.

Celerity: It is the speed at which electrical information are being treated by an integrated circuit. Integration scale: it is a range that informs on the amount of transistors used in the manufacture of an integrated circuit. There are many integration scales (SSI, MSI, LSI, VLSI, ULSI).

GTHS KUMBO_Electrical Department_First sequence examoct.2011

II

DIGITAL CIRCUITS

Exercise 1: Numeration systems and codes. The information stored in a ROM is given as follows: X = F8DA. 1. ROM stands for Read Only Memory. It is a type of memory in which data, once they are written, can only be read. 2. The numeration system used to codify that information is the hexadecimal numeration system. 3. Conversion of X into binary: X = 11111000110110102. 4. Conversion of X into octal: X = 1743328. 5. Conversion of X into decimal: X = 6370610. 6. X is made up of 16 bits. 7. X = 2Bytes.

Exercise 2: Logic gates. Let us consider the following digital circuit:

A

B C D

1. Expression of the output X:

X = AC + AC B + (B + C + D )

2. Truth table of the digital circuit:

GTHS KUMBO_Electrical Department_First sequence examoct.2011

A 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1

B 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1

C 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1

D 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

X 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1

3. Let us draw the circuit using exclusively: 2 input AND gates, 2 input OR gates and 2 input NAND gates: Using gate universality principle, we can convert the logic gates used in the designing of the logic circuit into those required.
A /A = A /A

A B C =

A B C A+B+C

A B C =

A B C ABC

GTHS KUMBO_Electrical Department_First sequence examoct.2011

Then the logic circuit can be redrawn as follows:

A

X B C D

4. Number of integrated circuit of each type to be used: Number of AND gates in the circuit: 3; therefore 1 IC 4081is sufficient (one IC contains 4 gates). Number of NAND gates in the circuit: 2; therefore 1 IC 4011 is sufficient (one IC contains 4 gates). Number of OR gates in the circuit: 4; therefore 1 IC 4071 is sufficient (one IC contains 4 gates). So, with 1 IC 4081, 1 IC 4011 and 1 IC 4070 the logic circuit can be designed.

Exercise 3: Realisation of gate circuits: Let us realise the logic circuits corresponding to each of the following equations:
X = A.B(C + D) Y = A + B + C D E + BC D Z = A + B + PQ C D

GTHS KUMBO_Electrical Department_First sequence examoct.2011

A B C D

A B C D E

A B C D P Q

GTHS KUMBO_Electrical Department_First sequence examoct.2011

ABOUT THE AUTHOR NGOUNE Jean-Paul is a teacher in the electrical department in GTHS KUMBO. He is teaching this year in the following subjects: Power electronics, Electrical Machines, Digital Circuits, Electricity-Electronics, and Automation. Any suggestion or critic is welcome

NGOUNE Jean-Paul, PLET, DEA. P.O. Box: 102 NSO, Kumbo, Cameroon. Phone: (+237) 7506 2458. Email : jngoune@yahoo.fr Web site : www.scribd.com/jngoune

GTHS KUMBO_Electrical Department_First sequence examoct.2011