Detection Of Defective Carrier Trolley's Utilizing a PLC Realizing a Sequential Finite State Machine For Pattern Recognition

PHARES A. NOEL I1 Chrysler Motors JATINDER SINGH BED1 Wayne State University MANSOOR HAQ Wayne State University

Abstmcf -- This article presents a practical application of applying advanced software development techniques, traditionally utilized in the synthesis of fundamental-mode asynchronous sequential digital logic circuits, to the generation of a Programmable Logic Controller (PLC) program utilizing ladder logic software.

INTRODUCTION Today in major U.S. automotive manufacturing facilities, conveyors are the primary means by which material are transported thorough out the manufacturing facility. In the final automobile assembly facilities of major U.S. automotive companies, extensive use of the "Power and Free" (P & F) conveyor system is the primary means by which heavy components such as chassis, engines and automobile bodies are moved throughout the facility. Any downtime associated with these systems can result in severe financial impact on the manufacturing operation. For the P&F system, the critical component that has lead to many hours of downtime have been the carrier trolley wheels. These trolley wheels are components of the parts carrier which is a major element of the conveyor system. The carrier system is comprised of the cradle, which holds the part that is being assembled, and the trolley assembly. O the four trollies that make up the assembly the lead f unit is called a "Dog Magic", which is manufactured by Jervis B. Web Inc. This unit allows the carrier to engage the power chain which pulls the carrier along the track. The "Dog Magic" is comprised of two major wheel sets, one horizontal the other vertical. The vertical wheels are referred to as the load wheels because the total weight of the parts cradle is suspended by these wheels. The trolley is kept in the center of the track by two horizontal guide wheels. The failure of any of these wheels will cause the carrier to become jammed in the track causing a halt to production and possible extensive equipment damage. A considerable amount of expense and effort can go into repairing the carrier while in the processing system. This paper will explain the efforts of the past year to design a system that will detect defective trolley wheels on inverted P&F "Dog Magics" while operating in the conveyor system. In developing this detection system, it was discovered that the most difficult wheel to detect on the trolley is the center guide roller, which is indicated as item 6 in Figure 1. Because of the orientation of the guide wheel in the trolley, a detection device had to be developed that would indicate the presence or absence of this component while the trolley was located in the track. Several approaches were attempted of which one prevailed. The winning approach utilizes an array of photo detectors for edge detection coupled with a PLC employing pattern recognition software developed utilizing advanced software development tools traditionally used for the development of asynchronous finite state sequential machines. This paper will show in detail the synthesis process used in developing the pattern recognition software that differentiates the signal patterns generated from the sensors used to observe the carrier trollies.

Re. 1 6" Do- Maeic Front Trollev

SENSOR SELECTION One of the key requirements for the system was the ability to withstand the environment which the carriers operate in. The detectors sensor array will be located in the Paint Shop inside the Primer Inspection Booth ri&t after a deionized water spray rinse where the humidity is typically lClo%. This environmental requirement precluded the use of any type of optical sensor, such as a CCD camera, for inspection of the trolleys where the optics and/or the electronics may be harmed by the environment. This problem could have been resolved by installing the electronics and optics in an environmentally controlled enclosure but this would have made for an expensive solution. Another technique investigated for sensing the guide wheel involved the use of a magnetic proximity sensor with a D.C. analog output whose amplitude would be proportional to the amount of metal that penetrat: it's field. This output signature was analyzed by a program written in C " running on a personal computer outfitted with a data acquisition board. This system compared the input signals from the sensor array to a stored signal pattern that represents a healthy trolley. If there was a match, the system would allow the carrier to pass. If not, the unit would signal the PLC, which controls the conveyor drive, to stop and activate an alarm which would show up on the plant's computer system with a text message indicating a missing wheel. This system proved out in the lab but was aborted when it was discovered that the side looking sensor for detection of the guide wheels would be in the direct path of one of the main carrier bolts. This would have immediately destroyed the sensor on the first pass.

The support for this work was provided by the Chrysler Motors Corporation.
CH 3381-1/93/$01.00 01993 IEEE
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An alternative solution for the sensor system was developed in order to avoid the problem of interference with the carrier bolts. This configuration consists of three (3) LED transmittedreceiver photodetector combinations arranged in a horizontal array for the detection of the trolley guide wheels. The three photo detectors are mounted on two aluminum support plates, which are installed on opposite sides of the conveyor track, with the sensors positioned to look across the bottom of the track. With this arraignment, each guide wheel will pass by all three sensors which will generate three signal patterns. The transmitter /receiver combinations are mounted in a vertically staggered fashion which results in a wide detector field of view. Additional precautions were taken to reduce the possibility of cross talk by having the center detector pair mounted so as on one side of the track the transmitter of the center pair had the receivers of the two sensors mounted on either side. The opposite arraignment exists for the other side. The photodetectors have several advantages:
(1) Small size

the sensor array. These signals were plotted on graph paper and the distinguishing sequences, where a sensor changed state, was assigned individual state numbers.
'I

'I

* 7

Combinotionoi
togtc

-2,

2 ,

y,

r, I
---A

(2) The fiber optic cables, which couple the optics to the electronics, allow the electronics to be enclosed in a cabinet protecting them from the environment.

"Memory" devices

Fie. 2 Block Diaeram O An Asvnchronous Machine f

After the primary states are assigned, a primary state table is generated where the individual states are entered in the column with the appropriate input variable designation. Our application generated nineteen (19) distinct states. Seven additional states, and their corresponding rows, were added in order to assure the proper operation of the system if sequences other than the correct one occurs. These additional states brought the total number of rows to twenty-five (25) which would call for five (5) variables in order to represent all the individual states and rows. The next step in the process is to eliminate redundant states and merging those stable states, which are only distinguishable by their input states. From this reduction a set of maximal compatibles were generated (l,2,) (3,4) (14,18) (19, ' . . ,25) }. This lead to a reductionof rows in the primitive state table from an initial twenty-five rows (25) down to sixteen (16) which can now be defined by four (4) variables instead of the initial five (5). After the reduction of the primitive flow table, the resulting rows are assigned distinct combinations of values of secondary variables which will be used to generate the corresponding excitation and output functions. These secondary variables correspond to the internal state of the machine. The results of this process can be seen in Figure 3.

(3) The individual receivers have a small Instantaneous Field Of View (IFOV) which offers good edge detection.
The timing signals, that are generated by the photodetectors, are interfaced to an Allen Bradley PLC through interface relays located at a remote panel which provides for an intrinsically safe environment. These relays present a dry pair of contacts to the PLC and serve as a power supply for the sensors. In order to prove out the design, the Allen Bradley PLC has a sequencer instruction that allows several addresses to be turned on and off depending on the sequencer step. This allows the simulation of the input signals, that would be received by the detection system, from the sensor array as a carrier trolley passes by.

LOGIC DEVELOPMENT
The primary purpose of this project was to implement anfundamental mode asynchronous machine utilizing a Programmable Logic Controller (PLC) to perform pattern recognition on signals originating from a photodetector array. This system would recognize the signal pattern from a damaged trolley and trigger an alarm. This entails realizing both the combinational logic and the memory devices of such a machine in ladder logic. The basic model for such a machine is shown in Figure 2. The synthesis procedure follows Kohavi [ l ] and consists of the following steps.
(1) Determining the input/output sequences and assigning appropriate state numbers to the sequences.

(2) Develop a primitive flow table from these assignments in order to describe the proper operation of the sequential circuit. The entries in this table show the transition of the machine from one stable state to another and the intermediate unstable states which the machine passes through.
(3) Reduction of the flow table in order to reduce the number of states needed to describe the proper operation of the machine.
(4) Specifying the outputs of the unstable steps. ( 5 ) Development of the excitation and output tables.

Fie. 3 Reduced Primitive Flow Table

The state entries in the flow table can now be substituted for their corresponding binary assignment. From this table the appropriate functions that describe the output and excitation functions can be realized. The results of this process is displayed in Figure 4.
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The synthesis process began with the gathering and recording of the signals from the sensors. This was done by observing the signals in the lab by displaying them on a PC with data acquisition capability. The signals form a good trolley were recorded while it was passing through

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The final step in this process is to realize the various functions for our application in a form where it may be eventually transformed into PLC ladder logic.

To do this we must first identify the minterms of the function in their canonical form as the sum of products ,
f(x,,x*;""',q) =

The results of this effort lead to the reduction of terms in the function used to describe Y from eighteen (18) terms down to nine (9) terms. O , f these nine terms seven (7) are e s s e u p h e implicants, which are indicated on the chart with a single asterisk, with two additional terms being chosen in order to cover the remaining states. These additional states are indicated on the chart by a double asterisk. The function Y,can now be expressed by the following minimum sum

Pi.

where P irepresents the general product term and the subscript j is the

f (A,B,C,D,E,F,G) = A'B'C'DFG
A'BCEFG + A'DEFG' + ABDEF'G .

U" .ow

+ A'B'C'E'FG + C'DEFG' + + AB'CEFG + ABC'EFG + ABCD'E'F'G'

UIDlllT

oooo
00 01 01 01

0 0 ___10 01 10 ___ 01 11 ~00 11 0 0 1 0 10 10 10 11

1111

All additional terms Y, ,Y3 ,Y, , and Z must go through the same reduction process in order to obtain the reduced sum of products form which represents these switching functions.

PLC SOFIWARE DEVELDPMENT

After the reduction and synthesis has been performed on the switching functions, the resulting minimum sum expressions has to be translated into a corresponding PLC logic program. Traditionally the reduced minimum sum function used to describe the machine would be implemented by using logic gates for the combinational logic and FlipFlops for implementing the memory elements of the machine. But in this application, all logic elements, including Flip-Flops, are realized utilizing the PLC ladder logic operands. For the implementation of the memory elements, the D Flip-Flopwas chosen due to the fact that the excitation requirements for the Flip Flops may be taken directly from the Transition Table of Figure 4, which has been further simplified by the Scheinman reduction method as displayed in Figure 5. The logic schematic for the D Flip-Flop utilizing NAND gates is shown in Figure 6.
D

11 10 11 00 11 01 10 01 lo o0

Fig. 4 Transition And Excitation Table decimal equivalent of the associated product term. For sake of brevity we will only show the resulting switching function that defines the output variable Z and the first excitation variable Y,. By examining the flow table in Figure 4 we find that the expression that defines the output variable Z in the sum of products expression is

f ( A , B. C, D, E, F. G ) = ~(0,1,3,11,14,15,21,23,30,31,38,39,
46,47,53,55,62,63.76,78.83,87,94.95.102,103,1~,111,112,115

,I16,119,125,127).
And by the same process we find that for the variable Y, we have

Q'

Fig 6. NAND Gate Realization Of D F l i ~ F l o o f ( A , B. C, D, E, F, G ) = ~P,11,14.15.30,46,SS,62.63,78,87,94. 95,l03,loS,111,112.125). To illustrate the conversion process, we have chosen the major

Because of the number of variables needed to describe these functions, a more advanced tool other than the traditional Karnaugh map must be used to simplify the resulting functions. The approach suggested by Scheinman [2] describes an iterative method by which a Boolean function with a large number of variables may be reduced and all of it's prime implicants extracted. The same was utilized in this application. One of the tools used to obtain the prime implicants of the function is the prime implieant chaH which was first proposed by Quine and later simplified by McCluskey [3]. Figure 5 is the chart that was generated from the results of the Scheinman reduction applied to the function that describes Y,.

elements of the program for examples, which are the sum of product t e r m and the D Flip Flop. Figure 7 shows the ladder logic implementation of the D Flip Flop shown in Figure 6. The circular coil elements labeled (1) through (4) represent the NAND gates in Figure 5 . These have been assigned internal PLC memory addresses 200 through 203.
201

202

200

Fig

7 Ladder Logic Realization Of D FliD-FlW .

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In referencing the diagram of Figure 2, we find that the y s are assigned to the output signals of the delay elements and the are assigned to the input signals from the sensors. This leads to the foliowing assignment

ts

CONCLUSIONS
This project demonstrates that advanced design tools, originally targeted for digital logic development, can be used for developing applications for Programmable Logic Controllers. With this approach to software development, applications that have been traditionally performed by dedicated hardware may now be implemented in software and ran on the most widely used industrial grade computer processor system in manufacturing today. The further use of advanced software development techniques for the development of PLC programs, such as the application shown here, will lead to more sophisticated programs which will perform more complicated tasks with more efficient code.

f (A.BrC,D,E.F,G) = f
with this information the y k s and memory addresses as shown below.

1,s have been assigned PLC

Logic Term
Y4

Function
Term

PLC Address
214 210
204

Y3

Y2

Y1

12

200 100 101 102

Again referencing Figure 2, the outputs of the combinational logic are labeled YkS. These elements are assigned the following PLC memory addresses. Logic Term

REFERENCES
[I] Zvi Kohavi, Switching and Finite Auromata Zheory. Second Edition. McGraw-Hill, Inc 1978 [2] A. H.Scheinman, A Method for Simplifying Boolean Funcrions. The Bell System Technical Journal, 1962 [3] McCluskey, E., Jr. Minimization o Boolean Funcrions. B.S.T.J., f 35, 1956 pp. 1417-1443

PLC Address

220 22 1 222 223

With these assignments, the product terms, which describe the combinational unit, can be translated into the PLC ladder logic equivalent. For illustration, the first two terms of the function, which describes Y,,are ABCDFG and ABCEFG. Their corresponding ladder logic equivalents are shown in Figure 8 which are expressed as the series combination of the contacts which represent the individual terms of the product. All product terms of the machines descriptive functions will be expressed in a similar manner.
101

1024 HH
F
101

A B C
214 210

D
100

G
102

204

501

FIE 8. Ladder Logic Realization Of Product Terms

Finally, Figure 9 shows the sum of the first two product terms Of Y, expressed as the parallel of the contacts which are energized by the coil elements which represent those product terms.

500

220

Fk 9. Ladder Lovie Realization Of Sum Of Product Terms

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