RAJALAKSHMI INSTITUTE OF TECHNOLOGY ANNA UNIVERSITY PRACTICAL DEPARTMENT OF ELECTRONICS AND COMMUNICATION SUBJECT : DIGITAL ELECTRONICS LAB SUBJECT

CODE : 147351 ECE TOTAL MARKS : 100 3 HOURS LIST OF EXPERIMENTS 1.(a).Design a combinational circuit which has 2 inputs for the two bits to be added and subtracted and produces two outputs ,One output from the least significant position and the other output from the most significant position. (b) Write the Verilog coding for the experiment (a) and stimulate using Xilinx. 2.(a).Design a combinational circuit which has 3 inputs for the three bits to be added and subtracted and produces two outputs ,One output from the least significant position and the other output from the most significant position. (b) Write the Verilog coding for the experiment (a) and stimulate using Xilinx. 3. Design a combinational circuit which accepts 4 bit binary input and produces the output greater than decimal three for the corresponding input given and the input should not exceed greater than 9. 4. Design a combinational circuit which accepts 4 bit binary input and produces the output in such a way that there should be only one bit variation in the outputs and the input should not exceed greater than 9. 5. Design a circuit with IC7483 which accepts the 4 -bit A inputs and 4-bit B inputs and check what will happen when my control mode pin of IC 7483 is set as 0 and 1. 6.Design an adder such that it should add two decimal digits together with an input carry from the previous stage, such that each input digit should not exceed 9 and the output sum cannot be greater than 19. 7. Design a combinational circuit which has 2- bits in A and 2-bits in B, if difference between A and B produce a negative result then my output is 1. 8. Design a combinational circuit which has 2- bits in A and 2-bits in B, if difference between A and B produce a positive result. Then my output is 1. 9 (a).Design a combinational circuit that selects the binary information from one of 4 input lines and directs it to a single output line. (b) Write the Verilog coding for the experiment (a) and stimulate using Xilinx. DATE : 15.4.11 DEPARTMENT :

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10(a).Design a combinational circuit for the data distributor which has 4 outputs. (b) Write the Verilog coding for the experiment (a) and stimulate using Xilinx. 11(a).Design a combinational circuit which has 2^n input lines and n output lines take n=3 (b) Write the Verilog coding for the experiment (a) and stimulate using Xilinx. 12. (a)Design a decoder with enable input with a logic 1.take n=2 (b) Write the Verilog coding for the experiment (a) and stimulate using Xilinx. 13. Design a sequential circuit which has 0-9 states and it produces the output in ascending order when the clock is applied simultaneously. 14. Design a sequential circuit which has 0-11 states and it produces the output in ascending order when the clock is applied simultaneously 15. Design a 3-bit input and one control input sequential circuit which produces the output of 4 bits in ascending as well as descending order when the clock is applied simultaneously. 16. Design a sequential circuit which shifts the data 1 bit at a time into the register and taking the output one bit at a time. 17. .Design a sequential circuit which shifts all the data bits simultaneously into the register and taking the output one bit at a time. 18. Design a sequential circuit which shifts all the data bits simultaneously into the register and taking all the outputs at a time

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RAJALAKSHMI INSTITUTE OF TECHNOLOGY ANNA UNIVERSITY PRACTICAL DEPARTMENT OF ELECTRONICS AND COMMUNICATION SUBJECT : DIGITAL ELECTRONICS LAB 15.4.11 SUBJECT CODE : 147351 ECE TOTAL MARKS : 100 3H OURS MARK ALLOCATION TABLE SI.No 1 2 3 4 5 6 7 Description Aim & Apparatus Required Logic Diagram & Procedure Truth Table Observation Program & Execution Viva Result Total Mark Awarded 10 25 15 20 10 10 10 100 DATE DEPARTMENT : :

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RAJALAKSHMI INSTITUTE OF TECHNOLOGY ANNA UNIVERSITY PRACTICAL DEPARTMENT OF ELECTRONICS AND COMMUNICATION SUBJECT : DIGITAL ELECTRONICS LAB 15.4.11 SUBJECT CODE : 147351 ECE TOTAL MARKS : 100 3H OURS SYLLABUS 1. Design and implementation of Adders and Subtractors using logic gates. 2. Design and implementation of code converters using logic gates (i) BCD to excess-3 code and vice versa (ii) Binary to gray and vice-versa 3. Design and implementation of 4 bit binary Adder/ subtractor and BCD adder using IC 7483 4. Design and implementation of 2Bit Magnitude Comparator using logic gates 8 Bit Magnitude Comparator using IC 7485 5. Design and implementation of 16 bit odd/even parity checker /generator using IC74180. 6. Design and implementation of Multiplexer and De-multiplexer using logic gates and study of IC74150 and IC 74154 7. Design and implementation of encoder and decoder using logic gates and study of IC7445 and IC74147 8. Construction and verification of 4 bit ripple counter and Mod-10 / Mod-12 Ripple counters 9. Design and implementation of 3-bit synchronous up/down counter 10. Implementation of SISO, SIPO, PISO and PIPO shift registers using Flip- flops. 11. Design of expts 1, 6,8,10 using Verilog HDL. DATE : :

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10(a).Design a combinational circuit for the data distributor which has 4 outputs. (b) Write the Verilog coding for the experinment (a) and stimulate using Xilinx . Aim & Apparatus Required Logic Diagram & Procedure Truth Observation Table Program & Execution Viva Result Total

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EXTERNAL EXAMINER

1.(a).Design a combinational circuit which has 2 inputs for the two bits to be added and subtracted and produces two outputs ,One output from the least significant position and the other output from the most significant position. (b) Write the Verilog coding for the experinment (a) and stimulate using Xilinx . Aim & Apparatus Required Logic Diagram & Procedure

Truth Observation Table

Program & Execution

Viva

Result

Total

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EXTERNAL EXAMINER

9 (a).Design a combinational circuit that selects the binary information from one of 4 input lines and directs it to a single output line. (b) Write the Verilog coding for the experinment (a) and stimulate using Xilinx . Aim & Apparatus Required Logic Diagram & Procedure Truth Observation Table Program & Execution Viva Result Total

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11(a).Design a combinational circuit which has 2^n input lines and n output lines take n=3 (b) Write the Verilog coding for the experinment (a) and stimulate using Xilinx .

Aim & Apparatus Required

Logic Diagram & Procedure

Truth Observation Table

Program & Execution

Viva

Result

Total

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