Faculty of Engineering Ain Shams University 2010/2011

3rd year Mechatronics Ind. Electron. & Appl. Sheet 6

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1) Show that the components stress in buck and boost dc/dc converter topologies are as given in table 1. Where Vo, Vin, Io, Iin, and D are the average values of output voltage, input voltage, output current, input current, and duty ratio, respectively. Neglect inductor ripple current. 2) The dc chopper circuit of figure 1 has the following parameters; Vin = 50, R = 0.25 , and L = 2.5 mH. Initially, the two power transistors are OFF and the inductor current iL is equal to zero. Determine the time needed to reach to an inductor current value of 10 A when the two transistors are turned ON. 3) The dc chopper in problem 2 is now operating in steady-state. The average inductor current is regulated at 10 A by PWM control of transistor T2 while maintaining transistor T1 ON. If the PWM switching frequency is 20 kHz, determine i- the duty ratio of the transistor T2 ii- the inductor ripple current (peak to peak). 4) Two interleaved buck dc/dc converters are supplying a total load of 2 kW. Each buck converter is operating in steady-state under the following conditions: Vin = 200 V, L =400 H, D = 0.3, Po = 1 kW, and fs = 20 kHz. Calculate and draw the total current (iL1+iL2) waveform to the output stage. The gate signals to the converters are shifted by Ts/2. What is the value of duty ratio which yields minimum ripple in the total output current? 5) Answer the following questions. a) What are the performance benefits of soft switching topologies? b) A synchronous buck rectifier is supplying 80 W into dc load. The switching power loss is 5 W and the conduction power loss is 5 W. Calculate the converter efficiency in case of (i) hard switching and (ii) soft switching with ZVS-CV topology. c) In a synchronous buck rectifier with ZVS, the input voltage Vin = 12 V and the negative peak current is at least 1.5 A. Calculate the capacitances across the transistors if the charge/discharge time is to be no more than 0.5 s. 6) An isolated full-bridge dc/dc converter is supplying a dc load as shown in figure 2. The duty ratio of each switching pole is constant at 50 % and the output voltage is regulated using phase-shift modulation (PSM) technique. The circuit has the following parameters; Vin = 12 V, N1/N2 = 1/50, and fs = 50 kHz. Answer the following questions, assuming ideal transformer. a) Draw Vab waveform and calculate the average output voltage Vo when the gate signals of the two switching poles are shifted by: (i) Ts/2 s, (ii) Ts/4 s, and (iii) 0 s. b) Can the diode bridge rectifier be realized using general purpose diode? If the answer is no, explain why.
1

7) A full-bridge dc/dc converter uses a PWM controller IC which has a triangular waveform signal at 20 kHz and Vtri = 3 V. The input dc voltage is Vin = 150 V. Calculate the duty ratio of the switching poles for the following average output voltage values; 150 V, 75 V, 0 V, 75 V, and -150 V. Assume unipolar voltage switching. 8) The converter in problem (7) is now supplying an R-L-E load. The load equivalent circuit parameters are R = 0.25 , L = 2.5 mH, and E = 100 V. The average current being drawn by the load is 20 A. Plot the dc-side current and determine the average output voltage. 9) Answer the following questions considering a balanced 3-phase inverter. a) Sketch the harmonic spectrum of output phase voltage in case of (i) square wave mode and (ii) sinusoidal PWM. b) In the linear mode of operation, what is the maximum phase voltage that can be generated using sinusoidal PWM and what is the maximum line voltage.
c) For a sinusoidal PWM inverter, Vdc = 300 V, Vtri = 1 V, Vc = 0.75 V, and f = 40 Hz. Calculate and plot dA(t), dB(t), dc(t), VAN(t), VBN(t), VCN(t), VAn(t), VBn(t), and VCn(t). The subscript (N) denotes inverter ground while the subscript (n) denotes load neutral.

d) What are the advantages of the space vector PWM technique over sinusoidal PWM technique? e) Draw the rms value of output line voltage as a function of modulation index in case of (i) sinusoidal PWM and (ii) space vector PWM. f) For a space-vector PWM inverter, draw the switching pattern over one complete cycle of the fundamental output frequency. Assume symmetrical space-vector PWM. g) For a space-vector PWM inverter, Vdc = 300 V, Ts = 0.05 ms, and desired output voltage vector v*= Vmax exp(j), where Vmax = 150 V and = 100 t. Determine the duty ratios dA(t), dB(t), and dc (t) as a function of . Start from = 0 to =360 in a step of = 30.

Please find below the following data sheets for:

1) SWITCH MODE LI BATTERY CHARGER CONTROLLER. 2) HIGHLY EFFICIENT PHASE SHIFT FULL BRIDGE CCFL CONTROLLER FOR CCFL

Best Wishes Dr. O. S. Ebrahim

Table 1: Components stress in buck and boost dc/dc converter topologies.

Stress Transistor max. voltage Transistor max. current Transistor rms current Transistor average current Diode average current Inductor average current

Buck Vin Io

Boost Vo I in

DIo
DI o (1 D) I o Io

D I in
I in (1 D) I in I in

T1

+ Vin=50 V -

R=0.25 L=2.5 mH T2 iL

Figure 1
iL Tb Vin + Tb' Ta' Ta a + vab b N1:N2 + Vo RL

Figure 2