Philips Semiconductors

Product specification

TrenchMOS transistor Standard level FET

GENERAL DESCRIPTION
N-channel enhancement mode logic level field-effect power transistor in a plastic envelope suitable for surface mounting. Using trench technology the device features very low on-state resistance and has integral zener diodes giving ESD protection. It is intended for use in automotive and general purpose switching applications.

BUK78150-55

QUICK REFERENCE DATA

SYMBOL VDS ID Ptot Tj RDS(ON) PARAMETER Drain-source voltage Drain current Total power dissipation Junction temperature Drain-source on-state resistance VGS = 10 V MAX. 55 5.5 1.8 150 150 UNIT V A W C m

PINNING - SOT223
PIN 1 2 3 4 gate drain source drain (tab) DESCRIPTION

PIN CONFIGURATION
4

SYMBOL
d

g s

LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS VDGR VGS ID ID ID IDM Ptot Ptot Tstg, Tj PARAMETER Drain-source voltage Drain-gate voltage Gate-source voltage Drain current (DC) Drain current (DC) Drain current (DC) Drain current (pulse peak value) Total power dissipation Total power dissipation Storage & operating temperature CONDITIONS RGS = 20 k Tsp = 25 C On PCB in Fig.19 Tamb = 25 C On PCB in Fig.19 Tamb = 100 C Tsp = 25 C Tsp = 25 C On PCB in Fig.19 Tamb = 25 C MIN. - 55 MAX. 55 55 16 5.5 2.6 1.6 30 8.3 1.8 150 UNIT V V V A A A A W W C

ESD LIMITING VALUE

SYMBOL VC PARAMETER Electrostatic discharge capacitor voltage CONDITIONS Human body model (100 pF, 1.5 k) MIN. MAX. 2 UNIT kV

January 1998

Rev 1.000

Philips Semiconductors

Product specification

TrenchMOS transistor Standard level FET

THERMAL RESISTANCES
SYMBOL Rth j-sp Rth j-amb PARAMETER From junction to solder point From junction to ambient CONDITIONS Mounted on any PCB Mounted on PCB of Fig.18 TYP. 12 -

BUK78150-55

MAX. 15 70

UNIT K/W K/W

STATIC CHARACTERISTICS
Tj= 25C unless otherwise specified SYMBOL V(BR)DSS VGS(TO) IDSS IGSS V(BR)GSS RDS(ON) PARAMETER Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current Gate source leakage current CONDITIONS VGS = 0 V; ID = 0.25 mA Tj = -55C VDS = VGS; ID = 1 mA Tj = 150C Tj = -55C VDS = 55 V; VGS = 0 V; VGS = 10 V Tj = 150C Tj = 150C Tj = 150C MIN. 55 50 2.0 1.2 16 TYP. 3.0 0.05 0.04 120 MAX. 4.0 4.4 10 100 1 10 150 277 UNIT V V V V V A A A A V m m

Gate source breakdown voltage IG = 1 mA Drain-source on-state VGS = 10 V; ID = 5 A resistance

DYNAMIC CHARACTERISTICS
Tmb = 25C unless otherwise specified SYMBOL gfs Ciss Coss Crss td on tr td off tf PARAMETER Forward transconductance Input capacitance Output capacitance Feedback capacitance Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time CONDITIONS VDS = 25 V; ID = 5 A; Tj = 25C VGS = 0 V; VDS = 25 V; f = 1 MHz MIN. 0.5 TYP. 2.5 190 65 32 9 28 15 8 MAX. 240 80 45 14 42 23 12 UNIT S pF pF pF ns ns ns ns

VDD = 30 V; ID = 5 A; VGS = 10 V; RG = 10 ; Tj = 25C

REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS

Tj = -55 to 175C unless otherwise specified SYMBOL IDR IDRM VSD trr Qrr PARAMETER Continuous reverse drain current Pulsed reverse drain current Diode forward voltage Reverse recovery time Reverse recovery charge CONDITIONS Tsp = 25C Tsp = 25C IF = 2 A; VGS = 0 V IF = 2 A; -dIF/dt = 100 A/s; VGS = -10 V; VR = 30 V MIN. TYP. 0.85 43 0.16 MAX. 5.5 30 1.1 UNIT A A V ns C

January 1998

Rev 1.000

Philips Semiconductors

Product specification

TrenchMOS transistor Standard level FET

AVALANCHE LIMITING VALUE
SYMBOL WDSS PARAMETER Drain-source non-repetitive unclamped inductive turn-off energy CONDITIONS ID = 1.9 A; VDD 25 V; VGS = 10 V; RGS = 50 ; Tsp = 25 C MIN. -

BUK78150-55

TYP. -

MAX. 15

UNIT mJ

120 110 100 90 80 70 60 50 40 30 20 10 0

PD%

Normalised Power Derating

100 ID/A tp = RDS(ON) = VDS/ID 10 1 us 10 us

BUKX8150-55

100 us 1 DC 1 ms 10 ms 100 ms

20

40

60

80 100 Tmb / C

120

140

0.1

10 VDS/V

55

Fig.1. Normalised power dissipation. PD% = 100PD/PD 25 C = f(Tsp)

Fig.3. Safe operating area. Tsp = 25 C ID & IDM = f(VDS); IDM single pulse; parameter tp

120 110 100 90 80 70 60 50 40 30 20 10 0

ID%

Normalised Current Derating

1E+02 3E+01 1E+01 3E+00 1E+00 3E-01 1E-01 3E-02

Zth / (K/W)

BUKX8150-55

0.5 0.2 0.1 0.05 0.02 0 T P D tp D= tp T t

20

40

60

80 Tmb / C

100

120

140

1E-02 1E-07

1E-05

1E-03 t/s

1E-01

1E+01

Fig.2. Normalised continuous drain current. ID% = 100ID/ID 25 C = f(Tsp); conditions: VGS 10 V

Fig.4. Transient thermal impedance. Zth j-sp = f(t); parameter D = tp/T

January 1998

Rev 1.000

Philips Semiconductors

Product specification

TrenchMOS transistor Standard level FET

BUK78150-55

10 ID/A 8

16 10 8

VGS/V =

6.5

gfs/S 3.5

6.0 6

2.5

5.5 4 5.0 2 4.5 4.0 0 0 2 4 6 8 10

1 1 2 3 4 5 ID/A 6 7 8 9 10 1.5 2

Fig.5. Typical output characteristics, Tj = 25 C. ID = f(VDS); parameter VGS

400 RDS(ON)mOhm 5

Fig.8. Typical transconductance, Tj = 25 C. gfs = f(ID); conditions: VDS = 25 V

5.5 6

2.5

BUK98XX-55

Rds(on) normalised to 25degC

300 6.5 200 7 8 10 100

1.5

ID/A

10

11

0.5 -100

-50

50 Tmb / degC

100

150

200

Fig.6. Typical on-state resistance, Tj = 25 C. RDS(ON) = f(ID); parameter VGS

10 ID/A 8

Fig.9. Normalised drain-source on-state resistance. a = RDS(ON)/RDS(ON)25 C = f(Tj); ID = 5 A; VGS = 10 V

VGS(TO) / V max. 4 typ.
BUK78xx-55

3 min.

4 Tj/C = 2 150 25

VGS/V

0 -100

-50

50 Tj / C

100

150

200

Fig.7. Typical transfer characteristics. ID = f(VGS) ; conditions: VDS = 25 V; parameter Tj

Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS

January 1998

Rev 1.000

Philips Semiconductors

Product specification

TrenchMOS transistor Standard level FET

BUK78150-55

1E-01

Sub-Threshold Conduction

10 IF/A 8

1E-02 2% typ 98%

6 Tj/C = 4 150 25

1E-03

1E-04
2

1E-05
0

1E-06

0.2

0.4

0.6 0.8 VSDS/V

1.2

1.4

Fig.11. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 C; VDS = VGS

350 300 250

Fig.14. Typical reverse diode current. IF = f(VSDS); conditions: VGS = 0 V; parameter Tj

WDSS%

120 110 100 90 80 70

Ciss

pF
200 150 100 50 0 0.01 Coss Crss 0.1 1 VDS/V 10 100

60 50 40 30 20 10 0 20 40 60 80 100 Tmb / C 120 140

Fig.12. Typical capacitances, Ciss, Coss, Crss. C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
12 VGS/V 10

Fig.15. Normalised avalanche energy rating. WDSS% = f(Tsp); conditions: ID = 1.9 A

+
L VDS
VDS = 14V VDS = 44V

VDD

VGS 0 RGS T.U.T.

-ID/100

R 01 shunt

QG/nC

Fig.13. Typical turn-on gate-charge characteristics. VGS = f(QG); conditions: ID = 5 A; parameter VDS

Fig.16. Avalanche energy test circuit. 2 WDSS = 0.5 LID BVDSS /(BVDSS VDD )

January 1998

Rev 1.000

Philips Semiconductors

Product specification

TrenchMOS transistor Standard level FET

BUK78150-55

+
RD VDS VGS 0 RG T.U.T.

VDD

Fig.17. Switching test circuit.

January 1998

Rev 1.000

Philips Semiconductors

Product specification

TrenchMOS transistor Standard level FET

PRINTED CIRCUIT BOARD

BUK78150-55

Dimensions in mm.
36

18

60 9 4.6 4.5

10

7 15 50

Fig.18. PCB for thermal resistance and power rating for SOT223. PCB: FR4 epoxy glass (1.6 mm thick), copper laminate (35 m thick).

January 1998

Rev 1.000

Philips Semiconductors

Product specification

TrenchMOS transistor Standard level FET

MECHANICAL DATA
Dimensions in mm Net Mass: 0.11 g
0.32 0.24 6.7 6.3 3.1 2.9 B

BUK78150-55

0.2

0.10 0.02

3.7 3.3 13

7.3 6.7

16 max

1
10 max 1.8 max 1.05 0.85 4.6 2.3

2
0.80 0.60

3
0.1 M (4x) B

Fig.19. SOT223 surface mounting package.

Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to surface mounting instructions for SOT223 envelope. 3. Epoxy meets UL94 V0 at 1/8".

January 1998

Rev 1.000

Philips Semiconductors

Product specification

TrenchMOS transistor Standard level FET

DEFINITIONS
Data sheet status Objective specification Product specification Limiting values

BUK78150-55

This data sheet contains target or goal specifications for product development. This data sheet contains final product specifications.

Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.

Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 1998 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.

January 1998

Rev 1.000