Improved Fast Decoupled Power Flow R. Eid, S. W. Georges and R. A.

Jabr
Notre-Dame University, sgeorges@ndu.edu.lb

Abstract
This paper presents an Improved Fast Decoupled Power Flow Method (IFDPFM) based on different strategies of updating the voltage angle () and the bus voltage (V) in each iteration. This method was tested on many IEEE bus test systems. When compared with the Newton-Raphson and with the classical Fast Decoupled methods, the IFDPFM resulted in large computing savings (in flops) in the order of 70 %, thus in faster convergence. Keywords: Power Flow, Newton Raphson method, Fast Decoupled method.

I. INTRODUCTION The power flow analysis is a very important and fundamental tool in power system analysis. Its results play the major role during the operational stages of any system for its control and economic schedule, as well as during expansion and design stages. The purpose of any load flow analysis is to compute precise steady-state voltages and voltage angles of all buses in the network, the real and reactive power flows into every line and transformer, under the assumption of known generation and load. During the second half of the twentieth century, and after the large technological developments in the fields of digital computers and high-level programming languages, many methods for solving the load flow problem have been developed, such as indirect Gauss-Siedel (bus admittance matrix), direct Gauss-Siedel (bus impedance matrix), Newton-Raphson (NR) and its decoupled versions [1]. Nowadays, many improvements have been added to all these methods involving assumptions and approximations of the transmission lines and bus data, based on real systems conditions [2]-[9]. The Fast Decoupled Power Flow Method (FDPFM) is one of these improved methods, which was based on a simplification of the Newton-Raphson method and reported by Stott and Alsac in 1974[4]. This method and due to its calculations simplifications, fast convergence and reliable results became the most widely used method in load flow analysis. However, FDPFM for some cases, where high R/X ratios or heavy loading (Low Voltage) at some buses are present, does not converge well. For these cases, many efforts and developments have been made to overcome these convergence obstacles. Some of them targeted the convergence of systems with high R/X ratios, others those with low voltage buses [10]-[16]. However, one of the most recent developments is a Robust Fast Decoupled Power Flow developed by Wang and Li; it is based on heuristic justification and general voltage normalization methods [17] and solves both high R/X ratios and low bus voltages problems simultaneously. Though many efforts and elaborations have been achieved in order to improve the FDPFM, this method can still attract many researchers, especially when computers and simulations are becoming more developed and are now able to handle and analyze large size system. Today, and after reaching processors speeds higher than 3 GHz, any improvement in the speed of convergence of the power flow method, provided it leads to reliable results, is of great value. This speed improvement is very important when involved in operational stages of power distribution, where any millisecond saving can hugely increase the probability of the right decision, of the control and dispatch computerized system. This paper works on providing computing savings (in flops) and thus higher speed of

convergence of the FDPFM based on the initial approximation in which real power changes are considered to be most sensitive to variations in voltage angle and much less to those of voltage magnitude, as well as on the high sensitivity of reactive power changes to variations in voltage magnitude and much less to those of voltage angle. In this paper, the attention was focused on the update of the voltage angle () and voltage magnitude (V) in each iteration, based on the improvement of flops achieved, and obviously on the results obtained. The results of these improvements and the comparative analysis with the Newton-Raphson and classical FDPFM will be presented using the three IEEE bus systems of 14, 30 and 57-bus, although the IFDPFM can be applied to any size bus system. II. Fast Decoupled Power Flow Method As the FDPFM is derived from the Newton-Raphson we will start from the matrix representation of NR, apply some simplifications and approximations, to reach the equations of the FDPFM. The matrix representation of the N-R method [17] is:
P H Q = J N L V

(1)

Where
Hii =

i j

|Vi ||Vj||Yij| sin ( ij - i + j)

(2)

Hij = - |Vi||Vj||Yij| sin ( ij - i + j) And Nii = 2 |Vi||Yii| cos ii + |Vj||Yij| cos (ij i + j)
i j

(3)

(4) (5)

Nij = | Vi || Yij | cos ( ij - i + j) Jii =

i j

|Vi ||Vj||Yij| cos ( ij - i + j)

(6) (7)

Jij = - |Vi||Vj||Yij| cos ( ij - i + j) Lii = 2 |Vi||Yii| sin ii + |Vj||Yij| cos (ij i + j)

i j

(8) (9)

Lij = | Vi || Yij | sin ( ij - i + j) Now, for typical power system branches:

X/R >>1 and ij < 20

(10)

These two approximations will cause a weak coupling between P and V, and between Q and , hence N and J entries of the initial matrix of (1) can be ignored leading to the following decoupled equations:

[P] = [H ][ ] [Q ] = [L ][V ]

(11) (12)

Now, the diagonal elements of H according to Stott and Alsac [4] can be written as: Hii = - Qi - |Vi|2Bii (13)
B

Where Bii = |Yii| sin ii is the imaginary part of the diagonal elements of the bus admittance matrix Ybus. Further simplifications can be applied to equation (12), by considering Bii >> Qi and |Vi| 2 |Vi| yielding to the following simplified Hii: Hii = - |Vi| Bii (14)

Also, as under normal operating conditions j i is quite small, thus ii i + j ii, and |Vj| 1, the off-diagonal elements of the matrix H can be written as: Hij = - |Vi| Bij (15)

Similarly, the diagonal elements of the L matrix can be written as: Lii = - |Vi| Bii And its off- diagonal elements as: Lij = -|Vi| Bij (17) (16)

Applying these assumptions to equations (11) and (12) we get:

P = B ' | Vi | Q = B " | V | | Vi |

(18) (19)

where B' and B" are the imaginary part of the bus admittance matrix Ybus , such that B contains all buses admittances except those related to the slack bus, and B" is B' deprived from all voltage-controlled buses related admittances. Finally, all these approximations and simplifications lead to the following successive voltage magnitude and voltage angle updating equations:

P (20) |V | 1 Q (21) V = [ B "] |V | These equations formed the basis of the iteration scheme upon which the Matlab software written and then updated. = [ B ']
1

III. Updated Algorithm The algorithm written according to the equations derived in the previous section is as follows: Step 1: Creation of the bus admittance Ybus according to the lines data given by the IEEE standard bus test systems. Step 2: Detection of all kinds and numbers of buses according to the bus data given by the IEEE standard bus test systems, setting all bus voltages to an initial value of 1 pu, all voltage angles to 0, and the iteration counter iter to 0. Step 3: Creation of the matrices B' and B" according to equations (18) and (19). Step 4: If max (P, Q) accuracy then Go to Step 6 else 1. Calculation of the H and L elements of equations (14), (15), (16), (17). 2. Calculation of the real and reactive power at each bus, and checking if Mvar of generator buses are within the limits, otherwise update the voltage magnitude at these buses by 2 %. 3. Calculation of the power residuals, P and Q. 4. Calculation of the bus voltage and voltage angle updates V and according to equations (19) and (20). 5. Update of the voltage magnitude V and the voltage angle at each bus. 6. Increment of the iteration counter iter = iter + 1 Step 5: if iter maximum number of iteration then Go to Step 4 else Print out Solution did not converge and go to Step 6

Step 6: Print out of the power flow solution, computation and display of the line flow and losses.

The update of this algorithm was based on the weak coupling between P and V, and between Q and , explained in the previous section. Specifically, in the fourth subroutine of Step 4 of the initial algorithm, and instead of updating the voltage magnitude and the voltage angle once and simultaneously in each iteration, the improved algorithm updated either the voltage angle or the voltage magnitude at each bus, jumped to subroutine 1 to recalculate the real and reactive power and then updated the second variable based on what was updated first. Moreover, and for more speed improvements and convergence reliability, the update of one of the two variables was repeated several times, holding the other variable at its last calculated value, which reduced the number of floating point operations of the algorithm and thus lead to the faster convergence of the IFDPFM. IV. Numerical Analysis The performance of the IFDPFM was tested on IEEE 14, 30 and 57-bus systems with a convergence accuracy of 10-3 on a MVA base of 100 or equivalently 10-1 MVA for both power residuals P and Q. This numerical analysis involved a speed comparison between the NR method, the FDPFM and the IFDPFM based on the number of flops (floating point operations) of each algorithm implementing each method, rather than on any other basis, because the flops count is independent from the CPU speed or the specific programming language used. In addition, as mentioned in the previous part, the algorithm of this paper updated the voltage angle several times before updating the voltage magnitude or vice versa which resulted in a different flops count for each combination used for the same IEEE bus system. These combinations will be noted according to the number of loops of update of each variable. For instance, updating twice the voltage angle () and then once the voltage magnitude (V) in the same iteration will be written as (2;1). Note that any flops number without the previous notation will be the one of the best case of the updated algorithm. Moreover, for any combination to be listed in this paper it should have satisfied the condition of no more than 3 % deviation of its results from that of the NR method. The bar graph in Figure 1 shows a comparison based on the number of flops between the NR, FDPFM and the best case of IFDPFM for the three IEEE standard bus systems used in this paper.

Number of flops per method per system

EE IE 57
934.573 305.126 314.925 157.310 30.823 56.829 24.574
0 500 1,000 1,500 2,000 2,500 3,000 3,500

4,421.752 2,841.646

EE IE 30 EE IE 14

System

4,000

4,500

Flops
IFDPFM FDPFM NR

(Thousands)

Fig. 1: Flops Comparison between the 3 methods.

It is clearly seen that the IFDPFM requires much less flops to converge as compared to FDPFM or NR. This flops saving is proportional to the system size and as shown, increases with the increase of the number of buses. Obviously, this improvement in the number of flops will make the IFDPFM converge much faster than the two other methods whatever CPU used. Numerically, and for the biggest system involved in this paper (IEEE 57-Bus System), the IFDPFM revealed a flops saving of about 67 % when compared with the FDPFM and about 78 % when compared with the NR. Normally, and as mentioned before, this saving goes down to the order of 50 % for the two smaller bus systems. In addition, and in order to reach the best case presented above, different strategies of updating the voltage angle () and the voltage magnitude (V) were tested and compared first with the FDPFM then with the NR. Figure 2 below the percentage of flops of IFDPFM versus that of the FDPFM, for 10 different updating strategies and for the three IEEE systems.

IFDPFM vs FDPFM

Percentage Flops

100 75 50 25 0

1;1

1;2

2;1

2;2

2;3

3;2

3;3

3;4

4;3

4;4

Delta;Voltage Loops FDPFM IFDPFM14 IFDPFM30 IFDPFM57

Fig. 2: % of flops of IFDPFM vs. FDPFM for different voltage angle and voltage magnitude updating strategies.

At the first look, it is seen that for the three systems, three parallel curves are sketched with most values less then 75 % of the FDPFM. This parallel property of this graph shows the consistency of the algorithm in its number of flops variation for each strategy for each system studied. Also, it is seen that for low number of voltage magnitude and voltage angle loops the IFDPFM cant be more efficient than FDPFM, but for a slightly higher number the IFDPFM shows great improvement in flops saving and reaches the highest improvement at the point (4;3), where in each iteration, the voltage angle was updated four times while the voltage was kept at its initial value and then was kept at its last value and V updated three times. Numerically, and for the best case of IFDPFM (4;3), the new algorithm showed a flops saving of 57 % for the 14-bus system, 50% for the 30-bus system, and 68% for the 57-bus system. Figure 3 below shows the percentage of flops of IFDPFM versus that of the NR, for 10 different updating strategies and for the three IEEE systems.

IFDPFM vs NR
175 Percentage Flops 150 125 100 75 50 25 0 1;1 1;2 2;1 2;2 2;3 3;2 3;3 3;4 4;3 4;4 Delta;Voltage Loops

NR

IFDPFM14

IFDPFM30

IFDPFM57

Fig.3: % of flops of IFDPFM vs. NR for different voltage angle and voltage magnitude updating strategies.

Basically, the same comments of the comparison of IFDPFM with FDPFM apply in this comparison. However, here the flops saving is much more significant and is proportional to the system size. Numerically, we have a 21 % flops saving for the 14-bus system, 49 % for the 30-bus system and 78% for the 57-bus system. Finally, it is remarked that when compared with NR, IFDPFM savings showed a high variation in their percentage, mainly because they are highly proportional to the system size, whereas when compared with FDPFM, they showed closer percentages and thus proved to be not fully dependent on the system size but also on its data. V. Conclusion An improved fast-decoupled power flow algorithm was developed in this paper. It used different strategies of updating the voltage angle and the voltage magnitude V at each bus, which resulted in large computing savings in terms of flops, with a convergence criterion of 10-1 MVA and a maximum deviation in results of 3 % compared to those of the NR. This updated algorithm was tested on three IEEE bus systems: 14, 30, and 57-bus, and when compared with the FDPFM, showed a maximum flops saving of 67 % and a 78 % one over NR. Moreover, and as IFDPFM showed a proportionality between the flops savings and the system size, definitely higher improvements percentages can be achieved with larger systems. VI. NOMENCLATURE P : Real power mismatch Q : Reactive power mismatch : Voltage angle correction V : Voltage magnitude correction Vi : Voltage magnitude at bus i Vj : Voltage magnitude at bus j Yij : Magnitude of ijth entry of the Bus Admittance Matrix

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[8]

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