MJD45H11 PNP Epitaxial Silicon Transistor

April 2010

MJD45H11 PNP Epitaxial Silicon Transistor

Applications
General Purpose Power and Switching Such as Output or Driver Stages in Applications D-PAK for Surface Mount Applications

Features
Load Formed for Surface Mount Application (No Suffix) Straight Lead (I-PAK: -I Suffix) Electrically Similar to Popular MJE45H Fast Switching Speeds Low Collector Emitter Saturation Voltage

D-PAK 1.Base

I-PAK 3.Emitter

2.Collector

Absolute Maximum Ratings

Symbol
VCEO VEBO IC ICP PC TJ TSTG Collector-Emitter Voltage Emitter-Base Voltage Collector Current (DC) Collector Current (Pulse)

TA = 25C unless otherwise noted

Parameter

Value
- 80 -5 -8 - 16 20 1.75 150 - 55 to +150

Units
V V A A W W C C

Collector Dissipation (TC=25C) Collector Dissipation (TA=25C) Junction Temperature Storage Temperature

Electrical Characteristics
Symbol
ICEO IEBO hFE VCE(sat) VBE(on) fT Cob tON tSTG tF

TA = 25C unless otherwise noted

Parameter
Collector Cut-off Current Emitter Cut-off Current *DC Current Gain *Collector-Emitter Saturation Voltage *Base-Emitter Saturation Voltage Current Gain Bandwidth Product Collector Capacitance Turn On Time Storage Time Fall Time

Test Condition
IC = - 30mA, IB = 0 VCE = - 80V, IB = 0 VBE = - 5V, IC = 0 VCE = - 1V, IC = - 2A VCE = - 1V, IC = - 4A IC = - 8A, IB = - 0.4A IC = - 8A, IB = - 0.8A VCE= - 10A, IC = - 0.5A VCB = - 10V, f = 1MHz IC = - 5A IB1= - IB2 = - 0.5A

Min.
- 80

Typ.

Max.
- 10 - 50

Units
V A A

VCEO(sus) *Collector-Emitter Sustaining Voltage

60 40 -1 - 1.5 40 230 135 500 100 V V MHz pF ns ns ns

* Pulse Test: PW300s, Duty Cycle2%

2010 Fairchild Semiconductor Corporation MJD45H11 Rev. C3 1 www.fairchildsemi.com

MJD45H11 PNP Epitaxial Silicon Transistor

Typical Performance Characteristics

1000

-100

VCE = -1V

IC[A], COLLECTOR CURRENT

ICP(max)
-10

hFE, DC CURRENT GAIN

100

IC(max)
-1

DC

1m s 5m s

10 0 s 50 0 s

10

-0.1

1 -0.01

-0.1

-1

-10

-0.01

-1

-10

-100

-1000

IC[A], COLLECTOR CURRENT

VCE[V], COLLECTOR-EMITTER VOLTAGE

Figure 1. DC current Gain

Figure 2. Safe Operating Area

25

PC[W], POWER DISSIPATION

PC[W], POWER DISSIPATION

20

15

10

0 0 25 50
o

75

100

125

150

175

25

50
o

75

100

125

150

175

TC[ C], CASE TEMPERATURE

TA[ C], CASE TEMPERATURE

Figure 3. Power Derating vs TC

Figure 4. Power Derating vs TA

2010 Fairchild Semiconductor Corporation MJD45H11 Rev. C3 2

www.fairchildsemi.com

MJD45H11 PNP Epitaxial Silicon Transistor

Physical Dimension

D-PAK
6.60 0.20 5.34 0.30 (0.50) (4.34) (0.50)

0.70 0.20

2.30 0.10 0.50 0.10

0.60 0.20

6.10 0.20

2.70 0.20

9.50 0.30

0.91 0.10

0.80 0.20

MAX0.96 2.30TYP [2.300.20]

0.76 0.10 2.30TYP [2.300.20]

0.89 0.10

0.50 0.10 1.02 0.20 2.30 0.20

(0.70)

(0.90) (0.10) (3.05)

6.10 0.20

9.50 0.30

2.70 0.20

(2XR0.25)

0.76 0.10

(1.00)

6.60 0.20 (5.34) (5.04) (1.50)

MIN0.55

Dimensions in Millimeters

2010 Fairchild Semiconductor Corporation MJD45H11 Rev. C3 3

www.fairchildsemi.com

MJD45H11 PNP Epitaxial Silicon Transistor

Physical Dimension (Continued)

I-PAK
6.60 0.20 5.34 0.20 (0.50) (4.34) (0.50) 0.50 0.10 2.30 0.20

0.20

0.20

0.60

0.70

0.10

6.10

0.20

0.80

0.20

1.80

MAX0.96 0.76 0.10

9.30

0.30

2.30TYP [2.300.20]

2.30TYP [2.300.20]

0.50 0.10

16.10

0.30

Dimensions in Millimeters

2010 Fairchild Semiconductor Corporation MJD45H11 Rev. C3 4

www.fairchildsemi.com

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