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Concurrent Statements
Concurrent statements are executed at the same time, independent of the order in which they appear
RS Latch
Entity RS_LATCH is Port (A,B:in bit; Q ,QBAR :inout bit); End RS_LATCH; architecture DELTA of RS_LATCH is begin QBAR<=R nand Q; Q<=S nand QBAR; end DELTA;
QBAR
Multiple Drivers
Entity TWO-DR is port (A,B,C :in bit: Z: out bit); End TWO-DR; Architecture MULTI of TWO-Dr is Begin Z<=A and B after 10 ns; Z<=not C after 5 ns; End MULTI;
Architecture EXA of EXAMPLE is begin Z<=1 after 2 ns,0 after 5 ns,1 after 10 ns; Z<=0 after 4 ns,1 after 5 ns, 0 after 20 ns; Z<=1 after 10 ns, 0 after 20 ns; End EXA; Since Z has multiple drivers , a resolution function must be used.
TARGET <= VALUE; TARGET <= VALUE_1 when CONDITION_1 else VALUE_2 when CONDITION_2 else ... VALUE_n;
entity CONDITIONAL_ASSIGNMENT is port (A, B, C, X : in bit_vector (3 downto 0); Z_CONC : out bit_vector (3 downto 0); Z_SEQ : out bit_vector (3 downto 0)); end CONDITIONAL_ASSIGNMENT; architecture EXAMPLE of CONDITIONAL_ASSIGNMENT is begin -- Concurrent version of conditional signal assignment Z_CONC <= B when X = "1111" else C when X > "1000" else A;
-- Equivalent sequential statements process (A, B, C, X) begin if (X = "1111") then Z_SEQ <= B; elsif (X > "1000") then Z_SEQ <= C; else Z_SEQ <= A; end if; end process; end EXAMPLE;
entity SELECTED_ASSIGNMENT is port (A, B, C, X : in integer range 0 to 15; Z_CONC : out integer range 0 to 15; Z_SEQ : out integer range 0 to 15); end SELECTED_ASSIGNMENT;
architecture EXAMPLE of SELECTED_ASSIGNMENT is begin -- Concurrent version of selected signal assignment with X select Z_CONC <= A when 0, B when 7 | 9, C when 1 to 5, 0 when others;
-- Equivalent sequential statements process (A, B, C, X) begin case X is when 0 => Z_SEQ <= A; when 7 | 9 => Z_SEQ <= B; when 1 to 5 => Z_SEQ <= C; when others => Z_SEQ <= 0; end process; end EXAMPLE;
Methodology
RASSP Reinventing
Architecture
Electronic Design
Infrastructure
DARPA
Tri-Service
Blocks are concurrent statements and provide a mechanism to partition an architecture description
m Items
declared in declarative region of block are visible only inside the block, e.g. : q signals, subprograms
Block label:block (guard expression) Block header Block declarations Begin concurrent statements End block;
Blocks may be used to define a partitioning and a hierarchy within a design and to group together signal assignments and other concurrent statements which may share some common locally declared objects.
Methodology
RASSP Reinventing
Architecture
Electronic Design
Infrastructure
DARPA
Tri-Service
guarded signal assignment statement schedules an assignment to the signal driver only if the GUARD expression is true. If the GUARD is false, the corresponding signal drivers are disconnected m Example
ARCHITECTURE guarded_assignments OF n_1_mux IS BEGIN bi: FOR j IN iRANGE GENERATE bj: BLOCK (s(j)=1 OR s(j)=Z) BEGIN x <= GUARDED i(j); END BLOCK; END GENERATE; END guarded_assignments
Copyright 1995-1999 SCRA
A conditional GUARD can be included in the BLOCK declaration. If such a GUARD expression exists, then any signal assignment statement in the block which has the keyword GUARDED will disconnect the corresponding signal driver if the GUARD expression evaluates to false. This is one mechanism which can be used to guarantee that there be only one active driver on any signal at any one time.