Q.1.

The output of the circuit shown below is equal to

(A) 0

(B) 1

(C) A B+A B

(D) (A B) (A B)

Q.2. Given (135) base x (144) base x (323) base x . What is the value of base x? (A) 3 (B) 4 (C) 5 (D) 6

Q.3. The logic operations of two combinational circuits given in figure I and figure II are

(A) Entirely different (C) Complementary Q.4. The logic function f (x.y) (x.y) is the same as (A) f (x y) (x y) (C) f (x.y) . (x.y)

(B) (D)

Identical Dual

(B) f (x y) (x y) (D) None of these.

Q.5. 11100, 1100 and 111100 corresponds to the 1's complement representation of which one of the following sets of number? (A) 28, 12 and 56 respectively (C) 7, 7 and 7 respectively (B) 3, 3 and 3 respectively (D) None of these.

Q.6. If (327)9 (x)5 , then the value of x is given by : (A) 327 (B) 268 (C) 2033

(D) 3302

Q.7. A digital multiplexer is basically a combinational logic circuit to perform following operation : (A) AND- AND Q.8. A PLA can be used (A) as a microprocessor. (C) to realize a sequential logic. (B) as a dynamic memory. (D) to realize a combinational logic. (B) OR-OR (C) AND-OR (D) OR-AND

Q.9. Consider the combinational circuit shown below

The output expression F of the above circuit is : (A) X + Y + Z (B) XYZ (C) XY + YZ + ZX (D) X YZ

Q.10. The Boolean function F implemented in the figure given below by using two input multiplexer is:

21

(A) A B C A B C Q.11

(B) ABC A B C

(C) A B C A B C

(D) A B C A B C

Match List-I with List-II and select the correct answer by using the codes given below the lists : List-I A. B. C. D. Multiplexer De-multiplexer Shift register Encoder A 3 4 3 1 B 4 3 4 2 1. 2. 3. 4. C 1 1 2 3 List-II Sequential memory Converts decimal number to binary Data selector Routes out many data output with single Input D 2 2 1 4

Codes : (A) (B) (C) (D)

Q.12. The logic circuit given below is:

(A) Half adder

(B) XOR

(C) Equality detector

(D) Full adder

Q.13. Race around condition always arises in a (A) Combinational circuit (C) Synchronous Circuit (B) Asynchronous circuit (D) Digital Circuit

Q.14. In the circuit shown in the figure, Q = 0 initially, when the clock pulses are applied, the subsequent states of 'Q' will be :

(A) 1, 0, 1, 0

(B) 0, 0, 0, 0

(C) 1, 1, 1, 1

(D) 0, 1, 0, 1

Q.15. The digital circuit shown in the figure works as a

(A) JK flip-flop (C) T flip-flop

(B) Clocked RS flip-flop (D) Ring counter

Q.16. How many flip-flops are required to make a MOD-32 binary counter? A. 3 C. 5 B. 45 D. 6

Q.17. Which digital system translates coded characters into a more useful form? A. encoder C. counter B. Display D. Decoder

Q.18. How many inputs will a decimal-to-BCD encoder have? A.4 C. 10 B. 8 D.16

Q.19. For a 4-bit parallel adder, if the carry-in is connected to a logical HIGH, the result is: A.the same as if the carry-in is tied LOW since the least significant carry-in is ignored. B. that carry-out will always be HIGH. C. a one will be added to the final result. D.the carry-out is ignored. Q.20. One example of the use of an S-R flip-flop is as a(n): A.racer B. Astable oscillator C. binary storage register D.transition pulse generator