JAMES MAYER 786 West Oakcrest Avenue * Brea, California 92821 714-306-2037 * jm126ac1a@westpost.

net TEAM MANAGEMENT: Electrical Engineering Energetic, ambitious systems engineer with technical leadership and design exper ience. Skills in systems engineering and digital communication systems design an d tradeoffs, team scheduling, budgeting, DSP algorithm design / testing, and bot h hardware and software design. Career experience in systems engineering and in tegration, satellite payload digital processor design, VoIP echo cancellation, 8 02.11b PHY design, and embedded communications design development. Highly experi enced within large public and small startup organizations. Areas of expertise:

Leadership * Organization * Goal Setting * Design * Forecast Budgeting Project Organization, Strategy * Progress Assessment * Research * Technical Writ ing Process Reengineering * Negotiations

PROFESSIONAL EXPERIENCE LinQuest Corporation, Los Angeles, California * 2007- present SE&I Payload to Terminal ICD Lead: Lead / supervised a group of six subgroup eng ineers in the development and maturation of an Interface Control Document addres sing layer 1, layer 2, and layer 3 functions for payload to terminal communicati on in a military satellite system (TSAT). * Provided schedule and direction for efforts in proactive pursuit of ICD develo pment and maturation. Weekly status meetings with the Air Force customer were a requirement. Helped in defining, allocating, tracing, and maintaining systemlevel requirements and interfaces in support of the ICD. * Worked within the Interface Requirements IPT to develop interface control requ irements for the ICD, planned and coordinated ICD working group meetings to disc uss ICD topics, tracked and resolved issues through weekly meetings, and support ed the Senior Requirements Engineer for TSAT. Strong communication skills, coll aboration with other system groups, and teaming skills were utilized to reach co nsensus on ICD topics. Top level requirements were defined in a Technical Requi rements Document and DoDAF illustrations and flowed down and ultimately entered into the DOORS database. * Managed cost and schedule using Microsoft Project. * Participant in risk assessments for payload to terminal interface development. * Received award from the Air Force for work on the ICD. * Received top secret clearance. SMC Lead for SBIR Transition: Lead a team to transition phase II SBIR contracts into prime contractor programs. * Functioned as a facilitator in coordinating and leading transition plan agreem ents between prime contractors and small businesses. * Succeeded in transitioning four technologies into prime programs. General Dynamics - Advanced Information Systems Division, Anaheim Hills, Califor nia * 2003-2007 Lead Systems Engineer: Lead / supervised development for wireless networking and

embedded communications systems project. Forecasted and monitored budgets. Part icipated in weekly meetings and design reviews. * Scheduled, planned, directed, and procured engineering resources in developmen t of a scalable, self-configuring, purely ad-hoc sensor embedded communications network project. * Drove team to achieve 8 successful customer demonstrations by setting and meet ing intermediate goals and milestones. * Developed a customized WLAN hardware solution for a Xilinx FPGA based wireless card from an existing Verilog RTL implementation, creating a software defined r adio in a Linux operating environment. Verified in hardware. * Provided research and direction for the technologies / routing protocols to be used in the development of a heterogeneous embedded sensor network consisting o f a low data network in conjunction with a high data rate WiFi (802.11b) network . * Received a General Dynamics Achievement award for 2004, 2005, 2006, and 2007. * Received an interim top secret clearance for future work on the program. Intel Corp. - Intel Communications Group - Network Connectivity Division, Irvine , California * 2000-2003 DSP Software Engineer: Developed an echo canceller for the IXS1000 media gateway as part of a VoP (Voice-over-Packet) program for the embedded firmware DSP grou p. Coded custom algorithms in a proprietary assembly language for implementation on a hardware reference board and also modeled the algorithms in C code and MAT LAB. Utilized extensive voice testing on an actual network. * This effort began at a startup company, VxTel Incorporated, which was later pu rchased by Intel in 2001. * Achieved carrier-class status and higher rating than several other commerciall y deployed echo cancellers at British Telecom and AT&T. * Accomplished approval of patent application for "Echo Canceller with Doubletal k and Channel Impulse Response Adaptation". * Received an Intel Division Recognition Award for work on the echo canceller. Hughes Space and Communications Company, Los Angeles, California * 1996-2000 Digital Processor Payload Design/Verification Engineer: Obtained requirements, a rchitectural design, and development of DSP algorithms for a digital demodulator and detector for a low-power CMOS technology for the Advanced EHF program. * Provided leadership and direction to the subsystem team and ASIC design team t o map top-level requirements to an efficient hardware design for a secure freque ncy-hopped spread spectrum (FHSS) anti-jam satellite communication system. Pres ented findings and recommended approach at PDR and CDR. * Designed an innovative DSP technique for processing multiple channels in a ban dwidth-limited frequency plan by utilizing an OFDM-like technique using a tapere d Tukey window. * Created behavioral fixed-point models in SPW, MATLAB, and C to emulate the fun ctionality and performance of the channelizer, data/acquisition, FFT, and window -presum hardware designs. * Constructed VHDL test benches for the ASIC design team to facilitate single-de sign RTL verification and multi-design verification using Modelsim. Hughes Aircraft Company, Fullerton, California * 1984-1995 Sonar System DSP Algorithm Software Developer: Led development of DSP algorithms in C code for a real-time, sonar-embedded application. Algorithms included fr equency-domain beamforming, adaptive beamforming, matched filtering, normalizati on, and various spectral analysis techniques. * Awarded for adaptive beamformer design and parametric spectral normalizer.

Clearance Level: Top Secret (issued in 2009) EDUCATION Master of Science in Electrical Engineering University of Southern California, Los Angeles Bachelor of Science in Electrical Engineering University of California, Santa Barbara

** Full list of awards and technical competencies available upon request **