MPMC Course File

MICROPROCESSORS AND MICROCONTROLLERS
A. NARMADA ASSOC. PROFESSOR
COURSEFILE
Department of
ELECTRONICS AND COMMUNICATION ENGINEERING
VIGNAN INSTITUTE OF TECHNOLOGY AND SCIENCE

VIGNAN HILLS, DESHMUKHI VILLAGE, POCHAMPALLY (MANDAL) NALGONDA (DISTRICT) - 508284
Sponsored by Lavu Educational Society
(Approved by AICTE and Affiliated to JNT University, Hyderabad)
COURSE OBJECTIVE
Microprocessors and Microcontrollers
Course Objective
COURSE OBJECTIVE
Course Objective: The course provides an in-depth understanding of the operation of microprocessors and microcontrollers, machine language programming & interfacing techniques. This course is designed to impart professional training to the students engineering, to interface and build microprocessors and Microcontroller based applications involving interfacing of 8255 with 8086 and serial communication. The objective of this course is to teach students design and interfacing of microcontroller-based embedded systems.
Further the students will be able to program in both assembly and C languages and understand the impact of computer hardware on software programming. The student will be taught the course in a realistic, real-world-oriented fashion so that the students have a basic understanding of various constraints in embedded systems. It teaches the students how is to use the microcontrollers as a means to integrate the curriculum so that our students gain a comprehensive view of various topics they have learned in their previous years. The new course blends the lectures and the labs together, and emphasizes hands-on, active learning with labs and projects. This approach allows all engineering students the opportunity to learn to use the microprocessor as a tool for solving engineering monitoring and control problems. The approach consists of shifting the focus of the course from the microprocessor itself to learning the design methodology by which the microprocessor could be used as a tool to solve practical engineering problems.
This course is intended as a first level course for microprocessor and microcontroller based system design. Designer of microprocessor system must have a thorough understanding of hardware, software and system integration. In view of this, various aspects of hardware design, such as interfacing of memory and different types of I/O devices, will be covered in details. As it is customary to write software in machine or assembly language for embedded system applications, laboratory assignments will be on assembly language programming of 8086 and 8051. The students will also learn to use development aids, such as a assembler and simulator to perform software development, hardware development and hardware-software integration. Finally, each batch of students will implement a complete microcontroller-based system as part of the lab assignment.
Course Objective
SYLLABUS
Course Objective
SYLLABUS
MICROPROCESSORS AND MICROCONTROLLERS Objective : The objective of the Microprocessor and Microcontrollers is to do the students familiarize the architecture of 8086 processor, assembling language programming and interfacing with various modules. The student can also understand of 8051 Microcontroller concepts, architecture, programming and application of Microcontrollers. Student able to do any type of industrial and real time applications by knowing the concepts of Microprocessor and Microcontrollers. UNIT-I 8086 ARCHITECTURE: Introduction to 8085 Microprocessor, 8086 architecture, Functional Diagram, Register Organization, memory segmentation, programming model. Memory addresses, Physical memory organization. Architecture of 8086, signal descriptions of 8086- common function signals. Minimum mode maximum mode signals. Timing diagrams, Interrupts of 8086,Addressing modes, . UNIT-II INSTRUCTION SET AND ASSEMBLY LANGUAGE PROGRAMMMING OF 8086 Instruction formats, addressing mode, instruction set, assembler directives, macros, simple programs involving logical, branch and call instructions, sorting, evaluationg arithmetic expressions, string manipulations UNIT-III I/O INTERFACE 8255 PPI, Various modes of operations and interfacing to 8086, Interfacing keyboard, display, stepper motor interfacing, A/D, D/A Converter Interfacing. UNIT-IV INTERFACING WITH ADVANCED DEVICES.
Memory interfacing to 8086, Interrupt structure of 8086, Vector Interrupt table, Interrupt service routine. Introduction to DOS and BIOS interrupts, Interfacing Interrupt controller 8259, DMA controller 8257 to 8086 UNIT-V COMMUNICATION INTERFACE Serial Communication Standards, serial data transfer schemes, 8251 architecture and interfacing Interfacing RS-232, IEEE-488, 20mA Current Loop, Prototyping and Trouble shooting UNIT-VI INTRODUCTION TO MICRO CONTROLLERS Overview of 8051 Micro Controller, Architecture, I/O ports and Memory Organization, Addressing modes and Instruction set of 8051, Simple Programs using Stack Pointer, Assembly language programming. UNIT-VII 8051 REAL TIME CONTROL INTERRUPTS Interrupts, Timer/Counter and Serial Communication, Programming Timer Interrupts, Programming External H/W interrupts, Programming the serial communication interrupts, Interrupt Priority in the 8051, Programming 8051 Timers, Counters and Programming. UNIT- VIII THE AVR RISC MICROCONTROLLER ARCHITECTURE Introduction, AVR family architecture, Register file, The ALU, memory access and instruction execution. I/ O memory, EEPROM, I/ O ports, Timers, UART, Interrupt structure . TEXT BOOKS:
Course Objective
1. Kenneth J Ayala, The 8051 Micro Controller Architecture, Programming and Applications, Thomson Publishers, 2nd Edition. 2. D.V.Hall, Micro Processor and Interfacing , Tata McGraw-Hill. REFERENCE BOOKS: 1. Ajay V. Deshmukh, Microcontrollers theory applications, Tata McGraw-Hill Companies 2005. 2. Ray and BulChandi, Advanced Micro Processors, Tata McGraw-Hill. 3. Kenneth J Ayala, The 8086 Micro Processors Architecture, Programming and Applications, Thomson Publishers, 2005. nd 4. Microcomputer Systems: The 8086/8088 Family: Architecture, Programming and Design, 2 ed., Liu & Gibson WEBSITES 1. http:// doc.union.edu/ 2. http://intel.com 3. http://buildinggadgets.com/
JOURNALS 1. 2. 3. 4. IEEE Transaction on Electronic Devices (ISSN: 0018-9383) Journal of Active and Passive Electronic Devices (ISSN: 1555-0281) International Journal of Micro and Nano Electronics, (ISSN: 0975-4768) Journal of Electronic Testing (ISSN: 0923-8174)
STUDENT'S SEMINAR TOPICS
Microprocessors and microcontrollers
Seminar Topics
STUDENTS SEMINAR TOPICS

1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. Architecture of 8086 and its applications Segmentation Memory Interfacing 8255 PPI 8051 Introduction Programming if 8086 Programming of 8051 Serial communication standards Interrupts of 8086 8051 Programming, timers/ Counters, Interrupts AVR Microcontrollers RISC microcontrollers
LECTURE PLAN
LECTURE PLAN
S.No 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. NAME OF THE TOPIC Introduction to 8085 Microprocessor 8086 architecture Register organization Memory Segmentation Programming Model Memory Addresseing Physical memory Organization Signal descriptions of 8086 Minimum Mode Maximum Mode Timing Diagrams 8086 Interrupts Instruction set Assembly language programming Assembly language programming Assembly language programming Assembly language programming Addressing Modes No of Periods 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Method of Teaching Text books referred --D. V Hall, 2nd edition 2006-D. V Hall, 2nd edition 2006-D. V Hall, 2nd edition 2006-D. V Hall, 2nd edition 2006-D. V Hall, 2nd edition 2006-D. V Hall, 2nd edition 2006-D. V Hall, 2nd edition 2006-D. V Hall, 2nd edition 2006-D. V Hall, 2nd edition 2006-D. V Hall, 2nd edition 2006-D. V Hall, 2nd edition 2006-D. V Hall, 2nd edition 2006-D. V Hall, 2nd edition 2006-D. V Hall, 2nd edition 2006-D. V Hall, 2nd edition 2006-Advanced Microprocessors and peripherals A K Ray and K M burchandi Advanced Microprocessors and peripherals A K Ray and K M burchandi Advanced Microprocessors and peripherals A K Ray and K M burchandi Advanced Microprocessors and peripherals A K Ray and K M burchandi Advanced Microprocessors and peripherals A K Ray
18.
19.
Instruction set
20. 21.
Assembler directives, Macros Simple programs
1 1
Objective Type Questions
22.
Sorting
Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board, Chalk and LCD Projector Black board, Chalk and LCD Projector Black board, Chalk and LCD Projector Black board, Chalk and LCD Projector Black board, Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector
23.
Evaluating arithmetic expressions
24.
String manipulations
25.
8255 PPI introduction
26.
Modes of operation
27.
And interfacing to 8086
28.
Keyboard Interfacing
29.
Display Interfacing
30.
Stepper motor Interfacing
31.
DAC and ADC Interfacing
32.
Memory Interfacing to 8086
33.
Interrupt structure of 8086
34.
Interrupt Vector Table
35.
DOS and BIOS Interrupts
36.
8259 Interfacing
37. 38.
8257 DMAC Interfacing Serial Communication standards
1 1
and K M burchandi Advanced Microprocessors and peripherals A K Ray and K M burchandi Advanced Microprocessors and peripherals A K Ray and K M burchandi Advanced Microprocessors and peripherals A K Ray and K M burchandi Advanced Microprocessors and peripherals A K Ray and K M burchandi Advanced Microprocessors and peripherals A K Ray and K M burchandi Advanced Microprocessors and peripherals A K Ray and K M burchandi Advanced Microprocessors and peripherals A K Ray and K M burchandi Advanced Microprocessors and peripherals A K Ray and K M burchandi Advanced Microprocessors and peripherals A K Ray and K M burchandi Advanced Microprocessors and peripherals A K Ray and K M burchandi Advanced Microprocessors and peripherals A K Ray and K M burchandi Advanced Microprocessors and peripherals A K Ray and K M burchandi Advanced Microprocessors and peripherals A K Ray and K M burchandi Advanced Microprocessors and peripherals A K Ray and K M burchandi Advanced Microprocessors and peripherals A K Ray and K M burchandi Advanced Microprocessors and peripherals A K Ray and K M burchandi D. V Hall, 2nd edition 2006-III B.Tech 2nd Semester Page 12
Vignan Institute of Technology & Science
39. 40. 41. 42. 43. 44. 45. 46. 47. 48. 49. 50. 51. 52. 53. 54. 55. 56.
Serial Data Transfer schemes 8251 USART architecture 8251 USART Interfacing with 8086 RS 232, IEEE 488 Prototype And trouble shooting Introduction to 8051 Architecture of 8051 8051 ports, Interrupts Memory organization Addressing modes Instruction set of 8051 Simple programs 8051 real time control interrupts Timer/ counter interrupts External hardware interrupts Programming serial communication interrupts Programming 8051 timers and counters Introduction to AVR and RISC microcontrollers AVR family architecture Register File, ALU, Memory access Instruction execution
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board and Chalk Black board, Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector Black board Chalk and LCD Projector
57.
58.
59.
60. 61.
I/ O memory EEPROM, I/ O Ports
1 1
D. V Hall, 2nd edition 2006-D. V Hall, 2nd edition 2006-D. V Hall, 2nd edition 2006-D. V Hall, 2nd edition 2006-D. V Hall, 2nd edition 2006-Kenneth J Ayala, The 8051 microcontroller, 3rd edition Kenneth J Ayala, The 8051 microcontroller, 3rd edition Kenneth J Ayala, The 8051 microcontroller, 3rd edition Kenneth J Ayala, The 8051 microcontroller, 3rd edition Kenneth J Ayala, The 8051 microcontroller, 3rd edition Kenneth J Ayala, The 8051 microcontroller, 3rd edition Kenneth J Ayala, The 8051 microcontroller, 3rd edition Kenneth J Ayala, The 8051 microcontroller, 3rd edition Kenneth J Ayala, The 8051 microcontroller, 3rd edition Kenneth J Ayala, The 8051 microcontroller, 3rd edition Kenneth J Ayala, The 8051 microcontroller, 3rd edition Kenneth J Ayala, The 8051 microcontroller, 3rd edition Advanced Microprocessors and peripherals A K Ray and K M burchandi Advanced Microprocessors and peripherals A K Ray and K M burchandi Advanced Microprocessors and peripherals A K Ray and K M burchandi Advanced Microprocessors and peripherals A K Ray and K M burchandi Advanced Microprocessors and peripherals A K Ray and K M burchandi Advanced Microprocessors and peripherals A K Ray III B.Tech 2nd Semester Page 13
62.
Timers, USART
Black board Chalk and LCD Projector Black board Chalk and LCD Projector
63.
Interrupt structure
and K M burchandi Advanced Microprocessors and peripherals A K Ray and K M burchandi Advanced Microprocessors and peripherals A K Ray and K M burchandi
LEARNING OBJECTIVES
Vignan Institute of Technology & Science III B.Tech 2nd Semester Page 14
LEARNING OBJECTIVES
UNIT I: 8086 Architecture
At the conclusion of this unit student will 1. 2. 3. 4. 5. 6. 7. 8. Explain the 8085 architecture Explain the 8086 architecture Describe 8086 register organisation Explain segmentation Explain pin diagram of 8086. Draw and explain minimum and maximum modes of 8086 Draw and explain timing diagrams of 8086 in minimum and maximum modes Explain the interrupts of 8086
UNIT II: Instruction set and assembly language programming of 8086 At the conclusion of this unit student will
1. 2. 3. 4. 5. 6. Explain the instruction set of 8086 Explain the addressing modes of 8086 Explain the assembler directives of 8086 Define and differentiate procedure and macros Write simple programs involving branching, call, and arithmetic operations Write simple programs involving sting manipulations
UNIT III: I/ O interface

At the conclusion of this unit student will
1. 2. 3. 4. 5. 6. 7. 8. Explain the operation of 8255 PPI Explain various modes of operation of 8255 Interface 8255 with 8086 Interface Keyboard with 8086 using 8255 Interface Display with 8086 using 8255 Interface stepper motor with 8086 using 8255 Interface ADC with 8086 using 8255 Interface DAC with 8086 using 8255
UNIT IV: Interfacing with advanced devices

1. 2. 3. 4. 5. 6. 7. Interface memory with 8086 Explain interrupt structure of 8086 Explain Interrupt Vector Table(IVT) Explain DOS and BIOS Interrupts Explain Interrupt Service Routines Explain the operation of 8259 Interrupt controller Explain the operation of 8257 DMA controller
III B.Tech 2nd Semester Page 15
Unit V:Communication Interface

1. 2. 3. 4. 5. 6. 7. Define Serial communication standards Explain serial data transfer schemes Explain USART architecture Explain USART interfacing with 8086 Explain RS 232 Ex[lain IEEE-488
UNIT VI: Introduction to Microcontrollers

1. 2. 3. 4. 5. 6. 7. Explain the architecture of 8051 Describe the pin diagram of 8051 Describe the I/ O Ports of 8051 Explain the memory organization of 8051 Explain the addressing modes of 8051 Explain the instruction set of 8051 Write and execute simple programs
UNIT- VII: 8051 Real Time control

1. 2. 3. 4. Program the timers/ counters of 8051 Program the serial communication Program external hardware interrupts Program the serial communication interrupts
UNIT-VIII: The AVR RISC microcontroller Architecture

1. 2. 3. 4. 5. 6. 7. Explain the architecture of AVR microcontroller Explain the register file of AVR microcontroller Explain the I/ O ports of AVR microcontroller Explain the memory map of AVR microcontroller Explain the timers of AVR microcontroller Explain the UART of AVR microcontroller Explain the interrupt structure of AVR microcontroller
OBJECTIVE TYPE QUESTIONS

Vignan Institute of Technology & Science III B.Tech 2nd Semester Page 17
OBJECTIVE TYPE QUESTIONS
. The number of address spaces of 8085 is ( a) 4 ( b ) 8 ( c ) 2 ( d ) 1 2. One of these is an index register ( a) BP ( b ) SI ( c ) DX
[ (d ) PC [ ( d ) AH
3. Which of these is an 8 bit register ? ( a) DX ( b ) CX ( c ) BX
4. The fag which indicates whether the number of 1s are odd or even in the lower 8 bits is [ ] ( a) C Y ( b ) Z (c)P ( d ) S F 5. Which of these bits is used specially in packed BCD arithmetic? ( a) D F ( b ) CY ( c ) AC ( d ) OF [ ]
6. f EA is used to represent Effective address then what addressing mode does EA = [2000] Represent [ ] ( a) Register Direct ( b ) Register indirect (c) Indirect Addressing ( d) immediate addressing 7. Which of these combinations is used by STOSB instruction ( a) ES:DX ( b ) DX:AX ( c ) SS:BP ( d ) DS:SP 8. The width of the SP register is (a) 32 bits (b) 8 bits (c) 24 bits [ ]
[ (d) 16 bits [ ]
9. The flags used for controlling interrupts is ( a) TF ( b ) AC ( c ) DF ( d )IF 10. Which of these combinations is not allowed in computing address ( a) B P +SP ( b ) B P +DX ( c ) BP+BX ( d ) B X + SP 11. The width of the SP register is (a) 32 bits (b) 8 bits (c) 24 bits
[ (d) 16 bits [ (d)AH, AL [
12. One of the following is a wrong register pair ( a) CH,DH ( b ) D H , D L (c)BH,BL 13. Which of these flags indicates a carry from a nibble? ( a) CY (b)Z (c) 0 ( d )AC Vignan Institute of Technology & Science
Microprocessors and Microcontrollers 14. The flags used for controlling interrupts is ( a) TF ( b ) AC ( c ) DF ( d )IF
Objective Type Questions [ ]
15. Which of these combinations is not allowed in computing address ( a) B P +SP ( b ) B P +DX ( c ) BP+BX ( d ) B X + SP 16 The 8085 is a bit microprocessor ( a) 4 bit ( b ) 8 bit ( c ) 32b it 17 The size of the 8086 flag register is ( a) 32 b its ( b) 1 Gbit s ( c ) 8 bits
[ ( d ) 1 6 bit [ ( d ) 64 bits [
18 One of the following is wrong combination of registers ( a) E S : DX (b ) DS :SP ( c ) D S : SS ( d ) C S : IP
19 The flag which indicates whether the number of 1s are odd or even in the lowver 8 bits is [ ] ( a) P ( b ) C Y (c)SF (d)Z 20 The segment size of 8086 is [ ] (a) 23 KB (b) 56 kB (c) 64KB (d) 60KB 1 d 2 b 3 d 4 c 5 c 6 a 7 d 8 d 9 d 10 b 11 d 12 a 13 d 14 d 15 b 16 b 17 a 18 c 19 a 20 c
UNIT II: Instruction set and assembly language programming of 8086
1. The first operation done by PUSH instruction is [ ] ( a) Upper Byte of data to stack & SP=SP+1 ( b ) Lower Byte of data to stack &SP=SP 1 ( c ) Lower Byte of data to stack & SP=SP+1 ( d ) Upper Byte of data to stack & SP=SP 1 2. The following program will loop how many times MOV AX, 2 MOV DX, OFF AGAI N: MOV CX, OFF DEC DX LOOP AGAIN (a) 10 (b) 255 (c) N F N TE ( d ) 65535 3. Which of these is external to the program code (a) Procedure (b) Macro (c) Library function [ (d) Sub Routine ] [ ]
4. When a CMP instruction executes and the source and destination operands are not equal what will be condition of Z and carry flag when source is greater than destination [ Vignan Institute of Technology & Science
Microprocessors and Microcontrollers (a) Z=1, CY= O (b )Z=0, CY=1 (c) Z=0,CY=0
Objective Type Questions (d) Z=1,CY=1 [ ]
5. Which of these cases uses only registers (a) CALL F (b) CALL BX (c) CALL (d) CALL TABLE [BX]
6. Given the program shown below, What is the expression evaluated by this program? [ MOV AL ,[P] MOV BL, [Q] ADD AL, BL MUL AL ADD AL, R MOV CL, S DIV CL (a) (P+Q2+R)/ s (b) ((P+Q)2+R/S (c) (P+(Q+R)2)/S (d ) ((P+Q)2+R)/S 7. Which of these instructions writes a byte to memory? (a) MOV SB (b) LOD SB (c) SCA SB (d) STO SB 15. On the following program what is the final value of the S register. MOV AX, 1000 MOV ES, AX MOV DS, 3000 MOV S, 0 MOV D, O CLD MOV CX, FF AG: MOV SW LOOP AG [
(a) 01FE
(b) 01FF
(c) 01FFF (d) 00FF

[ ]
8. AN 8086 instruction is of which of these forms (a)Opcode, Source, Destination ( b ) Op code,Destination,Source (c)Source, destination, Opcode (d) Destination, source, opcode 9. Which of these instructions is invalid ( a) M OV BH , CH ( b ) MOV C H , C L ( c ) MOV CX, BL ( d ) MOV BX , C X
10. Is the directive which indicates a reference point in memory and is usually used by JUMP Instructions [ ] ( a) START ( b ) LABEL ( c ) ORG ( d ) LENGTH 31. Which registers will contain the product of a 16 bit multiplication instruction [ ] ( a) BX , DX ( b ) CH , CL ( c ) AH , AL ( d )AX,DX 11.In the following program what is the final value of the S register? MOV AX, 1000 MOV ES, AX MOV DS, 3000 Vignan Institute of Technology & Science [ ]
Microprocessors and Microcontrollers MOV S ,0 MOV D ,0 CLD MOV CX, FF AG:MOV SW LOOP AG ( a) 0 ( b ) 01FFF ( c ) 00F F
( d ) 01F E
12. In the following program what is the value of CX after the loop is executed [ ] MOV AX,2 MOV DX,0FFFh MOV CX,10 AGA N:DEC DX LOOP AGA N ( a) 0 F F ( b ) 1 ( c) 0 ( d ) 0 F E F 13 Given the program shown below, What is the expression evaluated by this program? [ ] MOV AL, [P] MOV BL, [Q] ADD AL, BL MUL AL DIV CL (a)(P+(Q+R)2)/S (b)((P+Q)2+R)/S (c ) ( P+Q 2 +R)Is (d)((P+Q)2+R/S 14 . EA is used to represent Effective address then what addressing mode does EA=R Represent [ ( a) Register Direct (b) indirect Addressing (c)Register indirect (d)immediate addressing 15 Which of these is not used by MOV SB instruction? ( a) ES : DX ( b ) DF ( c ) DS : SP ( d ) SS : BP 16. POP instruction utilizes one of the following combinations ( a) CS ; IP ( b ) DS : SS ( c ) SS : B P ( d ) SS : S P 17. Which of the following instructions are used for searching a byte in a string of bytes? (a)CMPSB (b) MOVSB (c)SCASW (d)SCASB [
18. Which of these instructions uses BX register to point to at a byte and AL register to took up at a byte is [ ] ( a) XOR ( b ) XC H G ( c ) L OO P ( d ) X LAT 19. Which of these instructions reads a byte from memory? (a) MOV SB (b) LOD SB (c) SCA SB (d) STO SB 20. When a CMP instruction executes and the source and destination operands are Vignan Institute of Technology & Science III B.Tech 2nd Semester Page 21 [ ]
not equal what will be condition of Z and carry flag when source is less than destination [ (a) Z=1, CY= 0 (b )Z=0, CY=1 (c) Z=0,CY=0 (d) Z=1,CY=1
1 c 2 a 3 a 4 c 5 b 6 d 7 d 8 b 9 c 10 b 11 b 12 c 13 c 14 a 15 c 16 d 17 d 18 d 19 b 20 d
UNIT-III : I/O INTERFACE

1. Mode 1 of 8255 is used for which of these I/O methods ( a) Bi-Directional Handshake ( b ) DMA I/O ( c ) Strobed or Hand Shake mode ( d ) Simple Input/Output [ ]
2. If the 8255 is selected for addresses 0F800H to 0F806H, which one of the following is the address of PORT C [ ] (a) 0F806H ( b ) 0F802H ( c ) 0F804H ( d ) 0F800H 3. If 8 seven segment led multiplexed displays including the decimal point are connected. How many wires are needed to connect the segments (not including power supply wires)? ( a) 15 ( b ) 16 ( c ) 56 ( d ) 64 [ ] 4. The diode kept across the coil of a step per motor is for ? ( a) Shorting the Back EMF ( b ) To stop the step per motor ( c ) Stopping flow of current ( d ) Allowing flow of current [ ]
5. In the A/D converter ADC0808 which of these signals tri states the digital output of ADC ( a) EOC ( b ) ALE ( c ) SOC ( d ) OE [ ] 6. Mode 1 of 8255 is used for which of these I/O methods ( a) Simple Input/ Output ( b ) DMA I/O ( c ) Bi-Directional Hand shake ( d ) Strobed or Hand Shake mode [ ]
7. If the control word 09BH is given to the control register of the 8255 PPI then which of these options are the condition of the ports [ ] ( a) BIT SET RESET ( b ) ALL PORTs INPUT ( c ) ALL PORTs OUTPUT ( d ) PORTs A&B INPUT,PORT C OUTPUT 8. When 8255 port is to be read then which of these combinations is valid ( a) RD= 1 , W R= 0, R E S E T =0 , C S =0 ( b ) RD= 0 , W R= 1, R E S E T =1 , C S =0 ( c ) R D= 0 , W R= 1, R E S E T =0 , C S =1 ( d ) R D= 0 , W R= 1, R E S E T =0 , C S =0 9. Which of these key switches is non mechanical contact type? ( a) MECHANICAL KEY SWITCHES ( b ) HALL EFFECT KEY SWITCHES ( c ) MAGNETIC REED KEY SWITCHES [ ]

( d ) MEMBRANE KEY SWITCHES
10. Two 8255s IC1&IC2 are connected to 8086 16 bit bus and D0 to D7 are connected to IC1 and D8 to D15 are connected to IC2. The base address signals A0&A1 go to IC1&IC2s A0&A1 pins respectively. If a decoded signal with a range of 0FFE0H to 0FFE3H then What is the address of IC1PORT B register [ ] ( a) 0FFE2H ( b ) 0FFE0H ( c ) 0FFE3H ( d ) 0FFE1H 11. The number of ports 8255 PPI has is ( a) 3 ( b ) 2 ( c ) 1 ( d ) 4 [ ]
12. If 8 seven segment led multiplexed displays including the decimal point are all lighted up and each of these is biased to carry 5mA. What is the total current drawn from the power supply when all the segments are ON? [ ] ( a) 280 mA ( b ) 80 mA ( c ) 40 mA ( d ) 300 mA 13. How many wires does as stepper motor effectively have? ( a) 4 ( b ) 2 ( c ) 3 ( d ) 5 [ ]
14. An A/D converter which has a maximum output digital value of 1023 need show many wires for connecting its digital output to a peripheral chip [ ] ( a) 10 ( b ) 13 ( c ) 8 ( d ) 12 15. The 8255 PPI has ( a) 28 pins ( b ) 16 pins [ ( c ) 40 pins ( d ) 64 pins d ) Ramp [ ] ]
16. In a D/A converter the output voltage is ( a) Voltage ( b ) Pulses ( c ) current
17. At power on or after reset the ports are in which of these conditions ( a) PORT A=INPUT,PORT B=INPUT, PORT C=INPUT ( b ) PORT A=INPUT,PORT B=INPUT, PORT C=OUT PUT ( c ) PORT A=INPUT, PORT B=OUTPUT, PORT C=OUTPUT ( d ) PORT A=OUTPUT, PORT B=INPUT, PORT C=OUTPUT 18. . Which of these motors works like a digital system ( a) DC MOTOR ( b ) STEPPER MOTOR ( c ) INDUCTION MOTOR ( d ) SYNCHRONOUS MOTOR
19. An 8 bit A/D converter with a reference voltage of 5 Volts will be able to read a lowest non zero voltage of [ ] ( a) 20 Mv ( b ) 19.5 mV ( c ) 21 mV ( d ) 19 mV 20. Group B port assignments of 8255 is ( a) Port B & Lower PortC ( b ) Port A& Upper Port C ( c ) Port B& Upper PortC ( d ) Port A & Lower Port C [ ]
Answers Vignan Institute of Technology & Science III B.Tech 2nd Semester Page 23
1 c 2 c 3 b 4 a 5 d 6 a 7 b 8 d 9 b 10 d 11 a 12 c 13 d 14 a 15 c 16 b 17 a 18 b 19 b 20 a
UNIT-IV: INTERFACING WITH ADVANCED DEVICES. 1. Which of these is used for indicating that data is being written or read from the data bus? [ ] (a) DT/R (b) ALE (c) HOLD (d) MN/MX 2. Which of these signals are bidirectional? (a) HOLD,HLDA ( b ) S1,S2 ( c ) RQ,GT [ ( d ) S0,S1 ]
3. Which of these ICs is a 3 to 8 decoder used for decoding memory addresses [ (a) 74LS245/8286 ( b ) 8284A ( c ) 74LS138 ( d ) 74LS373 [ ] ]
4. When a processor requests for DMA these sequence of signals is (a)HOLD, DREQ, DACK, HLDA (b) DREQ, HOLD, DACK, HLDA (c)DREQ, HOLD, HLDA, DACK (d) HOLD, HLDA, DREQ, DACK
5. One of these is not the segment offset form of the absolute address 00417 [ (a) 0040:0017 (b)0000:041 7 (c)0041:0007 (d ) 0417:0000 6. Which of these uses the stack for its operation? ( a) Macro (b)Library functi0n (c)Sub Routine [ ( d) Procedure
7. Which of these cases uses on y registers (a)CALL TABLE[BX] ( b ) CALL F
[ ( c ) CALL BX ( d ) CALL
8. Which combination of the flags indicate that the destination is greater than the source [ ] ( a) CY = 1, Z = 1 ( b ) CY = 0, Z = 1 ( c ) CY=0,Z=0 ( d ) CY = 1, Z =O 9. The LOD SW opcode uses which of the following register combinations ( a) DS:SP ( b ) D S : DX ( c ) E S : DX ( d ) E S : SS [ ]
10. Which of these is an acknowledgement for DMA request? ( a)INTRA ( b ) HLDA ( c ) M / O (d)DEN 11. The 8086 takes over the bus when it receives one of these signals Vignan Institute of Technology & Science
Microprocessors and Microcontrollers ( a) GT 1,GT 0 ( b ) RQ 0
Objective Type Questions ( c) RQ 0 , RQ 1( d ) GT O [ ( d ) READY ]
12. This signal is used to store data at memory ( a) WR ( b ) DT/ R ( c ) ALE
13. In a 8086 system which uses one bank of 16 KX8 memory connected respectively to D0 D7 The following address lines would be connected to them [ ] ( a) A 1 to A 14 ( b ) A 1 to A 15 ( c ) A0 to A13 ( d ) A 0 to A 14 14. Which of these signals indicates that an interrupt Request is being acknowledge [ (a) INTRA (b)HLDA (c)MOV (d)DEN
15. The register whose contents are copied during auto initialization is holds the 16 bit address being used for DMA is [ ] (a)Command Register (b)Current word count register ( c ) Base Word Count registers (d)Current Address Register 16. Direction fag is used with which of these following instructions ? [ ] (a) String (b)Data transfer (c)Logical instructions (d)Transfer control
17. Which of these instructions uses both ES & DS segment registers ( a) STOP S B ( b ) MOV SB ( c ) LAOD S B (d)SCASB 18. Which of these is a Prefix ( a) REP ( b ) ESC
[ ( c ) RET ( d ) LOOP [
19. Which of these is used for identifying when the address is output? ( a) H OLD ( b )ALE ( c ) MNM X ( d ) D T/ R
20. Which of these signals combination indicates a Lower 8 bit data transfer? [ ] (a)A0=0&BHE=0 (b)A0=1&BHE=0 (c ) A0=0 & BHE= (d)A0=1&BHE=1 Answers 1 a 2 d 3 c 4 b 5 c 6 d 8 c 9 c 10 b 11 a 12 a 13 a 14 a 15 c 16 a 17 d 18 a 19 b 20 a UNIT-V: COMMUNICATION INTERFACE
1. Data line which can be transfer in only one direction is referred as ( a) Half Duplex ( b ) Complex ( c ) Full Duplex [ ( d ) Simplex ]
2. The L2 and L1 bits in the Mode word are used for setting which of these parameters?[ ( a) NUMBER OF STOP BITS ( b ) CHARACTER LENGTH

( c ) BAUD RATE FACTOR ( d ) PARITY
3. In the Synchronous mode the 8251 which signal indicates that the specified Synchronous character is received ? [ ] ( a) Tx C ( b ) SYNDET/BD ( c ) CLK ( d ) C/D 4. If the CPU has not read a character from the 8251 before the arrival of the next character. Which of the following errors is supposed to have occurred? [ ] ( a) Even Parity error ( b ) Framing Error ( c ) Over Run Error ( d ) Odd Parity Error 5. USB stands for which one of the following? ( a) Universal Sequential Bus ( b ) Universal Serial Bus ( c ) College Bus ( d ) Universal Sequential Bus [ ]
6. Which one of these serial data transmission standards is single ended and does not use low impedance drivers? [ ] ( a) RS449 ( b ) RS232C ( c ) RS423A ( d ) RS422A 7. The USART used as Serial Communication controller is ( a) 8259 ( b ) 8257 ( c ) 8250 ( d ) 8251 [ ]
8. In the Synchronous mode the 8251 which signal indicates that the specified Synchronous character is [ ] ( a) CLK ( b ) C/D ( c ) TxC ( d ) SYNDET/BD 9. USB connector has how many pins? ( a) 3 ( b ) 2 ( c ) 5 ( d ) 4 [ ]
10. When the MODEM is ready to Transmit Data it Asserts which one of these signals is asserted? [ ] ( a) DSR ( b ) CD ( c ) RTS ( d ) CTS 11. Serial data is received by the DTE from the DCE through which one of these signals? [ ( a) RTS ( b ) CD ( c ) CTS ( d ) RxD ]
12. If B1=0 and B0=0 in the mode register of the 8251.The USART is working in which of these modes? [ ] ( a) Synchronous mode ( b ) Asynchronous mode with BRF=16 ( c ) Asynchronous mode with BRF=64 ( d ) Asynchronous mode with BRF=1 13. The serial data transmission standards which uses differential Rx & Tx signals is which one of the following? [ ] ( a) RS232C ( b ) RS449 ( c ) RS423A ( d ) RS422A 14. The data signals used by USB are of which type of the following? ( a) Uni-Phase ( b ) Quad Phase ( c ) Bi-Phase ( d ) Tri-phase 15. 8251 is ___ bits (a) 8 (b) 9 (c) 10 (d) 11 [ ] [ [ ] ]
16. The device from which data terminates or originates is called (a) DSR (b) DTR (c) DTE (d) DCE

17. USART stands for ____ (a) Universal Synchronous Asynchronous Receiver Transmitter (b) Universal Sync Asynchronous Receiver Transmitter (c) Universal Synchronous Async Receiver Transmitter (d) Universal Sync Async Receiver Transmitter 18. Which one of the following starts the timer? ( a) IE1 ( b ) TF ( c ) TR ( d ) IT1 19. 8251 is used to interface with 8086 for ____ communication (a) Serial (b) parallel 20. 8251 is ____ make (a) Motorola (b) intel (c) Tomcat (d) Zilog (c) both a and b (d) none

[ ]
Answers 1 a 2 b 3 b 4 c 5 b 6 b 7 d 8 d 9 d 10 a 11 d 12 b 13 a 14 c 15 a 16 c 17 a18 c 19 a 20 b
UNIT-VI: INTRODUCTION TO MICRO CONTROLLERS

1. Which one of the following is the 8051 architecture based upon? ( a) Princeton Architecture ( b ) Param Architecture ( c ) Harvard Architecture ( d ) Von Neumann Architecture [ ]
2. General purpose registers R0 to R7 can be referred as sets of four banks (0to3) and also by memory location. If a register R3 in Bank2 is referred, what is its internal ram location address? ( a) 14H ( b ) 10H ( c ) 12H ( d ) 13H [ ] 3. Timer0 is functional as an 8 bit counter while timer 1 is stopped in which of the following modes? [ ] ( a) Mode2 ( b ) Mode1 ( c ) Mode3 ( d ) Mode0 4. Which of the following is the correct order of priority in decreasing order from left to right? [ ] ( a) EX0,EX1,ET0,ET1,ES, ( b ) ES,EX1,ET0,E01,ET1 ( c ) ET0,EX0,ET1,EX1,ES ( d ) EX0,ET0,EX1,ET1,ES 5. One of these signals indicates that address is available on Port0? ( a) EA ( b ) RESET ( c ) ALE ( d ) PSEN [ ]
6. The 8051 micro controller does not have one of the following as its built in peripheral? [ ( a) Timers ( b ) Counters ( c ) UART ( d ) DMA controller 7. Which of these registers cannot be decremented? ( a) SP ( b ) B register ( c ) Accumulator A [ ( d ) DPTR
] ]
8. One of these registers is loaded with the upper byte of the terminal count? ( a) THx ( b ) TMOD ( c ) TLx ( d ) TCON 9. The bit which disables reception of serial data is which one of the following? ( a) RB8 ( b ) TB8 ( c ) RI ( d ) REN 10. The instruction which activates the PSEN signal is which one of the following? ( a) MOVC ( b ) MOV @ ( c ) MOV ( d ) MOV X
[ [ [
] ] ] ]
11. Which of these is Double Hand Shake [ ( a) STB followed by ACK ( b ) STB followed by ACK and removal of ACK ( c ) STB only ( d ) ACK followed by STB 12. The 8051 micro controller is? ( a) 8 bits ( b ) 32 bits [ ( c ) 16 bits ( d ) 24 bits [ ( d ) B register [ ( d ) IT1 [ [ [ [
] ] ]
13. Which of these registers cannot be decremented? ( a) SP ( b ) Accumulator A ( c ) DPTR 14. Which one of the following starts the timer? ( a) IE1 ( b ) TF ( c ) TR
15. The instruction used to access internal RAM is which one of the following? ( a) MOV @ ( b ) MOV ( c ) MOV X ( d ) MOVC 16. The 8051 micro controller built in timer is of how many bits? ( a) 16 (b)8 ( c ) 32 ( d ) 24 17. Which of these register of 8051 is 16 bit? ( a) DPTR ( b ) PSW ( c ) SP ( d ) A 18. One of these registers is loaded with the upper byte of the terminal count? ( a) TLx ( b ) TCON ( c ) THx ( d ) TMOD
] ] ] ]
19. Which of the following is the correct order of priority in decreasing order from left to right? [ ] ( a) ET0,EX0,ET1,EX1,ES ( b ) EX0,EX1,ET0,ET1,ES, ( c ) EX0,ET0,EX1,ET1,ES ( d ) ES,EX1,ET0,E01,ET1 20. Which of these signals is used for enabling the external ROM? ( a) ALE ( b ) RESET ( c ) EA ( d ) PSEN [ ]
Answers 1 c 2 d 3 c 4 d 5 c 6 d 7 a 8 a 9 d10 a 11 b 12 a 13 a 14 c 15 b 16 a 17 a 18 c 19 d 20 d
1.
____.
a) 000BH, a high to low transition on pin INT1 b) 001BH, a low to high transition on pin INT1 c) 0013H, a high to low transition on pin INT1 d) 0023H, a low to high transition on pin INT1 2. Serial port vector address is of _______. And causes an interrupt when ________. [ a) 0013H, either TI or RI flag is set b) 0023H, either TI or RI flag is reset c) 0013H, either TI or RI flag is reset d) 0023H, either TI or RI flag is set 3. In serial communication modes, mode 1 the Baud rate =
SMOD
a) BR=2 b) BR=2 c) BR=2 d) BR=2
/32 * (Timer 0 over flow rate)

SMOD
/16 * (Timer 1 over flow rate) /16 * (Timer 0 over flow rate) /32 * (Timer 1 over flow rate)
SMOD SMOD
4. In modes 2 and 3, if _____ bit of SCON bit is set will causes enable multiprocessor communication and is of ____ bit address. [ ] a) SM1, 9EH b) TB8 , 9CH c) SM2 , 9DH d) SM0, 9FH 5. Interfacing LCD with 89C51 _____ data lines are used along with the _____ signals. [ ] a) 6, RS, RW b) 5, RW, EN c) 8, RS, EN, RW d) 9, RS, EN, RW 6. Resolution of ADC is defined as
N N
a) 1/ (2N 1) b) 2 -1 c) 1/ (2 -1) d) 2N-1 7. In microcontroller and LCD interface which line will instruct the LCD that microcontroller is sending data? [ ] a) DB0 b) RW c) EN d) RS 8. Which bit of TMOD will exactly configure timer / counter as a timer or counter. [ i) TMOD.6 of C/T for timer 1 ii) TMOD.6 of C/T for timer 0 iii) TMOD.2 of C/T for timer 0 iv) TMOD.2 of C/T for timer 1 a) i, ii b) ii, iv c) i, iii d) iii, iv 9. Counter or timer operation is chosen in which of these registers?
( a) TLx ( b ) TCON 10. ( c ) THx ( d ) TMOD [ ] The upper 8 bits of address bus are generated on which of these ports? ( b ) Port3 ( c ) Port1 ( d ) Port0 [
( a) Port2

11.

]
The 8051 microcontroller wakes up at memory address ____ when it is powered up[ (a) 0000H (b) 002CH (c) 002A H (d) 003C H [
12.
When the 8051 is powered up the SP register contains the value___ (a) 4 (b) 5 (c) 6 (d) 7
13.
____ Produces OPCODE (a) ORG 2000H (b) MOV A,#12 (c) ORG 2090 H (d) ORG 5000H
14.
The Majority of registers in 8051 are ____ bits (a) 8 (b)16 (c) 20 (d) 24
15.
In 8051 the Program counter is ___ bits wide
(a)
(b)16
(c) 20
(d) 24
16.
In 8051 the stack pointer is ___ bits wide
(a)
(b)16
(c) 20
(d) 24
17. The external address bus width of 8051 microcontroller is

(a)
8 (b)16 (c) 20 (d) 24
18.The external data bus width of 8051 microcontroller is

(a) 8
(b)16 (c) 20 (d) 24
19.The port in microcontroller is generally is of ___ bits

(a) 8
(b)16 (c) 20 (d) 24
20.External signal is connected to ___ pin of 8051 microcontroller

(a) 12 (b) 13 (c) 14 (d) 15
Key: 1 c 2 d 3 d 4 c 5 c 6 c 7 c 8 c 9 d 10 a 11 a 12 d 13 b 14 a 15 b 16 a 17 b 18 a 19 a 20 d
ESSAY TYPE QUESTIONS
Assignment Questions
ESSAY TYPE QUESTIONS

1. (a) Explain various interrupts of 8085 Microprocessor and their functionality? (b) Explain the following i. SID ii. SOD iii. S0, S1, S2 iv. INTA pins of 8085 Microprocessor.
2. Explain the functions of different registers in 8086. Also discuss the flag register contents.
3. (a) Explain the flag register of 8086. (b) Explain the concept of memory segmentation. (c) Explain, when Queue is failing to speed up the execution.
4. (a) Draw the internal architecture of 8085? Explain about each block in it. (b) Explain the function of OPCODE prefetch FIFO Buffer in 8086?
5. (a) What are the contents of the data bus and the status of A0 and BHE when the following instructions are executed in 8086? i. CPU writes a byte 11 H at memory location 1000H : 0002 H. ii. CPU writes a word 2211 H at memory location 1000H : 0003 H. (b) Write the functions of the following pins of 8086. i. MN/ MX ii. DEN iii. ALE iv. Ready.
UNIT II: Instruction set and assembly language programming of 8086 1. (a) Write a program to move a block of memory with out over lapping. (b) Discuss the following instructions. i. ADC ii. AAS iii. IMUL iv. CBW. 2. (a) Write an assembly language program that will examine an ASCII string of 100 characters and replace each decimal digit by a %. The character string starts at STRG. (b) Explain the prefix instruction format of 8086 processor? Discuss how these instructions are useful in string manipulation? 3. How procedure CALL and RET take place in 8086. Explain conditional and unconditional CALL and RET instructions in 8086 instruction set. 4. (a) Explain in detail the coding template for ADD instruction of 8086.
(b) It is necessary to declare a program as a public procedure to be accessible by other programs? Give the sequence of assembly language statements? An external program called fact is to used in this program. Show the required statements? 5. Write a recursive routine to evaluate the following polynomial Y =
A0+A1X1+A2X2+A3X3+....+ANXN. The coefficients A0, A1, A2....AN are to be successive words in memory and all parameter addresses are to be passed via the stack 6. Write an algorithm and assembly program to sort the numbers in an array in descending order using bubble sort method. 7. (a) How does near RET instruction function ? (b) Write a near procedure that cubes the contents of the CX register. This procedure may not affect any register except CX. 8. (a) Explain the following instructions and their use? i. LODSB ii. CMPSW iii. XLAT.
(b) Give the instruction format of IN and OUT instructions and explain? 9. (a) Write a program to sort an array in descending order. (b) Give the instruction sequence that compares the first 20 bytes beginning at STRG 1with the first ten bytes beginning at STRG 2 and branches to MATCH if they are equal, otherwise continues in sequence?
Unit-III I/ O interface 1. Write the necessary instruction sequence to initialize 8255 with address 0200H to 0203H for the following combinations: (a) Port-A as input port in mode-1 and Port-B as input port in mode-1 with interrupt driven I/O. (b) Port-A in mode-2 and Port-B as input port in mode-1 with interrupt driven I/O. (c) Port-A as output port in mode-0 and Port-C upper half as input port in mode-0, and Port-B as output port in mode-1 with interrupt driven I/O. (d) Port-A as output port in mode-1 with active interrupt, Port-B as output port in mode-0 and PortC lower half as input port in mode-0. 2. (a) Interface the stepper motor with 8255 and write an ALP to rotate the stepper motor continuously in clockwise direction. (b) Write an assembly language program to rotate a 200 teeth, 4 phase stepper motor as specified below: Ten rotations clockwise and eight rotations anticlockwise. 3. (a) Draw the interfacing scheme of 8255 and 8086 in memory mapped I/O mode. (b) An 8255 is used with port-A input in mode-1, Port-B as output in mode-1 and Vignan Institute of Technology & Science III B.Tech 2nd Semester Page 34
with Port-C used for handshaking for Port-A and Port-B. Assume the address of Port-A is 80H. i. Determine the control word and write the instruction sequence to program the 8255 for this mode of operation. ii. Draw the scheme of connections required.

1.What is an interrupt? Explain, how the 8086 processor recognizes the interrupt? Draw the timing diagram, assuming that INTR is active. Explain interrupt acknowledge cycle with its associated timing diagram. 2. (a) With a neat sketch explain 8257 DMA controller and its operation? (b) With the help of basic cell explain SRAM and DRAM? 3. (a) What is the interrupt vector table? Draw and explain the interrupt vector table for 8086. (b) Describe the response of 8086 to the interrupt coming on INTR pin. 4. (a) List out the advantages of using 8259? (b) Describe the conditions that cause the 8086 to perform each of the following types of interrupts: Type-0, Type-1, Type-2 and Type-4. 5. Explain and Draw a block diagram to interface two 16K X 8 SRAM (62128) to the 16-bit data bus of 8086 based system. Design the address decoder for the address range from 00000H 07FFFFH for both the SRAMs. 6. (a) Discuss the sequence of operations performed in the interrupt acknowledge cycle. (b) What is the difference between RET and IRET? Discuss the result, if RET instruction is placed at the end of the interrupt service routine. (c) What is the vector address of type-50H interrupt?
Unit V:Communication Interface

1. (a) Draw and explain the null modem interfacing. (b) What is Memory mapped I/O? Draw the interfacing of 8251 with 8086 in memory mapped I/O mode. 2. (a) What is a Status word of 8251A? Explain how 8086 processor will read the status word from 8251. (b) Write the sequence of instructions required to initialize 8251 at address A0H and A1H for the configuration given below: i. Character length - 8 bits. v. DTR and RTS asserted ii. No parity iii. Stop bits - 1 iv. Baud rate - 16X
vi. Error flag reset.
3. (a) Explain the line driver and the line receiver circuits of serial communication. (b) What do you mean by I/O mapped I/O? Draw the interfacing of 8251 with 8086 in I/O mapped I/O mode. Vignan Institute of Technology & Science III B.Tech 2nd Semester Page 35
4. Design the hardware interface circuit for interfacing 8251 with 8086. Set the 8251 in asynchronous mode as a transmitter and receiver with even parity enabled, 2 stop bits, 8-bit character length, frequency 160 KHz and baud rate 10K: (a) Write an ALP to transmit 100 bytes of data string starting at location 2000:5000H. (b) Write an ALP to receive 100 bytes of data string and store it at 3000:4000H.
UNIT VI: Introduction to Microcontrollers

1. (a) How does 8051 differentiate between the external and internal program memory? (b) Explain the alternate functions of Port-0, Port-2 and Port-3. 2. (a) Discuss the advantages of microcontroller based system over microprocessor based systems. (b) Describe the following registers of 8051: i. A ii. B iii. SP iv. DPTR
3. (a) Explain various operation modes of Timer-1 and Timer-0. (b) Describe the Timer control (TCON) and Timer mode control (TMOD) registers. 4. Give the complete block schematic of an 8051 based system having following specifications: (a) 64 KB program memory (b) 64 KB data memory (c) Make use of 16 K x 8-bit memory chips and 74LS138 decoders. (d) Indicate clearly the address selected for the memory chips.

1. An array of random integers is placed from internal data memory location 31H onwards. The number of terms of (N) of array is available in the memory location 30H. Develop a program to place the entire array in reverse order in the same memory area 2. Write a program to convert an array of hexadecimal digits to their BCD equivalent. Assume all entries of input array are less than 64H 3. In a 8051 based system INT1 is connected with a hardware circuit which generates a two level signal a s an interrupt. The signal is active (remains low) for 10 micro seconds. The INT1 is to be used to read port 2 and to store it in data memory location from 30H onwards. Whenever this port input becomes 00H, INT1 should be disabled. Develop the initialization routine and also the ISR 4. Write a test program that will loop test the serial port. The output of the serial port (TXD) is connected to the input (RXD), and the test program is run. Success is indicated by port 1 pin 1 going high.
UNIT-VIII: The AVR RISC microcontroller Architecture

1. Explain the architecture of AVR RISC microcontroller 2. Explain the register organization of AVR RISC microcontroller 3. Explain the memory organization of AVR RISC microcontroller Vignan Institute of Technology & Science III B.Tech 2nd Semester Page 36
4. Explain the interrupt structure of AVR RISC microcontroller 5. Explain the I/ O ports and timers of AVR RISC microcontrollers 6. With an example explain EEPROM interfacing with AVR RISC microcontroller
ASSIGNMENT QUESTIONS
ASSIGNMENT QUESTIONS
1. 2. 3. 4. 5. 6. 7. 8. Explain the 8085 architecture Explain the 8086 architecture Describe 8086 register organisation Explain segmentation Explain pin diagram of 8086. Draw and explain minimum and maximum modes of 8086 Draw and explain timing diagrams of 8086 in minimum and maximum modes Explain the interrupts of 8086
UNIT II: Instruction set and assembly language programming of 8086 1. Explain the instruction set of 8086 2. 3. 4. 5. 6. Explain the addressing modes of 8086 Explain the assembler directives of 8086 Define and differentiate procedure and macros Write simple programs involving branching, call, and arithmetic operations Write simple programs involving sting manipulations
UNIT III: I/ O interface 1. 2. 3. 4. 5. 6. 7. 8. Explain the operation of 8255 PPI Explain various modes of operation of 8255 Interface 8255 with 8086 Interface Keyboard with 8086 using 8255 Interface Display with 8086 using 8255 Interface stepper motor with 8086 using 8255 Interface ADC with 8086 using 8255 Interface DAC with 8086 using 8255

1. 2. 3. Interface memory with 8086 Explain interrupt structure of 8086 Explain Interrupt Vector Table(IVT) III B.Tech 2nd Semester Page 39
Microprocessors and Microcontrollers 4. 5. 6. 7. Explain DOS and BIOS Interrupts Explain Interrupt Service Routines Explain the operation of 8259 Interrupt controller Explain the operation of 8257 DMA controller
Unit V:Communication Interface 1. Define Serial communication standards 2. Explain serial data transfer schemes 3. Explain USART architecture 4. Explain USART interfacing with 8086 5. Explain RS 232 6. Ex[lain IEEE-488
UNIT VI: Introduction to Microcontrollers 1. Explain the architecture of 8051 2. Describe the pin diagram of 8051 3. Describe the I/ O Ports of 8051 4. Explain the memory organization of 8051 5. Explain the addressing modes of 8051 6. Explain the instruction set of 8051 7. Write and execute simple programs UNIT- VII: 8051 Real Time control 1. Program the timers/ counters of 8051 2. Program the serial communication 3. Program external hardware interrupts 4. Program the serial communication interrupts UNIT-VIII: The AVR RISC microcontroller Architecture Vignan Institute of Technology & Science III B.Tech 2nd Semester Page 40
Microprocessors and Microcontrollers 1. Explain the architecture of AVR microcontroller 2. Explain the register file of AVR microcontroller 3. Explain the I/ O ports of AVR microcontroller 4. Explain the memory map of AVR microcontroller 5. Explain the timers of AVR microcontroller 6. Explain the UART of AVR microcontroller 7. Explain the interrupt structure of AVR microcontroller

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MICROPROCESSORS AND MICROCONTROLLERS

A. NARMADA ASSOC. PROFESSOR

ELECTRONICS AND COMMUNICATION ENGINEERING

VIGNAN INSTITUTE OF TECHNOLOGY AND SCIENCE

Sponsored by Lavu Educational Society

(Approved by AICTE and Affiliated to JNT University, Hyderabad)

Microprocessors and Microcontrollers

Microprocessors and Microcontrollers

Microprocessors and Microcontrollers

Microprocessors and Microcontrollers

STUDENT'S SEMINAR TOPICS

Microprocessors and microcontrollers

STUDENTS SEMINAR TOPICS

Assembler directives, Macros Simple programs

Microprocessors and Microcontrollers

Objective Type Questions

Evaluating arithmetic expressions

8255 PPI introduction

And interfacing to 8086

Stepper motor Interfacing

DAC and ADC Interfacing

Memory Interfacing to 8086

Interrupt structure of 8086

Interrupt Vector Table

DOS and BIOS Interrupts

8257 DMAC Interfacing Serial Communication standards

Vignan Institute of Technology & Science

Microprocessors and Microcontrollers

Objective Type Questions

I/ O memory EEPROM, I/ O Ports

Vignan Institute of Technology & Science

Microprocessors and Microcontrollers

Objective Type Questions

Microprocessors and Microcontrollers

Objective Type Questions

UNIT III: I/ O interface

UNIT IV: Interfacing with advanced devices

Vignan Institute of Technology & Science

III B.Tech 2nd Semester Page 15

Microprocessors and Microcontrollers

Objective Type Questions

Unit V:Communication Interface

UNIT VI: Introduction to Microcontrollers

UNIT- VII: 8051 Real Time control

UNIT-VIII: The AVR RISC microcontroller Architecture

Vignan Institute of Technology & Science

III B.Tech 2nd Semester Page 16

Microprocessors and Microcontrollers

Objective Type Questions

OBJECTIVE TYPE QUESTIONS

Microprocessors and Microcontrollers

Objective Type Questions

OBJECTIVE TYPE QUESTIONS

. The number of address spaces of 8085 is ( a) 4 ( b ) 8 ( c ) 2 ( d ) 1 2. One of these is an index register ( a) BP ( b ) SI ( c ) DX

3. Which of these is an 8 bit register ? ( a) DX ( b ) CX ( c ) BX

[ (d) 16 bits [ (d)AH, AL [

III B.Tech 2nd Semester Page 18

Objective Type Questions [ ]

18 One of the following is wrong combination of registers ( a) E S : DX (b ) DS :SP ( c ) D S : SS ( d ) C S : IP

UNIT II: Instruction set and assembly language programming of 8086

III B.Tech 2nd Semester Page 19

Objective Type Questions (d) Z=1,CY=1 [ ]