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Colour Television

Chassis

Q549.6E
LA

18570_000_090518.eps 090518

Contents
1. 2. 3. 4. 5. 6. 7. 8. 9.

Page

Contents

Page

Revision List 2 Technical Specifications and, Connections 2 Precautions, Notes, and Abbreviation List 6 Mechanical Instructions 10 Service Modes, Error Codes, and Fault Finding 15 Alignments 36 Circuit Descriptions 42 IC Data Sheets 53 Block Diagrams Wiring Diagram 42" - 47" (Elite Core N&T) 59 Block Diagram Video 60 Block Diagram Audio 61 Block Diagram Control & Clock Signals 62 Block Diagram I2C 63 Supply Lines Overview 64 10. Circuit Diagrams and PWB Layouts Drawing 6 LED Low-Pow: Microcontroller Block Liteon(AL1)65 6 LED Low-Pow: Microcontroller Block Liteon(AL2)66 6 LED Low-Pow: LED Liteon (AL3) 67 8 LED Low-Pow: Microcontroller Block Liteon(AL1)69 8 LED Low-Pow: Microcontroller Block Liteon(AL2)70 8 LED Low-Pow: LED Liteon (AL3) 71 8 LED Low-Pow: LED Drive Liteon (AL4) 72 SSB (B01A-B10) 74-122 SSB: SRP List Explanation 123 SSB: SRP List Part 1 124 SSB: SRP List Part 2 125 Temperature Sensor 128

PWB 68 68 68 73 73 73 73 126-127

129

Copyright 2009 Koninklijke Philips Electronics N.V. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, or otherwise without the prior permission of Philips.

Published by ER/EL 0965 BU TV Consumer Care, the Netherlands

Subject to modification

EN 3122 785 18570 2009-May-29

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1.

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Revision List

1. Revision List
Manual xxxx xxx xxxx.0 First release.

2. Technical Specifications and, Connections


Index of this chapter: 2.1 Technical Specifications 2.2 Directions for Use 2.3 Connections 2.4 Chassis Overview Notes: Figures can deviate due to the different set executions. Specifications are indicative (subject to change).

2.1

Technical Specifications
For on-line product support please use the links in Table 2-1. Here is product information available, as well as getting started, user manuals, frequently asked questions and software & drivers. Table 2-1 Described Model numbers CTN Styling Published in: 3122 785 18570 3122 785 18570 3122 785 18570 3122 785 18570

42PFL9664H/12 Elite Core Narrow & 42PFL9664H/60 Thin 47PFL9664H/12 47PFL9664H/60

2.2

Directions for Use


You can download this information from the following websites: http://www.philips.com/support http://www.p4c.philips.com

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Technical Specifications and, Connections 2.3 Connections

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EN 3

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Figure 2-1 Connection overview Note: The following connector colour abbreviations are used (acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= Grey, Rd= Red, Wh= White, Ye= Yellow. 2.3.1 Side Connections Common Interface 68p - See diagram B07A SSB: CI: PCMCIA Connector USB2.0

10000_022_090121.eps 090121

Figure 2-2 USB (type A) jk 1 2 3 4 - +5V - Data (-) - Data (+) - Ground k jk jk H

Gnd

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Technical Specifications and, Connections


Cinch: Audio - In (VGA/DVI) Rd - Audio R 0.5 VRMS / 10 kohm Wh - Audio L 0.5 VRMS / 10 kohm ot Cinch: S/PDIF - Out Bk - Coaxial jq jq

HDMI 5: Digital Video, Digital Audio - In (see HDMI 1, 2, 3 & 4 - Rear Connections) Head phone (Output) Bk - Head phone 32 - 600 ohm / 10 mW Cinch: Video CVBS - In, Audio - In Rd - Audio R 0.5 VRMS / 10 kohm Wh - Audio L 0.5 VRMS / 10 kohm Ye - Video CVBS 1 VPP / 75 ohm S-Video (Hosiden): Video Y/C - In 1 - Ground Y Gnd 2 - Ground C Gnd 3 - Video Y 1 VPP / 75 ohm 4 - Video C 0.3 VPP / 75 ohm 2.3.2 Rear Connections HDMI 1, 2, 3 & 4: Digital Video, Digital Audio - In
19 18 1 2
E_06532_017.eps 250505

0.4 - 0.6VPP / 75 ohm

kq

jq jq jq

Service Connector (UART) 1 - Ground Gnd 2 - UART_TX Transmit 3 - UART_RX Receive Cinch: Audio - Out Rd - Audio - R Wh - Audio - L

H k j

H H j j

0.5 VRMS / 10 kohm 0.5 VRMS / 10 kohm

kq kq

EXT3: Cinch: Video YPbPr - In, Audio - In Gn - Video Y 1 VPP / 75 ohm Bu - Video Pb 0.7 VPP / 75 ohm Rd - Video Pr 0.7 VPP / 75 ohm Rd - Audio - R 0.5 VRMS / 10 kohm Wh - Audio - L 0.5 VRMS / 10 kohm VGA: Video RGB - In
1 6 11 5 10 15

jq jq jq jq jq

Figure 2-3 HDMI (type A) connector 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 - D2+ - Shield - D2- D1+ - Shield - D1- D0+ - Shield - D0- CLK+ - Shield - CLK- Easylink/CEC - n.c. - DDC_SCL - DDC_SDA - Ground - +5V - HPD - Ground Data channel Gnd Data channel Data channel Gnd Data channel Data channel Gnd Data channel Data channel Gnd Data channel Control channel DDC clock DDC data Gnd Hot Plug Detect Gnd j H j j H j j H j j H j jk j jk H j j H

10000_002_090121.eps 090127

Figure 2-5 VGA Connector 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 - Video Red - Video Green - Video Blue - n.c. - Ground - Ground Red - Ground Green - Ground Blue - +5VDC - Ground Sync - n.c. - DDC_SDA - H-sync - V-sync - DDC_SCL 0.7 VPP / 75 ohm 0.7 VPP / 75 ohm 0.7 VPP / 75 ohm Gnd Gnd Gnd Gnd +5 V Gnd DDC data 0-5V 0-5V DDC clock j j j H H H H j H j j j j

RJ45: Ethernet (if present)


12345678

EXT1 & 2: Video RGB - In, CVBS - In/Out, Audio - In/Out


20 2

21 E_06532_025.eps 210905

10000_001_090121.eps 090121

Figure 2-6 SCART connector 1 2 3 4 5 6 7 8 - Audio R - Audio R - Audio L - Ground Audio - Ground Blue - Audio L - Video Blue - Function Select 0.5 VRMS / 1 kohm 0.5 VRMS / 10 kohm 0.5 VRMS / 1 kohm Gnd Gnd 0.5 VRMS / 10 kohm 0.7 VPP / 75 ohm 0 - 2 V: INT 4.5 - 7 V: EXT 16:9 9.5 - 12 V: EXT 4:3 Gnd 0.7 VPP / 75 ohm Gnd Gnd k j k H H j jk j H j H H

Figure 2-4 Ethernet connector 1 2 3 4 5 6 7 8 - TD+ - TD- RD+ - CT - CT - RD- GND - GND Transmit signal Transmit signal Receive signal Centre Tap: DC level fixation Centre Tap: DC level fixation Receive signal Gnd Gnd k k j j H H

9 10 11 12 13 14
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- Ground Green - n.c. - Video Green - n.c. - Ground Red - Ground P50

Technical Specifications and, Connections


15 - Video Red 16 - Status/FBL 17 - Ground Video 18 - Ground FBL 19 - Video CVBS/Y 0.7 VPP / 75 ohm 0 - 0.4 V: INT 1 - 3 V: EXT / 75 ohm Gnd Gnd 1 VPP / 75 ohm j j H H k

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j H

20 - Video CVBS 21 - Shield Aerial - In - - IEC-type (EU)

Coax, 75 ohm

2.4

Chassis Overview
Refer to chapter Block Diagrams for PWB/CBA locations.

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Precautions, Notes, and Abbreviation List

3. Precautions, Notes, and Abbreviation List


Index of this chapter: 3.1 Safety Instructions 3.2 Warnings 3.3 Notes 3.4 Abbreviation List picture carrier at 475.25 MHz for PAL, or 61.25 MHz for NTSC (channel 3). Where necessary, measure the waveforms and voltages with (D) and without (E) aerial signal. Measure the voltages in the power supply section both in normal operation (G) and in stand-by (F). These values are indicated by means of the appropriate symbols.

3.1

Safety Instructions
Safety regulations require the following during a repair: Connect the set to the Mains/AC Power via an isolation transformer (> 800 VA). Replace safety components, indicated by the symbol h, only by components identical to the original ones. Any other component substitution (other than original type) may increase risk of fire or electrical shock hazard. Of de set ontploft! Safety regulations require that after a repair, the set must be returned in its original condition. Pay in particular attention to the following points: Route the wire trees correctly and fix them with the mounted cable clamps. Check the insulation of the Mains/AC Power lead for external damage. Check the strain relief of the Mains/AC Power cord for proper function. Check the electrical DC resistance between the Mains/AC Power plug and the secondary side (only for sets that have a Mains/AC Power isolated power supply): 1. Unplug the Mains/AC Power cord and connect a wire between the two pins of the Mains/AC Power plug. 2. Set the Mains/AC Power switch to the on position (keep the Mains/AC Power cord unplugged!). 3. Measure the resistance value between the pins of the Mains/AC Power plug and the metal shielding of the tuner or the aerial connection on the set. The reading should be between 4.5 M and 12 M. 4. Switch off the set, and remove the wire between the two pins of the Mains/AC Power plug. Check the cabinet for defects, to prevent touching of any inner parts by the customer. 3.3.2

Schematic Notes All resistor values are in ohms, and the value multiplier is often used to indicate the decimal point location (e.g. 2K2 indicates 2.2 k). Resistor values with no multiplier may be indicated with either an E or an R (e.g. 220E or 220R indicates 220 ). All capacitor values are given in micro-farads ( = 10-6), nano-farads (n = 10-9), or pico-farads (p = 10-12). Capacitor values may also use the value multiplier as the decimal point indication (e.g. 2p2 indicates 2.2 pF). An asterisk (*) indicates component usage varies. Refer to the diversity tables for the correct values. The correct component values are listed on the Philips Spare Parts Web Portal.

3.3.3

Spare Parts For the latest spare part overview, consult your Philips Spare Part web portal.

3.3.4

BGA (Ball Grid Array) ICs Introduction For more information on how to handle BGA devices, visit this URL: http://www.atyourservice-magazine.com. Select Magazine, then go to Repair downloads. Here you will find Information on how to deal with BGA-ICs. BGA Temperature Profiles For BGA-ICs, you must use the correct temperature-profile. Where applicable and available, this profile is added to the IC Data Sheet information section in this manual.

3.2

Warnings
All ICs and many other semiconductors are susceptible to electrostatic discharges (ESD w). Careless handling during repair can reduce life drastically. Make sure that, during repair, you are connected with the same potential as the mass of the set by a wristband with resistance. Keep components and tools also at this same potential. Be careful during measurements in the high voltage section. Never replace modules or other components while the unit is switched on. When you align the set, use plastic rather than metal tools. This will prevent any short circuits and the danger of a circuit becoming unstable.

3.3.5

Lead-free Soldering Due to lead-free technology some rules have to be respected by the workshop during a repair: Use only lead-free soldering tin. If lead-free solder paste is required, please contact the manufacturer of your soldering equipment. In general, use of solder paste within workshops should be avoided because paste is not easy to store and to handle. Use only adequate solder tools applicable for lead-free soldering tin. The solder tool must be able: To reach a solder-tip temperature of at least 400C. To stabilize the adjusted temperature at the solder-tip. To exchange solder-tips for different applications. Adjust your solder tool so that a temperature of around 360C - 380C is reached and stabilized at the solder joint. Heating time of the solder-joint should not exceed ~ 4 sec. Avoid temperatures above 400C, otherwise wear-out of tips will increase drastically and flux-fluid will be destroyed. To avoid wear-out of tips, switch off unused equipment or reduce heat. Mix of lead-free soldering tin/parts with leaded soldering tin/parts is possible but PHILIPS recommends strongly to avoid mixed regimes. If this cannot be avoided, carefully clear the solder-joint from old tin and re-solder with new tin.

3.3
3.3.1

Notes
General Measure the voltages and waveforms with regard to the chassis (= tuner) ground (H), or hot ground (I), depending on the tested area of circuitry. The voltages and waveforms shown in the diagrams are indicative. Measure them in the Service Default Mode with a colour bar signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and

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Precautions, Notes, and Abbreviation List


3.3.6 Alternative BOM identification It should be noted that on the European Service website, Alternative BOM is referred to as Design variant. The third digit in the serial number (example: AG2B0335000001) indicates the number of the alternative B.O.M. (Bill Of Materials) that has been used for producing the specific TV set. In general, it is possible that the same TV model on the market is produced with e.g. two different types of displays, coming from two different suppliers. This will then result in sets which have the same CTN (Commercial Type Number; e.g. 28PW9515/12) but which have a different B.O.M. number. By looking at the third digit of the serial number, one can identify which B.O.M. is used for the TV set he is working with. If the third digit of the serial number contains the number 1 (example: AG1B033500001), then the TV set has been manufactured according to B.O.M. number 1. If the third digit is a 2 (example: AG2B0335000001), then the set has been produced according to B.O.M. no. 2. This is important for ordering the correct spare parts! For the third digit, the numbers 1...9 and the characters A...Z can be used, so in total: 9 plus 26= 35 different B.O.M.s can be indicated by the third digit of the serial number. Identification: The bottom line of a type plate gives a 14-digit serial number. Digits 1 and 2 refer to the production centre (e.g. AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers to the Service version change code, digits 5 and 6 refer to the production year, and digits 7 and 8 refer to production week (in example below it is 2006 week 17). The 6 last digits contain the serial number.
MODEL : 32PF9968/10
MADE IN BELGIUM 220-240V ~ 50/60Hz 128W VHF+S+H+UHF

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3.4

Abbreviation List
0/6/12 SCART switch control signal on A/V board. 0 = loop through (AUX to TV), 6 = play 16 : 9 format, 12 = play 4 : 3 format Automatic Aspect Ratio Adaptation: algorithm that adapts aspect ratio to remove horizontal black bars; keeps the original aspect ratio Automatic Channel Installation: algorithm that installs TV channels directly from a cable network by means of a predefined TXT page Analogue to Digital Converter Automatic Frequency Control: control signal used to tune to the correct frequency Automatic Gain Control: algorithm that controls the video input of the feature box Amplitude Modulation Asia Pacific Aspect Ratio: 4 by 3 or 16 by 9 Auto Screen Fit: algorithm that adapts aspect ratio to remove horizontal black bars without discarding video information Advanced Television Systems Committee, the digital TV standard in the USA See Auto TV A hardware and software control system that measures picture content, and adapts image parameters in a dynamic way External Audio Video Audio Video Controller Audio Video Input Processor Monochrome TV system. Sound carrier distance is 5.5 MHz Board-Level Repair Broadcast Television Standard Committee. Multiplex FM stereo sound system, originating from the USA and used e.g. in LATAM and AP-NTSC countries Blue TeleteXT Centre channel (audio) Consumer Electronics Control bus: remote control bus on HDMI connections Constant Level: audio output to connect with an external amplifier Component Level Repair Computer aided rePair Connected Planet / Copy Protection Customer Service Mode Color Transient Improvement: manipulates steepness of chroma transients Composite Video Blanking and Synchronization Digital to Analogue Converter Dynamic Bass Enhancement: extra low frequency amplification See E-DDC Monochrome TV system. Sound carrier distance is 6.5 MHz Dynamic Frame Insertion Directions For Use: owner's manual Digital Media Reader: card reader Digital Multi Standard Decoding Digital Natural Motion
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AARA

ACI

ADC AFC

AGC

AM AP AR ASF

ATSC

ATV Auto TV

PROD.NO: AG 1A0617 000001

S
Figure 3-1 Serial number (example) 3.3.7

BJ3.0E LA
10000_024_090121.eps 090121

AV AVC AVIP B/G BLR BTSC

Board Level Repair (BLR) or Component Level Repair (CLR) If a board is defective, consult your repair procedure to decide if the board has to be exchanged or if it should be repaired on component level. If your repair procedure says the board should be exchanged completely, do not solder on the defective board. Otherwise, it cannot be returned to the O.E.M. supplier for back charging! B-TXT C CEC

CL CLR ComPair CP CSM CTI

3.3.8

Practical Service Precautions It makes sense to avoid exposure to electrical shock. While some sources are expected to have a possible dangerous impact, others of quite high potential are of limited current and are sometimes held in less regard. Always respect voltages. While some may not be dangerous in themselves, they can cause unexpected reactions that are best avoided. Before reaching into a powered TV set, it is best to test the high voltage insulation. It is easy to do, and is a good service precaution.

CVBS DAC DBE DDC D/K DFI DFU DMR DMSD DNM

EN 8
DNR DRAM DRM DSP DST

3.

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Precautions, Notes, and Abbreviation List


uses 8 bit or 10 bit data words, and has a maximum data rate of 270 Mbit/s, with a minimum bandwidth of 135 MHz. Institutional TeleVision; TV sets for hotels, hospitals etc. Last Status; The settings last chosen by the customer and read and stored in RAM or in the NVM. They are called at start-up of the set to configure it according to the customer's preferences Latin America Liquid Crystal Display Light Emitting Diode Monochrome TV system. Sound carrier distance is 6.5 MHz. L' is Band I, L is all bands except for Band I LG.Philips LCD (supplier) Loudspeaker Low Voltage Differential Signalling Mega bits per second Monochrome TV system. Sound carrier distance is 4.5 MHz Microprocessor without Interlocked Pipeline-Stages; A RISC-based microprocessor Matrix Output Processor Metal Oxide Silicon Field Effect Transistor, switching device Motion Pictures Experts Group Multi Platform InterFace MUTE Line Not Connected Near Instantaneous Compounded Audio Multiplexing. This is a digital sound system, mainly used in Europe. Negative Temperature Coefficient, non-linear resistor National Television Standard Committee. Color system mainly used in North America and Japan. Color carrier NTSC M/N= 3.579545 MHz, NTSC 4.43= 4.433619 MHz (this is a VCR norm, it is not transmitted off-air) Non-Volatile Memory: IC containing TV related data such as alignments Open Circuit On Screen Display On screen display Teletext and Control; also called Artistic (SAA5800) Project 50: communication protocol between TV and peripherals Phase Alternating Line. Color system mainly used in West Europe (color carrier= 4.433619 MHz) and South America (color carrier PAL M= 3.575612 MHz and PAL N= 3.582056 MHz) Printed Circuit Board (same as PWB) Pulse Code Modulation Plasma Display Panel Power Factor Corrector (or Preconditioner) Picture In Picture Phase Locked Loop. Used for e.g. FST tuning systems. The customer can give directly the desired frequency Point Of Deployment: a removable CAM module, implementing the CA system for a host (e.g. a TV-set) Power On Reset, signal to reset the uP Positive Temperature Coefficient, non-linear resistor Printed Wiring Board (same as PCB)

DTCP

DVB-C DVB-T DVD DVI(-d) E-DDC

EDID EEPROM EMI EPLD EU EXT FDS FDW FLASH FM FPGA FTV Gb/s G-TXT H HD HDD HDCP

HDMI HP I I2 C I2 D I2 S IF IR IRQ ITU-656

Digital Noise Reduction: noise reduction feature of the set Dynamic RAM Digital Rights Management Digital Signal Processing Dealer Service Tool: special remote control designed for service technicians Digital Transmission Content Protection; A protocol for protecting digital audio/video content that is traversing a high speed serial bus, such as IEEE-1394 Digital Video Broadcast - Cable Digital Video Broadcast - Terrestrial Digital Versatile Disc Digital Visual Interface (d= digital only) Enhanced Display Data Channel (VESA standard for communication channel and display). Using E-DDC, the video source can read the EDID information form the display. Extended Display Identification Data (VESA standard) Electrically Erasable and Programmable Read Only Memory Electro Magnetic Interference Erasable Programmable Logic Device Europe EXTernal (source), entering the set by SCART or by cinches (jacks) Full Dual Screen (same as FDW) Full Dual Window (same as FDS) FLASH memory Field Memory or Frequency Modulation Field-Programmable Gate Array Flat TeleVision Giga bits per second Green TeleteXT H_sync to the module High Definition Hard Disk Drive High-bandwidth Digital Content Protection: A key encoded into the HDMI/DVI signal that prevents video data piracy. If a source is HDCP coded and connected via HDMI/DVI without the proper HDCP decoding, the picture is put into a snow vision mode or changed to a low resolution. For normal content distribution the source and the display device must be enabled for HDCP software key decoding. High Definition Multimedia Interface HeadPhone Monochrome TV system. Sound carrier distance is 6.0 MHz Inter IC bus Inter IC Data bus Inter IC Sound bus Intermediate Frequency Infra Red Interrupt Request The ITU Radio communication Sector (ITU-R) is a standards body subcommittee of the International Telecommunication Union relating to radio communication. ITU-656 (a.k.a. SDI), is a digitized video format used for broadcast grade video. Uncompressed digital component or digital composite signals can be used. The SDI signal is self-synchronizing,

ITV LS

LATAM LCD LED L/L'

LPL LS LVDS Mbps M/N MIPS

MOP MOSFET MPEG MPIF MUTE NC NICAM

NTC NTSC

NVM O/C OSD OTC P50 PAL

PCB PCM PDP PFC PIP PLL

POD

POR PTC PWB

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Precautions, Notes, and Abbreviation List


PWM QRC QTNR QVCP RAM RGB Pulse Width Modulation Quasi Resonant Converter Quality Temporal Noise Reduction Quality Video Composition Processor Random Access Memory Red, Green, and Blue. The primary color signals for TV. By mixing levels of R, G, and B, all colors (Y/C) are reproduced. Remote Control Signal protocol from the remote control receiver RESET signal Read Only Memory Reduced Swing Differential Signalling data interface Red TeleteXT Service Alignment Mode Short Circuit Syndicat des Constructeurs d'Appareils Radiorcepteurs et Tlviseurs Serial Clock I2C CLock Signal on Fast I2C bus Standard Definition Serial Data I2C DAta Signal on Fast I2C bus Serial Digital Interface, see ITU-656 Synchronous DRAM SEequence Couleur Avec Mmoire. Color system mainly used in France and East Europe. Color carriers= 4.406250 MHz and 4.250000 MHz Sound Intermediate Frequency Switched Mode Power Supply System on Chip Sync On Green Self Oscillating Power Supply Serial Peripheral Interface bus; a 4wire synchronous serial data link standard Sony Philips Digital InterFace Static RAM Service Reference Protocol Small Signal Board STand-BY 800 600 (4:3) Super Video Home System Software Spatial temporal Weighted Averaging Noise reduction 1280 1024 Thin Film Transistor Total Harmonic Distortion Transmission Minimized Differential Signalling TeleteXT Dual Window with TeleteXT User Interface Microprocessor 1600 1200 (4:3) V-sync to the module Video Electronics Standards Association 640 480 (4:3) Variable Level out: processed audio output toward external amplifier Vestigial Side Band; modulation method What You See Is What You Record: record selection that follows main picture and sound 1280 768 (15:9) Quartz crystal 1024 768 (4:3) Y Y/C YPbPr

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YUV

Luminance signal Luminance (Y) and Chrominance (C) signal Component video. Luminance and scaled color difference signals (B-Y and R-Y) Component video

RC RC5 / RC6 RESET ROM RSDS R-TXT SAM S/C SCART

SCL SCL-F SD SDA SDA-F SDI SDRAM SECAM

SIF SMPS SoC SOG SOPS SPI

S/PDIF SRAM SRP SSB STBY SVGA SVHS SW SWAN SXGA TFT THD TMDS TXT TXT-DW UI uP UXGA V VESA VGA VL VSB WYSIWYR

WXGA XTAL XGA

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Mechanical Instructions

4. Mechanical Instructions
Index of this chapter: 4.1 Cable Dressing 4.2 Service Positions 4.3 Assy/Panel Removal 4.4 Set Re-assembly Notes: Figures below can deviate slightly from the actual situation, due to the different set executions.

4.1

Cable Dressing

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Figure 4-1 Cable dressing 42"

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Mechanical Instructions

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Figure 4-2 Cable dressing 47

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Mechanical Instructions
4.3.3 Ambi Light Each Ambi Light unit is mounted on a subframe. Refer to Figure 4-4 for details.

Service Positions
For easy servicing of this set, there are a few possibilities created: The buffers from the packaging. Foam bars (created for Service).

4.2.1

Foam Bars
2

Required for sets 42"

E_06532_018.eps 171106

Figure 4-3 Foam bars The foam bars (order code 3122 785 90580 for two pieces) can be used for all types and sizes of Flat TVs. See Figure 4-3 for details. Sets with a display of 42" and larger, require four foam bars [1]. Ensure that the foam bars are always supporting the cabinet and never only the display. Caution: Failure to follow these guidelines can seriously damage the display! By laying the TV face down on the (ESD protective) foam bars, a stable situation is created to perform measurements and alignments. By placing a mirror under the TV, you can monitor the screen.

18570_202_090526.eps 090526

Figure 4-4 Ambi Light unit 1. Unplug the connector(s) [1]. 2. Remove the screws [2]. 3. The PWB can now be taken from the subframe. When defective, replace the whole unit. Note: the screws that secure the AmbiLight units are longer than the other screws. 4.3.4 Main Power Supply PSU 42/47N&T DELTA DPS-288CP A & Power Supply IPB 42 DELTA 2K9 N&T 1. Unplug all connectors. 2. Remove the fixation screws. 3. Take the board out. When defective, replace the whole unit. 4.3.5 Piezo Touch Control Panel The flexfoil between Piezo Flexfoil Assy (mounted on the plastic rim of the set), and the PWB as described below, is extremely vulnerable. Do not pull hard at the PWB or flexfoil. Once the flexfoil has been damaged, the entire plastic rim of the set (with the touch-control pads) has to be swapped! The Piezo Touch Control Panel PWB contains ESD sensitive components, implying that necessary industrial ESD precautions must be taken during removing or remounting. Refer to Figure 4-5 and Figure 4-6 for details.

4.3
4.3.1

Assy/Panel Removal
Rear Cover Warning: Disconnect the mains power cord before you remove the rear cover. Note: it is not necessary to remove the stand while removing the rear cover. Removing the Piezo Touch Control Panel PWB requires special attention. Refer to Piezo Touch Control Panel for details. 1. Remove all screws of the rear cover. 2. Lift the rear cover from the TV. Make sure that wires and flat coils are not damaged while lifting the rear cover from the set.

4.3.2

Speakers Each speaker unit is mounted with two screws. When defective, replace the whole unit.

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Mechanical Instructions
4.3.7

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Small Signal Board (SSB) Caution: It is mandatory to remount screws at their original position during re-assembly. Failure to do so may result in damaging the SSB. 1. Remove the Wi-Fi module that is mounted on the SSB. 2. Unplug all connectors. 3. Remove the screws that secure the board. 4. The SSB can now be taken out of the set.

4.3.8

IR & LED Board Refer to Figure 4-7 and Figure 4-8 for details.

7 2

4 6

3 7 6 7

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Figure 4-5 Piezo Touch Control Panel -11. Pull the clamp using a screwdriver [1] until you can slide the PWB to the right. Unplug the connector that leads to the SSB. 2. Now gently pull the top side of the PWB out of the cabinet without damaging the flexfoil until you can unplug the flexfoil connector.
8

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Figure 4-7 IR & LED Board / LCD Panel -1-

3 2
8 9 9 8 8 8 8 8 8 8

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Figure 4-8 IR & LED Board / LCD Panel -21. 2. 3. 4. Remove both (Main) Supply Panels as earlier described. Remove the Piezo Control Panel as earlier described. Remove the WIFI antennas as earlier described. Unplug the backlight connectors from the LCD panel [1] and remove the cables from the subframes. 5. Unplug the main AmbiLight connector from the left AmbiLight unit [2]. 6. Unplug the USB connector on the SSB to the external USB connector [3]. 7. Remove the Piezo Control Cable from behind the subframe of the AmbiLight unit [4]. 8. Unplug the connector to the IR/LED Panel on the SSB [5] and release the cable from its clamps. 9. Remove the stand [6]. 10. Remove the main subframe (with the SSB mounted on it) [7]. When defective, replace the whole unit.

18570_204_090526.eps 090526

Figure 4-6 Piezo Touch Control Panel -21. To unplug the flexfoil connector, first the outer part of the connector has to be moved upwards [2], before this part can be turned sidewards [3] as shown in the picture. Now the flexfoil can be removed from the connector and the PWB can be taken out of the set. When defective, replace the whole unit. 4.3.6 Wi-Fi antenna Lift the clip on top of the board, after which you can remove the board. When defective, replace the hole unit.

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4.3.9

4.

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Mechanical Instructions

LCD Panel Refer to Figure 4-7 and Figure 4-8 for details. 1. Follow steps described in section 4.3.8 IR & LED Board 2. Remove the screws that secure the rim [8]. 3. Remove both AmbiLight units. 4. Remove both AmbiLight subframes [9]. 5. Remove the outer rim (with the touchable controls) by lifting the bottom part and moving the entire rim upwards. 6. Before sending in the LCD Panel, remove all remaining subframes!

4.4

Set Re-assembly
To re-assemble the whole set, execute all processes in reverse order. Notes: While re-assembling, make sure that all cables are placed and connected in their original position. Pay special attention not to damage the EMC foams in the set. Ensure that EMC foams are mounted correctly.

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5. Service Modes, Error Codes, and Fault Finding


Index of this chapter: 5.1 Test Points 5.2 Service Modes 5.3 Stepwise Start-up 5.4 Service Tools 5.5 Error Codes 5.6 The Blinking LED Procedure 5.7 Protections 5.8 Fault Finding and Repair Tips 5.9 Software Upgrading All service-unfriendly modes (if present) are disabled, like: (Sleep) timer. Child/parental lock. Picture mute (blue mute or black mute). Automatic volume levelling (AVL). Skip/blank of non-favourite pre-sets.

How to Activate SDM For this chassis there are two kinds of SDM: an analog SDM and a digital SDM. Tuning will happen according Table 5-1. Analog SDM: use the standard RC-transmitter and key in the code 062596, directly followed by the MENU (or HOME) button. Note: It is possible that, together with the SDM, the main menu will appear. To switch it off, push the MENU(or HOME) button again. Digital SDM: use the standard RC-transmitter and key in the code 062593, directly followed by the MENU (or HOME) button. Note: It is possible that, together with the SDM, the main menu will appear. To switch it off, push the MENU (or HOME) button again. Analog SDM can also be activated by grounding for a moment the solder pad on the SSB, with the indication SDM (see Service mode pad).

5.1

Test Points
As most signals are digital, it will be difficult to measure waveforms with a standard oscilloscope. However, several key ICs are capable of generating test patterns, which can be controlled via ComPair. In this way it is possible to determine which part is defective. Perform measurements under the following conditions: Service Default Mode. Video: Colour bar signal. Audio: 3 kHz left, 1 kHz right.

5.2

Service Modes
Service Default mode (SDM) and Service Alignment Mode (SAM) offers several features for the service technician, while the Customer Service Mode (CSM) is used for communication between the call centre and the customer. This chassis also offers the option of using ComPair, a hardware interface between a computer and the TV chassis. It offers the abilities of structured troubleshooting, error code reading, and software version read-out for all chassis. (see also section 5.4.1 ComPair).

SDM

Note: For the new model range, a new remote control (RC) is used with some renamed buttons. This has an impact on the activation of the Service modes. For instance the old MENU button is now called HOME (or is indicated by a house icon). 5.2.1 Service Default Mode (SDM) Purpose To create a pre-defined setting, to get the same measurement results as given in this manual. To override SW protections detected by stand-by processor and make the TV start up to the step just before protection (a sort of automatic stepwise start-up). See section 5.3 Stepwise Start-up. To start the blinking LED procedure where only LAYER 2 errors are displayed. (see also section 5.5 Error Codes). Specifications Table 5-1 SDM default settings Default system PAL B/G 5.2.2
18310_219_090318.eps 090319

Figure 5-1 Service mode pad After activating this mode, SDM will appear in the upper right corner of the screen (when a picture is available). How to Navigate When the MENU (or HOME) button is pressed on the RC transmitter, the TV set will toggle between the SDM and the normal user menu. How to Exit SDM Use one of the following methods: Switch the set to STAND-BY via the RC-transmitter. Via a standard customer RC-transmitter: key in 00sequence. Service Alignment Mode (SAM) Purpose To perform (software) alignments. To change option settings. To easily identify the used software version.
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Region Europe, AP(PAL/Multi) Europe, AP DVB-T

Freq. (MHz) 475.25

546.00 PID DVB-T Video: 0B 06 PID PCR: 0B 06 PID Audio: 0B 07

All picture settings at 50% (brightness, colour, contrast). All sound settings at 50%, except volume at 25%.

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TV will go to the Stand-by mode. If the NVM was corrupted or empty before this action, it will be initialized first (loaded with default values). This initializing can take up to 20 seconds.

To view operation hours. To display (or clear) the error code buffer.

How to Activate SAM Via a standard RC transmitter: Key in the code 062596 directly followed by the INFO button. After activating SAM with this method a service warning will appear on the screen, continue by pressing the OK button on the RC. Contents of SAM (see also Table 6-4) Hardware Info. A. SW Version. Displays the software version of the main software (example: Q5492-1.2.3.4 = AAAAB_X.Y.W.Z). AAAA= the chassis name. B= the SW branch version. This is a sequential number (this is no longer the region indication, as the software is now multi-region). X.Y.W.Z= the software version, where X is the main version number (different numbers are not compatible with one another) and Y.W.Z is the sub version number (a higher number is always compatible with a lower number). B. STBY PROC Version. Displays the software version of the stand-by processor. C. Production Code. Displays the production code of the TV, this is the serial number as printed on the back of the TV set. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee in a possibility to do this. Operation Hours. Displays the accumulated total of operation hours (not the stand-by hours). Every time the TV is switched on/off, 0.5 hours is added to this number. Errors (followed by maximum 10 errors). The most recent error is displayed at the upper left (for an error explanation see section 5.5 Error Codes). Reset Error Buffer. When cursor right (or the OK button) is pressed and then the OK button is pressed, the error buffer is reset. Alignments. This will activate the ALIGNMENTS submenu. See Chapter 6. Alignments. Dealer Options. Extra features for the dealers. Options. Extra features for Service. For more info regarding option codes, 6. Alignments. Note that if the option code numbers are changed, these have to be confirmed with pressing the OK button before the options are stored. Otherwise changes will be lost. Initialize NVM. The moment the processor recognizes a corrupted NVM, the initialize NVM line will be highlighted. Now, two things can be done (dependent of the service instructions at that moment): Save the content of the NVM via ComPair for development analysis, before initializing. This will give the Service department an extra possibility for diagnosis (e.g. when Development asks for this). Initialize the NVM. Note: When the NVM is corrupted, or replaced, there is a high possibility that no picture appears because the display code is not correct. So, before initializing the NVM via the SAM, a picture is necessary and therefore the correct display option has to be entered. Refer to Chapter 6. Alignments for details. To adapt this option, its advised to use ComPair (the correct HEX values for the options can be found in Chapter 6. Alignments) or a method via a standard RC (described below). Changing the display option via a standard RC: Key in the code 062598 directly followed by the MENU (or HOME) button and XXX (where XXX is the 3 digit decimal display code as mentioned in Table 6-3). Make sure to key in all three digits, also the leading zeros. If the above action is successful, the front LED will go out as an indication that the RC sequence was correct. After the display option is changed in the NVM, the
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Display Option Code

39mm

PHILIPS
27mm

040

MODEL: 32PF9968/10
PROD.SERIAL NO: AG 1A0620 000001

(CTN Sticker)

E_06532_038.eps 240108

Figure 5-2 Location of Display Option Code sticker Store - go right. All options and alignments are stored when pressing cursor right (or the OK button) and then the OK-button. SW Maintenance. SW Events. Not useful for Service purposes. In case of specific software problems, the development department can ask for this info. HW Events. Not useful for Service purposes. In case of specific software problems, the development department can ask for this info. Operation hours display. Displays the accumulated total of display operation hours. So, this one keeps up the lifetime of the display itself, mainly to compensate the degeneration behaviour. Test settings. For development purposes only. Development file versions. Not useful for Service purposes, this information is only used by the development department. Upload to USB. To upload several settings from the TV to an USB stick, which is connected to the SSB. The items are Channel list, Personal settings, Option codes, Display-related alignments and History list. First a directory repair\ has to be created in the root of the USB stick. To upload the settings select each item separately, press cursor right (or the OK button), confirm with OK and wait until Done appears. In case the download to the USB stick was not successful Failure will appear. In this case, check if the USB stick is connected properly and if the directory repair is present in the root of the USB stick. Now the settings are stored onto the USB stick and can be used to download onto another TV or other SSB. Uploading is of course only possible if the software is running and if a picture is available. This method is created to be able to save the customers TV settings and to store them into another SSB. Download to USB. To download several settings from the USB stick to the TV, same way of working needs to be followed as with uploading. To make sure that the download of the channel list from USB to the TV is executed properly, it is necessary to restart the TV and tune to a valid preset if necessary. Note: The History list item can not be downloaded from USB to the TV. This is a read-only item. In case of specific problems, the development department can ask for this info.

How to Navigate In SAM, the menu items can be selected with the CURSOR UP/DOWN key on the RC-transmitter. The selected item will be highlighted. When not all menu items fit on the screen, move the CURSOR UP/DOWN key to display the next/previous menu items. With the CURSOR LEFT/RIGHT keys, it is possible to: (De) activate the selected menu item. (De) activate the selected sub menu.

Service Modes, Error Codes, and Fault Finding


With the OK key, it is possible to activate the selected action.

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How to Exit SAM Use one of the following methods: Switch the TV set to STAND-BY via the RC-transmitter. Via a standard RC-transmitter, key in 00 sequence, or select the BACK key. 5.2.3 Customer Service Mode (CSM) Purpose When a customer is having problems with his TV-set, he can call his dealer or the Customer Helpdesk. The service technician can then ask the customer to activate the CSM, in order to identify the status of the set. Now, the service technician can judge the severity of the complaint. In many cases, he can advise the customer how to solve the problem, or he can decide if it is necessary to visit the customer. The CSM is a read only mode; therefore, modifications in this mode are not possible. When in this chassis CSM is activated, a testpattern will be displayed during 5 seconds (1 second Blue, 1 second Green and 1 second Red, then again 1 second Blue and 1 second Green). This test pattern is generated by the PNX5100. So if this test pattern is shown, it could be determined that the back end video chain (PNX5100, LVDS, and display) of the SSB is working. When CSM is activated and there is a USB stick connected to the TV, the software will dump the complete CSM content to the USB stick. The file (Csm.txt) will be saved in the root of the USB stick. This info can be handy if no information is displayed. Also when CSM is activated, the LAYER 1 error is displayed via blinking LED. Only the latest error is displayed. (see also section 5.5 Error Codes). How to Activate CSM Key in the code 123654 via the standard RC transmitter. Note: Activation of the CSM is only possible if there is no (user) menu on the screen! How to Navigate By means of the CURSOR-DOWN/UP knob on the RCtransmitter, can be navigated through the menus. Contents of CSM The contents are reduced to 3 pages: General, Software versions and Quality items. The group names itself are not shown anywhere in the CSM menu. General Set Type. This information is very helpful for a helpdesk/ workshop as reference for further diagnosis. In this way, it is not necessary for the customer to look at the rear of the TV-set. Note that if an NVM is replaced or is initialized after corruption, this set type has to be re-written to NVM. ComPair will foresee in a possibility to do this. Production Code. Displays the production code (the serial number) of the TV. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee a in possibility to do this. Installed date. Indicates the date of the first installation of the TV. This date is acquired via time extraction. Options 1. Gives the option codes of option group 1 as set in SAM (Service Alignment Mode). Options 2. Gives the option codes of option group 2 as set in SAM (Service Alignment Mode). 12NC SSB. Gives an identification of the SSB as stored in NVM. Note that if an NVM is replaced or is initialized after corruption, this identification number has to be re-written to

NVM. ComPair will foresee in a possibility to do this. This identification number is the 12nc number of the SSB. 12NC display. Shows the 12NC of the display. 12NC supply. Shows the 12NC of the supply. 12NC fan board. Shows the 12NC of the fan boardmodule (for sets with LED backlight) 12NC LED Dimming Panel. Shows the 12NC of the LED dimming Panel (for sets with LED backlight).

Software versions Current main SW. Displays the built-in main software version. In case of field problems related to software, software can be upgraded. As this software is consumer upgradeable, it will also be published on the Internet. Example: Q5492_1.2.3.4 Standby SW. Displays the built-in stand-by processor software version. Upgrading this software will be possible via ComPair or via USB (see section 5.9 Software Upgrading). Example: STDBY_88.68.1.2. MOP ambient light SW. Displays the MOP ambient light EPLD SW. LED Dimming SW. Displays the LED Dimming EPLD SWversion (only for sets with LED backlight). Local contrast SW. Displays the MOP local contrast SWversion. Quality items Signal quality. Poor / average /good Child lock. Not active / active. This is a combined item for locks. If any lock (Preset lock, child lock, lock after or parental lock) is active, the item shall show active. HDMI HDCP key. Indicates if the HDMI keys (or HDCP keys) are valid or not. In case these keys are not valid and the customer wants to make use of the HDMI functionality, the SSB has to be replaced. Ethernet MAC address. Displays the MAC address present in the SSB. Wireless MAC address. Displays the wireless MAC address to support the Wi-Fi functionality. BDS key. Indicates if the BDS level 1 key is valid or not. CI slot present. If the common interface module is detected the result will be YES or NO. HDMI input format. The detected input format of the HDMI. HDMI audio input stream. The HDMI audio input stream is displayed: present / not present. HDMI video input stream. The HDMI video input stream is displayed: present / not present. How to Exit CSM Press MENU (or HOME) / Back key on the RC-transmitter.

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mode with a faulty FET 7U08 is done, you can destroy all ICs supplied by the +3V3, due to overvoltage (12V on 3V3-line). It is recommended to measure first the FET 7U08 or others FETs on shortcircuit before activating SDM via the service pads.

Stepwise Start-up
When the TV is in a protection state due to an error detected by stand-by software (error blinking is displayed) and SDM is activated via shortcutting the pins on the SSB, the TV starts up until it reaches the situation just before protection. So, this is a kind of automatic stepwise start-up. In combination with the start-up diagrams below, you can see which supplies are present at a certain moment. Important to know is, that if e.g. the 3V3 detection fails and thus error layer 2 = 18 is blinking while the TV is restarted via SDM, the Stand-by Processor will enable the 3V3, but the TV set will not go to protection now. The TV will stay in this situation until it is reset (Mains/AC Power supply interrupted). Caution: in case the start-up in this

The abbreviations SP and MP in the figures stand for: SP: protection or error detected by the Stand-by Processor. MP: protection or error detected by the MIPS Main Processor.

Mains off

Mains on

- WakeUp requested - Acquisition needed - No data Acquisition required - tact SW pushed - last status is hibernate after mains ON

WakeUp requested

St by
- Tact switch Pushed - last status is hibernate after mains ON

Semi St by

Active
- St by requested - tact SW pushed

Tact switch pushed

WakeUp requested (SDM) GoToProtection

Hibernate
GoToProtection

Protection

I_17660_124.eps 140308

Figure 5-3 Transition diagram

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Off
Mains is applied

Stand by or Protection

Standby Supply starts running. All standby supply voltages become available .

st-by P resets

Initialise I/O pins of the st-by P: - Switch reset-AVC LOW (reset state) - Switch WP-NandFlash LOW (protected) - Switch reset-system LOW (reset state) - Switch reset-5100 LOW (reset state) - Switch reset-Ethernet LOW (reset state) - Switch reset-ST7100 LOW (reset state) - keep reset-NVM high, Audio-reset and Audio-Mute-Up HIGH

If the protection state was left by short circuiting the SDM pins, detection of a protection condition during startup will stall the startup. Protection conditions in a playing set will be ignored. The protection mode will not be entered.

start keyboard scanning, RC detection. Wake up reasons are off. Important remark the appearance of the +12V ; will start the +1V2 DCDC converter automatically

- Switch Audio-Reset high. It is low in the standby mode if the standby mode lasted longer than 10s.

Switch ON Platform and display supply by switching LOW the Standby line.

+12V, +/-12Vs, AL and Bolt-on power is switched on, followed by the +1V2 DCDC converter

Detect2 should be polled on the standard 40ms interval and startup should be continued when detect2 becomes high.

Detect2 high received within 1 second?

No

Power-OK error: Layer1: 3 Layer2: 16

Yes

Enter protection
No 1V2 DCDC or class D error: Layer1: 2 Layer2: 19 The supply-fault line is a combination of the DCDC converters and the audio protection line.

Supply-fault I/O High?

Yes

Enter protection
This enables the +3V3 and +5V converter. As a result, also +5V-tuner, +2V5, +1V8PNX8541 and +1V8-PNX5100 become available. Delay of 50ms needed because of the latency of the detect-1 circuit. This delay is also needed for the PNX5100. The reset of the PNX5100 should only be released 10ms after powering the IC. 3V3 / 5V DCDC or class D error: Layer1: 2 Layer2: 11

Enable the DCDC converter for +3V3 and +5V. (ENABLE-3V3)

Wait 50ms

Supply-fault I/O High?

No

yes

Enter protection
No Detect-2 I/O line High? No Disable 3V3, switch standby line high and wait 4 seconds

Detect-1 I/O line High?

Yes Enable the supply fault detection algorithm

Yes Voltage output error: Layer1: 2 Layer2: 18

Added to make the system more robust to power dips during startup. At this point the regular supply fault detection algorithm which normally detects power dips is not up and running yet.

Set IC slave address of Standby P to (A0h)

Enter protection
This will allow access to NVM and NAND FLASH and can not be done earlier because the FLASH needs to be in Write Protect as long as the supplies are not available.

Switch LOW the RESET-NVM line to allow access to NVM. (Add a 2ms delay before trying to address the NVM to allow correct NVM initialization , this is not issue in this setup , the delay is automatically covered by the architectural setup)

Switch HIGH the WP-NandFlash to allow access to NAND Flash

No

Release Reset-PNX5100. PNX5100 will start booting. Before PNX8541 boots, the PNX5100 should have set its PCI arbiter (bootscript command). To allow this, approx. 1ms is needed. This 1ms is extended to 10ms to also give some relaxation to the supplies .

Wait 10ms (minimum) to allow the bootscript of the PNX5100 to configure the PCI arbiter

Detect EJTAG debug probe (pulling pin of the probe interface to ground by inserting EJTAG probe)

An EJTAG probe (e.g. WindPower ICE probe) can be connected for Linux Kernel debugging purposes. Yes

EJTAG probe connected ?

No

No

Cold boot? Yes

Release AVC system reset Feed warm boot script

Release AVC system reset Feed cold boot script

Release AVC system reset Feed initializing boot script disable alive mechanism

To I_17660_125b.eps

To I_17660_125b.eps

I_17660_125a.eps 140308

Figure 5-4 Off to Semi Stand-by flowchart (part 1)


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From I_17660_125a.eps

From I_17660_125a.eps

Reset-system is connected to USB -reset, 4to1HDMI Mux and channel decoder.

Reset-system is switched HIGH by the AVC at the end of the bootscript

Reset-system is switched HIGH by the AVC at the end of the bootscript

Release reset MPEG4 module: BOLT-ON-IO: High

This cannot be done through the bootscript, the I/O is on the standby P

AVC releases Reset-Ethernet when the end of the AVC boot-script is detected

AVC releases Reset-Ethernet when the end of the AVC boot-script is detected

MPEG4 module will start booting autonomously.

Timing need to be updated if more mature info is available.

Reset-Audio and Audio-Mute-Up are switched by MIPS code later on in the startup process

Reset-Audio and Audio-Mute-Up are switched by MIPS code later on in the startup process

Wait 3000 ms

No No

Bootscript ready in 1250 ms?

POR polling positive ?

No

Log SW event: STi7100PorFailure

Yes yes Set IC slave address of Standby P to (60h) Alive polling RPC start (comm. protocol) Timing needs to be updated if more mature info is available. NOK Log SW event STi7100AliveFailedError and generate fast cold reboot eventually followed by a cold reboot. Start alive IIC polling mechanism yes

Wait 200 ms

POR polling positive ?

No bootSTi7100PorFailure: Log HW error Layer1: 2 Layer2: 38 and generate cold boot

No Code = Layer1: 2 Layer2: 15

Flash to Ram image transfer succeeded within 30s? Yes

Switch AVC PNX8541 in reset (active low)

Code = Layer1: 2 Layer2: 53

No

SW initialization succeeded within 20s? Yes

Timing needs to be updated if more mature info is available .

Wait 10ms

Enable Alive check mechanism Switch the NVM reset line HIGH. MIPS reads the wake up reason from standby P. Wait until AVC starts to communicate

Disable all supply related protections and switch off the +3V3 +5V DC/DC converter.

Initialize audio Wait 5ms In case of a LED backlight display , a LED DIM panel is present which is fed by the Vdisplay. To power the LED DIM Panel, the Vdisplay switch driven by the PNX 5100 must be closed. The display startup sequence is taken care of by the LED DIM panel.

switch off the remaining DC/DC converters

Switch on the display in case of a LED backlight display by sending the TurnOnDisplay(1) (IC) command to the PNX5100

3-th try?

Switch Standby I/O line high.

Yes No Blink Code as error code

Download firmware into the channel decoder

Enter protection

Third try?

No

Downloaded successfully ?

Yes Log channel decoder error: Layer1: 2 Layer2: 37

Yes initialize tuner , Master IF and channel decoder

Initialize source selection

Initialize video processing IC 's

initialize AutoTV

Initialize Ambilight with Lights off .

Semi-Standby
Figure 5-5 Off to Semi Stand-by flowchart (part 2)

I_17660_125b.eps 140308

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Constraints taken into account:


- Display may only be started when valid LVDS output clock can be delivered by the AVC . - Between 5 and 50 ms after power is supplied, display should receive valid lvds clock . - minimum wait time to switch on the lamp after power up is 200ms. action holder: AVC action holder: St-by autonomous action

Semi Standby
The assumption here is that a fast toggle (<2s) can only happen during ON -> SEMI -> ON. In these states, the AVC is still active and can provide the 2s delay. If the transition ON-> SEMI>STBY -> SEMI -> ON can be made in less than 2s, the semi -> stby transition has to be delayed until the requirement is met . Wait until previous on-state is left more than 2 seconds ago. (to prevent LCD display problems)

CPipe already generates a valid output clock in the semi -standby state: display startup can start immediately when leaving the semi-standby state.

Assert RGB video blanking and audio mute

The timings to be used in combination with the PanelON command for this specific display

Switch on the display by sending the TurnOnDisplay(1) (IC) command to the PNX5100

wait 250ms (min. = 200ms) Initialize audio and video processing IC's and functions according needed use case.

Switch on LCD backlight (Lamp-ON)

Wait until valid and stable audio and video , corresponding to the requested output is delivered by the AVC. The higher level requirement is that audio and video should be demuted without transient effects and that the audio should be demuted maximum 1s before or at the same time as the unblanking of the video.

Switch Audio-Reset low and wait 5ms

Release audio mute and wait 100ms before any other audio handling is done (e.g. volume change)

unblank the video.

The higher level requirement is that the ambilight functionality may not be switched on before the backlight is turned on in case the set contains a CE IPB inverter supply.

Switch on the Ambilight functionality according the last status settings.

Active
Figure 5-6 Semi Stand-by to Active flowchart

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Constraints taken into account:


- Display may only be started when valid LVDS output clock can be delivered by the AVC . - Between 5 and 50 ms after power is supplied, display should receive valid lvds clock . - minimum wait time to switch on the lamp after power up is 200ms. - To have a reliable operation of the backlight, the backlight should be driven with a PWM duty cycle of 100% during the first second. Only after this first one or two seconds, the PWM may be set to the required output level (Note that the PWM output should be present before the backlight is switched on). To minimize the artefacts, the picture should only be unblanked after these first seconds. action holder: AVC action holder: St-by autonomous action

Semi Standby
The assumption here is that a fast toggle (<2s) can only happen during ON ->SEMI ->ON. In these states, the AVC is still active and can provide the 2s delay. If the transition ON -> SEMI->STBY -> SEMI -> ON can be made in less than 2s, the semi -> stby transition has to be delayed until the requirement is met . Wait until previous on-state is left more than 2 seconds ago. (to prevent LCD display problems)

CPipe already generates a valid output clock in the semi -standby state: display startup can start immediately when leaving the semi-standby state.

Assert RGB video blanking and audio mute

Switch on the display by sending the TurnOnDisplay(1) (IC) command to the PNX5100

wait 250ms (min. = 200ms) Initialize audio and video processing IC's and functions according needed use case. Switch off the dimming backlight feature, set the BOOST control to nominal and make sure PWM output is set to 100%

Switch on LCD backlight (Lamp-ON)

Wait until valid and stable audio and video , corresponding to the requested output is delivered by the AVC AND [the backlight PWM has been on for 1s (internal inverter LPL displays OR the backlight PWM has been on for 2s (external inverter LPL displays)] . The higher level requirement is that audio and video should be demuted without transient effects and that the audio should be demuted maximum 1s before or at the same time as the unblanking of the video.

Switch Audio-Reset low and wait 5ms

Release audio mute and wait 100ms before any other audio handling is done (e.g. volume change)

Restore dimming backlight feature, PWM and BOOST output and unblank the video. The higher level requirement is that the ambilight functionality may not be switched on before the backlight is turned on in case the set contains a CE IPB inverter supply.

Switch on the Ambilight functionality according the last status settings.

Active
Figure 5-7 Semi Stand-by to Active flowchart LCD with preheat

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Constraints taken into account:


- Display may only be started when valid LVDS output clock can be delivered by the AVC . - Between 5 and 50 ms after power is supplied, display should receive valid lvds clock . - minimum wait time to switch on the lamp after power up is 200ms.

action holder: AVC action holder : St-by autonomous action

Semi Standby
The assumption here is that a fast toggle (<2s) can only happen during ON -> SEMI -> ON. In these states, the AVC is still active and can provide the 2s delay. If the transition ON -> SEMI>STBY->SEMI->ON can be made in less than 2s, the semi -> stby transition has to be delayed until the requirement is met. Wait until previous on-state is left more than 2 seconds ago. (to prevent LCD display problems)

CPipe already generates a valid output clock in the semi -standby state: display startup can start immediately when leaving the semi-standby state.

Assert RGB video blanking and audio mute

Switch on the display by sending the OUTPUTENABLE (IC) command to the LED DIM panel

wait 250ms (min. = 200ms) TBC in def. spec

Switch on LCD backlight (Lamp-ON)

Initialize audio and video processing IC's and functions according needed use case.

Wait until valid and stable audio and video , corresponding to the requested output is delivered by the AVC. The higher level requirement is that audio and video should be demuted without transient effects and that the audio should be demuted maximum 1s before or at the same time as the unblanking of the video.

Switch Audio-Reset low and wait 5ms

Release audio mute and wait 100ms before any other audio handling is done (e.g. volume change)

unblank the video. The higher level requirement is that the ambilight functionality may not be switched on before the backlight is turned on in case the set contains a CE IPB inverter supply.

Switch on the Ambilight functionality according the last status settings.

Active
Figure 5-8 Semi Stand-by to Active flowchart (LED backlight)

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Active
Mute all sound outputs via softmute

action holder: AVC action holder: St-by autonomous action

Wait 100ms

Set main amplifier mute (I/O: audio-mute)

Force ext audio outputs to ground (I/O: audio reset) And wait 5ms

switch off Ambilight

Wait until Ambilight has faded out (fixed wait time of x s)

The higher level requirement is that the backlight may not be switched off before the ambilight functionality is turned off in case the set contains a CE IPB inverter supply.

switch off LCD backlight

Mute all video outputs

Wait 250ms (min. = 200ms)

Switch off the display by sending the TurnOnDisplay(0) (IC) command to the PNX5100

Semi Standby

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Figure 5-9 Active to Semi Stand-by flowchart (LCD non DFI)

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Semi Stand by

action holder: MIPS action holder: St-by autonomous action

If ambientlight functionality was used in semi -standby (lampadaire mode), switch off ambient light

Delay transition until ramping down of ambient light is finished. *)

*) If this is not performed and the set is switched to standby when the switch off of the ambilights is still ongoing , the lights will switch off abruptly when the supply is cut.

transfer Wake up reasons to the Stand by P.

Switch Memories to self-refresh (this creates a more stable condition when switching off the power).

Switch AVC system in reset state Switch reset-PNX5100 LOW Switch reset-ST7100 LOW Switch Reset-Ethernet LOW

Wait 10ms

Switch the NVM reset line HIGH Switch het WP-Nandflash LOW

Disable all supply related protections and switch off the DC/DC converters (ENABLE-3V3)

Wait 5ms

Switch OFF all supplies by switching HIGH the Standby I/O line

Important remark: release reset audio 10 sec after entering standby to save power

Stand by
Figure 5-10 Semi Stand-by to Stand-by flowchart

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action holder: MIPS action holder: St-by autonomous action

MP
Log the appropriate error and set stand-by flag in NVM

SP

Redefine wake up reasons for protection state and transfer to stand-by P.

Switch off LCD lamp supply

If needed to speed up this transition, this block could be omitted . This is depending on the outcome of the safety investigations .

Wait 250ms (min. = 200ms)

Switch off LVDS signal

Switch off 12V LCD supply within a time frame of min. 0.5ms to max. 50ms after LVDS switch off.

Ask stand-by P to enter protection state

Switch AVC in reset state

Wait 10ms

Switch the NVM reset line HIGH.

Disable all supply related protections and switch off the +1V8 and the +3V3 DC/DC converter.

Wait 5ms

Switch OFF all supplies by switching HIGH the Standby I/O line.

Flash the Protection-LED in order to indicate protection state*

(*): This can be the standby LED or the ON LED depending on the availability in the set

Protection
Figure 5-11 To Protection State flowchart

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5.4
5.4.1

Service Tools
ComPair Introduction ComPair (Computer Aided Repair) is a Service tool for Philips Consumer Electronics products. and offers the following: 1. ComPair helps to quickly get an understanding on how to repair the chassis in a short and effective way. 2. ComPair allows very detailed diagnostics and is therefore capable of accurately indicating problem areas. No knowledge on I2C or UART commands is necessary, because ComPair takes care of this.

3. ComPair speeds up the repair time since it can automatically communicate with the chassis (when the uP is working) and all repair information is directly available. 4. ComPair features TV software up possibilities. Specifications ComPair consists of a Windows based fault finding program and an interface box between PC and the (defective) product. The ComPair II interface box is connected to the PC via an USB cable. For the TV chassis, the ComPair interface box and the TV communicate via a bi-directional cable via the service connector(s). The ComPair fault finding program is able to determine the problem of the defective television, by a combination of automatic diagnostics and an interactive question/answer procedure.

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How to Connect This is described in the chassis fault finding database in ComPair.
TO TV
TO UART SERVICE CONNECTOR TO I2C SERVICE CONNECTOR TO UART SERVICE CONNECTOR

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On the PC the memory test is shown now. This is also visible on the TV screen. In BOARDTESTLOGGER an option Send extra UART command can be found where you can select AUD1. This command generates hear test tones of 200, 400, 1000, 2000, 3000, 5000, 8000 and 12500Hz.

ComPair II RC in RC out

Multi function

5.5
I2C RS232 /UART

Error Codes
Introduction The error code buffer contains all detected errors since the last time the buffer was erased. The buffer is written from left to right, new errors are logged at the left side, and all other errors shift one position to the right. When an error occurs, it is added to the list of errors, provided the list is not full. When an error occurs and the error buffer is full, then the new error is not added, and the error buffer stays intact (history is maintained). To prevent that an occasional error stays in the list forever, the error is removed from the list after more than 50 hrs. of operation. When multiple errors occur (errors occurred within a short time span), there is a high probability that there is some relation between them. New in this chassis is the way errors can be displayed: There is a simple blinking LED procedure for board level repair (home repair) so called LAYER 1 errors next to the existing errors which are LAYER 2 errors (see Table 5-2). LAYER 1 errors are one digit errors. LAYER 2 errors are 2 digit errors. In protection mode. From consumer mode: LAYER 1. From SDM mode: LAYER 2. Fatal errors, if I2C bus is blocked and the set reboots, CSM and SAM are not selectable. From consumer mode: LAYER 1. From SDM mode: LAYER 2. Important remark: For all errors detected by MIPS which are fatal => rebooting of the TV set (reboot starts after LAYER 1 error blinking), one should short the solder paths (SDM) at start-up from the power OFF state by mains interruption and not via the power button to trigger the SDM via the hardware pins. In CSM mode When entering CSM: error LAYER 1 will be displayed by blinking LED. Only the latest error is shown. In SDM mode When SDM is entered via Remote Control code or the hardware pins, LAYER 2 is displayed via blinking LED. In the ON state In Display error mode, set with the RC commands mute_06250X _OK LAYER 2 errors are displayed via blinking LED. Error display on screen. In CSM no error codes are displayed on screen. In SAM the complete error list is shown.

Optional Power Link/ Mode Switch Activity

5.5.1

PC

ComPair II Developed by Philips Brugge

HDMI I2C only

Optional power 5V DC

E_06532_036.eps 150208

Figure 5-12 ComPair II interface connection Caution: It is compulsory to connect the TV to the PC as shown in the picture above (with the ComPair interface in between), as the ComPair interface acts as a level shifter. If one connects the TV directly to the PC (via UART), ICs will be blown! How to Order ComPair II order codes: ComPair II interface: 3122 785 91020. Software is available via the Philips Service web portal. ComPair UART interface cable for Q54x.x. (using 3.5 mm Mini Jack connector): 3138 188 75051. Note: While encounting problems, contact the local support desk. 5.4.2 Memory and Audio Test With this tool you can test the memory of the PNX8543, as well if the PNX51XX is enabled and audio-testing. What is needed? An USB-stick TESTSCRIPT Q549. Downloadable from the Philips Service website from the section Software for Service only A ComPair/service cable (3138 188 75051). Procedure Create a directory JETTFILES under the root of the USB-stick Place MemTestTV543.bin and autojett.bin (available in TESTSCRIPT Q549) under the directory JETTFILES Install the computer program BOARDTESTLOGGER (available in TESTSCRIPT Q549) on the PC Connect a ComPair/service-cable from the serviceconnector in the set, into the multi function jack at the front of the ComPair II box: Required settings in ComPair: - start up the ComPair application. - Select the correct database (open file Q549.2E LA, this will set the ComPair interface in the appropriate mode). - Close ComPair Start up the program BOARDTESTLOGGER and select COMx Put the USB stick into the TV and start up the TV while pressing the i+-button on a Philips DVD RC6 remote control (its also possible to use a TV remote in DVDmode)

Basically there are three kinds of errors: Errors detected by the Stand-by software which lead to protection. These errors will always lead to protection and an automatic start of the blinking LED LAYER 1 error. (see section 5.6 The Blinking LED Procedure). Errors detected by the Stand-by software which not lead to protection. In this case the front LED should blink the involved error. See also section 5.5 Error Codes, 5.5.4 Error Buffer, Extra Info. Note that it can take up several minutes before the TV starts blinking the error (e.g. LAYER 1 error = 2, LAYER 2 error = 15 or 53). Errors detected by main software (MIPS). In this case the error will be logged into the error buffer and can be read
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Service Modes, Error Codes, and Fault Finding

out via ComPair, via blinking LED method LAYER 1-2 error, or in case picture is visible, via SAM. 5.5.2 How to Read the Error Buffer Use one of the following methods: On screen via the SAM (only when a picture is visible). E.g.: 00 00 00 00 00: No errors detected 23 00 00 00 00: Error code 23 is the last and only detected error. 37 23 00 00 00: Error code 23 was first detected and error code 37 is the last detected error. Note that no protection errors can be logged in the error buffer. Via the blinking LED procedure. See section 5.5.3 How to Clear the Error Buffer. Via ComPair. 5.5.3 How to Clear the Error Buffer Use one of the following methods: By activation of the RESET ERROR BUFFER command in the SAM menu. With a normal RC, key in sequence MUTE followed by 062599 and OK. If the content of the error buffer has not changed for 50+ hours, it resets automatically. 5.5.4 Error Buffer In case of non-intermittent faults, clear the error buffer before starting to repair (before clearing the buffer, write down the content, as this history can give significant information). This to ensure that old error codes are no longer present. If possible, check the entire contents of the error buffer. In some situations, an error code is only the result of another error code and not the actual cause (e.g. a fault in the protection detection circuitry can also lead to a protection). There are several mechanisms of error detection: Via error bits in the status registers of ICs. Via polling on I/O pins going to the stand-by processor. Via sensing of analog values on the stand-by processor or the PNX8543. Via a not acknowledge of an I2C communication. Take notice that some errors need several minutes before they start blinking or before they will be logged. So in case of problems wait 2 minutes from start-up onwards, and then check if the front LED is blinking or if an error is logged.

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Table 5-2 Error code overview Monitored Error/ Error Buffer/ Layer 1 Layer 2 by Prot Blinking LED Device 2 2 13 14 15 16 17 18 12 21 23 24 25 27 28 29 34 41 42 43 44 / 53 64 MIPS MIPS Stby P Stby P MIPS Stby P MIPS MIPS MIPS MIPS MIPS MIPS MIPS MIPS MIPS MIPS MIPS MIPS MIPS MIPS Stby P MIPS E E P P E P E E E E E E E E E E E E E E E E BL / EB BL / EB BL BL EB BL EB EB EB EB EB EB EB EB EB EB EB EB EB X BL BL / EB SSB

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Description I2C3 I2C2

Defective Board SSB SSB/display SSB Supply IPB SSB Display SSB SSB SSB SSB SSB AL module or DC/DC SSB SSB FAN module T sensor FAN FAN

SSB/Display PNX8543/PNX51XX I2C blocked / / / / PNX5100 TDA9996 PCA9540 STM24C08 DRX3616K DRX3626K NXP LPC2103 Altera UV1783S/HD1816 PCA9533 LM 75

PNX doesnt boot (HW cause) 2 PNX 51XX doesnt boot 12V Inverter or display supply 1V2, 3V3, 5V to low Temp protection PNX 51XX HDMI mux I2C switch Boot-NVM PNX51XX Multi Standard demodulator (Micronas IF) ARM (ambilight) FPGA (Local contrast) Tuner Fan I2C expander T sensor FAN 1 FAN 2 Main NVM Display (only 56PFL9954H) 3 4 2 3 2 2 2 2 2 8 2 2 7 7 7 7 2 5

STM24C128 PNX8543 Altera

SSB SSB Display

PNX doesnt boot (SW cause) 2

Extra Info Rebooting. When a TV is constantly rebooting due to internal problems, most of the time no errors will be logged or blinked. This rebooting can be recognized via a ComPair interface and Hyperterminal (for Hyperterminal settings, see section 5.8 Fault Finding and Repair Tips, 5.8.6 Logging). Its shown that the loggings which are generated by the main software keep continuing. In this case diagnose has to be done via ComPair. Error 13 (I2C bus 3 blocked). At the time of release of this manual, this error was not working as expected. Current situation: when this error occurs, the TV will constantly reboot due to the blocked bus. The best way for further diagnosis here, is to use ComPair. Error 15 (PNX8543,PNX51XX doesnt boot). Indicates that the main processor/PNX51XX was not able to read his bootscript. This error will point to a hardware problem around the PNX8543 (supplies not OK, PNX 8543 completely dead, I2C link between PNX and Stand-by Processor broken, etc...). When error 15 occurs it is also possible that I2C1 bus is blocked (NVM). I2C1 can be indicated in the schematics as follows: SCL-UP-MIPS, SDA-UP-MIPS, SCL-1, SDA-1, SCL-2 or SDA-2. Other root causes for this error can be due to hardware problems from the NVM PNX51XX, DDRs and the bootscript reading from the PNX51XX. Error 16 (12V). This voltage is made in the power supply and results in protection (LAYER 1 error = 3) in case of absence. When SDM is activated we see blinking LED LAYER 2 error = 16. Error 17 (Invertor or Display Supply). Here the status of the Power OK is checked by software, no protection will occur during failure of the invertor or display supply (no picture), only error logging. Error LAYER 1 = 4 in CSM, in SDM this gives LAYER 2 error = 17. Error 18 (1V2-3V3-5V too low). All these supplies are generated by the DC/DC supply on the SSB. If one of these supplies is too low, protection occurs and blinking LED LAYER 1 error = 2 will be displayed automatically. In SDM this gives LAYER 2 error = 18.

Error 21 (PNX 51XX). When there is no I2C communication towards the PNX51XX, the TV set will start rebooting and display LAYER 1 error = 2. Disconnect the mains cord now and start up the TV set with the solder path (SDM) short to ground during start-up to activate the LAYER 2 error blinking. Error 21 will be logged and displayed via the blinking LED procedure after a few moments from start-up. Remark: the rebooting can be recognized via a ComPair interface and Hyperterminal (for Hyperterminal settings, see section 5.8 Fault Finding and Repair Tips, 5.8.6 Logging). It is shown that the loggings which are generated by the main software keep continuing. Check in the logging for keywords like e.g. Device error 21. Error 23 (HDMI). When there is no I2C communication towards the HDMI mux after start-up, LAYER 2 error = 23 will be logged and displayed via the blinking LED procedure if SDM is switched on. It should be noted that in case a new spare EDID MUX device is used for repair, the initial default address must be changed from C0 to CE, to be done via ComPair. Error 24 (I2C switch). When there is no I2C communication towards the I2C switch, LAYER 2 error = 24 will be logged and displayed via the blinking LED procedure when SDM is switched on. Remark: this only works for TV sets with an I2C controlled screen included. Error 25 (Boot-NVM PNX51XX). Same behaviour as described in Error 21 (PNX51XX). Error 27 (Micronas IF). When there is no I2C communication towards the multi standard demodulator, LAYER 2 error = 27 will be logged and displayed via the blinking LED procedure if SDM is switched on. Error 28 (ARM ambilight). When there is no I2C communication towards the ARM processor, LAYER 2 error = 28 will be logged and displayed via the blinking LED procedure if SDM is switched on. Error 29 (FPGA local contrast). When there is no I2C communication towards this FPGA, LAYER 2 error = 29 will be logged and displayed via the blinking LED procedure if SDM is activated.

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5.6.2 How to Activate Use one of the following methods: Activate the CSM. The blinking front LED will show only the latest LAYER 1 error, this works in normal operation mode or automatically when the error/protection is monitored by the standby processor. In case no picture is shown and there is no LED blinking, read the logging to detect whether error devices are mentioned. (see section 5.8 Fault Finding and Repair Tips, 5.8.6 Logging). Activate the SDM. The blinking front LED will show the entire content of the LAYER 2 error buffer, this works in normal operation mode or when SDM (via hardware pins) is activated when the tv set is in protection. Important remark: For all errors detected by MIPS which are fatal => rebooting of the TV set (reboot starts after LAYER 1 error blinking), one should short the solder paths at start-up from the power OFF state by mains interruption and not via the power button to trigger the SDM via the hardware pins. Transmit the commands MUTE - 062500 - OK with a normal RC. The complete error buffer is shown. Take notice that it takes some seconds before the blinking LED starts. Transmit the commands MUTE - 06250x - OK with a normal RC (where x is a number between 1 and 5). When x = 1 the last detected error is shown, x = 2 the second last error, etc.... Take notice that it takes some seconds before the blinking LED starts.

Error 34 (Tuner). When there is no I2C communication towards the tuner after start-up, LAYER 2 error = 34 will be logged and displayed via the blinking LED procedure when SDM is switched on. Error 42 (Temp sensor). Only applicable for TV sets with an I2C controlled screen. Main NVM. When there is no I2C communication towards the main NVM, LAYER 1 error = 2 will be displayed via the blinking LED procedure. In SDM, LAYER 2 error will be blinked as 15. Errors here can not be logged due to inaccessibility of the NVM device. Error 53. This error will indicate that the PNX8543 has read his bootscript (when this would have failed, error 15 would blink) but initialization was never completed because of hardware problems (NAND flash, ...) or software initialization problems. Possible cause could be that there is no valid software loaded (try to upgrade to the latest main software version). Note that it can take a few minutes before the TV starts blinking LAYER 1 error = 2 or in SDM, LAYER 2 error = 53. Error 64. Only applicable for TV sets with an I2C controlled screen.

5.6
5.6.1

The Blinking LED Procedure


Introduction The blinking LED procedure can be split up into two situations: Blinking LED procedure LAYER 1 error. In this case the error is automatically blinked when the TV is put in CSM. This will be only one digit error, namely the one that is referring to the defective board (see table 5-2 Error code overview) which causes the failure of the TV. This approach will especially be used for home repair and call centres. The aim here is to have service diagnosis from a distance. Blinking LED procedure LAYER 2 error. Via this procedure, the contents of the error buffer can be made visible via the front LED. In this case the error contains 2 digits (see table 5-2 Error code overview) and will be displayed when SDM (hardware pins) is activated. This is especially useful for fault finding and gives more details regarding the failure of the defective board. Important remark: For all errors detected by MIPS which are fatal => rebooting of the TV set (reboot starts after LAYER 1 error blinking), one should short the solder paths at start-up from the power OFF state by mains interruption and not via the power button to trigger the SDM via the hardware pins. When one of the blinking LED procedures is activated, the front LED will show (blink) the contents of the error buffer. Error codes greater then 10 are shown as follows: 1. n long blinks (where n = 1 to 9) indicating decimal digit 2. A pause of 1.5 s 3. n short blinks (where n= 1 to 9) 4. A pause of approximately 3 s, 5. When all the error codes are displayed, the sequence finishes with a LED blink of 3 s 6. The sequence starts again. Example: Error 12 8 6 0 0. After activation of the SDM, the front LED will show: 1. One long blink of 750 ms (which is an indication of the decimal digit) followed by a pause of 1.5 s 2. Two short blinks of 250 ms followed by a pause of 3 s 3. Eight short blinks followed by a pause of 3 s 4. Six short blinks followed by a pause of 3 s 5. One long blink of 3 s to finish the sequence 6. The sequence starts again.

5.7
5.7.1

Protections
Software Protections Most of the protections and errors use either the stand-by microprocessor or the MIPS controller as detection device. Since in these cases, checking of observers, polling of ADCs, and filtering of input values are all heavily software based, these protections are referred to as software protections. There are several types of software related protections, solving a variety of fault conditions: Protections related to supplies: check of the 12V, +5V, +3V3 and 1V2. Protections related to breakdown of the safety check mechanism. E.g. since the protection detections are done by means of software, failing of the software will have to initiate a protection mode since safety cannot be guaranteed any more. Remark on the Supply Errors The detection of a supply dip or supply loss during the normal playing of the TV set does not lead to a protection, but to a cold reboot of the set. If the supply is still missing after the reboot, the TV will go to protection. Protections during Start-up During TV start-up, some voltages and IC observers are actively monitored to be able to optimise the start-up speed, and to assure good operation of all components. If these monitors do not respond in a defined way, this indicates a malfunction of the system and leads to a protection. As the observers are only used during start-up, they are described in the start-up flow in detail (see section 5.3 Stepwise Start-up).

5.7.2

Hardware Protections The only real hardware protection in this chassis appears in case of an audio problem e.g. DC voltage on the speakers. This protection will only affect the Class D (7D10) and puts the amplifier in a continuous burst mode (cyclus approximately 2 seconds).

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Service Modes, Error Codes, and Fault Finding


Repair Tip There will be still picture available but no sound. While the Class D amplifier tries to start-up again, the cone of the loudspeakers will move slowly in one or the other direction until the initial failure shuts the amplifier down, this cyclus starts over and over again. 5.7.3 Important remark regarding the blinking LED indication As for the blinking LED indication, the blinking led of LAYER 1 error displaying can be switched off by pushing the power button on the keyboard. This condition is not valid after the set was unpowered (via mains interruption). The blinking LED starts again and can only be switched off by unplugging the mains connection. This can be explained by the fact that the MIPS can not load the keyboard functionality from software during the start-up and doesnt recognizes the keyboard commands at this time.

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+3V3-STANDY and +1V2-STANDBY are permanent voltages. Supply voltages +1V2-PNX85XX and +1V2-PNX5100 are started immediately when +12V incoming voltage is available (+12V is enabled by STANDBY signal, active low). Supply voltages +3V3, 2V5, +1V8-PNX5100, +1V8-PNX85XX, +5V and +5V-TUN are switched-on directly by signal ENABLE-3V3 (active low), provided that +12V (detected via 7U40 &7U41) is available. +12V is considered OK (=> DETECT -12V signal becomes high and 12V/3V3 and 12V/5V DC-DC converter can be started up) if it rises above 10V5 (typical) and doesnt drop below 10V (typical). Debugging The best way to find a failure in the DC/DC converters is to check their start-up sequence at power-on via the mains cord, presuming that the standby microprocessor and the external supply are operational. Take STANDBY signal high-to-low transition as time reference. When +12V becomes available (maximum 1 second after STANDBY signal goes low) then +1V2-PNX85XX and +1V2PNX51XX are started immediately. Then, after ENABLE-3V3 goes low, all the other supply voltages should rise within 2ms. Tips When an output supply voltage is short-circuited to GND the corresponding DC-DC converter is not making any audible noise, the converter switches-off immediately and will attempt a re-start only after +12V drops and rises again. Check the integrity (at least no short-circuit between drain and source) of power MOS-FETs, especially the high-side ones: 7U05, 7U08, 7U0D-1 and 7U0H-1 before starting the platform in SDM mode, otherwise it can be easily damaged. Switching frequency of DC-DC converters should be around 290KHz for 12V to 1V2 DC-DC converters and around 370KHz for 12V to 3V3 and 12V to 5V DC-DC converters. 5.8.5 Exit Factory Mode When an F is displayed in the screens right corner, this means the set is in Factory mode, and it normally happens after a new SSB is mounted. To exit this mode, push the VOLUME minus button on the TVs local keyboard for 10 seconds (this disables the continuous mode). Then push the SOURCE button for 10 seconds until the F disappears from the screen. 5.8.6 Logging When something is wrong with the TV set (f.i.the set is rebooting) you can check for more information via the logging in Hyperterminal. The Hyperterminal is available in every Windows application via Programs, Accessories, Communications, Hyperterminal. Connect a ComPair UARTcable (3138 188 75051) from the service connector in the TV to the multi function jack at the front of ComPair II box. Required settings in ComPair before starting to log: - Start up the ComPair application. - Select the correct database (open file Q549.6E LA, this will set the ComPair interface in the appropriate mode). - Close ComPair After start-up of the Hyperterminal, fill in a name (f.i. logging) in the Connection Description box, then apply the following settings: 1. COMx 2. Bits per second = 115200 3. Data bits = 8 4. Parity = none 5. Stop bits = 1 6. Flow control = none

5.8

Fault Finding and Repair Tips


Read also section 5.5 Error Codes, 5.5.4 Error Buffer, Extra Info.

5.8.1

Ambilight Due to degeneration process of the AmbiLights, there can be a difference in the colour and/or light output of the spare ambilight module in comparison with the originals ones contained in the TV set. Via ComPair the light output can be adjusted.

5.8.2

Audio Amplifier The Class D-IC 7D10 has a powerpad for cooling. When the IC is replaced it must be ensured that the powerpad is very well pushed to the PWB while the solder is still liquid. This is needed to insure that the cooling is guaranteed, otherwise the Class DIC could break down in short time.

5.8.3

CSM When CSM is activated and there is a USB stick connected to the TV, the software will dump the complete CSM content to the USB stick. The file (Csm.txt) will be saved in the root of the USB stick. If this mechanism works it can be concluded that a large part of the operating system is already working (MIPS, USB...)

5.8.4

DC/DC Converter Description The onboard supply consists of 5 DC/DC converters and 4 linear stabilizers. All DC/DC converters have +12V input voltage and deliver: +1V2-PNX85XX supply voltage (1.24V nominal), stabilized close to PNX8543 chip. +1V2-PNX5120 supply voltage (1.26V nominal), stabilized close to PNX5120 chip. +3V3 (3.34V nominal, overall 3.3 V for onboard ICs). +5V (5.15V nominal) for USB and Conditional Access Interface and +5V5-TUN for +5V-TUN tuner stabilizer. +33VTUN (34V nominal) for analog-only tuners.

The linear stabilizers are providing: +1V2-STANDBY (out of +3V3-STANDBY), 1.24V nominal. +1V8-PNX85XX and +1V8PNX5100 (connected via CFH1), 1.84V nominal. +2V5 (WOW FPGA diversity only), 2.5V nominal. +5V-TUN (out of +5V5-TUN), 5V nominal.

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5.

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Service Modes, Error Codes, and Fault Finding

During the start-up of the TV set, the logging will be displayed. This is also the case during rebooting of the TV set (the same logging appears time after time). Also available in the logging is the Display Option Code (useful when there is no picture), look for item DisplayRawNumber in the beginning of the logging. Tip: when there is no picture available during rebooting you are able to check for error devices in the logging (LAYER 2 error) which can be very helpful to determine the failure cause of the reboot. For protection state, there is no logging. 5.8.7 Loudspeakers Make sure that the volume is set to minimum during disconnecting the speakers in the ON-state of the TV. The audio amplifier can be damaged by disconnecting the speakers during ON-state of the set! 5.8.8 IPB In case of no picture when CSM-test pattern from PNX51XX is activated and backlight doesnt light up, its recommended first to check the inverter on the IPB + wiring (LAYER 2 error = 17 is displayed in SDM). 5.8.9 Tuner Attention: In case the tuner is replaced, always check the tuner options! 5.8.10 PCI bus. The splash screen image is not distributed via the regular YUV signal path from the PNX8543 to the PNX51XX, but loaded one time via the PCI bus.Once the splash screen image is loaded into the PNX51XX, it will be continuously generated by the PNX51XX until the first incoming video disables the splash screen.So when teletext and/or general UI is available, but no splash screen (option ON) is visible during start-up, check the PCI bus as possible root cause. 5.8.11 Display option code Attention: In case the SSB is replaced, always check the display option code in SAM, even when picture is available. Performance with the incorrect display option code can lead to unwanted side-effects for certain conditions. 5.8.12 Upgrade HDMI EDID NVM The EDID MUX device (including all HDMI NVM except the 4th) is upgradeable via USB, see ComPair for further instructions. It should be noted that in case a new spare EDID MUX device is used for repair, the initial default address must be changed from C0 to CE, to be done via ComPair. 5.8.13 Upgrade VGA/4th HDMI EDID NVM The EDID for VGA connector or the 4th HDMI can only be upgraded via external I2C. To upgrade the EDID for the VGA connector or 4th HDMI, pin 7 of the EDID NVM has to be short circuited to ground. Therefore a test point is foreseen (see Figure 5-13). For the VGA EDID NVM its most suitable to connect pin 7 to ground on the NVM device itself. See ComPair for further instructions.
18310_220_090318.eps 090319

EDID4

Figure 5-13 4th HDMI EDID NVM pin 5.8.14 Wi-Fi module To prevent damage on the coax wires, especially the female core of the coax wires (can be bend over during dis- and reconnecting), this should be carried out by use of pliers.

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5.8.15 SSB Replacement Follow the instructions in the flowchart in case a SSB has to be exchanged. See figure SSB replacement flowchart.

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Instruction note: SSB replacement Q528.x, Q522.x, Q529.x, Q54x.x


START

Set is going into protection after replacing the SSB (blinking LED, error 2).
Take care that speakers are connected! In some sets, the speakers are in the rear cover, and when the set is switched on without speakers, it is possible that the Audio protection is triggered. Advise: remount rear cover before switching on (see also SCC_71772).

Set is still operating? No Create repair directory on USB stick and connect USB stick to TV-set Go to SAM mode (062596 i+) and save the TV settings via Upload to USB.

- Replace SSB board by a Service SSB. - Make the SSB fit mechanically to the set.

Start-up set. Set behaviour?

Set is starting up but no display.

Set is starting up & display is OK.

Set is starting up in Factory mode.

Update main software in this step, by using autorun.upg file.

Noisy picture with bands/lines is visible and the red LED is continuous on (sometimes also the letter F is visible). Press 5 s. the Volume minus button on the local cntrl until the red LED switches off, and then press 5 s. the MENU (*) button of the local cntrl. (* in some chassis this button is named SOURCE) The picture noise is replaced by blue mute! Unplug the mainscord to verify the correct disabling of the factory-mode.

Program Display Option code via 062598 MENU/HOME, followed by 3 digits code (this code can be found on a sticker inside the set).

After entering Display Option code, set is going to Standby (= validation of code).

Restart the set.

Program Display Option code via 062598 MENU/ HOME, followed by 3 digits code (this code can be found on a sticker inside the set). No Saved settings on USB stick?

After entering Display Option code, set is going to Standby (= validation of code).

Connect PC via ComPair interface to Service connector. Yes Start TV in Jett mode (DVD i+/OSD) Open ComPair browser Q52x. Go to SAM mode, and reload settings via Download from USB. Program set type number, serial number, and display 12NC. If not already done; Check latest software on Service website. Update Main and Standby software via USB.

Restart the set.

In case of settings reloaded from USB, the set type, serial number, Display 12NC, are automatically stored when entering display options.

Check and perform alignments in SAM according to the Service Manual. E.g. option codes, colour temperature...

- Check if correct Display Option code is programmed. - Verify Option Codes according sticker inside the set. - Default settings for White drive ...see Service Manual

Final check of all menus in CSM. Special attention for HDMI Keys. Q52xE SSB Board swap v5.1 VDS/JA Updated 18-03-2009 (changes are indicated in red)
H_16771_007.eps 090318

END

Figure 5-14 SSB replacement flowchart


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5. The renamed upg file will be visible and selectable in the upgrade application. Back-up Software Upgrade Application If the default software upgrade application does not start (could be due to a corrupted boot 2 sector) via the above described method, try activating the back-up software upgrade application. How to start the back-up software upgrade application manually: 1. Disconnect the TV from the Mains/AC Power. 2. Press the INFO-button on a Philips remote control or CURSOR DOWN button on a Philips DVD RC-6 remote control (it is also possible to use a TV remote in DVD mode). Keep the INFO-button (or cursor down button) pressed while reconnecting the TV to the Mains/AC Power. 3. The software upgrade application will start. 5.9.3 Stand-by Software Upgrade via USB In this chassis it is possible to upgrade the Stand-by software via a USB stick. The method is similar to upgrading the main software via USB. Use the following steps: 1. Create a directory UPGRADES on the USB stick. 2. Copy the Stand-by software (part of the one-zip file, e.g. StandbySW_CFT72_88.0.0.0.upg) into this directory. 3. Insert the USB stick into the TV. 4. Start the download application manually (see section Manual Software Upgrade. 5. Select the appropriate file and press the OK button to upgrade. 5.9.4 Content and Usage of the One-Zip Software File Below the content of the One-Zip file is explained, and instructions on how and when to use it. BootProm_PNX51XX_Q5492_x.x.x.x.zip. A programmed device can be ordered via the regional Service organization. Ceisp2padll_P2PAD_x.x.x.x.zip. Not to be used by Service technicians. For ComPair development only. DDC_Q5492_x.x.x.x.zip. Contains the content of the VGA NVM. See ComPair for further instruction. EDID_Q5492_x.x.x.x.zip. Contains the EDID content of the different EDID NVMs. See ComPair for further instructions. EJTAGDownload_Q5492_x.x.x.x.zip. Only used by service centres which are allowed to do component level repair. FUS_Q5492_x.x.x.x_commercial.zip. Contains the autorun.upg which is needed to upgrade the TV main software and the software download application. Factory_Q5492_x.x.x.x_commercial.zip. Only for production purposes, not to be used by Service technicians. FlashUtils_Q5492_x.x.x.x_commercial.zip. Not to be used by Service technicians. MOP_RAC3_x.x.x.x.zip. Contains the MOP local contrast software and is upgradeable via USB (UPG). This SW is not part of the FUS autorun.upg! OAD_Q5492_x.x.x.x.zip. Not to be used by Service Technicians. OpenSourceFile_Q5492_x.x.x.x.zip. Not to be used by Service technicians. PQPrivate_Q5492_x.x.x.x.zip. Not to be used by Service technicians. StandbySW_CFTxx_x.x.x.x_commercial.zip. Contains the Stand-by software in upg and hex format. The StandbySW_xxxxx_prod.upg file can be used to upgrade the Stand-by software via USB. The StandbySW_xxxxx.hex file can be used to upgrade the Stand-by software via ComPair.

Software Upgrading
Introduction The set software and security keys are stored in a NANDFlash, which is connected to the PNX8543 via the PCI bus. It is possible for the user to upgrade the main software via the USB port. This allows replacement of a software image in a stand alone set, without the need of an E-JTAG debugger. A description on how to upgrade the main software can be found in the DFU. Important: When the NAND-Flash must be replaced, a new SSB must be ordered, due to the presence of the security keys! (copy protection keys, MAC address, ...). Perform the following actions after SSB replacement: 1. Set the correct option codes (see sticker inside the TV). 2. Update the TV software => see the eUM (electronic User Manual) for instructions. 3. Perform the alignments as described in chapter 6 (section 6.5 Reset of Repaired SSB). 4. Check in CSM if the HDMI key, MAC address etc. are valid. For the correct order number of a new SSB, always refer to the Spare Parts list!

5.9.2

Main Software Upgrade The UpgradeAll.upg file is only used in the factory. The FlashUtils.upg file is only used by service centres which are allowed to do component level repair on the SSB.

Automatic Software Upgrade In normal conditions, so when there is no major problem with the TV, the main software and the default software upgrade application can be upgraded with the AUTORUN.UPG (FUS part of the one-zip file: e.g. 3104 337 05661 _FUS _Q5492_ 1.26.15.0_commercial.zip). This can also be done by the consumers themselves, but they will have to get their software from the commercial Philips website or via the Software Update Assistant in the user menu (see eUM). The autorun.upg file must be placed in the root of the USB stick. How to upgrade: 1. Copy AUTORUN.UPG to the root of the USB stick. 2. Insert USB stick in the set while the set is in ON MODE. The set will restart and the upgrading will start automatically. As soon as the programming is finished, a message is shown to remove the USB stick and restart the set. Manual Software Upgrade In case that the software upgrade application does not start automatically, it can also be started manually. How to start the software upgrade application manually: 1. Disconnect the TV from the Mains/AC Power. 2. Press the OK button on a Philips TV remote control or a Philips DVD RC-6 remote control (it is also possible to use a TV remote in DVD mode). Keep the OK button pressed while reconnecting the TV to the Mains/AC Power. 3. The software upgrade application will start. Attention! In case the download application has been started manually, the autorun.upg will maybe not be recognized. What to do in this case: 1. Create a directory UPGRADES on the USB stick. 2. Rename the autorun.upg to something else, e.g. to software.upg. Do not use long or complicated names, keep it simple. Make sure that AUTORUN.UPG is no longer present in the root of the USB stick. 3. Copy the renamed upg file into this directory. 4. Insert USB stick into the TV.
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Service Modes, Error Codes, and Fault Finding


The files StandbySW_xxxxx_exhex.hex and StandbySW_xxxxx_dev.upg may not be used by Service technicians (only for development purposes). UpgradeAll_Q5492_x.x.x.x_commercial.zip. Only for production purposes, not to be used by Service technicians. Caution: Never try to use this file, because it will overwrite the HDCP keys ! ! ! UpgradeExe_Q5492X_x.x.x.x.zip. Not to be used by Service Technicians. Ambilight_Q5492_x.x.x.x.zip. Not to be used by Service technicians. Cabinet_Q5492_x.x.x.x.zip. Not to be used by Service technicians. Display_Q5492_x.x.x.x.zip. Not to be used by Service technicians. LightGuide_TV522_x.x.x.x_.zip. Not to be used by Service Technicians. ProcessNVM_Q5492_x.x.x.x.zip. Default NVM content. Must be programmed via ComPair or can be loaded via USB, be aware that all alignments stored in NVM are over written here.

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5.9.5

Content of the MOP Ambilight ARM SW File MOP_AMBILIGHT_V1-2_UPG_jettsigned.zip. Contains the MOP ambient light software (ARM processor on the DC-DC AL interface board) and is upgradeable via USB (UPG). This SW is not part of the FUS autorun.upg! and is not available in the One-Zip software file but provided separately via the commercial Philips website (software for service engineers only).The way of work on how to upgrade is included in the zip file.

5.9.6

UART logging 2K9 (see section 5.8 Fault Finding and Repair Tips, 5.8.6 Logging)

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6. Alignments
Index of this chapter: 6.1 General Alignment Conditions 6.2 Hardware Alignments 6.3 Software Alignments 6.4 Option Settings 6.5 Reset of Repaired SSB 6.7 Total Overview SAM modes EU/AP-PAL models: a PAL B/G TV-signal with a signal strength of at least 1 mV and a frequency of 475.25 MHz US/AP-NTSC models: an NTSC M/N TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3). LATAM models: an NTSC M TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).

6.1

General Alignment Conditions


Perform all electrical adjustments under the following conditions: Power supply voltage (depends on region): AP-NTSC: 120 VAC or 230 VAC / 50 Hz ( 10%). AP-PAL-multi: 120 - 230 VAC / 50 Hz ( 10%). EU: 230 VAC / 50 Hz ( 10%). LATAM-NTSC: 120 - 230 VAC / 50 Hz ( 10%). US: 120 VAC / 60 Hz ( 10%). Connect the set to the mains via an isolation transformer with low internal resistance. Allow the set to warm up for approximately 15 minutes. Measure voltages and waveforms in relation to correct ground (e.g. measure audio signals in relation to AUDIO_GND). Caution: It is not allowed to use heat sinks as ground. Test probe: Ri > 10 M, Ci < 20 pF. Use an isolated trimmer/screwdriver to perform alignments.

6.3.1

Tuner AGC (RF AGC Take Over Point Adjustment) Purpose: To keep the tuner output signal constant as the input signal amplitude varies. No alignment is necessary, for the AGC alignment you can use the default value: 80. Store settings and exit SAM.

6.3.2

White Point Set Active control to Off. Choose TV menu, TV Settings and then Picture and set picture settings as follows:
Off Off Off Unscaled Off 50 0 100

Picture Setting Dynamic backlight Dynamic Contrast Colour Enhancement Picture Format Light Sensor Brightness Colour Contrast

6.1.1

Alignment Sequence First, set the correct options: In SAM, select Options, and then Option numbers. Fill in the option settings for Group 1 and Group 2 according to the set sticker (see also paragraph 6.4 Option Settings). Press OK on the remote control before the cursor is moved to the left. In submenu Option numbers select Store and press OK on the RC. OR: In main menu, select Store again and press OK on the RC. Switch the set to Stand-by. Warming up (>15 minutes).

Go to the SAM and select Alignments-> White point.

White point alignment LCD screens: Use a 100% white screen as input signal and set the following values: Colour temperature: Normal. All White point values to: 127. Red BL offset values to 8. Green BL offset values to 8. In case you have a colour analyser: Measure with a calibrated contactless colour analyser in the centre of the screen. Consequently, the measurement needs to be done in a dark environment. Adjust the correct x, y coordinates (while holding one of the White point registers R, G or B on 127) by means of decreasing the value of one or two other white points to the correct x, y coordinates (see Table 6-1 White D alignment values). Tolerance: dx: 0.004, dy: 0.004. Repeat this step for the other colour temperatures that need to be aligned. When finished press OK on the RC and then press STORE (in the SAM root menu) to store the aligned values to the NVM. Restore the initial picture settings after the alignments. Table 6-1 White D alignment values
Value x y Cool (11000K) 0.272 0.281 Normal (9000K) 0.282 0.287 Warm (6500K) 0.311 0.328

6.2

Hardware Alignments
Not applicable.

6.3

Software Alignments
Put the set in SAM mode (see Chapter 5. Service Modes, Error Codes, and Fault Finding). The SAM menu will now appear on the screen. Select ALIGNMENTS and go to one of the sub menus. The alignments are explained below. The following items can be aligned: Tuner AGC. White point. To store the data: Press OK on the RC before the cursor is moved to the left. In main menu select Store and press OK on the RC. Press MENU on the RC to switch back to the main menu. Switch the set to stand-by mode. For the next alignments, supply the following test signals via a video generator to the RF input:

If you do not have a colour analyser, you can use the default values. This is the next best solution. The default values are average values coming from production. Select a COLOUR TEMPERATURE (e.g. COOL, NORMAL, or WARM).

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Alignments
Set the RED, GREEN and BLUE default values according to the values in Table 6-2. When finished press OK on the RC, then press STORE (in the SAM root menu) to store the aligned values to the NVM. Restore the initial picture settings after the alignments.

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See Table 6-3 Option and display code overview for the options. Diversity Not all sets with the same Commercial Type Number (CTN) necessarily have the same option code! Use of Alternative BOM => an alternative BOM number usually indicates the use of an alternative display or power supply. This results in another display code thus in another Option code. For the power supply there is no difference. Refer to Chapter 2. Technical Specifications and, Connections. 6.4.5 Option Code Overview Table 6-3 Option and display code overview

Table 6-2 White tone default setting


White Tone Colour Temp Normal Cool Warm R 127 123 127 G 114 122 110 B 114 126 67 Black level offset R 8 8 8 G 8 8 8

6.4
6.4.1

Option Settings
CTN (Alt. BOM#) Options Group 1 Options Group 2 Disp. code

Introduction The microprocessor communicates with a large number of I2C ICs in the set. To ensure good communication and to make digital diagnosis possible, the microprocessor has to know which ICs to address. The presence / absence of these PNX51XX ICs (back-end advanced video picture improvement IC which offers motion estimation and compensation features (commercially called HDNM) plus integrated Ambilight control) is made known by the option codes.

42PFL9664H/12 08227 35975 18431 45288 30660 47282 00160 00000 196 42PFL9664H/60 08227 35975 18431 45288 30660 47282 00160 00000 196 47PFL9664H/12 08227 35975 18431 45288 30661 47282 00160 00000 197 47PFL9664H/60 08227 35975 18431 45288 30661 47282 00160 00000 197

Important: after having edited the option numbers as described above, you must press OK on the remote control before the cursor is moved to the left!

6.5
Notes: After changing the option(s), save them by pressing the OK button on the RC before the cursor is moved to the left, select STORE in the SAM root menu and press OK on the RC. The new option setting is only active after the TV is switched off / stand-by and on again with the mains switch (the NVM is then read again). 6.4.2 Dealer Options For dealer options, in SAM select Dealer options. See Table 6-4 SAM mode overview. 6.4.3 (Service) Options Select the sub menu's to set the initialisation codes (options) of the model number via text menus. See Table 6-4 SAM mode overview. 6.4.4 Opt. No. (Option numbers) Select this sub menu to set all options at once (expressed in two long strings of numbers). An option number (or option byte) represents a number of different options. When you change these numbers directly, you can set all options very quickly. All options are controlled via eight option numbers. When the NVM is replaced, all options will require resetting. To be certain that the factory settings are reproduced exactly, you must set both option number lines. You can find the correct option numbers on a sticker inside the TV set and in Table 6-3 Option and display code overview. Example: The options sticker gives the following option numbers: 08192 00133 01387 45160 12232 04256 00164 00000 The first line (group 1) indicates hardware options 1 to 4, the second line (group 2) indicate software options 5 to 8. Every 5-digit number represents 16 bits (so the maximum value will be 65536 if all options are set). When all the correct options are set, the sum of the decimal values of each Option Byte (OB) will give the option number.

Reset of Repaired SSB


A very important issue towards a repaired SSB from a service repair shop implies the reset of the NVM on the SSB. A repaired SSB in service should get the service Set type 00PF0000000000 and Production code 00000000000000. Also the virgin bit is to be set. To set all this, you can use the ComPair tool. In case of a display replacement, reset the Operation hours display to 0, or to the operation hours of the replacement display. New here in this chassis is the Net TV functionality. Therefore the CTN (set type item in CSM1) must be filled into the spare SSB to ensure access to the Net TV portals. The loading of the CTN can be done via ComPair (Model number programming). The reset item (Clear NET TV memory) can be selected via MENU (or HOME) => Setup => Installation => Clear NET TV memory (customer preferences stored at provider side will be reset now).

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3. Create a folder upgrades in the root of a USB stick (size > 50 MB) and save the autorun.upg file in this upgrades folder. Note: it is possible to rename this file, e.g. Q549_SW_version.upg, this in case there are more than one autorun.upg files on your USB stick 4. Plug the prepared USB stick into the TV set, and select the autorun file in the displayed browser on the screen 5. Now the main TV software will be loaded automatically, supported by a progress bar 6. Set the correct display code via 062598-HOME-xxx, where xxx is the 3-digit display panel code (see sticker on the side/bottom of the cabinet). 6.6.2 When no picture is available Due to a possible wrong display option code in the received Service SSB (NVM), no picture can be available at start-up and thus no download application will be visible. Here you can proceed and finalize step by step to load the main TV software via the UART logging on the PC (for visual feedback). 1. Start-up the TV set, equipped with the Service SSB, and enable the UART logging on the PC (see for settings 5.8 Fault Finding and Repair Tips 5.8.6 Logging) 2. The TV set will start-up automatically in the download application if main TV software is not loaded 3. Plug the prepared USB stick into the TV set, press cursor Right to enter the list, and navigate to the autorun file in the UART logging printout via the cursor keys on the remote control. When the correct file is selected, press OK 4. Press cursor Down and OK to start the flashing of the main TV software. Printouts like: L: 1-100%, V: 1-100% and P: 1-100% should be visible now in the UART logging 5. Wait until the message Operation successful! is displayed and remove all inserted media. Restart the TV set 6. Set the correct display code via 062598-HOME-xxx, where xxx is the 3-digit display panel code (see sticker on the side/bottom of the cabinet). 6.6.3 Use of repaired SSBs instead of new Repaired SSBs on stock will obviously already contain main TV software. This implies that only a main software upgrade is required if you use a repaired SSB for board swap instead of a new SSB.

SSB identification Whenever ordering a new SSB, it should be noted that the correct ordering number (12nc) of a SSB is located on a sticker on the SSB. The format is <12nc SSB><serial number>. The ordering number of a Service SSB is the same as the ordering number of an initial factory SSB.

18310_221_090318.eps 090319

Figure 6-1 SSB identification

6.6

Service SSB delivered without main software loaded


Due to a changed manufacturing process, new Service SSBs can be delivered to the warehouse without main TV software loaded. Below you find the steps to follow when such an SSB is received.

6.6.1

When a picture is available 1. Mount the Service SSB into the TV set. After start-up, normally the download application will appear on the screen. 2. Download the latest main software (FUS) from the www.p4c.philips.com website.

6.7

Total Overview SAM modes


Table 6-4 SAM mode overview
Main Menu Hardware Info Sub-menu 1 A. SW VERSION C. Production code Operation hours Error Reset error buffer Alignment Tuner AGC White point Colour temperature Normal Warn Cool White point red White point green White point blue Red black level offset Green black level offset LCD White Point Alignment. For values, see Table 6-1 White D alignment values. Sub-menu 2 e.g. Q5492_1.26.15.0 e.g. See type plate Displays the accumulated total of operation hours.TV switched on/off & every 0.5 hours is increase one Displayed the most recent errors. Clears all content in the error buffer. RF-AGC Take over point adjustment (AGC default value is 80) 3 different modes of colour temperature can be selected Sub-menu 3 Description Display TV & Standby SW version and CTN serial number.

B. Standby processor version e.g. STDBY_88.68.0.0

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Alignments
Main Menu Dealer options Sub-menu 1 Picture mute Sub-menu 2 Off/On Sub-menu 3

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Select Picture mute On/Off. Picture is muted / not muted in case no input signal is detected at input connectors. Select Virgin mode On/Off. TV starts up / does not start up (once) with a language selection menu after the mains switch is turned on for the first time (virgin mode) Select E-sticker On/Off (USPs on-screen)

Virgin mode

Off/On

E-sticker Auto store mode

Off/On None PDC/VPS TXT page PDC/VPS/TXT

Options

Digital broadcast

DVB DVB - T installation DVB - T light DVB - C DVB - C installation Over the air download 8 days EPG

Off/On Off/On or Country dependent Off/On Off/On Off/On or Country dependent Off/On or Country dependent Off/On Off/On Off/On Off/On Off/On Off Off/On Off/On Off 180 / LCD Sharp Z3LA13 56" Off/On Not present/Present

Select DVB On/Off Select DVB T installation On/Off or by country Select DVB T light On/Off Select DVB C On/Off Select DVB C installation On/Off or by country Select Over the air download On/Off or by country Select 8 day EPG On/Off Select USB On/Off Select Ethernet On/Off Select Wi-Fi On/Off Select DLNA On/Off On-line service is Off Select PTP On/Off Select Update assistant On/Off Internet software update is Off Displayed the panel code & type model. Select LightGuide On/Off Select Display fans Present/Not present.

Digital features

USB Ethernet Wi-Fi DLNA On-line service PTP (Picture Transfer Protocol) Update assistant Internet software update

Display

Screen LightGuide Display fans Temperature sensor Temperature LUT E-box & monitor

Sensor present in display (only for N.A. 21:9) 0 Off/On None/PNX5100 Off/On Off/On 0/1/2/3 Pixel Plus HD Perfect Pixel HD Pixel Precise HD N.A Select E-box & monitor On/Off Select Picture processing None/PNX5100 (Q549.xE chassis). Select MOP local contrast On/Off Select Light sensor On/Off Select Light sensor type form 0 to 3 (for difference styling). Select type of picture improvement.

Video reproduction

Picture processing MOP local contrast Light sensor Light sensor type Pixel Plus type

Ambilight

None, 2 sided 2/2 2 sided 4/4 3 sided 2/3/2 3 sided 4/3/4 3 sided 4/5/4 4 sided 4/3/4/3

Select type of Ambilight modules use. For 8400 series only

Ambilight technology MOP ambilight

LED/Future use Off/On

Ambilight technology LED is in use. Select MOP ambilight On/Off

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Sub-menu 1 Audio reproduction Source selection

Alignments
Sub-menu 2 Acoustic system EXT1/AV1 type SCART CVBS RGB LR CVBS Y/C YPbPr LR CVBS Y/C YPbPr HV LR (CVBS) YPbPr LR EXT2/AV2 type SCART CVBS RGB LR CVBS Y/C LR (CVBS) YPbPr LR CVBS Y/C LR EXT3/AV3 type None CVBS CVBS LR YPbPr YPbPr LR YPbPr HV LR VGA SIDE I/O HDMI 1 HDMI 2 HDMI 3 HDMI 4 HDMI side HDMI CEC HDMI CEC RC pass through HDMI CEC Pixel Plus link Off/On Off/On Off/On Off/On Off/On Off/On Off/On Off/On Off/On Off/On Europe/AP-PAL-MULTI/Australia HD1816-MK1/TD1716-MK4/ TD1716-MK3/HD1816-MK2 Off/On Off/On Off/On Off/On Off Select VGA On/Off Select SIDE I/O On/Off Select HDMI 1 On/Off Select HDMI 2 On/Off Select HDMI 3 On/Off Select HDMI 4 On/Off Select HDMI side On/Off Select HDMI CEC On/Off Select HDMI CEC RC pass through On/Off Select Pixel Plus link On/Off Select Region/country. Select type of Tuner used. Select System RC support On/Off. Select Embedded user manual On/Off. Select Start-up screen On/Off. Select Wallpaper On/Off. Hotel mode is Off. The first line (group 1) indicates hardware options 1 to 4. The second line (group 2) indicates software options 5 to 8. Store after changing. N.A Select Store in the SAM root menu after making any changes. Display information is for development purposes. Select input source when connected with external equipment. Select input source when connected with external equipment. Sub-menu 3 Description Cabinet design used for setting dynamic audio parameters. Select input source when connected with external equipment.

Main Menu

Miscellaneous

Region Tuner type System RC support Embedded user manual Start-up screen Wallpaper Hotel mode

Option number

Group 1 Group 2 Store

e.g. 08192.02181.01387.45160 e.g. 10185.12448.00164.00000

Initialise NVM Store Software maintenance Software events Display Clear Test reboot Hardware events Operation hours display Display Clear 0003

Display information is for development purposes. In case the display must be swapped for repair, you can reset the Display operation hours to 0. So, this one does keeps up the lifetime of the display itself (mainly to compensate the degeneration behaviour). Display information is for development purposes.

Test setting

Digital info

QAM modulation: 64-QAM Symbol rate: 23:29 Original network ID: 12817 Network ID:12817 Transport stream ID: 2 Service ID: 3 Hierarchical modulation: 0 Selected video PID: 35 Selected main audio PID: 99 Selected 2nd audio PID: -1

Install start frequency Install end frequency Default install frequency Installation

000 999 Digital only Digital + Analogue

Install start frequency from 0 MHz Install end frequency as 999 MHz Select Digital only or Digital + Analogue before installation.

2009-May-29

Alignments
Main Menu Sub-menu 1 Sub-menu 2 Display parameters DISPT 3.26.8.7 Acoustics parameters ACSTS 3.6.6.5 PQ - PRFPP 1.26.10.4 Ambilight parameters PRFAM 2.6.1.3 Development 2 file version 12NC one zip software Initial main software NVM version Q5492_0.4.0.0 Flash units SW Q5492_0.26.15.0 Upload to USB Channel list Personal settings Option codes Display-related alignment History list Download from USB Channel list Personal settings Option codes Display-related alignment Sub-menu 3

Q549.6E LA
Description

6.

EN 41

Development file ver- Development 1 file version sions

Display information is for development purposes.

Display information is for development purposes.

To upload several settings from the TV to an USB stick

To download several settings from the USB stick to the TV.

2009-May-29

EN 42

7.

Q549.6E LA

Circuit Descriptions

7. Circuit Descriptions
Index of this chapter: 7.1 Introduction 7.2 Power Architecture 7.3 Front-End 7.4 HDMI 7.5 Video and Audio Processing - PNX8543 7.6 Common Interface CI+ 7.7 Net TV 7.8 Ambi Light Notes: Only new circuits (circuits that are not published recently) are described. Figures can deviate slightly from the actual situation, due to different set executions. For a good understanding of the following circuit descriptions, please use the wiring, block (see chapter 9. Block Diagrams) and circuit diagrams (see chapter 10. Circuit Diagrams and PWB Layouts).Where necessary, you will find a separate drawing for clarification. Main difference with the Q549.2E LA chassis is the separation of the Power Supply Unit into two separate ones. 7.1.1 Implementation Key components of this chassis are: PNX8543 Digital Colour Decoder EP3C25F324C7N FPGA (Local Contrast) HD1816AF Hybrid Tuner DRX3926K Demodulator TDA9996 HDMI Switch TPA3123D2PWP Class D Power Amplifier DP83816AVNG PCI ethernet media access controller and physical layer (MacPhyter-II). 7.1.2 TV543 Architecture Overview For details about the chassis block diagrams refer to chapter 9. Block Diagrams. An overview of the TV543 architecture can be found in Figure 7-1.

7.1

Introduction
The Q549.6E LA chassis (platform name TV543/92 Narrow and Thin) is a derivative from the Q549.2E LA chassis.

DDR
16

DDR-II
32

CY3 Local Contrast

DDR-II
32

NXP PNX8543
Hybrid Tuner Saw

PNX5120
Halo Reduced HD-NM FHD 120Hz Ambient Light Led Dimming

Matrix
FHD@120p FHD@100p

MICRONAS DRX39xyK CA

H264 USB 2 0 2.0


8

Pixelated Ambi

PCI
Ethernet Mini PCI (Wifi)
hdmi

FLASH

hdmi

Spartan XC3S250E Led Dimming

SPI LVDS

TDA9996 MUX

hdmi

hdmi

hdmi

2 channel Audio Amp.

18310_200_090317.eps 090317

Figure 7-1 Architecture of TV543/92 Elite Core Narrow and Thin (N&T) platform

2009-May-29

Circuit Descriptions
7.1.3 SSB Cell Layout

Q549.6E LA

7.

EN 43

1M71

1F02

1M59

1 H 0 1

1M01

1CJ0

1R12
serv L/R

VGA
1HP0

DDR2

DDR2

1G50

Xilinx

1E51 1E50

Pb

1R08

Scart / YPbPr

Scart / YPbPr

GPI O

DDR2
lvds-rx

1M36

SPO

Lo

Pr

1R07

lvds-tx

1HE0

5100 40x40 1.27

uart PCI/ XIO I C

1G51

vdi

pci/xio

LVDS 2

LVDS 1

Audio In

USB

Audio Out

STBY

TDA 10048

DDR2

RJ45
1M20

HDMI MUX

Ethernet

1M95

FLASH

1P00
H D M I H D M I H D M I H D M I

CA

1M99

Class-D
1 7 3 5 H D M I

Figure 7-2 SSB layout cells (top view)

PCI

CA

DDR2

Video Out

Wifi

TDA 10023

TDA 98XX

Video In

HDMI A

HDMI B

TS in

DV in

E J T A G

GPIO

DDR
PNX8542/3 DDR

CY3 C40

ambi

Ro

Head
R

Right Left CVBS

Tuner

Y/C

USB 2.0

HD MI 1.3

DC/DC

18310_201_090317.eps 090317

2009-May-29

EN 44 7.2

7.

Q549.6E LA

Circuit Descriptions

Power Architecture
Refer to figure Figure 7-3 for the power architecture of this platform.

F use

12VD isp

V display LC D Power-on

PSU

P la tfo rm P ow er
3V3stby

SSB
Standby
+3V3 stby

PNX5100
Boost control (Opt)

+1V2

+1V2-ST AN D BY

BL D IM *

Lam p On *
F use

Lam p On

BL D IM

Inverter**

+12V
Fuse

+1V2

+1V2-PNX85XX

Enable -3V3

D ual DC C /D
+3V3 +2V5 +3V3F 2.5V 1% voltage ref Boost conv . (opt) +1V8 +2V5 +1V8 +1V8 +3V3 +2V5 (loc.Contr.FPGA) +1V8-PNX85XX +1V8-PNX5100

Display

12V U ndervoltage detect D etect 2 (12V sense)

Sw itches off +3V3 and +5V

+33V

+33V-TUN(analog) AN D

+1V2

+1V2-PN X 5100 +5V +5V tuner +5V-T un +5V-T U N

24V** Inverter* 24 Vs
(+/-12 Vs opt)

Power-OK

D ual DC C /D

+5V

Stby P
D etect 1

Audio proc + C lass D 24V

Am bilight Bolt on -

+3V3 (SSB)

*: present in inverterless displays **: present in displays w ith internal inverter V inverter 4kV* V backlight 24 V**

18310_202_090317.eps 090317

Figure 7-3 Power Architecture TV543/92 platform 7.2.1 Power Supply Unit All power supplies are a black box for Service. When defective, a new board must be ordered and the defective one must be returned, unless the main fuse of the board is broken. Always replace a defective fuse with one with the correct specifications! This part is available in the regular market. Consult the Service website for the order codes of the boards. In the TV543 Elite Core Narrow and Thin (N&T) platform, two Power supply Units are implemented. In this manual, no detailed information is available because of design protection issues. The output voltages to the chassis are: +3V3-STANDBY (standby-mode only) +12V (on-mode) +Vsnd (+24V) (audio power) (on-mode) +24V (bolt-on power) (on-mode) IPB: High voltage to the LCD panel. 7.2.2 Diversity Below find an overview of the different PSUs that are used: Table 7-1 Supply diversity
PSU IPB DPS-288CP A B & IPB DIV-003 Model Input Voltage Range 42" High Mains (198- 265 Vac) High Mains (198- 265 Vac)

IPB DPS-288CP A B & IPB Delta 2k9 N&T 47"

2009-May-29

Circuit Descriptions 7.3 Front-End

Q549.6E LA

7.

EN 45

P la tfo rm w ith e m b e d d e d E D ID
The Front-End consist of the following key components: Tuner HD1816AF SAW filter 36M125 IF demodulator DRX3926K AGC amplifier UPC3221GV.
E D ID: 2 5 3B

IIC
3B

CPU

TDA 9996
3B 3B 3B

Below find a block diagram of the front-end application.

I2C-SSB NXP Hybrid Tuner SAW Filter CVBS IF Amplifier DRX3926K 2nd SIF TS IF-AGC I2C-TUNER PNX8543

4 HDMI inputs

2 5 3 co m m o n yte s B + 1B su b d d re s o f a S o u rce h ys l A d d re ss P ica +3B fo r inp u t A +3B fo r inp u t B +3B fo r inp u t C +3B fo r inp u t D
18440_214_090227.eps 090227

18440_211_090227.eps 090227

Figure 7-6 EDID control (embedded EDID) The deltas with respect to the use of the TDA9996 as HDMI multiplexer compared with earlier chassis/platforms are: +5V detection mechanism Stable clock detection mechanism Integrated EDID RT control HPD control TMDS output control CEC control New hot plug control for PNX8543 for 5th HDMI input New EDID structure: EDID stored in TDA9996, therefore there are no EDID pins on the SSB. Only in the event of a 5th HDMI input, an additional EEPROM is foreseen, as was implemented in previous platforms. After replacement of the TDA9996 HDMI mux, the default I2C address should be reprogrammed from C0 to CE, and the HDMI EDIDs should be reprogrammed as well. Both actions should be executed via ComPair.

Figure 7-4 Front-End block diagram The DRX3926K is a multi-standard demodulator supporting DVB-C, DVB-T and analogue standards. The demodulated digital stream is fed into the parallel transport stream data ports of the PNX8543. The demodulated analogue signal in the form of CVBS is connected to the analogue video CVBS/Y input channel, while the SIF is connected via the SSIF2 positive input port.

7.4

HDMI
In this platform, the TDA9996 HDMI multiplexer is implemented. Only for one HDMI input, a separate EEPROM is implemented to store the EDID values. For the other HDMI inputs, the EDID contents are no longer stored in a separate EEPROM, but directly in the multiplexer. Each input has its own physical sub address: the first 253 bytes are common, where the last 3 bytes define the specific input. The EDID contents are, at +5V power-up, downloaded to RAM. The following figures show the HDMI input configuration and EDID control.

7.5

Video and Audio Processing - PNX8543


The PNX8543 is the main audio and video processor (or System-on-Chip) for this platform. It is a member of the PNX85xx SoC family (described in earlier chassis) with the addition of the MPEG4 functionality; the separate STi710x MPEG4 decoder is no longer implemented in this platform.

PNX8543

B
1P 05

H D M IB-R X DRX H D M IA-R X Out D

Some more deltas compared to the previous PNX85xx are: 2 HDMI inputs (A & B) HDMI deep colour RGB/YCbCr 4:4:1 10/12 bit detection. The PNX8543 handles the digital and analogue audio- and video decoding and processing. The processor is a MIPS32 general purpose CPU and a 8051-based TV controller for power management and user event handling. For a functional diagram of the PNX8543, refer to Figure 7-7.

TDA9996

H D M I Side (optional) CRX

E d id

AR X B BR X

1P06

1P04

1P03

1M 96

HDMI 3 (optional)

HDMI 2

1P02

HDMI 4 (optional)

HDMI 1
18440_213_090227.eps 090227

Figure 7-5 HDMI input configuration

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EN 46

7.

Q549.6E LA

Circuit Descriptions

PNX8543x

MEMORY CONTROLLER

TS in from channel decoder TS out/in for PCMCIA DV-ITU-656 CI/CA

MPEG SYSTEM PROCESSOR

PRIMARY VIDEO OUTPUT

LVDS

LVDS for flat panel display (single or dual channel)

DV INPUT AV-PIP SUB-PICTURE

CVBS, Y/C, RGB

VIDEO DECODER

3D COMB SECONDARY VIDEO OUTPUT VIDEO ENCODER analog CVBS

Low-IF

DIGITAL IF

MPEG/H.264 VIDEO DECODER

SCALER, DE-INTERLACE AND NOISE REDUCTION AUDIO DACS AUDIO DSP analog audio

SSIF, LR

AUDIO DEMOD AND DECODE

Dual SPDIF I2S

AUDIO IN 300 MHz AV-DSP HDMI RECEIVER DRAWING ENGINE 300 MHz MIPS32 4KEc CPU

AUDIO OUT

I2S SPDIF

Dual HDMI

SYSTEM CONTROLLER (8051)

DMA BLOCK

I 2C

PWM GPIO x 22

IR

ADC

SPI

UART

I2C

GPIO Flash USB 2.0 CA x 10

PCI 2.2
18440_202_090226.eps 090226

Figure 7-7 PNX8543 functional diagram 7.5.1 Video Subsystem Refer to Figure 7-8 for the main video interfaces for the PNX8543 and the video signal flow between blocks and memory.

2009-May-29

Circuit Descriptions

Q549.6E LA

7.

EN 47

DDR2-SDRAM

PNX8543x
MCU-DDR

A VCP/PC 2D_DE

VCP_ UIP VCP_ WIFD PC_ UIP GFX1 GFX2 PIP

DMA BUS

LOW IF CVBS RGB YPbPr VGA

VCP_RX AFE (ADC) PC_RX

CPIPE_ L2QTV

LVDS_BUF LVDS_TX

LCD panel FPD-LVDS1 LCD panel FPD-LVDS2

main MBVP_ L2QTV

HDMI Dual HDMI HDMI_ RX HDMI_UIP

MBVP_ L2VO1

DV (including ITU-656)

VIP (ITU-656)

MBVP_ L2VO2

CPIPE_ L2VO

CVBS/Y DENC C

DAC

monitor CVBS1/Y

MUX TS PCMCIA TSDO TSDI CMD CAI VMSP A TSI MSVD

DAC

monitor CVBS2/C

18440_203_090226.eps 090226

Figure 7-8 PNX8543 video flow diagram The Video Subsystem consist of the following blocks: Analogue Front-End (AFE) block Video and PC Capture (VPC/PC) pipe HDMI Receiver interface Memory-Based Video Processor MBVP) Video Composition Pipe (CPIPE) Memory Based Video Processor (MBVP) VO-1 Memory Based Video Processor (MBVP) VO-2 Video Composition Pipe (CPIPE) Dual Flat Panel Display-LVDS (FPD-LVDS) Digital Encoder (DENC) Digital Video VIP 2D graphics block. 7.5.2 Audio Subsystem Refer to Figure 7-9 for the main audio interfaces for the PNX8543 and the audio signal flow between blocks and memory.

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EN 48

7.

Q549.6E LA

Circuit Descriptions

DDR2-SDRAM

PNX8543x
MCU

TS-IN

CAI XB1

VMSP

TM2270 (MPEG, AC-3, MP3 DECODER)

XB4 SPDIF-Out

SPDIF-IN1 SPDIF-IN2

SPDIF-IN

SPDIF-OUT

fast SPDIF I2S-IN-SD1 I2S-IN-SD2 I2S-IN-SD3 I2S-IN-SD4 I2S-IN-WS I2S-IN-SCK I2S-IN-OSC XB2 AI

DMA BUS

AO

4 I2S

HDMI

SPDIF HDMI_RX I 2S

4 I2S 4

XB3
4 I2S 4

IF SSIF from XB4

ADC ASDEC DigIF (DEMODULATION AND DECODING) SPDIF

APP - AUDIO DSP (POST PROCESSING)

I2S-OUT-SD1 I2S-OUT-SD2 I2S-OUT-SD3 I2S-OUT-SD4 I2S-OUT-WS I2S-OUT-SCK I2S-OUT-OSC

L, R

ADC

2 DAC 2 DAC 2 DAC 2 DAC

Main L, R HP L, R SCART2 L, R SCART1 L, R

18440_204_090226.eps 090226

Figure 7-9 PNX8543 audio flow diagram The Audio Subsystem consist of the following blocks: Analogue Audio Front End (AAFE) used to capture Baseband Audio Inputs and to sample Secondary Sound IF (SSIF) directly or via Low-IF input HDMI Receiver interface block SPDIF input block Audio Input (AI) block Audio Output (AO) block Demodulation & Decoding (ASDEC) DSP for decoding all analogue terrestrial TV sound standards Audio Post-Processing (APP) block Digital Audio decoder. 7.5.3 Connectivity and Compute Subsystem Refer to Figure 7-10 for the connectivity and compute subsystem.
2009-May-29

Circuit Descriptions

Q549.6E LA

7.

EN 49

DDR2-SDRAM

PNX8543x
MCU_DDR

I2C-1

IIC4_DMA

I2C-2

IIC2_DMA DCS-NETWORK

MIPS 4KEc EJTAG

I2C-3

IIC3_DMA DMA BUS

AVDSP

UART-1

UART1

PCI_XIO PCI/XIO

UART-2

UART2 CAI CI/CA I2C-MC SYSTEM CONTROLLER 80C51 UART-3 PWMs GPIOs

USB

USB2.0

EJTAG

JTAG_MMIO

18440_205_090226.eps 090226

Figure 7-10 PNX8543 connectivity and compute subsystem The Connectivity Subsystem consists of: PCI/XIO interface USB2.0 interface Three 2-wire UARTs Four Master/Slave I2C interfaces Common Interface/Conditional Access Interface. The Computing Subsystem consists of: 32-bit MIPS RISC core Enhanced JTAG (EJTAG) block inside the MIPS JTAG_MMIO blocks TV controller Audio/Video DSP (AV_DSP) Memory Control Unit (MCU). 7.5.4 Service Notice - FLASH RAM / PNX8543 exchange The FLASH RAM (item 7P10) and/or PNX8543 (item 7H00) can only be exchanged by an authorised central workshop with dedicated programming tools. Due to the presence of (CI+) keys in the components, unauthorised exchange of these components will always result in a defective board.

2009-May-29

EN 50 7.6

7.

Q549.6E LA

Circuit Descriptions
Access Module (CAM) and the Integrated Digital Television (IDTV). The security mechanisms in CI+ are derived/copied from POD (with the exception of Out Of Band (OOB) used in US CA systems). For more information about conventional CA systems using a CI module, refer to the BJ3.0E L/PA or BL2.xU Service Manual. The CI+ standard is downwards compatible with the existing CI standard. The following figure shows the implementation of the CI+ Conditional Access system in the TV543 platform.

Common Interface CI+


Together with this platform, an extention to the Common Interface (CI) Conditional Access system is added, called CI+. CI+ or Common Interface Plus is a specification that extends the Common Interface (DVB-CI) as described in the digital broadcasting standard DVB. The weakness of the conventional CI module as Conditional Access system was the absence of a Copy Protection mechanism, as decrypted content could be sent over the PCMCIA interface unscrambled. With the CI+ extension, a form of copy protection is established between the Conditional

tuner

channel decoder

TS -IN P U T d em u x

D E S /AE S d escram b ler

d eco d er

M atrix M atrix

M H E G C I+

P N X 8543 T ransport stream interface C om m and interface


Tran sp o rt S tream s
C A-C TR L C A-M D I C A-M D O P C I/X IO MHEG MMI ap p licatio n D E S /AE S scram b ler

C A clien t

C A-C o n tro l

CAM (S C )

P ro p rietary C A scram b ling

C I + S tan d ard ised C C S scram b ling

18440_221_090227.eps 090227

Figure 7-11 CI+ Conditional Access implementation

7.7

Net TV
In this chassis, a feature that enables access to dedicated internet pages from a limited group of information suppliers, called Net TV, is introduced. A separate Wi-Fi module enables wireless communication with a local network.

7.8

Ambi Light
The Ambi Light architecture in this platform has been entirely renewed. The characteristics are: Additional DC/DC board generating 12/16/24 V (optional) ARM processor (on DC/DC panel or AL board) Low-power LEDs SPI interface from ARM to LED drivers I2C upgradeable via USB Each AL module has a temperature sensor. The use of the DC/DC board is optional. In case no DC/DC board is implemented, the ARM processor is located on one of the AL boards. Refer to Figure 7-12 for the Ambi Light architecture.

2009-May-29

Circuit Descriptions

Q549.6E LA

7.

EN 51

18310_203_090317.eps 090317

Figure 7-12 Interface between Ambi Light and SSB 7.8.1 ARM controller Refer to Figure 7-13 below for signal interfacing to and from the ARM controller. The ARM controller is located on the DC/DC board (item no. 7302) or AL panel (item no. 7102). The SPI bus is a synchronous serial data link standard that operates in full duplex mode. For debugging purposes, the working principle is given below: At startup the controller will read-out matrix data from the EEPROM devices (via SPI DATA RETURN) Before operation, the driver current is set via SPI, with driver in DC mode During normal operation the controller receives RGB-, configuration-, operation mode- and topology data via I2C The controller converts the I2C RGB data via the matrixes to SPI LED data Via data return the controller receives error data (if applicable). Also PWM clock and BLANK signals are generated by the controller. The controller can be reprogrammed via I2C (via USB). The controller can receive matrix values via I2C, which will be stored in the EEPROM of each AL module via the SPI bus. The temperature sensor in each AL module controls the TEMP line; in case of a too high temperature the controller will reduce the overall brightness. 7.8.2
18310_204_090318.eps 090318

SD A SC L S E L1 S E L2

S da1 S c l1 t bd t bd

Sck P 0. 7 P 0. 8

SPI C LO C K SPI LATC H SPI LATC H 2 (only on dc/dc for aurea) SPI D ATA O U T PW M C LO C K SPI D ATA R ETU R N BLAN K PR O G C S EEPR O M TEM P

M OSI M A T0.0

AR M

M ISO M A T1.0 t bd

Tx D RxD

Tx d0 R x d0

t bd P 0. 10

LED driver communication (via SPI bus) Refer to Figure 7-14 below for signal interfacing between the ARM controller and the LED drivers on the AL boards, and the LED drivers and the EEPROMs on the AL boards.

Figure 7-13 ARM controller interface Data transfer between ARM processor and LED drivers is executed by a Serial Peripheral Interface (SPI) bus interface.

Am b ilig h t m o d u le 1
o ut16

A m b ilig h t m o d u le 2
o ut16

A m b ilig h t m o d u le N
o ut16

LED D R IV E R 1
S P I d ata in

S o ut

S in

LED D R IV E R 2

S o ut

S in

LED D R IV E R N

S o ut

SPI d ata return SPI c lo c k (SC LK) SPI latc h (XLAT ) PR O G (VPR G ) BLAN K PW M C LO C K ( G SC LK)

ARM

18310_205_090318.eps 090318

Figure 7-14 SPI communication between ARM controller and LED drivers
2009-May-29

EN 52

7.

Q549.6E LA

Circuit Descriptions

The ARM controller communicates with the LED drivers (on each AL module) via an SPI bus. For debugging purposes, the working principle is given below: Data from the ARM controller is linked through the drivers, which are connected in cascade SPI CLK, SPI LATCH, PROG, BLANK and PWM CLOCK are going directly from the controller to each driver SPI DATA RETURN is linked from the last driver to the controller: controller decides which driver returns data. 7.8.3 Temperature Control Refer to Figure 7-15 for signal interfacing between the ARM controller and the temperature sensor on the AL boards.

Am bilight m odule 1 Vcc


Pull-up

Am bilight m odule 2 Vcc


Pull-up

Am bilight m odule N Vcc


Pull-up

TEMP SENSOR

TEMP SENSOR

TEMP SENSOR

ARM

18310_206_090318.eps 090318

Figure 7-15 Communication between ARM controller and temperature sensor Each AL board is equipped with a temperature sensor. If one of the sensors detects a temperature over the threshold, the TEMP line is pulled LOW which results in brightness reduction.

2009-May-29

IC Data Sheets

Q549.6E LA

8.

EN 53

8. IC Data Sheets
This chapter shows the internal block diagrams and pin configurations of ICs that are drawn as black boxes in the electrical diagrams (with the exception of memory and logic ICs).

8.1

Diagram SSB: DC/DC B01A, TPS53124PW (IC 7U03)

Block Diagram

Pin Configuration
VBST1 NC EN1 VO1 VFB1 NC GND TEST1 NC VFB2 VO2 EN2 NC VBST2 1 2 3 4 5 TPS53124 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 DRVH1 LL1 DRVL1 PGND1 TRIP1 VIN VREG5 V5FILT TEST2 TRIP2 PGND2 DRVL2 LL2 DRVH2
18250_300_090319.eps 090319

Figure 8-1 Internal block diagram and pin configuration


2009-May-29

EN 54 8.2

8.

Q549.6E LA

IC Data Sheets

Diagram SSB: Front End B02B, DRX3926K (IC 7T50)

Block Diagram

RF AGC SAW Main Tuner IF AGC IF AMP ADC DVB-T/QAM/ATV Demodulator Stereo Decoder Integrated Tuner DAC DAC DVB-T/QAM FEC

MPEG-2 TS

CVBS

SIF I2S Audio

Presaw Sense I2 C I2C System Controller GPIO

Pin Configuration
VSSAH_CVBS VDDAH_CVBS CVBS SIF VSSAL_AFE2 VDDAL_AFE2 PDP PDN INP INN VSSAH_AFE1 VDDAH_AFE1 VDDAL_AFE1 VSSAL_AFE1 IF_AGC RF_AGC

48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 XI XO VSSAH_OSC VDDAH_OSC VDDH VSSH VSSL VDDL TDO TMS TCK TDI I2C_SDA2 I2C_SCL2 I2S_CL I2S_DA 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 1 I2S_WS VDDL VSSL GPIO1 MSTRT MERR VSSH VDDH 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 VDDL VSSL MD3 MD2 MD1 MD0 MVAL MCLK 18440_300_090303.eps 090303 32 31 30 29 28 27 26 RSTN SAW_SW GPIO2 VSYNC VSSL VDDL VDDH VSSH I2C_SDA1 I2C_SCL1 MD7 MD6 MD5 MD4 VDDH VSSH

DRXK

25 24 23 22 21 20 19 18 17

Figure 8-2 Pin configuration

2009-May-29

IC Data Sheets 8.3

Q549.6E LA

8.

EN 55

Diagram SSB: PNX8543 - Stand-by Controller B04A, PNX8543 (IC7H00)

Block Diagram
PNX8543x
MEMORY CONTROLLER

TS in from channel decoder TS out/in for PCMCIA DV-ITU-656 CI/CA

MPEG SYSTEM PROCESSOR

PRIMARY VIDEO OUTPUT

LVDS

LVDS for flat panel display (single or dual channel)

DV INPUT AV-PIP SUB-PICTURE

CVBS, Y/C, RGB

VIDEO DECODER

3D COMB SECONDARY VIDEO OUTPUT VIDEO ENCODER analog CVBS

Low-IF

DIGITAL IF

MPEG/H.264 VIDEO DECODER

SCALER, DE-INTERLACE AND NOISE REDUCTION AUDIO DACS AUDIO DSP analog audio

SSIF, LR

AUDIO DEMOD AND DECODE

Dual SPDIF I2S

AUDIO IN 300 MHz AV-DSP HDMI RECEIVER DRAWING ENGINE 300 MHz MIPS32 4KEc CPU

AUDIO OUT

I2S SPDIF

Dual HDMI

SYSTEM CONTROLLER (8051)

DMA BLOCK

I2C

PWM GPIO x 22

IR

ADC

SPI

UART

I2C

GPIO Flash USB 2.0 CA x 10

PCI 2.2

Pin Configuration
ball A1 index area 1 B D F H K M P T V Y AB AD AF AH AK AM AP A C E G J L N R U W AA AC AE AG AJ AL AN Transparent top view
18440_301_090303.eps 090303

2 3

4 5

6 7

8 10 12 14 16 18 20 22 24 26 28 30 32 34 9 11 13 15 17 19 21 23 25 27 29 31 33

PNX8543xEH

Figure 8-3 Internal block diagram and pin configuration

2009-May-29

EN 56 8.4

8.

Q549.6E LA

IC Data Sheets

Diagram SSB: Ethernet B05A, PNX5120 (IC7C00)

Block Diagram
PNX51xx
MEMORY CONTROLLER

TM327x 1 LVDS RX 1 UIP L3K7 LVDS RX 2 Video TM327x 2 GIC 2 TM327x 3 GIC 3 PCI/XIO GIC 1

LVDS TX 1 I2C I2C-DMA I2C GFX Video LVDS TX 2 CPIPE L3K7 LVDS TX 3 LVDS TX 4 UART UART 16 X GPIO EJTAG CLOCK AUDIO IN AUDIO OUT CAB

Pin Configuration
ball A1 index area A B C D E F G H J K L M N P R T U V W Y AA AB AC AD AE AF 2 4 6 8 10 12 14 16 18 20 22 24 26 1 3 5 7 9 11 13 15 17 19 21 23 25

PNX51xx

Transparent top view


18560_300_090403.eps 090403

Figure 8-4 Internal block diagram and pin configuration

2009-May-29

IC Data Sheets 8.5 Diagram SSB: Ethernet B07G, DP83816 (IC7N04)

Q549.6E LA

8.

EN 57

Block Diagram

Pin Configuration
NC VSS NC AU X V DD VSS TXCLK TXEN C RS COL/MA16 A U XV D D VSS TXD3/MA15 TXD2/MA14 TXD1/MA13 TXD0/MA12 AU X V D D VSS C1 X2 X1 VSS RXDV/MA11 RXER/MA10 RXOE RXD3/MA9 RXD2/MA8 RXD1/MA7 AUX V DD VSS RXD0/MA6 RXCLK M DC MDIO M A5 MA4/EECLK MA3/EEDI

TPRDP/M

36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

3V DSP Physical Layer

TPTDP/M
NC VSS IAUXVDD VREF RESERVED NC NC VSS TPRDM TPRDP IAUXVDD REGEN VSS RESERVED VSS VSS TPTDM TPTDP VSS AUXVDD VSS AUXVDD PMEN/CLKRUNN PCICLK INTAN RSTN GNTN REQN VSS AD31 AD30 AD29 PCIVDD AD28 AD27 AD26 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72

Test data out

MII Mgt

MII RX

MII TX

25 MHz Clk

SRAM RX-2 KB SRAM RXFilter .5 KB SRAM TX-2 KB


Tx rd data Rx rd data Tx wr data Rx wr data

RAM BIST Logic

Test data in

Pin1 Identification

Interface Logic

MII RX MII TX MII Mgt BIOS ROM Cntl BIOS ROM Data EEPROM/LEDs

DP83816

PCI CLK PCI CNTL PCI AD

DP83816

AD25 AD24 C B EN 3 IDSEL VSS AD23 AD22 PCIVDD AD21 AD20 AD19 NC NC AD18 AD17 AD16 CBEN2 VSS FRAMEN IR D Y N TRDYN PCIVDD DEVSELN STOPN PERRN SE R R N PAR C BE N 1 AD15 AD14 VSS AD13 AD12 AD11 PCIVDD AD10

73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108

MAC/BIU

144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109

MA2/LED100N MA1/LED10N MA0/LEDACTN MD7 MD6 MD5 MD4/EEDO AUXVDD VSS MD3 MD2 MD1/CFGDISN MD0 MWRN MRDN MCSN EESEL RESERVED NC NC NC PWRGOOD 3VAUX AD0 AD1 AD2 AD3 PCIVDD AD4 AD5 VSS AD6 AD7 CBEN0 AD8 AD9

R x A ddr

Tx Addr

BROM/EE

MII Mgt

MII RX

MII TX

F_15710_167.eps 230905

Figure 8-5 Internal block diagram and pin configuration

2009-May-29

EN 58 8.6

8.

Q549.6E LA

IC Data Sheets

Diagram SSB: Audio B10A, TPA3123D (IC 7D10)

Block Diagram
1 F LIN RIN 1 F BSR ROUT PGNDR 1 F BYPASS AGND PGNDL LOUT BSL 0.22 F 22 H 470 F 0.68 F 0.68 F 0.22 F 22 H 470 F

AVCC

PVCCL PVCCR

VCLAMP Shutdown Control SD 1 F

MUTE

GAIN0 GAIN1

}
24 23 22 21 20 19 18 17 16 15 14 13

Control

Pin Configuration
PVCCL SD PVCCL MUTE LIN RIN BYPASS AGND AGND PVCCR VCLAMP PVCCR
TERMINAL NAME SD RIN LIN GAIN0 GAIN1 MUTE BSL PVCCL LOUT PGNDL VCLAMP BSR ROUT PGNDR PVCCR AGND AGND BYPASS AVCC Thermal pad 24-PIN (PWP) 2 6 5 18 17 4 21 1, 3 22 23, 24 11 16 15 13, 14 10, 12 9 8 7 19, 20 Die pad I/O/P DESCRIPTION Shutdown signal for IC (low = disabled, high = operational). TTL logic levels with compliance to AVCC Audio input for right channel Audio input for left channel Gain select least-significant bit. TTL logic levels with compliance to AVCC Gain select most-significant bit. TTL logic levels with compliance to AVCC Mute signal for quick disable/enable of outputs (high = outputs switch at 50% duty cycle, low = outputs enabled). TTL logic levels with compliance to AVCC Bootstrap I/O for left channel Power supply for left-channel H-bridge, not internally connected to PVCCR or AVCC Class-D 1/2-H-bridge positive output for left channel Power ground for left-channel H-bridge Internally generated voltage supply for bootstrap capacitors Bootstrap I/O for right channel Class-D 1/2-H-bridge negative output for right channel Power ground for right-channel H-bridge. Power supply for right-channel H-bridge, not connected to PVCCL or AVCC Analog ground for digital/analog cells in core Analog ground for analog cells in core Reference for preamplifier inputs. Nominally equal to AVCC/8. Also controls start-up time via external capacitor sizing. High-voltage analog power supply. Not internally connected to PVCCR or PVCCL Connect to ground. Thermal pad should be soldered down on all applications to properly secure device to printed wiring board.

1 2 3 4 5 6 7 8 9 10 11 12

PGNDL PGNDL LOUT BSL AVCC AVCC GAIN0 GAIN1 BSR ROUT PGNDR PGNDR

I I I I I I I/O P O P P I/O O P P P P O P P

18440_302_090303.eps 090303

Figure 8-6 Internal block diagram and pin configuration


2009-May-29

Block Diagrams

Q549.6E LA

9.

EN 59

9. Block Diagrams
Wiring Diagram 42" - 47" (Elite Core N&T)
WIRING DIAGRAM 42"- 47" (ELITE CORE N&T)
8317 8316 8319 8684 8320

Board Level Repair


1M83 (AL1)
1. SCL 2. GND 3. SDA 4. CONTROL-1 5. CONTROL-2 6. +3V3 7. GND 8. EEPROM-CS 9. TEMP-SENSOR 10. PROG 11. VLED1 12. GND 13. VLED2 14. GND

1M84 (AL1)

Component Level Repair Only For Authorized Workshop

LCD DISPLAY (1004)


8350 8360 8351
1T02 (TS1)
4P 6. GND1 5. GND1 4. SCAN_BLK2 3. SCAN_BLK1 2. BL_DIM 1. GND1 10. GND1 9. 16VB 8. GND1 7. 12V3 6. BOOST 5. BL_ON 4. SCAN_BLK2 3. SCAN_BLK1 2. INVOK 1. GND1

TO BACKLIGHT

TS

TEMP SENSOR
(1027)

14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. BLANK-BU 6. +3V3 5. PWM-CLOCK-BUF 4. SPI-LATCH 3. SPI-DATA-RETURN 2. SPI-DATA-OUT 1. SPI-CLOCK-BUF

TO BACKLIGHT

8150
CN5/1M99
12. N.C. 11. N.C. 10. N.C. 9. INVOK 8. ANALOG/PWM 7. BOOST 6. BL_DIM 5. BL_ON 4. GND1 3. GND1 2. 12V3 1. 12V3

CN6/1360

CN3/1351

1350/CN2

CN12/1351
10. SGND 9. 16VB 8. SGND 7. 12V3 6. BOOST 5. BL-ON 4. SCAN_BLK2 3. SCAN_BLK1 2. INV-OK 1. SGND

CN2/1319 1. HV3 2. HV3 3. HV3

CN7/1320 1. HV1 2. HV1 3. HV1

CN7/1317 1. HV2 2. HV2 3. HV2

TO BACKLIGHT AMBI-LIGHT MODULE 3/3 (1076)

3. 120VI 2. N.C. 1. GND1

8151

CN3/1316 1. HV4 2. HV4 3. HV4

TO BACKLIGHT AMBI-LIGHT MODULE 3/3 (1073)


1M83 (AL1)
14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. GND 6. +3V3 5. CONTROL-2 4. CONTROL-1 3. SDA 2. GND 1. SCL

8399

8395

8120

POWER SUPPLY IPB 42 DELTA 2K9 N&T


(1055)
8171
1G51 (B05C) 1G50 (B05C)
1. +VDISP1 2. +VDISP1 3. +VDISP1 ... ... ... 49. SCL-DISP 50. SDA-DISP 51. N.C.

CN4/1M95
11. N.C. 10. GND2 9. 24V5A 8. 12V3 7. 12V3 6. 12V3 5. GND1 4. GND1 3. GND1 2. PSON 1. 3.3VSB

1. +12VD 2. +12VD 3. GND 4. GND 5. LAMP-ON-OUT 6. BACKLIGHT-OUT 7. BACKLIGHT-BOOST 8. BACKLIGHT-PWM... 9. POWER-OK 10. SCL-SET 11. SDA-SET 12. GND

1. +3V3-STANDBY 2. STANDBY 3. GND 4. GND 5. GND 6. +12V 7. +12V 8. +12V 9. +AUDIO-POWER 10. GND 11. N.C

LIGHT-SENSOR GND RC LED2 +3V3-STANDBY LED1 KEYBOARD +5V

1M99 (B01B)

1M20 (B01B)

1M95 (B01B)

1M01 (B09B)

1. GND 2. KEYBOARD 3. +3V3-STANDBY

AL

1. SDA-DISP 2. SCL-DISP 3. TX2E+ ... ... ... 39.TXDAT 40. TXDAT41. N.C

1. 2. 3. 4. 5. 6. 7. 8.

KEYBOARD CONTROL

1. SPI-CLOCK-BUF 2. SPI-DATA-OUT 3. SPI-DATA-RETURN 4. SPI-LATCH 5. PWM-CLOCK-BUF 6. +3V3 7. BLANK-BU 8. EEPROM-CS 9. TEMP-SENSOR 10. PROG 11. VLED1 12. GND 13. VLED2 14. GND

WIFI MODULE ON 1A01

8735

(1050)

B
1735 (B10A)

SSB
(1011)

(1042)

1M71(B06A) T3.15A
1. SCL-SET 2. GND 3. SDA-SET 4. +3V3

1A01
124P

1M59 (B06A)
1. 2. 3. 4. 5. 6. 7. SCL-AMBI-3V3 GND SDA-AMBI-3V3 GND GND +3V3 GND

CN9/1359

8584

(1127)

1M83 (AL1)
1. SCL 2. GND 3. SDA 4. CONTROL-1 5. CONTROL-2 6. +3V3 7. GND 8. EEPROM-CS 9. TEMP-SENSOR 10. PROG 11. VLED1 12. GND 13. VLED2 14. GND

8683

4. 3. 2. 1.

RIGHT-SPEAKER GND-AUDIO GND-AUDIO LEFT-SPEAKER

8159

1. AL-I2C-SCL 2. SGND 3. AL-I2C-SDA 4. I2C-SEL1 5. I2C-SEL2 6. 3.3VSB 7. SGND

2. 120VI 1. GND1

1M84 (AL1)

MAIN POWER SUPPLY PSU 42/47N&T DELTA DPS-288CP A

CN11/1350

CN10/1M84

1. AL-I2C-SCL 2. SGND 3. AL-I2C-SDA 4. I2C-SEL1 5. I2C-SEL2 6. 3.3VSB 7. SGND 8. N.C. 9. N.C. 10. N.C. 11. 12V3 12. SGND 13. 16VB 14. SGND

1M84 (AL1)
14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. BLANK-BU 6. +3V3 5. PWM-CLOCK-BUF 4. SPI-LATCH 3. SPI-DATA-RETURN 2. SPI-DATA-OUT 1. SPI-CLOCK-BUF

1M01

3P

8735

8585

CN1/1308

T5A
1. N 2. L

8101

AMBI-LIGHT MODULE 3/3 (1075)

1P10 (B07C)

AL

8408

-+

(5214)

(5213)

1M84 (AL1)
1. SPI-CLOCK-BUF 2. SPI-DATA-OUT 3. SPI-DATA-RETURN 4. SPI-LATCH 5. PWM-CLOCK-BUF 6. +3V3 7. BLANK-BU 8. EEPROM-CS 9. TEMP-SENSOR 10. PROG 11. VLED1 12. GND 13. VLED2 14. GND

1M83 (AL1)
14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. GND 6. +3V3 5. CONTROL-2 4. CONTROL-1 3. SDA 2. GND 1. SCL

INLET

USB

TWEETER
(5216)

IR LED PANEL
(1112)

TWEETER
(5216)

1M01
3P

1M20
8P

WIFI ANTENNA
(1044)

AL
WIFI ANTENNA
(1043) 18570_400_090510.eps 090514

RIGHT SPEAKER

5. 4. 3. 2. 1.

GND GND USB20-DP USB20_DM USB-OC

8307

LEFT SPEAKER
+-

2009-May-29

AMBI-LIGHT MODULE 3/3 (1074)

AL

Block Diagrams

Q549.6E LA

9.

EN 60

Block Diagram Video


VIDEO
B02A
FRONT-END

B07A

CI: PCMCIA CONNECTOR


1P00

7P15-7P16 74LVC245APW 20

B04
+3V3

PNX8543:

B06G

FPGA WOW - IO BANKS

B05B

PNX5100: VIDEO-IN
7C00 PNX5120EH/M2

B05E

PNX5100: LVDS
1G50 1 I2C 2 3

7H00 PNX85439EH/M2 B04N VIDEO STREAMS B04O LVDS A_P A_N B_P B_N C_P C_N D_P D_N E_P E_N CLK_P CLK_N LOUT2_A_P LOUT2_A_N LOUT2_B_P LOUT2_B_N LOUT2_C_P LOUT2_C_N LOUT2_D_P LOUT2_D_N LOUT2_E_P LOUT2_E_N LOUT2_CLK_P LOUT2_CLK_N IREF_LVDS AP18 AN18 AL18 AK18 AP19 AN19 AP20 AN20 AM20 AL20 AM19 AL19 AP22 AN22 AL22 AK22 AP23 AN23 AP24 AN24 AM24 AL24 AM23 AL23 AK19 TX851A+ TX851ATX851B+ TX851BTX851C+ TX851CTX851D+ TX851DTX851E+ TX851ETX851CLK+ TX851CLKTX852A+ TX852ATX852B+ TX852BTX852C+ TX852CTX852D+ TX852DTX852E+ TX852ETX852CLK+ TX852CLKVDDA-LVDS L14 L15 K17 K18 L17 M17 L13 M14 P17 P18 N17 N18 U17 V17 U15 V15 U14 V14 U13 V14 U11 V11 U10 V10

7FN0 EP3C25F324C7N K5 L5 K2 K1 M2 M1 L2 L1 P2 P1 T3 R3 U2 V3 U4 V4 U6 V6 U5 V5 U7 V7 U8 V8 TXF1A+ TXF1ATXF1B+ TXF1BTXF1CLK+ TXF1CLKTXF1C+ TXF1CTXF1D+ TXF1DTXF1E+ TXF1ETXF2A+ TXF2ATXF2B+ TXF2BTXF2CLK+ TXF2CLKTXF2C+ TXF2CTXF2D+ TXF2DTXF2E+ TXF2ERX51001A+ RX51001ARX51001B+ RX51001BRX51001CLK+ RX51001CLKRX51001C+ RX51001CRX51001D+ RX51001DRX51001E+ RX51001ERX51002A+ RX51002ARX51002B+ RX51002BRX51002CLK+ RX5100CCLKRX51002C+ RX51002CRX51002D+ RX51002DRX51002E+ RX51002EAE20 AF20 AC20 AD20 AC19 AD19 AE19 AF19 AE18 AF18 AC18 AD18 AE17 AF17 AC17 AD17 AC16 AD16 AE16 AF16 AE15 AF15 AC15 AD15

MDO(0-7) PCMCIA 68P

BUFFER

CA-MDO(0-7)

CA_MD0

B05B LVDS RX

B05E LVDS TX

TX1

CA-MDI(0-7) 17 CONDITIONAL ACCESS 18 33 51 52 PCMCIA-VCC-VPP

CA_MDI

TX2 37 38

TO DISPLAY 1080p 50/60Hz

FPGA WOW
LOCAL CONTRAST

PNX5120
HD-NM FHD 100Hz

39 40 N.C. 41

B02B
1T11 HD1816AF/BHXP IF-OUT2 IF-OUT1 11 10 TUN-P11 TUN-P10 9T11 9T21 B-IF-_N-IFB-IF+_N-IF+ 2T19 2T20 5T12 PDP PDN

DEMODULATOR
7T50 DRX3926K 3T53 3T55 47 48 FE-DATA(0-7)

QUAD LVDS 1920x1080 100/120HZ


I2C TX3

1G51 51 50 49 40

PD_P PD_N

MD

TNR_TSDI B04K ANALOGUE AV

+5V-TUN

7T10 UPC3221GV VCC

SIF

44 43

3T70 3T70 7T52 9T61 9T63

IF-P CVBS4 CVBS-TER-OUT

F2 H3

AI51 AI44

MAIN HYBRID TUNER

1 AGC AMPLIFIER 1 2 1T25 5 4 2T15 2 3 IN 4 OUT 49 1T50 27M 50 3T98 IF-AGC RF-AGC 34 33 7 6 IFIF+ 3000 3T50 39 40

DEMODULATOR
CVBS

TX4 11 5 4 3 2 B05E SUPPLY AB20 AA5 L16 P22 AB18 J5 L5 T5 M22 AE25 E15 B15 AE14 AD14 +3V3 +1V2-PNX5100 +1V8-PNX5100 +1V2-PNX5100-DDR-PLL1 +3V3-PNX5100-LVDS-IN +1V2-PNX-TRI-PLL1 +1V2-PNX-TRI-PLL2 +1V2-PNX-TRI-PLL3 +1V2-PNX5100-DLL +3V3-PNX5100-DDR-PLL0 +1V2-PNX5100-LVDS-PLL +3V3-PNX5100-LVDS-PLL +1V2-PNX5100-CLOCK +3V3-PNX5100-CLOCK +VDISP1 1 TO DISPLAY 1080p 100/120Hz

SAW 36M125 DC_POWER XTAL_OUT 1 TUN-P1 9T18 9 TUN-P9 9T23 3T22 +5V-TUN RF-AGC 3 TUN-P3 9T20 ANTENNA-SUPPLY +5V-TUN-PIN

AGC CONTROL +5V-TUN

XI

XO

8,18,26,53 VDDH 2,16,27,56 VDDL 37 VDDAH_AFE1 42 VDDAH_CVBS 52 VDDAH_OSC 36,46 VDDAL_AFE

+3V3 +1V2 +3V3A +3V3E +3V3D +1V2A

B06F

FPGA WOW - DDR

PNX8543
MM1-D(0-15)

7FL0 EDD1216AJTA

IF_AGC RF_AGC

B08A
1P05 1 3
1 2

ANALOGUE EXTERNALS A
7E02 74HC4053PW 16 MDX
5 14

B08B
+5V CVBS-TER-OUT

ANALOGUE EXTERNALS B

H264 USB 2.0


A3

MM1-A(0-12)

DDR SDRAM 8Mx16

1 49

+2V5-DDR1 VREF-DDR1

DRX2+ DRX2DRX1+ DRX1DRX0+ DRX0DRXC+ DRXCEXT 1 CRX2+ CRX2CRX1+ CRX1CRX0+ CRX0CRXC+ CRXCSCART1 1E02 19
1 16 20 7 11 15 1

7E16-7E06
1 9,10,11

1E01 19

4 6 7 9 10 12 1P02 1 3

7E05

Y_CVBS-MON-OUT-SC

Y-CVBS-MON-OUT

CVBS1Y_P

B06D

FPGA LOCAL CONTRAST - LVDS IN/OUT

B05A DDR2 VREF P24

B05A

PNX5100: SDRAM

REGIMBEAU_CVBS-SWITCH 8 7E09 16 AV1_BLK AV1_STATUS

HDMI SIDE CONNECTOR

B04A CONTROL B04A CONTROL B04A

19 18

PNX5100-DDR2-VREF-CTRL 7C01 EDE5116AJBG-8E-E

B08D
15 AV1-R AV1-B AV1-G AV1-CVBS 7E04 7 11 20

ANALOGUE EXTERNALS D
AV1-PR AV1-PB AV1-Y AV1-Y_CVBS J2 L2 N2 G4 AI32 AI22 AI12 AI41 B04P VDD VDDA_3V3_AADC AJ6 AK12 AK20 F16 AC6 AJ12 AF5 AJ21 AG30 VDDA-DAC

9FG2 9FG3 9FG4 9FG5 9FG6 9FG7

9FG8 9FG9 9FGA 9FGB 9FGC 9FGD

(0-12)

DDR2 SDRAM
J1 VDDL J2 VREF
7C02 EDE5116AJBG-8E-E

9EA3 9EA1 9EA2 9EA7

PNX5100-DDR2-D(0-15)

4 6 7 9 10 12 1P03 1 3

21

+1V8-PNX5100 PNX5100-DDR2VREF-DDR

1 2

*JUMPERS IN CASE OF NO FPGA A PNX5100-DDR2-A(0-12)

DDR2 SDRAM
J1 VDDL J2 VREF +1V8-PNX5100 PNX5100-DDR2VREF-DDR

HDMI 1 CONNECTOR

19 18

(16-31) VDDA-ADC VDDA-LVDS RREF-PNX85XX +3V3-STANDBY +1V2-PNX85XX 1V2-STANDBY +3V3-PER 1V8-PMNX85XX

7 15

AV3_PB AV3-PR AV3-Y AV2-Y_CVBS 7E14 AV2-BLK AV2-STATUS

L3 J3 N3 H1

VDDA_3V3_ADAC AI23 VDD_3V3_LVDS AI33 VDDA_HDMI_3V3_BIAS AI13 VDD_3V3_SBPER AI42 VDD_1V2_CORE

BRX2+ BRX2BRX1+ BRX1BRX0+ BRX020 7

1 2

4 6 7 9 10 12 1P04 1 3

11 EXT 2
16 11 15

20 16

19 18

BRXC+ BRXC-

21

HDMI 2 CONNECTOR

8 SCART2

B04A CONTROL B04A CONTROL

VDD_1V2_SBCORE VDD_3V3_PER VDD_1V8_DDR

ARX2+ ARX2ARX1+

B08B

ANALOGUE EXTERNALS B
1E05 1
10 15

1 2

ARXC+ ARXC-

HDMI 3 CONNECTOR

12

USB_FAULT

AL16 AN16 AP16

USB-OC

+T

9 10

19 18

11

ARX0-

USB_VBUS

+3V3-PER

3P59

4 6 7

R-VGA G-VGA B-VGA H-SYNC-VGA V-SYNC-VGA

ARX1ARX0+

2 3 13 14

K4 PC3_AI3 P4 PC1_AI3 M4 PC2_AI3 T1 HSYNCIN T2 VSYNCIN

B04E CONTROL USB_RPU AM17 AN17

B07C
3H37 3H45

USB CONNECTOR
+5V +3V3-PER

1P07 1
USB20-DM USB20-DP 2 3 4
3 2 1

VGA CONNECTOR
1E03 PR AV4-PR AV4-PB 1E04 Y AV4-Y P1 PC2_AI1 K1 M1 PC3_AI1 PC1_AI1

7P02 TDA9996 CRX2+ CRX2CRX1+ CRX1CRX0+ CRX0CRXC+ CRXCBRX2+ BRX2BRX1+ BRX1BRX0+ BRX0BRXC+ BRXCARX2+ ARX2ARX1+ ARX1ARX0+ ARX0ARXC+ ARXC72 71 69 68 66 65 63 62 42 41 39 39 36 35 33 32 23 22 20 19 17 16 14 13 90 89 87 DRX2+ DRX2DRX1+ DRX1DRX0+ DRX0DRXC+ DRXCEXT 3

1P10 1
2 3 4 5

USB_DM USB_DP

USB 2.0 CONNECTOR SW UPLOAD JPEG MP3 TO USB 2.0 CONNECTOR SIDE SW UPLOAD JPEG, MP3 ONLY FOR N&T

PB

HDMI SWITCH

86 84 83 81 80

B08C

ANALOGUE EXTERNALS C
1E11 FRONT-Y_CVBS 1E14
1 3 4

B04F CONTROL

B07F

PNX8543: FLASH
7P10 NAND01GW3B2BN6F

CVBS 8,45,91,24, 75,95 VDDx_1V8 4 VDDO_3V3 46,55 VDDx_3V3 15,21,34,40, 64,70,85,88 VDDH_3V3 2 C_+ 3 C_99 D0_+ 100 D0_96 D1_+ D1_D2_+ D2_97 93 94 +1V8-PNX85XX +3V3 +3V3 REF-3V3 SIDE I/O SVHS IN 5
2

H2

AI43 PCI_AD PCI-AD24<->NAND-AD

FRONT-C

G1 AI54

NAND FLASH 1G
VCC 12,37 +3V3-NAND

B07E

HDMI SWITCH
HDMIB-RXC+ HDMIB-RXCHDMIB-RX0+ HDMIB-RX0HDMIB-RX1+ HDMIB-RX1HDMIB-RX2+ HDMIB-RX23HK0 RREF-PNX85XX

B04H DIGITAL VIDEO IN

B04G
A14 HDMI_RXC_B_N A15 HDMI_RXC_B_P B13 HDMI_RX0_B_N B14 HDMI_RX0_B_P A12 HDMI_RX1_B_N A13 HDMI_RX1_B_P B11 HDMI_RX2_B_N B12 HDMI_RX2_B_P C16 HDMI_RREF B04G SDRAM M_IREF M_VREF AA31 AB32 3HJ5

PNX8543: SDRAM

+1V8-PNX85XX DDR2-VREF-CTRL
7HG0 EDE1116AEBG

(0-12)

DDR2 SDRAM
J1 VDDL J2 VREF
7HG1 EDE1116AEBG

B07E

HDMI SWITCH
1P06 1 3
1 2

DQ HDMIA-RX2+ HDMIA-RX2HDMIA-RX1+ HDMIA-RX1HDMIA-RX0+ HDMIA-RX0HDMIA-RXC+ HDMIA-RXCHDMI_RX2_A_N B16 HDMI_RX2_A_P A16 HDMI_RX1_A_N A17 HDMI_RX1_A_P B17 HDMI_RX0_A_N B18 HDMI_RX0_A_P A18 HDMI_RXC_A_N A19 HDMI_RXC_A_P B15

DDR2-D(0-15)

+1V8-PNX85XX DDR2-VREF-DDR

4 6 7 9 10 12

DDR2-A(0-12)

DDR2 SDRAM
J1 VDDL J2 VREF +1V8-PNX85XX DDR2-VREF-DDR 18310_402_090305.eps 090514

19 18

(16-31)

HDMI 4 CONNECTOR

2009-May-29

Block Diagrams

Q549.6E LA

9.

EN 61

Block Diagram Audio


AUDIO
B02A
FRONT-END

B07A

CI: PCMCIA CONNECTOR


1P00

7P15-7P16 74LVC245APW 20

B04
+3V3

PNX8543:

B04I

PNX8543: AUDIO

B10A

AUDIO

7H00 PNX85439EH/M2 B04N VIDEO STREAMS B04L AUDIO AADC VREF_POS VDDA_3V3_DAC AN8 5HRW AM9 5HRZ AK9 VDDA-AUDIO VDDA-DAC 7HM2-1 EF 7D10 TPA3123D2PWP PVCC_L PVCC_R ADAC1 AN14 ADAC(1) +AUDIO-L 5 IN-L OUT-L 5D07 10,12 5D08 1,3 22 +AUDIO-POWER LEFT-SPEAKER 1735 1 2 SPEAKER-L 3 15 RIGHT-SPEAKER 4 SPEAKER-R

MDO(0-7) PCMCIA 68P

BUFFER

CA-MDO(0-7)

CA_MD0

CA-MDI(0-7) 17 CONDITIONAL ACCESS 18 33 51 52 PCMCIA-VCC-VPP

CA_MDI

B02B
1T11 HD1816AF/BHXP IF-OUT2 IF-OUT1 11 10 TUN-P11 TUN-P10 9T11 9T21 B-IF-_N-IFB-IF+_N-IF+ 2T19 2T20 5T12 PDP PDN

DEMODULATOR
7T50 DRX3926K 3T53 3T55 47 48 FE-DATA(0-7) ADAC2

AP13

ADAC(2)

7HM2-2 EF

CLASS D POWER AMPLIFIER


-AUDIO-R 6 IN-R OUT-R

PD_P PD_N

MD

B04A STANDBY CONTROLLER B04K ANALOGUE AV PO_7 AC5

A-STBY

SD

AUDIO-MUTE

MUTE 7D03 STANDBY & PROTECTION

+5V-TUN

7T10 UPC3221GV

SIF

44 43

3T70 3T70 7T52 3T56

IF-P CVBS4

F2 H3

AI51 A-STBY AI44

MAIN HYBRID TUNER

1 1 2 1T25 5 4 2T15 2 2T17 3

AGC AMPLIFIER
VCC 7 6 IN OUT 49 1T50 27M 50 IF-AGC RF-AGC 3T98 34 33 IFIF+ 3052 3T50 39 40

DEMODULATOR
CVBS

B04M
8,18,26,53 VDDH 2,16,27,56 VDDL 37 VDDAH_AFE1 42 VDDAH_CVBS 52 VDDAH_OSC 36,46 VDDAL_AFE +3V3 +1V2 +3V3A +3V3E +3V3D +1V2A PO_6 AD1

PNX8543: AUDIO
7HVA-1 7HVA-2 A-PLOP B08A B08B

B08C

ANALOGUE EXTERNALS C

SAW 36M125 DC_POWER +5V 1 TUN-P1 9T18 9 TUN-P9 9T23 3T22 +5V-TUN RF-AGC 3 TUN-P3 9T20 ANTENNA-SUPPLY +5V-TUN-PIN

RESET-AUDIO

AGC CONTROL +5V-TUN

XI

XO

PNX8543
RESET-AUDIO 5

7HV0 TPA6111A2DGN HEADPHONE AMPLIFIER 1 SHUTDOWN VO_1 IN-1 VO_2 VDD 8 +3V3 7 AUDIO-HDPH-L-AP AUDIO-HDPH-R-AP

IF_AGC RF_AGC

B07D

HDMI
1P05 1 3
1 2

B07B
DRX2+ DRX2DRX1+ DRX1DRX0+ DRX0DRXC+ DRXC-

AUDIO IN HDMI
1P0A 2 AUDIO-IN4-L AP6 AIN_4_L

H264 USB 2.0


B04E CONTROL

1E15
2 3 1 Headphone Out 3.5mm

ADAC3

AM12

ADAC(3)

ADAC4

AM11

ADAC(4)

IN-2

4 6 7 9 10 12 1P02 1 3

AUDIO IN VGA DVI -> HDMI

1P0B 2 AUDIO-IN4-R AM5 AIN_4_R

19 18

B07C
AM17 3H37 AN17 3H45

USB CONNECTOR
+5V 3P59

HDMI SIDE CONNECTOR

B08A

ANALOGUE EXTERNALS A
1

B04I
3EA7 3EA8 9EA4 9EA4 AUDIO-CL-L AUDIO-CL-R 1 7 7HM1

PNX8543: AUDIO
USB_RPU 3 5 ADAC(7) ADAC(8) AL9 ADAC7 AL8 ADAC8 USB_FAULT AN7 AIN_1_L AP7 AIN_1_R USB_DM USB_DP USB_VBUS

1E01 3 1

+3V3-PER +3V3-PER USB-OC USB20-DM USB20-DP

AP-SCART-OUT-L AP-SCART-OUT-R AV1-AUDIO-L AV1-AUDIO-R

CRX2+ CRX2CRX1+ CRX1CRX0+ CRX0CRXC+ CRXC7

1 2

4 6 7 9 10 12 1P03 1 3

AL16 AN16 AP16

1P07 1
USB20-DM USB20-DP 2 3 4
3 2 1

+T

EXT 1
16 20

11 15

6 2

AUDIO-IN1-L AUDIO-IN1-R

19 18

USB 2.0 CONNECTOR SW UPLOAD JPEG MP3 TO USB 2.0 CONNECTOR SIDE SW UPLOAD JPEG, MP3 ONLY FOR N&T

21

HDMI 1 CONNECTOR

SCART1 1E02
1

1P10 1
AP-SCART-OUT-L AP-SCART-OUT-R AUDIO-IN2-L AUDIO-IN2-R AK6 AIN_2_L AL6 AIN_2_R 7E01 A-PLOP A-PLOP B04M 2 3 4 4

3 1 6 2

BRX2+ BRX2BRX1+ BRX1BRX0+ BRX0BRXC+ BRXC7

1 2

4 6 7 9 10 12 1P04 1 3

EXT 2
16 20

11 15

21

SCART2

B07F

19 18

PNX8543: FLASH

HDMI 2 CONNECTOR

B08B
ARX2+ ARX2ARX1+ ARX1ARX0+ ARX0ARXC+ ARXCEXT 3 7P02 TDA9996

ANALOGUE EXTERNALS B
1E04 4 AUDIO OUT L+R 6 AUDIO-OUT-L AUDIO-OUT-R 7E10 1E03 6 AUDIO IN L+R 1E10 2 1E07 DIGITAL AUDIO OUT 2 AUDIO-IN3-R AN6 AIN_3_R B04G SDRAM 7E03 EF SPDIF-OUT V1 SPDIF_OUT M_IREF M_VREF AA31 AB32 AUDIO-IN3-L A-PLOP 8 7HM1 14 10 12 ADAC(5) ADAC(6) AN11 ADAC5 AP10 ADAC6 B04F CONTROL 7P10 NAND01GW3B2BN6F

1 2

4 6 7 9 10 12

PCI_AD

PCI-AD<->NAND-AD

19 18

A-PLOP

NAND FLASH 1G
VCC 12,37 +3V3-NAND

B04M AM6 AIN_3_L

HDMI 3 CONNECTOR

B04G
3HJ5

PNX8543: SDRAM

CRX2+ CRX2CRX1+ CRX1CRX0+ CRX0CRXC+ CRXCBRX2+ BRX2BRX1+ BRX1BRX0+ BRX0BRXC+ BRXCARX2+ ARX2ARX1+ ARX1ARX0+ ARX0ARXC+ ARXC-

72 71 69 68 66 65 63 62 42 41 39 39 36 35 33 32 23 22 20 19 17 16 14 13

90 89 87

DRX2+ DRX2DRX1+ DRX1DRX0+ DRX0DRXC+ DRXCSIDE I/O +1V8-PNX85XX +3V3 +3V3 REF-3V3

HDMI SWITCH

86 84 83 81 80

B08C

+1V8-PNX85XX DDR2-VREF-CTRL
7HG0 EDE1116AEBG

ANALOGUE EXTERNALS C
1E11 5 AUDIO IN L+R 8 AUDIO-IN5-L AUDIO-IN5-R AN5 AP5 AIN_5_L AIN_5_R (0-12)

8,45,91,24, 75,95 VDDx_1V8 4 VDDO_3V3 46,55 VDDx_3V3 15,21,34,40, 64,70,85,88 VDDH_3V3 2 C_+ 3 C_99 D0_+ 100 D0_96 D1_+ 97 D1_93 D2_+ 94 D2_-

DDR2 SDRAM
J1 VDDL J2 VREF
7HG1 EDE1116AEBG

DQ

DDR2-D(0-15)

+1V8-PNX85XX DDR2-VREF-DDR

B07E

HDMI SWITCH
HDMIB-RXC+ HDMIB-RXCHDMIB-RX0+ HDMIB-RX0HDMIB-RX1+ HDMIB-RX1HDMIB-RX2+ HDMIB-RX23HK0 RREF-PNX85XX

B04H DIGITAL VIDEO IN A14 HDMI_RXC_B_N A15 HDMI_RXC_B_P B13 HDMI_RX0_B_N B14 HDMI_RX0_B_P A12 HDMI_RX1_B_N A13 HDMI_RX1_B_P B11 HDMI_RX2_B_N B12 HDMI_RX2_B_P C16 HDMI_RREF

DDR2-A(0-12)

DDR2 SDRAM
J1 VDDL J2 VREF +1V8-PNX85XX DDR2-VREF-DDR

(16-31)

B04P VDD VDDA_3V3_AADC VDDA_3V3_ADAC AJ6 AK12 AK20 F16 AC6 AJ12 AF5 AJ21 AG30 VDDA-DAC VDDA-ADC VDDA-LVDS RREF-PNX85XX +3V3-STANDBY +1V2-PNX85XX 1V2-STANDBY +3V3-PER 1V8-PMNX85XX 18310_403_090305.eps 090514

1P06 1 3
1 2

VDD_3V3_LVDS HDMIA-RX2+ HDMIA-RX2HDMIA-RX1+ HDMIA-RX1HDMIA-RX0+ HDMIA-RX0HDMIA-RXC+ HDMIA-RXCB15 HDMI_RX2_A_N B16 HDMI_RX2_A_P A16 HDMI_RX1_A_N A17 HDMI_RX1_A_P B17 HDMI_RX0_A_N B18 HDMI_RX0_A_P A18 HDMI_RXC_A_N A19 HDMI_RXC_A_P VDDA_HDMI_3V3_BIAS VDD_3V3_SBPER VDD_1V2_CORE VDD_1V2_SBCORE VDD_3V3_PER VDD_1V8_DDR

4 6 7 9 10 12

HDMI 4 CONNECTOR

19 18

2009-May-29

Block Diagrams

Q549.6E LA

9.

EN 62

Block Diagram Control & Clock Signals


CONTROL + CLOCK SIGNALS
B07G ETHERNET B07A CI: PCMCIA CONNECTOR B04 PNX8543:
7H00 PNX85439EH/M2 B04N TUN_CA
1N00 7N04 DP83816AVNGNOPB 17 1N02 1P00 1 25M CA-MDI(0-7) 7P15-7P16 MOCLKA COMMON INTERFACE MDO(0-7) CA-MOCLK_VS2 CA-MDO(0-7) TNR_TSDI CA_MICLK CA_MDI A34 CA_VSN_0 H31 CA_MOCLK CA_MDO B10 C10 TNR_MIVAL TNR_MISTRT B9 TNR_MICLK FE-CLK FE-VALID FE-SOP 9 10 5 FE-DATA(0-7)

B02A FRONT END


7303 DRX3926K-XK-A3 49 1304

CA-MICLK

H32

DEMODULATOR 50

ETHERNET CONNECTOR B04F B04A PCI-CLK-ETHERNET RESET-ETHERNET 60 62

MAC PHYTER II 10/100 Mb/S

18

PNX8543

32

RESET-SYSTEM

27M

B03G

B04O LVDS AL23 LOUT2_CLK_N AM23 LOUT2_CLK_P AL19 CLK_N CLK_P AM19 B04G MEMORY TX852CLKTX852CLK+ TX851CLKTX851CLK+ B06G B06G B06G B06G

PCI-AD(0-31)

B07H BUFFERING
7N13 CA-DATADIR CA-DATAEN PCI-AD(24-31) 7N11 7N12 D31 CA_DATA_DIR A31 CA_DATA_EN

PCMCIA 61 IRQ-PCI CONDITIONAL ACCESS

PCMCIA-D(0-7)

B04G PNX8543: SDRAM


7HG0 EDE1116AEBG 7HG1 EDE1116AEBG

B09A MINI PCI CONNECTOR


PCMCIA-A(0-14) 1A01 1 MINI PCI CONNECTOR RESET-mPCI IRQ-PCI 68 IRQ-CA

CA-ADDEN PCI-AD(0-14)

B31

CA_ADD_EN

M_DQ

DDR2-D(0-31)

9H25

M_A J34 CA_RDY M_CLK_P M_CLK_N AB34 AB33

DDR2-A(0-12) DDR2-CLK_P DDR2-CLK_N J8 K8

SDRAM

MINI PCI CONNECTOR FOR WIFI PANEL

B07F PNX8543: FLASH


PC1-GNT-MINI PCI-GNT-B

B04F PCI E29 GNT_B PCI-AD(0-31) 7P10 NAND01GW3B2BN6F PCI_AD AP28

B03G PNX8543: CONTROL


PLL_OUT PCI-CLK-OUT 3HFG PCI-CLK-ETHERNET 3HFH PCI-CLK-PNX5100 PCI-CLK-MINI PCI-CLK-PNX8535 B07G B05G B09A

B05F PNX5100: CONTROL

PCI-AD(0-31)

PCI-AD(0-31)

68

3HF4 3HF2 A20 B20 CLK A30

B05 PNX5100:
7C00 PNX5120EH/M2/F4 B05G PCI_XIO L3 PCI-CLK-PNX5100 B04A

WP-NANDFLASH

19

NAND FLASH (1G)

NAND-AD(0-7) <-- PCI-AD(24-31) 7 9 XIO-ACK XIO-SEL-NAND

XIO_ACK XIO_SEL_0 B04E CONTROL

7CD0 M24C08-WDW6P

GPIO_1 PCI-AD(24-31) IRQ-CA IRQ-PCI L34 U4 GPIO_3 GPIO_2 GPIO_6

U3

WC-EEPROM-PNX5100

EEPROM (2Kx8)

V2

PNX8543-LCD-PWR-ON_SPI-DI

B07B

B05A DDR2

B05A PNX5100: SDRAM


7C01 EDE5116AJBG 7C02 EDE5116AJBG

B07C USB CONNECTOR


1

1P07 1
2 3 4
3 2

RESET_SYS USB-OC USB20-DM USB20-DP AL16 USB_FAULT GPIO_4 AN16 USB_DM AP16 USB_DP

AN28

RESET-SYSTEM

B02B B04A B04B

B08D ANALOGUE EXTERNAL D


1E06
3 2 1

PNX5120

PNX5100-DDR2-D(0-31)

USB 2.0 CONNECTOR

L32

GPIO_5 L31 B04A STANDBY UA_RX_0 UA_TX_1 AD2 AG1 AH5

DDR2-A(0-12) P26 P25 PNX5100-DDR2-CLK_P PNX5100-DDR2-CLK_N J8 K8

1P10 1

UART SERVICE CONNECTOR


1E50 3 3

SDRAM

TO USB 2.0 CONNECTOR ONLY FOR N&T

2 3 4 5

RXD-UP TXD-UP

9E05 9E03

9E41 9E40

UP STANDBY

RES
P0_5

RES
1M20 1 2

B04A PNX8543: STANDBY CONTROLLER


CADC_1 AN2 LIGHT-SENSOR

B01B DC / DC

B05F CONTROL AF24 AE13 1CD0 27M RESET-PNX5100 B04A

B04B PNX8543: DEBUG

2H07 SDM 2H06 SPI-PROG

SDM

AG2

P1_7

SPI-PROG

AF13 AF14 B05H GPIO B26 A26 CLK-OUT-PNX5100 LCD-PWR-ON BACKLIGHT-PWM-ANA-DISP 7CG8 BOOST-CTRL 9CG8 BACKLIGHT-BOOST B01B

AK2 P6_4

P1_0 AF2 PWM_1 AJ2 AB2 LED2 RESET-ETHERNET LED1 B07G

RC_UP

9H25

RC

3 4 TO IR/LED PANEL AND KEYBOARD CONTROL

B04A PNX8543: STANDBY CONTROLLER


B05H B01B B01B B04A B04E B08A B08A B08A

DETECT-12V

9H13

P0_3 DETECT2 DETECT1 AD3 AD4 P2_5 P2_4

7U11 KEYBOARD

+3V3-STANDBY

5 6 7

PWM_0 AJ3 CADC_0 P0_6 AN3 AD1

RESET-SYSTEM AV1-BLK AV2-BLK AV1-STATUS AV2-STATUS

B23

A24

AH3 P3_3 AH1 AH2 AP2 AP1 P3_5 P3_4 CADC_2 P2_7 CADC_3 P1_1

RESET-AUDIO AUDIO-MUTE LAMP-ON ENABLE-3V3 REGIMBEAU_CVBS-SWITCH POWER-OK RESET-PNX5100

B04M B10A

+5V

P0_7 AC5 P2_2 AE1 AE4 AF1

BACKLIGHT-CTRL

1M99 5 B07A B05H BACKLIGHT-OUT BACKLIGHT-BOOST 6 7 9 TO POWER SUPPLY

B06G FPGA WOW - IO-BANKS:


7FN0 EP3C25F324C7N B06G I/O BANK E18 F18 BACKLIGHT-CONTROL-FPGA-IN CLK-OUT-PNX5100

B01A B01B B01C B08A

B08A

3HD4

+3V3-STANDBY +3V3-STANDBY 7HD0 NCP303LSN30G OUTP 1 INP RESET-STBY AF3 RESET_IN

P2_6 AE5 P0_2 AB3

B05F

B05H

BACKLIGHT-PWM-ANA-DISP

8 1M95 2 TO POWER SUPPLY

B06F FPGA WOW - DDR


7FL0 EDD1216AJTA

P2_3 3 GND

AD5

STANDBY 7HC4 7HC3 M24C64-WDW6P 8

FPGA WOW
A2 A1

MM1-D(0-15)-->DQ1(0-15)

MM1-A(0-11) MM1-CLK+ MM1-CLK45 46

B06E FPGA WOW - POWER & COTROL


D1 H4 E2 H3 ASDO DCLK nCSO DATA0 5 6 1 2
19 18

TO PIN: 1P04-13 1P03-13 1P02-13 1P05-13

7P02 TDA9996 PCEC-HDMI 57

1HF0

DDDR SDRAM 8Mx16

B07D HDMI
7P32 CONTROL
CEC-HDMI AG4 P1_2 B04H HDMI_DV

P0_1 AC1 XTAL_I W1 27M

RESET-NVM

EEPROM (8Kx8)

1 2

7P10 NAND01GW3B2BN6F

HDMI SWITCH
12 31 61 79 B07E HOTPLUG-A D19 HOT_PLUG_A HDMIB-RX HDMI_RX

XTAL_O

W2 SPI-CLK SPI-WP SPI-CSB SPI-SDO SPI-SDI 6 3 1 5 2

7H02 M25P05-AVMN6P

NAND FLASH (1G)

4x HDMI CONNECTOR

ARX-DDC-SCL 1P04-15 BRX-DDC-SCL 1P03-15 CRX-DDC-SCL 1P02-15 DRX-DDC-SCL 1P05-15

AJ1 SPI_CLK AK4 P6_5 AK3 SPI_CSB AJ4 SPI_SDO AK1 SPI_SDI

512K FLASH STANDBY SW


18310_404_090305.eps 090514

2009-May-29

Block Diagrams

Q549.6E LA

9.

EN 63

Block Diagram I2C


IC
B04E
PNX8543: CONTROL 7H00 PNX85439EH

B07D

HDMI +3V3-PER

B02B

DEMODULATOR

B02A

FRONT-END

B05F

PNX5100: CONTROL

B06E

FPGA WOW POWER & CONTROL

B06G

FPGA WOW - IO BANKS

B06A

FPGA BACKLIGHT - LVDS & I2C - MUX

B08D

ANALOGUE EXTERNALS D-

3HPM

G32 SDA 3 SCL 3 D33

SDA3 SCL3

3HPJ 3HPH

SDA-SSB SCL-SSB

3HPK

SSB BUS 400 kHz

3CDD

3CDC

3FNG

3CD8

3CD7

3FNF

3P77

3P76

3T58

3T57

3F23

3P61

3P58

ERR 13

3F22

+5V-DDC 50 11 12 +5V-DDC

49

PNX8543 B04G
B04G MEMORY M_DQ M_A PNX8543: SDRAM 7P02 TDA9996 HDMI MUX 7HG0 EDE1116AEBG DDR2-D DDR2-A 7HG1 EDE1116AEBG SDRAM

1P04 ARX-DDC-SDA ARX-DDC-SCL 16 15

24

23

9T16 +3V3 9T15 RES TUNER BUS 400 kHz 3T16 3T15 TUN-P7 TUN-P6

K1

K2

7FH0 M25P16 16M FLASH

G17

G18

54

53

7F01 M25P20 2M FLASH 1HP0 3 1

3T61

3T59

HDMI CONNECTOR 3

7T50 DRX3926K DEMODULATOR MICRONAS 61 62

7C00 PNX5120EH PNX5120 FHD 120Hz

7CD0 M24C08 BOOT EEPROM

7FN0 EP3C25F324C7N FPGA LOCAL CONTRAST


ERR 29

7F00 XC3S250E SPARTAN-3 FPGA D18 C18 9FNA 9FN9

3U67 3U66

9T71 9T70

SDA SCL

TUN-SDA TUN-SCL

3P64

3P63

1P03 BRX-DDC-SDA BRX-DDC-SCL 16 15

B06F
ERR 15 ERR 21 ERR 25

FPGA WOW - DDR 7FL0 EDD1216AJTA DDR SDRAM 8Mx16 MM1-D MM1-A

ERR 23

30 31

HDMI CONNECTOR 2

ERR 27

+5V-DDC

1T11 HD1816AF 1P02 CRX-DDC-SDA CRX-DDC-SCL 16 15 MAIN TUNER

RESERVED

3P68

3P67

+3V3

60 61

3FAA

3FAB

HDMI CONNECTOR 1

AMBILIGHT BUS 30 kHz


ERR 34

+5V-DDC

L1 L2

3CDA 3CD9

SDA-AMBI-3V3 SCL-AMBI-3V3

9F22 9F21 +3V3

3FA6 3FA5

1M59 3

3P66

3P65

B04H D15 DDC_SDA_B DDC_SCL_B C15 DDC-SDA DDC-SCL 6 5 78 79

1P05 DRX-DDC-SDA DRX-DDC-SCL 16 15

HDMI CONNECTOR SIDE

TO AMBI-LIGHT MODULE OR 4 IPB POWER 5 SUPPLY 7 FOR N&T


1 3

HDMI_DV

B07E

HDMI SWITCH +5V-DDC

B08B

ANALOGUE EXTERNALS B

B05A

PNX5100: SDRAM

B04N

PNX8543: VIDEO STREAMS

B07F

PNX8543: FLASH

3P29

3P28

1P06 ERX-DDC-SDA ERX-DDC-SCL 16 15

E19 DDC_SDA_A DDC_SCL_A C18

DDCA-SDA DDCA-SCL

9P19 9P20

+5VDCOUT

7C01 EDE5116AJBG 7E18 M24C02 PNX5100-DDR2-D(0-31)(0-31) PNX5100-DDR2-A(0-12) 7C02 EDE5116AJBG SDRAM 3HB2 3HB1 I2C-SDA I2C-SCL 1M97 15 14

3E70

1E05
10 15

3P30

3P31

12 15

3E47

HDMI CONNECTOR 4
5

DATA-SDA CLK-SCL

B07F
B04F

5 6

EEPROM 256x8

PNX5100: SDRAM 7P10 NAND01GW3B2BN FLASH 1G

7P07 M24C02 EEPROM 256x8

1M96 9P29-4 9P29-3 5 6 RES

VGA CONNECTOR

PCI-AD PCI

B01B
+3V3-PER SET BUS 100 kHz B33 SDA 2 SCL 2 D32 SDA2 SCL2 3HPU 3HPS SDA-SET SCL-SET

DC/DC

B06C

11

TEMPERATURE & FAN CONTROL

B06A

FPGA BACKLIGHT - LVDS & I2C - MUX +3V3

B06D

FPGA LOCAL CONTRAST LVDS IN/OUT

3HPV

3HPT

3F39

3F38

9F20 9F19

SDA-BOLT-ON SCL-BOLT-ON 9F16 9F14

3E83 3E84

1R08 6 5

TO BOLT-ON MODULE

9FA2

3F61

3F62

3F67

3F66

ERR 14

+3V3-PER

1F53 3F17 2 6 3F18 3

9FA1

9F18 1 4 5 7 8 SDA-SET0 SCL-SET0 9F17 9F15 9F13

+3V3

3F37

3F36

3H50

3H49

STANDBY BUS 400 kHz H33 SDA 1 SCL 1 F33 SDA1 SCL1 3HPE 3HPD SDA-UP-MIPS SCL-UP-MIPS

1 1M99 11 10

DISPLAY BUS 100 kHz 3FH4 3FH5

1F51 1 2

3U67 3U66 RES

7F50 LM75ADP TO POWER SUPPLY IC TEMP SENSOR

7F51 PCA9533DP I2C LED DIMMER 1M71 3F41 3 3F40 5F05 +3V3 1 4 2 TO TEMP SENSOR ONLY FOR N&T

7F08 PCA9540BDP I2C MULTIPLEXER

SDA-DISP SCL-DISP

TO DISPLAY

SDA-SET1 SCL-SET1

B04A

PNX8543: STANDBY CONTROLLER +3V3-STANDBY RESERVED

RESERVED

3H53

AK5 MC_SDA MC_SCL STANDBY AL5

3H66 3H55

SDA-UP-MIPS SCL-UP-MIPS

3H53

B04A

B08D
RES

ANALOGUE EXTERNAL D

B05E
7E19 74HC4066PW QUAD BILATERAL 2 6 SWITCHES 9 13
5 12 4 3 10 1 8 11 3ECK 3ECP 3 TXD-UP 11 1R08 2 1R12 2 FOR MHP BOLT-ON 3

PNX5100: LVDS

3H53

+3V3-PER

3H52

3HC2-2

5 7HC4 EF 8 7HC3 M24C64

6 UART-SWITCH

RXD-UP TXD-UP

9E41 9E40

PO_1

AC1 RESET-NVM

3HC2-1

B04A

ERR 53

7H02 M25P05 512K FLASH

EEPROM (NVM)

3E08

UART-SWITCHn 7E20

RXD-UP TXD-UP

7E17 ST3232C
RS232 INTERFACE 13 R1-IN 14 1E50 3 1 UP

1G50 3CA3 3CA2 2 1

TO DISPLAY

T1-OUT
RXD-UP 12

R1-OUT T1-IN R2-IN T2-OUT


8 7 1E51 3 1 MIPS 1G51 3CA4 3CA5 50 49

+3V3-STANDBY

TO DISPLAY

3H58

3H60

UA_RX_0 UA_TX_1

AG1 AH5

RXD-UP TXD-UP

9E05 9E03

+3V3-PER

3HPC

L32 GPIO_4 GPIO_5 L31

3HPL

RXD-MIPS TXD-MIPS

9 10

R2-OUT T2-IN

+3V3-PER

B06B

LED PANEL CONTROL

LEVEL SHIFTER FOR DEBUG ONLY RESERVED

3HPR

3HPP

AL27 UA2_RX UA2_TX AK27

RXD-MIPS2 TXD-MIPS2

5FC7 5FC5

1R20 3 1 RES

9E35 9E36

RXD TXD

3E41 3E91

1E06
3 2 1 UART SERVICE CONNECTOR 18310_405_090305.eps 090514

2009-May-29

Block Diagrams

Q549.6E LA

9.

EN 64

Supply Lines Overview


SUPPLY LINES OVERVIEW
A
SUPPLY

B01B
CN5 1
2 3 4 5 6 7 8 9

DC / DC

B04I B01C
DC/DC
+12V 5U31 +12VF2 B01b +12VD B05h B01b +12V

PNX8543: AUDIO

B07A
+AUDIO-POWER B01a AUDIO-VDD B04m

CI: PCMCIA CONNECTOR

12V 12V GND1 GND1 BL-ON_OFF DIM BOOST A/P_DIM INV_OK

1M99 1
2 3 4 5 6 7 8 9

+AUDIO-POWER 9HM0 RES 3HMF 7HM5

B05F
+3V3

PNX5100: CONTROL
+3V3 B01a B01c +3V3 +5V 3P09 +T +3V3 +5V PCMCIA-VCC-VPP B01a

B09A
+3V3

MINI PCI CONNECTOR


+3V3 5A00 +3V3-mPCI +5V 5A01 +5V-mPCI RES

7U01 TPS53124PW Dual Synchronous Step-Down 15 5U05 Controller 7U0H-2 17 23 7U0H-1


12V/5V CONVERSION +5V5-TUN B07h SS36 +5V B01b,B04a,l B06a,B07a,c, d,B08a,b,d, B09a,d +3V3 +5V B04a B05c

+5V B01c

7HM6 CONTROL B01a

B05G
+3V3

PNX5100: PCI
+3V3

LAMP-ON-OUT BACKLIGHT-OUT BACKLIGHT-BOOST BACKLIGHT-PWM-ANA-DISP POWER-OK

B07B
B01b +12V

AUDIO IN HDMI
+12V

B04A CONTROL B05H CONTROL B05H CONTROL B05H CONTROL B05H CONTROL 1M01 3 TO KEYBOARD CONTROL PANEL

B04L

PNX8543: AUDIO
B01a

B05H
+3V3F +3V3 +5V +3V3 B01a +12VD B01b VDDA-AUDIO

PNX5100: DISPLAY-INTERFACING
+3V3F +3V3 +12VD 7CG1 +VDISP 1C02 5CG2 +VDISP1

B09B B07C
B01c B06d B05e +5V

DDR SUPPLY
+3V3F 7A01 +2V5 B06a,e,f

7U0D-1 28 7U0D-2 26
5U04

12V/1V2 CONVERSION +1V2-PNX5100

B01a B01c

USB CONNECTOR
B01a +5V

+3V3F

7HP0
IN OUT COM

MAIN POWER SUPPLY


3.3V_ST
CN4 1 1M95 1

B04p VDDA-DAC

7A00-1 LCD-PWR-ON

VDDA-DAC B04p

7CG2 LCD-PWR-ON

T3A 1C01 5CG0 +VDISP2 RES B09b B05e B01a

B07D
+3V3

HDMI
+1V8-PNX85XX +3V3 5P11 REF-3V3 B01b +12V

7A02

+1V8-PNX85XX

B04g,p, B06e,B07d

ONLY FOR N&T +3V3-STANDBY

+1V8-PNX85XX

B02A
B04a,p B07d,B08d B01a,B04p B02b +3V3A +5V-TUN

FRONT-END

7A00-2 LCD-PWR-ON
+12V 3A07 3A26 +V-LM833

7U50
+1V2-STANDBY
IN OUT COM

B04M
+3V3A +5V-TUN 5T11 +5V-TUN-PIN +33VTUN 3T10 3T11 3T12 +VTUN ANTENNA-SUPPLY B04p B01a +3V3 B01a B01b B04i +3V3

PNX8543: AUDIO

T3A

+3V3 +AUDIO-POWER ADIO-VDD B01a

7P01

+AUDIO-POWER AUDIO-VDD

7U0N VOLT. REG.

7U0M

B07h

B05I
+3V3

PNX5100: DEBUG
+3V3 B01b B01c

IN OUT COM

1V8-HDMI RES

7A07 VOLT. REG.

+2V5-REF

RESERVED

+33VTUN B01b

+3V3-STANDBY +5V 3P47

+3V3-STANDBY +5V +5V-EDID B07e AIN-5V B01b +AUDIO-POWER +AUDIO-POWER

B10A

AUDIO

STANDBY GND1 GND1 GND1

2 3 4 5

2 3 4 5

STANDBY

B04A CONTROL B02b

B04N

PNX8543: VIDEO STREAMS


+3V3-PER +3V3 B01a

B06A

FPGA BACKLIGHT-LVDS & I2C-MUX


5F05 1F50 T1A 1M59 6 +3V3 5F04 +3V3M TO 1359 IPB POWER SUPPLY HDMI 3 CONNECTOR 1P04 18

ANTENNA-SUPPLY

+3V3-PER

+3V3

+12V +12V +12V

6 7 8

6 7 8

1U01 T3A 3U42 5U08

+12V

B01c,B02b, B06c,B07b,h, B08b,B09b B02a B01a

B02B

DEMODULATOR

7F07

HDMI 2 CONNECTOR

1P03 18

BIN-5V

B04O
+1V2-PNX85XX 9T64 9T62 +1V2 5T51 +1V2A B04p

PNX8543: DIGITAL VIDEO OUT / LVDS


7F06

+1V2M
IN OUT COM

6U0B +33VTUN

+1V2-PNX85XX

+2V5M VDDA-LVDS VDDA-LVDS


IN OUT COM

HDMI SIDE CONNECTOR HDMI 1 CONNECTOR

1P05 18 1P02 18

DIN-5V

7U0P VSW
RESERVED 1U03 9 10 9 10 T3A 5U20 5U21 11 11 5U06 5U17 2K8 SUPPLIES 2K9 SUPPLIES +12VF

CIN-5V

7T54
IN OUT COM

+1V2-PNX85XX

+1V2-PNX85XX +2V5 +5V RES

B04P
B01a B01b B02a B09b B01b

PNX8543: POWER
+1V2-PNX85XX

B01a B09b +2V5 +5V B01c

+1V2-PNX85XX +1V2-STANDBY +1V8-PNX85XX +3V3-STANDBY

B01a +AUDIO-POWER B01a B04i,m,B10a

+3V3

RES 5T54 5T53 5T52

+3V3 +3V3A +3V3D +3V3E +5V-TUN 5T55 +5V-TUN-CVBS ANTENNA-SUPPLY

+1V2-STANDBY +1V8-PNX85XX +3V3-STANDBY B01a

B07E
B07d

HDMI SWITCH
+5V-EDID 6P06

+VSND GND_SND

+5V-EDID

B06B
+3V3 +12V B01b

U-WAND
+3V3 +12V

N.C.

B07h

+5V-TUN

B01a

+3V3 5HVH B02a 5HV8 5HVD

+3V3 +3V3-PER RREF-PNX85xx VDDA-LVDS VDDA-AUDIO 5HY4 5HY7 VDDA-DAC AUDIO-ADC B01a B04a,b,e,f,n B04h B04o

HDMI SIDE CONNECTOR

1P06 18

EIN-5V +5V-DDC

7T56

3T69

B06C
+3V3 +12V

TEMPERATURE & FAN CONTROL


+3V3 +12V

1M96 3 RES

+12V
+12V B01b +12V

RES B04l

VDDA-AUDIO

+3V3 B01a B01c +5V

+3V3 +5V 1M20 5 8

B01b B04l

B07F B06D
FPGA WOW - LVDS IN / OUT
5FH4 5FG1 5FG2 +VDISP 1F51 41 RES B01a B01a +3V3

PNX8543: FLASH
+3V3 5P09 +3V3-NAND

+3V3-STANDBY

TO IR/LED PANEL

B05A B04A
B01a B01c B01b B01a B04p B01c +1V2-PNX5100 +3V3-STANDBY +3V3 +3V3-PER +5V

PNX5100: SDRAM
+1V8-PNX5100 3C20 PNX5100-DDR2-VREF-CTRL 3C22 PNX5100-DDR2-VREF-DDR

B05h

+VDISP

PNX8543: STANDBY CONTROLLER

+1V8-PNX5100 B06e

GND1 N.C. 120VI

CN2 1
2

B07G
+3V3

ETHERNET
+3V3 5N06 5N07 +3V3-ET-DIG +3V3-ET-ANA

TO 1350 IPB POWER 3 SUPPLY

+1V2-PNX85XX

+1V2-PNX85XX +1V2-PNX5100 +3V3-STANDBY +3V3 +3V3-PER +5V B01a

B06E
B01a

FPGA WOW - POWER & CONTROL

GND1 INVOK SCAN_BLK1 SCANBLK_2 BL_ON BOOST 12V3 GND1 16VB GND1

CN3 1
2 3 4 TO 1351 5 6 IPB POWER SUPPLY 7 8 9 10

+1V2-PNX85XX

+1V2-PNX85XX +1V2-FPGA 5FH0 +1V2-PLL +1V8-PNX85XX CFH1 +1V8-PNX5100 +2V5 5FH2 +2V5out-FPGA +2V5in-FPGA +2V5-PLL +3V3 5FH1 +3V3-FPGA B01b B06g B01a B01c B05a,c B06g B06g

B05B
+3V3

PNX5100: VIDEO-IN
+3V3

CFH0

B07H
+3V3

BUFFERING
+3V3 +5V5-TUN +5V-TUN B02a,b

B09b

+1V8-PNX85XX

+5V5-TUN 7P11

B01A

DC/DC

B04B
1V2-STANDBY +12VF B04p

PNX8543: DEBUG
B01c

B05C

PNX5100: POWER
B09b +1V2-PNX5100 5C60 5C61 +1V2-PNX5100-CLOCK +1V2-PNX5100-TRI-PLL1 +1V2-PNX5100-TRI-PLL2 +1V2-PNX5100-TRI-PLL3 +1V2-PNX5100-DDR-PLL1 +1V2-PNX5100-LVDS-PLL +1V2-PNX5100-DLL B09b +1V8-PNX5100 +3V3 5C67 5C68 5C69 +3V3-PNX5100-LVDS-IN +3V3-PNX5100-CLOCK +3V3-PNX5100-DDR-PLL0 +3V3-PNX5100-LVDS-PLL B01a

+2V5

+1V2-PNX5100

B06g B06g B06g +12V

+3V3-PER

+3V3-PER

5FH3 5FH4 +3V3

B01b

1V2-STANDBY +12VF 5U33

7P13 VOLT. REG.


+12V

GND1 BL_DIM SCAN_BLK1 SCANBLK_2 GND1 GND1

CN6 1
2 3 4 5 6 TO LCD DISPLAY

B01b

5C62 +12VF1

B04E
B04p

PNX8543: CONTROL
5C63 +3V3-PER 5C64 5C65 5C66 +1V8-PNX5100 B06e B01a +3V3-PER +3V3

7U03 TPS53124PW 23
7U08 Dual Synchronous Step-Down 15 Controller 7U02 12V/3V3 COVERSION 5U01 +3V3

+3V3-PER B01b,B02b, B04a,l,m,n,p, B05b,c,e,h, f,g,i, PNX8543: CONTROL B06a,b,c,e, B07a,d,f,g,h, B08a,b,d, B09a +3V3-PER

B06F
+2V5

FPGA WOW - DDR


B01a B01c 5FL0 3FLK 3FLM +2V5-DDR1 VREF-DDR1 VREF-FPGA1 B06g B01a B06g

B08A
+3V3 +5V +2V5

ANALOGUE EXTERNALS A
+3V3 +5V

B04F

17
5U03 7U05 +3V3F B04p

B05h,B09b

B08B
+3V3 +5V +12V

ANALOGUE EXTERNALS B
+3V3 +5V +12V

12V/1V2 COVERSION 5U00 +1V2-PNX85XX B09b

28
7U06 B02b,B04a,p B06a,e

B04G

PNX8543: SDRAM
+1V8-PNX85XX 3HJ1 3HJ3 DDR2-VREF-CTRL DDR2-VREF-DDR B01a B05h

5C70

B06G
B06e

FPGA WOW - IO BANKS


B01c +1V2-PLL +1V2-FPGA +2V5-PLL +2V5out-FPGA +2V5in-FPFA +2V5-DDR1 3V3-FPGA VREF-FPGA1 B01a B01c B01b B01b

+1V8-PNX85XX

26

+1V2-PLL +1V2-FPGA +2V5-PLL +2V5out-FPGA +2V5in-FPFA +2V5-DDR1 3V3-FPGA VREF-FPGA1

B05E
+3V3 +VDISP2

PNX5100: LVDS
B06e +3V3 +VDISP2 1G50 41 1G51 1 B06e B06e B06e B06f B06e B06f

B08D
+3V3

ANALOGUE EXTERNALS D
+3V3 +3V3-STANDBY +5V

+3V3-STANDBY +5V

B04H
B04p

PNX8543: DIGITAL VIDEO IN


B05h RREF-PNX85XX

+VDISP1

+VDISP1

RREF-PNX85XX

18570_401_090514.eps 090514

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 65

10. Circuit Diagrams and PWB Layouts


6 LED Low-Pow: Microcontroller Block Liteon
1 A 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
1101 E4 1105 B5 1M1A C1 1M2A G1 1M83 A1 1M84 E1 2101 A6 2102 A7 2103 A8 2104 B7 2105 B10 2106 B13 2107 B11 2108 B12 2109 D7 2110 D7 2111 G4 2112 H7 2113 H7 2114 F9 2115 F9 2116 F9 2117 F9 2118 H8 2119 H6 2120 H6 2121 H6 2122 F9 2123 F10 2124 F10 2125 B3 2126 F10 2127 B1 2128 B1 2129 B2 2130 F2 2131 F10 3101-2 D7 3101-3 D9 3101-4 E9 3102-1 D9 3102-2 D9 3102-3 E9 3102-4 D9 3103-1 E9 3103-2 G10 3103-3 G11 3103-4 G10 3104-1 D8 3104-2 E8 3104-3 E8 3104-4 D9 3105-1 E9 3105-2 D8 3105-3 E8 3105-4 D8 3106-1 E8 3106-2 D8 3106-3 E8 3107 C7 3108 C7 3109 D7 3110 D7 3111 B10 3112 D9 3113 D8 3114 E8 3115 E8 3116 E8 3117 E7 3118 E5 3119 F4 3120 F5 3123 C11 3124-1 E11 3124-2 E11 3124-3 E11 3124-4 E11 3125-1 F11 3125-2 F11 3125-4 F11 3126-1 F11 3126-2 F11 3126-4 F11 3127-1 F11 3127-4 F11 3128 E11 3129 E11 3130 G8 3131 G7 3132 H8 3133 H8 3134 A13 3135 A11 3136 A12 3137 B11 3138 B13 3139 B12 3140 C11 3141 C13 3142 F11 7101 A7 7102 E6 7110 F4 7116-1 B11

20
7116-2 A12 9101 E5 9102 F5 9103 F5 9104 F5 9106 H8 9107 A5 9108 A5 9109 A5 9110 B5 9111 A3 9112 B2 9113 B3 9114 B2 9119 H6 9121 G4 C140 B10 F101 A8 F102 F5 F103 H7 F104 F5 F105 D7 F106 B12 F107 C7 F108 D7 F109 G3 F112 G8 F116 A10 F117 B13 F118 C11 F120 A1 F121 A1 F122 A1 F123 A1 F124 B1 F125 B1 F126 B1 F127 B1 F128 B1 F129 B1 F130 B1 F131 B1 F132 B1 F133 E1 F134 F1 F135 E1 F136 F1 F137 F1 F138 F1 F139 F1 I110 G8 I111 G8 I113 G10 I114 G10 I115 G10 I124 E11 I125 E11 I126 F11

10

11

12

13

MICROCONTROLLER LITEON
B
3134

A
C
1 2 3 4 5 6 7 8 9 10 11 12 13 14

IN
1M83 F120 F121 F122 F123 F124 F125 F126 F127 F128 F129 F130 F131 F132 15 16 9111 RES SCL SPI-DATA-IN SDA CONTROL-1 CONTROL-2 BLANK EEPROM-CS TEMP-SENSOR PROG SCL SPI-DATA-RETURN CONTROL-1 CONTROL-2 9107 9108 9109 9110 SPI-CLOCK SDA SPI-LATCH PWM-CLOCK +3V3 1

7101 LD2985BM18R IN INH OUT BP 5 F101

+3V3

+3V3

100K RES +3V3

1%

3135

1K5

2101

2102

100n

2103

1K5

1u0

4u7

+1V8 F116

3136

1%

7116-2 LM393PT 5

10n

COM

2104

+3V3

RES

2105

-T 10K

3111

10n 3137

10K

10u 35V 2129

10u 35V

2107

100n

2127

1u0 2128

1.5A T

10n 3139

+3V3 7116-1 LM393PT 3 2

2108

VLED1

VLED1-F

1K5 1%

1105

C140

9112 9114

2125

33p

VLED1 VLED2

+3V3 2106 10n RES 3138 47K RES

9113 RES

F106

7 6

F117

1K5 1% RES

3140

1M1A 1 2 3 4 5 6 7 8 9 10 11 12 13 14 SCL SDA CONTROL-1 CONTROL-2 +3V3 EEPROM-CS TEMP-SENSOR PROG VLED1 VLED2 F107 +3V3 +3V3 +3V3

F118

3141 10K RES

1K8 1% RES

3123

10K 3107

3108

10K

7 10K 5 10K 7 10K

3102-1 1

3104-4 4

3101-3 3

RES 10K 3104-1 1

3105-2 2

3106-2 2

F108

10K

10K 6 10K 7 10K 5 10K

8 10K 8

5 10K

F105

3102-2

3105-4

2110

2109

100p

100p

3114

3104-2 2 3116

3104-3 3

3115

3105-3

3106-1

16M9

E
OUT
1M84 1 2 3 4 5 6 7 8 9 10 11 12 13 14 F133 F135 F136 F139 F137 F138 F134 +3V3 BLANK-BUF EEPROM-CS TEMP-SENSOR PROG VLED1 SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF

12

9101 3118 +3V3 10K RES 9102 RES 9103 9104 RES +3V3 F104

20 25 26 4

F102 27

F
is prohibited without the written consent of the copyright All rights reserved. Reproduction in whole or in parts

+3V3

2130

3119

100p 2122 RES

100p 2115

100p 2117

100p 2116

100p 2131

100p 2123

100p 2126

2 F109

IN RST GND CD NC

9121 RES

3 5

UD-MD I111 I110 3130 22R I113 I114 I115 3103-4 4 3103-2 2 7 10K 5 10K 3103-3 3 6 10K +3V3

1M2A

K
owner.

1 2 3 4 5 6 7 8 9 10 11 12 13 14

SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF +3V3 BLANK-BUF EEPROM-CS TEMP-SENSOR PROG VLED1 VLED2

100p

100p 2124 RES

2114 RES

VLED2 15 16

7110 NCP303LSN10T1

P0.0|TXD0|MAT3.1 P0.1|RXD0|MAT3.2 P0.2|SCL0|CAP0.0 P0.3|SDA0|MAT0.0 P0.4|SCK0|CAP0.1 RTXC1 P0.5|MISO0|MAT0.1 RTXC2 P0.6|MOSI0|CAP0.2 P0.7|SSEL0|MAT2.0 RTCK P0.8|TXD1|MAT2.1 P0.9|RXD1|MAT2.2 VBAT P0.10|RTS1|CAP1.0|AD0.3 P0.11|CTS1|CAP1.1|AD0.4 P0.12|DSR1|MAT1.0|AD0.5 P0.13|DTR1|MAT1.1 DBGSEL P0.14|DCD1|SCK1|EINT1 P0.15|RI1|EINT2 P0.16|EINT0|MAT0.2 RST P0.17|CAP1.2|SCL1 P0.18|CAP1.3|SDA1 P0.19|MAT1.2|MISO1 P0.20|MAT1.3|MOSI1 P0.21|SSEL1|MAT3.0 P0.22|AD0.0 P0.23|AD0.1 P0.24|AD0.2 P0.25|AD0.6 P0.26|AD0.7 P0.27|TRST|CAP2.0 P0.28|TMS|CAP2.1 P0.29|TCK|CAP2.2 P0.30|TDI|MAT3.3 P0.31|TDO VDD_1V8 VDD_3V3 VDDA X2

X1

10K

11

VSS

VSSA 13 14 18 21 22 23 24 28 29 30 35 36 37 41 44 45 46 47 48 1 2 3 32 33 34 38 39 8 9 10 15 16

3117

7102 LPC2103FBD48

3106-3

3105-1

3101-4

3102-3

7 19 43

31

3103-1

5 10K 6 10K 8 10K

10K

8 10K

2 7 3101-2 10K 10K 6 10K 6 10K 8 10K 6 10K 3113 RES 10K

3102-4

100R 3110

100R

3109

15 16

7 10K

3112

1101

MICROCTRL

3124-4 3128 3129 3124-1 3124-2 3124-3 3125-1 3142 3125-2 3125-4 3126-2 3126-4 3126-1 3127-1 3127-4

1 2 3 1 2 4 2 4 1 1 4

8 7 6 8 7 5 7 5 8 8 5

I124 100R 100R 100R 100R 100R 100R I125 100R 100R 100R 100R 100R 100R I126 100R 100R 100R

CONTROL-1 PWM-CLOCK-BUF SPI-CLOCK-BUF SPI-DATA-RETURN SPI-DATA-IN SPI-LATCH SPI-LATCH-2 TEMP-SENSOR EEPROM-CS BLANK-BUF PROG CONTROL-2 SCL SDA TEMP-SENSOR

10K

1u0

3120

10K

2111

100n

17 40

42

100p 3133

10K 3132

2112

100n

9119 +3V3 F103

9106 RES

10K

100R

2118 RES

3131

F112

15 16

+1V8

H
100n 2121 100n 2120 100n 2113 2119 100n

1
N
1X03 REF EMC HOLE

10

11

12

13
N

O
CHN
1 2 3 4 5
CLASS_NO

O
SETNAME
1 2008-06-10 2008-08-08 2008-10-27

DRIVER 6LED LITEON


P
2008-08-08 2008-10-27 2 3 SUPERS. DATE 2008-06-02 3
C

2K9
CHECK

8204 000 8857


130 1

P
A2 ROYAL PHILIPS ELECTRONICS N.V. 2008

NAME Peter Van Hove

10

11

12

13

14

15

16

17

18

19

20
18310_610_090305.eps 090410

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 66

6 LED Low-Pow: Microcontroller Block Liteon


1 A 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
2201 B8 2202 C8 2203 D8 2209 B2 2210 G6 2211 I6 2214 A6 2215 F7 2216 F7 2217 B12 2218 C12 2219 D12 2220 E9 3121 D9 3203 B5 3204 B7 3205 C5 3207 B9 3209 C9 3210 B3 3211 C9 3212 D11 3213 B3 3214 H6 3215 H6 3216 H6 3217 H6 3218 H6 3219 B11 3220 C11 3221 H11 3222 I8 3223 C11 3224 H11 6216 I8 7201-1 A10 7201-2 C10 7201-3 D10 7201-4 B10 7209 B2 7210 C2 7212 B3 7214 B6 7215 G7 9208 A10 9209 B9 9210 B10 9211 C9 9212 C10 9213 D9 9214 D10 F202 B3 F203 C5 F204 H6 F205 B10 F206 C10 F207 C10 F208 D10 F209 H11 F210 G9 F211 G9 F212 G9 F213 H9 F214 H9 F215 H9

20 A

10

11

12

13

MICROCONTROLLER LITEON A
B
+3V3 +3V3 7201-1 74HCT125PW 2 3207 2201 33p +3V3 1K0 9209 7214 +3V3 1 2 2209 3203 10K 33p 5 6 1 3 D C S HOLD W M95010-WDW6 GND 4 7 3204 +3V3 10K 2202 33p +3V3 1K0 3209 RES 8 VCC RES 1 2214 100n 14 3213 3210 10K 10K

INPUT BUFFER

+3V3

3 EN 7

3219 2217 100p 100R

7209 PDTC144EU

7212 PDTC144EU 3 F202

B
Q 2 7201-4 74HCT125PW 12 11 13 EN 7 14 +3V3

(64K)

3220 2218 100p 27R

C
E
F207

9212 RES

C
3223 2219 100p

+3V3 9213

EN

100R

D
3121 2220 RES 100R 100p 8

9214 RES 14 +3V3 7201-3 74HCT125PW 9 EN 7 10 F208 3212 100R

E
H

F
I
2216 1u0
is prohibited without the written consent of the copyright All rights reserved. Reproduction in whole or in parts

F
I
2215 100n

7215 TLC5946PWP

28

VCC

G
25 2

LED DRIVER PWM CONTROL


GSCLK BLANK MODE IREF XLAT SCLK SIN SOUT 0 1 2 3 4 5 6 7 OUT 8 9 10 11 12 13 14 15 XERR VIA 30 31 32 33 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

F210

F211 F212 F213 +3V3 +3V3

K
owner.

3217 100R 3215 1K2 F204

6 27 3 4 5 24 100R 3214

K
3224 3221 3K3 3K3

H
3216

F209

H
L

+3V3 10K 2211 33p

26

XHALF GND GND_HS 1 29

SML-310

6216

470R

3222

+3V3

10

11

12

13

O
1

DRIVER 6LED LITEON


P
2008-08-08 2008-10-27 NAME CHECK 2 3 SUPERS. DATE
C

2K9

8204 000 8857


P
A2

10

11

12

13

14

15

16

17

18

19

20
18310_611_090305.eps 090410

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 67

6 LED Low-Pow: LED Liteon


1 A 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
3301 F9 3302 F9 3303 F9 3304 G9 3305 G9 3306 H9 3307 H9 3308 H9 3309 I9 3310 D12 3311 D12 3312 E12 3313 E12 3314 E12 3315 E12 3316 E12 3317 F12 3318 F12 3319 F12 3320 F12 3321 G12 3322 G12 3323 G12 3325 G4 3326 H4 3327 H4 3328 G4 3330 I4 3331 F4 3332 F4 3333 H4 3334 F4 3335 D12 3336 D2 3337 D2 3338 D1 3339 D2 3340 D1 3341 D1 3342 E2 3343 D1 3344 D1 3345 D12 3346 E1 3347 D1 3348 E12 3349 E1 3350 E1 3351 E12 3352 E1 3353 E1 3354 D13 3355 E1 3356 E1 3357 D13 3358 E13 3359 E13 3360 E13 3361 E13 3362 E13 3363 F13 3364 F13 3365 F13 3366 F13 3367 G13 3368 G13 3369 F1 3370 F1 3371 F1 3372 F1 3373 F1 3374 G1 3384 E1 3385 F1 3386 F1 3387 F1 3388 F1 3389 F1 3390 G1 3391 G1 7000 C2 7001 C3 7002 C4 7003 C6 7004 C8 7005 C11 7305 G4 7306 H5 7307 F4 7315 G9 7316 H10 7317 F9 9301 C1 9302 C1 9303-1 C10 9303-3 C10 9303-4 C10 9304-1 E10 9304-2 E10 9304-4 E10 9305-1 C6 9305-2 C6 9305-4 C6 9306-1 D5 9306-3 D5 9306-4 D5 9307 A6 9308 A6 9309-1 B6 9309-2 B6 9309-4 B6 9310-1 B8 9310-2 B8 9310-4 B8 9311-1 H13 9311-3 H13 9311-4 H12 9312-1 B10 9312-3 B10 9312-4 B10 9313-1 B12 9313-2 B12 9313-4 B12 9314 G5 9315-1 C12 9315-2 C12 9315-4 C12 9316 H5 9317 F5 9318-1 C8 9318-3 C8 9318-4 C8 9319-1 D9 9319-3 D9 9319-4 D9 9320-1 D7 9320-2 D7 9320-4 D7 9325 F10 9326 G10 9327 H10 F302 G5 F303 G4 F304 H5 F305 H5 F307 F5 F308 F4 F325 F10 F326 F9 F327 G10 F328 G9 F329 H10 F330 H10 F340 D1 F341 D1 F342 D1 F343 D2 F344 D12 F345 D12 F346 D13 F347 G12 F348 G13 F349 G13

20 A

1 LED LITEON

10

11

12

13

A
VLED1-F VLED2

B
VLED1-F VLED2 7 7 8 5 9312-3 9309-2 9310-2 9310-4 9313-1 9310-1 9312-4

B
5 6 8

D
9301 7000 LTW-E500T-PH1 4 GREEN RED BLUE GND_HS 7 3 2 1 7001 LTW-E500T-PH1 4 5 6 GREEN RED BLUE GND_HS 7 3 2 1 7002 LTW-E500T-PH1 4 5 6 GREEN RED BLUE GND_HS 7 3 2 1 2 4 1 9305-2 9305-4 9305-1

7003

7004 LTW-E500T-PH1 4 GREEN RED BLUE GND_HS 7 3 2 1 3 9303-3 4 9303-4 6 5

B
GREEN RED BLUE GND_HS 2 9315-2 4 9315-4 7 5

7 5 8 5 6

GREEN RED BLUE GND_HS 7

3 2 8 5 9318-1 9318-4 1 4

5 6

5 6

D
3340 560R

3341 1K5 3344 1K5

3336 9320-2 7 4 9320-1 8 1 390R 9320-4 5 8 3335 390R 3345 2 9304-2 7 390R 3348 390R 3354 560R 3311 1K5 3312 1K5 3357 560R 3358 560R

D
9306-4 9306-1 9319-1

G
3346 560R

3339 390R 3342 390R

E
H

3349 560R

3353 1K5 3360 560R 3315 3384 1K5 3385 1K5 F307 3331 3301 10K 10K 7317 BC847BW F326 F325 1K5 1K5 3316 VLED1-F VLED1-F 1K5 3317 3362 560R 3363 560R 3364 560R

3369 560R 3370

560R 3387 1K5 3388

3334 1K0

F308

3303

is prohibited without the written consent of the copyright

All rights reserved. Reproduction in whole or in parts

1K5 3389

10K

3320 1K5 3321

3366 560R

1K5 3390 1K5 3391

Place jumper 9325, 9326, 9327 if VLED < 17V


F302 3325 3304 10K 10K

1K5 3322 1K5 3323

G
K

1K5

Place jumper 9314, 9316, 9317 if VLED < 17V


F303

G
F348

7315 BC847BW 9326 F328

1K5

3326

3306

10K

owner.

10K

9311-4

6 9311-3

VLED1-F

9311-1

H
7316 BC847BW 3308 1K0 3309 10K F330

9327

F329

1
O

10

11

12

13
O

CHN
CLASS_NO

SETNAME
1 2008-06-10 2008-08-08 2008-10-27

DRIVER 6LED LITEON


P
2008-08-08 2008-10-27 2 3 SUPERS. DATE 2008-06-02 3
C

2K9
CHECK

8204 000 8857


130 3

P
A2 ROYAL PHILIPS ELECTRONICS N.V. 2008

NAME Peter Van Hove

10

11

12

13

14

15

16

17

18

19

20
18310_612_090305.eps 090305

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 68

Layout 6 LED Low-Pow


2110 2109 3109 3108 3110 3107

6216

3221 3224

2103

2211 3216

2102

3117 3114

9102

3113

7101

7215

3222

2104

9110

2130

9114

7212 7210

7209

9302 9107 2202

7000

7001

7002

7003

7004

1105

3306 3305 3304

3303 3302 3301

2218 3220 3212 9211 3209 9210 9214

7306

3217 9314

7305

9316

9303

3218

3215

9305

9309

9318

9320

9104 9103 3118 9101 2114

9108

2220 2201

9306

3223

2115 3112

2219

3101

3125

3105

2118

9310

3203 3205

9312

9319

9304

3338 3374 3340 3369 3343 3373 3346 3372 3349 3371 3352 3370 3355 3337 3336

9208 3219

9213

9301

F135 F346 F348 F347 F349 F214 F215 F107 F108 F105

F130

F132 F127 F123

F120

F344

F116

F106

F345

1M2A

F139

I126

F126

F209

F104 F109

F213

F137

F101

I124

F212

1M1A
F131
F129

F122

F128

F121

F308

F330

F326

F328 F133 F118

F134 F202 F136 F327 F203 F112

I125
F103 F102

F210 F305 F211 F303 F207

F138 F206 F340 F208 F205 F125 F342


F341

F124

F343

F329

F325

F117

F307 F304 F302

F204

3104 313 6313.3

18310_551_090309 090309

2009-May-29

9311

3207 2217 9209

3142

2216 3214 2215

2131

3102

3385 3389 3384 3390 3356 3391 3350 3386 3347 3387 3344 3388 3341 3353

I115

7307 3334

3332

7315

7317

2113

9317

7201

2210

3330 3333 3327

3326 3328 3325

2122

2124 2121

3104

2123

3210

7214

3134 3141

3123

9308 9307

7102

3211

3204

7316

2203 9212

3331

3121

3124

3213 2214

9325

9326

9327

3130 2120

3309 3308 3307

I114

3126

7116

3131 2112 3116 9119

7005

9106

3140 3135

3342 3339

3103

I113

I111

2107

2127

1101

2119

2117 2116 3115 2126

7110

2111

I110

2209

2105 3137

3106

3127

3138 3136 2106 3139 2108

C140

3111

3314 3320 3319 3318 3323 3322 3321

1M83

2129 2128

9313 3120 3119 9121

9113

9109 9112 9111

2125

2101

3128 3129

3132 3133

1M84

3317 3316 3315 3313 3312 3311 3310

9315

3335 3345 3348 3351

3364 3365 3366 3367 3363 3368 3354 3357 3358 3359 3360 3361 3362

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 69

8 LED Low-Pow: Microcontroller Block Liteon


1 A 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
1101 E4 1105 B5 1M1A C1 1M2A G1 1M83 A1 1M84 E1 2101 A6 2102 A7 2103 A8 2104 B7 2105 B10 2106 B13 2107 B11 2108 B12 2109 D7 2110 D7 2111 G4 2112 H7 2113 H7 2114 F9 2115 F9 2116 F9 2117 F9 2118 H8 2119 H6 2120 H6 2121 H6 2122 F9 2123 F10 2124 F10 2125 B3 2126 F10 2127 B1 2128 B1 2129 B2 2130 F2 2131 F10 3101-2 D7 3101-3 D9 3101-4 E9 3102-1 D9 3102-2 D9 3102-3 E9 3102-4 D9 3103-1 E9 3103-2 G10 3103-3 G11 3103-4 G10 3104-1 D8 3104-2 E8 3104-3 E8 3104-4 D9 3105-1 E9 3105-2 D8 3105-3 E8 3105-4 D8 3106-1 E8 3106-2 D8 3106-3 E8 3107 C7 3108 C7 3109 D7 3110 D7 3111 B10 3112 D9 3113 D8 3114 E8 3115 E8 3116 E8 3117 E7 3118 E5 3119 F4 3120 F5 3123 C11 3124-1 E11 3124-2 E11 3124-3 E11 3124-4 E11 3125-1 F11 3125-2 F11 3125-4 F11 3126-1 F11 3126-2 F11 3126-4 F11 3127-1 F11 3127-4 F11 3128 E11 3129 E11 3130 G8 3131 G7 3132 H8 3133 H8 3134 A13 3135 A11 3136 A12 3137 B11 3138 B13 3139 B12 3140 C11 3141 C13 3142 F11 7101 A7 7102 E6 7110 F4 7116-1 B11

20
7116-2 A12 9101 E5 9102 F5 9103 F5 9104 F5 9106 H8 9107 A5 9108 A5 9109 A5 9110 B5 9111 A3 9112 B2 9113 B3 9114 B2 9119 H6 9121 G4 C140 B10 F101 A8 F102 F5 F103 H7 F104 F5 F105 D7 F106 B12 F107 C7 F108 D7 F109 G3 F112 G8 F116 A10 F117 B13 F118 C11 F120 A1 F121 A1 F122 A1 F123 A1 F124 B1 F125 B1 F126 B1 F127 B1 F128 B1 F129 B1 F130 B1 F131 B1 F132 B1 F133 E1 F134 F1 F135 E1 F136 F1 F137 F1 F138 F1 F139 F1 I110 G8 I111 G8 I113 G10 I114 G10 I115 G10 I124 E11 I125 E11 I126 F11

10

11

12

13

MICROCONTROLLER BLOCK LITEON


B
3134

A
C
1 2 3 4 5 6 7 8 9 10 11 12 13 14

IN
1M83 F120 F121 F122 F123 F124 F125 F126 F127 F128 F129 F130 F131 F132 15 16 10u 35V 2129 10u 35V 9111 RES SCL SPI-DATA-IN SDA CONTROL-1 CONTROL-2 BLANK EEPROM-CS TEMP-SENSOR PROG SCL SPI-DATA-RETURN CONTROL-1 CONTROL-2 9107 9108 9109 9110 SPI-CLOCK SDA SPI-LATCH PWM-CLOCK +3V3 2101 1u0 1 3

7101 LD2985BM18R IN INH OUT BP 5 2102 4 2104 10n F101

+3V3

+3V3

100K RES +3V3

1%

3135

100n

2103

1K5

1K5

4u7

+1V8 F116

3136

1%

7116-2 LM393PT 5 8 7 6 4

COM 2

+3V3

-T 10K

3111

10n 3137

2105

10K

RES

9113 RES

F106

100n

2107

2127

1u0 2128

1.5A T

10n 3139

+3V3 7116-1 LM393PT 3 2 4 8

2108

VLED1

VLED1-F

1K5 1%

1105

C140

9112 9114

2125

33p

VLED1 VLED2

+3V3 2106 10n RES 3138 47K RES

F117

1K5 1% RES

3140

1M1A 1 2 3 4 5 6 7 8 9 10 11 12 13 14 SCL SDA CONTROL-1 CONTROL-2 +3V3 EEPROM-CS TEMP-SENSOR PROG VLED1 VLED2 3105-2 2 3106-2 2 RES 10K 3104-1 1 3102-1 1 F108 100R 3110 100R 3109 15 16 7 10K 4 3105-4 F107 7 10K 5 10K 7 10K 10K 6 10K 7 10K 5 10K 8 10K 8 5 10K F105 3108 +3V3 +3V3 +3V3 10K 3107 10K

F118 1K8 1% RES

3141 10K RES

3123

10K

2 3102-2

3104-4 4

3101-3 3

2110

2109

100p

100p

3104-2 2 3116

3114

3115

3104-3 3

16M9

E
OUT
1M84 1 2 3 4 5 6 7 8 9 10 11 12 13 14 F133 F135 F136 F139 F137 F138 F134 +3V3 BLANK-BUF EEPROM-CS TEMP-SENSOR PROG VLED1 2130 3119 VLED2 15 16 SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF 1101

12

9101 3118 +3V3 10K RES 9102 RES 9103 9104 RES +3V3 F104

20 25 26 4

F102 27

F
J

+3V3

100p 2115

100p 2116

100p 2123

100p 2126

100p 2131

100p 2117

2 F109 9121 RES 3 5

IN RST GND CD NC

UD-MD I111 I110 3130 22R 2118 RES 3131 100R 2112 100n F112 I113 I114 I115 3103-4 4 3103-2 2 7 10K 5 10K 3103-3 3 6 10K +3V3

1M2A

2111

100n

1 2 3 4 5 6 7 8 9 10 11 12 13 14

SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF +3V3 BLANK-BUF EEPROM-CS TEMP-SENSOR PROG VLED1 VLED2

100p

7110 NCP303LSN10T1

P0.0|TXD0|MAT3.1 P0.1|RXD0|MAT3.2 P0.2|SCL0|CAP0.0 X2 P0.3|SDA0|MAT0.0 P0.4|SCK0|CAP0.1 P0.5|MISO0|MAT0.1 RTXC1 P0.6|MOSI0|CAP0.2 RTXC2 P0.7|SSEL0|MAT2.0 P0.8|TXD1|MAT2.1 RTCK P0.9|RXD1|MAT2.2 P0.10|RTS1|CAP1.0|AD0.3 VBAT P0.11|CTS1|CAP1.1|AD0.4 P0.12|DSR1|MAT1.0|AD0.5 P0.13|DTR1|MAT1.1 DBGSEL P0.14|DCD1|SCK1|EINT1 P0.15|RI1|EINT2 P0.16|EINT0|MAT0.2 RST P0.17|CAP1.2|SCL1 P0.18|CAP1.3|SDA1 P0.19|MAT1.2|MISO1 P0.20|MAT1.3|MOSI1 P0.21|SSEL1|MAT3.0 P0.22|AD0.0 P0.23|AD0.1 P0.24|AD0.2 P0.25|AD0.6 P0.26|AD0.7 P0.27|TRST|CAP2.0 P0.28|TMS|CAP2.1 P0.29|TCK|CAP2.2 P0.30|TDI|MAT3.3 P0.31|TDO VDD_1V8 VDD_3V3 VDDA

X1

10K

11

VSS

VSSA 13 14 18 21 22 23 24 28 29 30 35 36 37 41 44 45 46 47 48 1 2 3 32 33 34 38 39 8 9 10 15 16

3117

7102 LPC2103FBD48

3106-1

3105-3

3106-3

3105-1

3101-4

3102-3

7 19 43

31

3103-1

5 10K 6 10K 8 10K

10K

8 10K

2 7 3101-2 10K 10K 6 10K 6 10K 8 10K 6 10K 3113 RES 10K

3102-4

3112

MICROCTRL

3124-4 3128 3129 3124-1 3124-2 3124-3 3125-1 3142 3125-2 3125-4 3126-2 3126-4 3126-1 3127-1 3127-4 100p 2124 RES 2114 RES 100p 2122 RES

1 2 3 1 2 4 2 4 1 1 4

8 7 6 8 7 5 7 5 8 8 5

I124 100R 100R 100R 100R 100R 100R I125 100R 100R 100R 100R 100R 100R I126 100R 100R 100R

CONTROL-1 PWM-CLOCK-BUF SPI-CLOCK-BUF SPI-DATA-RETURN SPI-DATA-IN SPI-LATCH SPI-LATCH-2 TEMP-SENSOR EEPROM-CS BLANK-BUF PROG CONTROL-2 SCL SDA TEMP-SENSOR

10K

1u0

3120

10K

17 40

42

100p 3133

10K 3132

9119 +3V3 F103

9106 RES

10K

15 16

+1V8 100n 2121 2119 100n 2120 100n 2113 100n

1
N
1X03 REF EMC HOLE

10

11

12

13
N

O
CHN
1 2 3 4 5
CLASS_NO

O
SETNAME
1 2008-06-10 2008-08-08 ??

DRIVER 6LED LITEON


P
2008-08-08 2 3 NAME Peter Van Hove CHECK SUPERS. DATE 2008-06-02 3
C

2K9

8204 000 8857


130 1

3104 313 6314.3


1 2 3 4 5 6 7 8 9 10 11 12 13 14

P
A2 ROYAL PHILIPS ELECTRONICS N.V. 2008

15

16

17

18

19

20
18310_650_090508.eps 090507

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 70

8 LED Low-Pow: Microcontroller Block Liteon


1 A 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
2201 B8 2202 C8 2203 D8 2209 B2 2210 G6 2211 I6 2214 A6 2215 F7 2216 F7 2217 B12 2218 C12 2219 D12 2220 E9 3121 D9 3203 B5 3204 B7 3205 C5 3207 B9 3209 C9 3210 B3 3211 C9 3212 D11 3213 B3 3214 H6 3215 H6 3216 H6 3217 H6 3218 H6 3219 B11 3220 C11 3221 H11 3222 I8 3223 C11 3224 H11 6216 I8 7201-1 A10 7201-2 C10 7201-3 D10 7201-4 B10 7209 B2 7210 C2 7212 B3 7214 B6 7215 G7 9208 A10 9209 B9 9210 B10 9211 C9 9212 C10 9213 D9 9214 D10 F202 B3 F203 C5 F204 H6 F205 B10 F206 C10 F207 C10 F208 D10 F209 H11 F210 G9 F211 G9 F212 G9 F213 H9 F214 H9 F215 H9

20 A

10

11

12

13

MICROCONTROLLER BLOCK LITEON A


B
+3V3 +3V3 7201-1 74HCT125PW 2 3207 2201 33p +3V3 1K0 9209 F205 RES 1 2214 100n 14 3213 3210 10K 10K +3V3

INPUT BUFFER
9208 RES +3V3

PWM-CLOCK

3 EN 7

3219 2217 100R

PWM-CLOCK-BUF 100p

B
EEPROM-CS 2209 33p

7209 PDTC144EU 1

7212 PDTC144EU 3 F202

SPI-CS

SPI-CS 7214 +3V3 5 D C S HOLD W M95010-WDW6 GND 10K RES 4 7 3204 +3V3 10K 8 VCC

SPI-DATA-IN

B
Q 2 SPI-DATA-RETURN 7201-4 74HCT125PW SPI-CLOCK 3209 2202 33p +3V3 1K0 9211 SPI-CLOCK-BUF 9212 RES +3V3 14 F206 RES 12 11 13 EN 7 14 9210 RES +3V3

2 3203 10K

6 1 3 F203

(64K)

D
7210 PDTC144EU 3

3220 2218 100p 27R

SPI-CLOCK-BUF

3205

C
E

EEPROM-CS-LOCAL

1 2

C
6 3223 100p 2219 100R BLANK-BUF

BLANK 3211 2203 33p +3V3 1K0 9213

7201-2 74HCT125PW 5 F207 RES 4

EN 7

D
SPI-DATA-RETURN 2220 RES 3121 100R 100p 8

9214 RES 14 +3V3 7201-3 74HCT125PW 9 EN 7 10 F208 3212 100R

SPI-DATA-OUT-FIL

DATA-RETURN-SWITCH

E
H

F
I
2216 1u0 7215 TLC5946PWP +3V3 2215 100n

F
I

28

VCC

G
PWM-CLOCK-BUF BLANK-BUF 2210 33p 25 2 6 100R 1K2 3 4 5 24 100R 3214 +3V3 10K 2211 33p 26 F204 27

LED DRIVER PWM CONTROL


GSCLK BLANK MODE IREF XLAT SCLK SIN SOUT 0 1 2 3 4 5 6 7 OUT 8 9 10 11 12 13 14 15 XERR VIA 30 31 32 33 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

F210
PWM-R1

G
PWM-G1

F211 F212 PWM-B1 F213 PWM-R2 +3V3 F214 PWM-G2 3224 3K3 PWM-B2 F209 EEPROM-CS-LOCAL DATA-RETURN-SWITCH EEPROM-CS-LOCAL DATA-RETURN-SWITCH 3221 F215 3K3 +3V3

PROG

3217 3218 RES 3215 1K2

SPI-LATCH

H
L

SPI-CLOCK-BUF
SPI-DATA-IN SPI-DATA-OUT

H
L

3216

SPI-DATA-OUT-FIL

XHALF GND GND_HS 1 29

SML-310

6216

470R

3222

+3V3

10

11

12

13

O
CHN
CLASS_NO

O
SETNAME
1 2008-06-10 2008-08-08 ??

DRIVER 6LED LITEON


P
2008-08-08 2 3 NAME Peter Van Hove CHECK SUPERS. DATE 2008-06-02 3
C

3104 313 6314.3


1 2 3 4 5 6 7 8 9 10 11 12 13 14

2K9

8204 000 8857


130 2

P
A2 ROYAL PHILIPS ELECTRONICS N.V. 2008

15

16

17

18

19

20
18310_651_090508.eps 090508

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 71

8 LED Low-Pow: LED Liteon


1 A 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
3301 F9 3302 F9 3303 F9 3304 G9 3305 G9 3306 H9 3307 H9 3308 H9 3309 I9 3310 D12 3311 D12 3312 E12 3313 E12 3314 E12 3315 E12 3316 E12 3317 F12 3318 F12 3319 F12 3320 F12 3321 G12 3322 G12 3323 G12 3325 G4 3326 H4 3327 H4 3328 G4 3330 I4 3331 F4 3332 F4 3333 H4 3334 F4 3335 D12 3336 D2 3337 D2 3338 D1 3339 D2 3340 D1 3341 D1 3342 E2 3343 D1 3344 D1 3345 D12 3346 E1 3347 D1 3348 E12 3349 E1 3350 E1 3351 E12 3352 E1 3353 E1 3354 D13 3355 E1 3356 E1 3357 D13 3358 E13 3359 E13 3360 E13 3361 E13 3362 E13 3363 F13 3364 F13 3365 F13 3366 F13 3367 G13 3368 G13 3369 F1 3370 F1 3371 F1 3372 F1 3373 F1 3374 G1 3384 E1 3385 F1 3386 F1 3387 F1 3388 F1 3389 F1 3390 G1 3391 G1 7000 C2 7001 C3 7002 C4 7003 C6 7004 C8 7005 C11 7305 G4 7306 H5 7307 F4 7315 G9 7316 H10 7317 F9 9301 C1 9302 C1 9303-1 C10 9303-3 C10 9303-4 C10 9304-1 E10 9304-2 E10 9304-4 E10 9305-1 C6 9305-2 C6 9305-4 C6 9306-1 D5 9306-3 D5 9306-4 D5 9307 A6 9308 A6 9309-1 B6 9309-2 B6 9309-4 B6 9310-1 B8 9310-2 B8 9310-4 B8 9311-1 H13 9311-3 H13 9311-4 H12 9312-1 B10 9312-3 B10 9312-4 B10 9313-1 B12 9313-2 B12 9313-4 B12 9314 G5 9315-1 C12 9315-2 C12 9315-4 C12 9316 H5 9317 F5 9318-1 C8 9318-3 C8 9318-4 C8 9319-1 D9 9319-3 D9 9319-4 D9 9320-1 D7 9320-2 D7 9320-4 D7 9325 F10 9326 G10 9327 H10 F302 G5 F303 G4 F304 H5 F305 H5 F307 F5 F308 F4 F325 F10 F326 F9 F327 G10 F328 G9 F329 H10 F330 H10 F340 D1 F341 D1 F342 D1 F343 D2 F344 D12 F345 D12 F346 D13 F347 G12 F348 G13 F349 G13

20 A

1 LED LITEON

10

11

12

13

A
VLED1-F VLED2 9307 9308

B
VLED1-F VLED2 5 7 5 6 7 5 8 8 8 8 7 9310-2 9312-4 9309-2 9309-1 9312-1 9313-2 9309-4 9313-1 9313-4 9310-1 9310-4 9312-3

B
5

D
9301 9302 7000 LTW-E500T-PH1 4 GREEN RED BLUE GND_HS 7 3 2 1 7001 LTW-E500T-PH1 4 5 6 GREEN RED BLUE GND_HS 7 3 2 1 7002 LTW-E500T-PH1 4 5 6 GREEN RED BLUE GND_HS 7 3 2 1 2 4 1 9305-2 9305-4 9305-1

7003 LTW-E500T-PH1 4 5 6 GREEN RED BLUE GND_HS 7 3 2 1 6 8 5 9318-3 9318-1 9318-4

7004 LTW-E500T-PH1 4 5 6 GREEN RED BLUE GND_HS 7 3 2 1 3 9303-3 4 9303-4 1 9303-1 6 5 8

7005 LTW-E500T-PH1 4 5 6 GREEN RED BLUE GND_HS 3 2 1 2 9315-2 4 9315-4 1 9315-1 7 5 8

7 5 8

3 1 4

5 6

B
F344 F345 F346

F340

F341

F342

F343

RED-1 GREEN-1

3338 560R 3340

3341 1K5 3344 1K5 3347 1K5 3350 1K5 3353 1K5 3356 1K5 3384 1K5 3385 1K5 3386

3336 9320-4 5 9320-1 8 9320-2 7 4 1 3 390R 3337 390R 3339 390R 3342 390R GREEN6 RED6 BLUE6 8 5 6 3335 390R 3345 2 1 4 9304-2 9304-1 9304-4 7 8 5 390R 3348 390R 3351 390R 3310 1K5 3311 1K5 3312 1K5 3313 1K5 3314 1K5 3315 1K5 3316 VLED1-F F307 3331 3301 7307 BC847BW 9317 3334 1K0 3332 10K F308 10K 10K 7317 BC847BW 9325 3302 1K0 3303 10K F326 VLED1-F F325 1K5 3317 BLUE-2 1K5 3318 1K5 3319 1K5 3320 1K5 3321 PWM-B1 PWM-B2 3354 560R 3357 560R 3358 560R 3359 560R 3360 560R 3361 560R 3362 560R 3363 560R 3364 560R 3365 560R 3366 560R 3367 560R 3368 560R

BLUE-1

9306-4

9306-1

9306-3

9319-4

560R 3346 560R

GREEN6 RED6 BLUE6

E
H

3349 560R 3352 560R 3355 560R 3369 560R 3370

560R 3343

9319-1

9319-3

560R 3371 560R 3372 560R 3373 560R

1K5 3387 1K5 3388 1K5 3389 1K5 3390 1K5 3391 1K5

3374 560R

Place jumper 9325, 9326, 9327


VLED1-F

VLED1-F F302 3325 7305 BC847BW 9314 3328 1K0 3326 10K F303

if VLED < 17V


F327

1K5 3322 1K5 3323

G
K

3304

10K

10K

Place jumper 9314, 9316, 9317 if VLED < 17V

RED-2 7315 BC847BW 9326 3305 1K0 3306 10K F328 F347 1K5

G
F349

F348

6 9311-3

9311-4

VLED1-F

VLED1-F F304 F329 3307 10K 7316 BC847BW 9327 3308 1K0 3309 10K F330

9311-1

PWM-R1

PWM-R2

H
3327 7306 BC847BW 10K 3333 1K0 3330 10K F305

GREEN-2

9316

GREEN-2 RED-2 BLUE-2

PWM-G1

PWM-G2

1
O

10

11

12

13
O

CHN
CLASS_NO

SETNAME
1 2008-06-10 2008-08-08 ??

DRIVER 6LED LITEON


P
2008-08-08 2 3 NAME Peter Van Hove CHECK SUPERS. DATE 2008-06-02 3
C

3104 313 6314.3


1 2 3 4 5 6 7 8 9 10 11 12 13 14

2K9

8204 000 8857


130 3

P
A2 ROYAL PHILIPS ELECTRONICS N.V. 2008

15

16

17

18

19

20
18310_652_090508.eps 090508

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 72

8 LED Low-Pow: LED Drive Liteon


1 A 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 A

1
B

10

LED DRIVE
C

A
7006 LTW-E500T-PH1 7007 LTW-E500T-PH1 3 2 1 GND_HS 7 4 5 6 GREEN RED BLUE GND_HS 7 3 2 1

GREEN-1 RED-1

4 5 6

GREEN RED BLUE

B
E

BLUE-1

1M3A E2 1M85 D2 3536 E9 3537 E9 3538 E7 3539 E9 3540 E7 3541 E8 3542 E9 3543 E7 3544 E8 3546 E7 3547 E8 3549 F7 3550 E8 3552 F7 3553 F8 3555 F7 3556 F8 3569 F7 3570 F7 3571 G7 3572 G7 3573 G7 3574 G7 3584 F8 3585 F8 3586 F8 3587 G8 3588 G8 3589 G8 3590 G8 3591 G8 7006 A5 7007 A7

1M85 1 2 3 4 5 6 7 8 9 10 11 12 13 14 SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF +3V3 BLANK-BUF EEPROM-CS TEMP-SENSOR PROG

G
GREEN-2 RED-2 BLUE-2

D
H

D
H

VLED1 VLED2 15 16 3538 560R 3541 1K5 3544 1K5 3547 1K5 3550 1K5 3553 1K5 3556 1K5 3584 1K5 3585 1K5 3586 1K5 3587 1K5 3588 1K5 3589 1K5 3590 1K5 3591 1K5 3536 390R 3537 390R 3539 390R 3542 390R

E
I
1 2 3 4 5 6 7 8 9 10 11 12 13 14

3540 1M3A SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF +3V3 BLANK-BUF EEPROM-CS TEMP-SENSOR PROG 560R 3543 560R 3546 560R 3549 560R 3552 560R VLED2 15 16 3555 560R 3569 560R 3570

E
I

VLED1

560R 3571 560R 3572

G
L

560R 3573 560R 3574 560R

G
L

10

1X04 REF EMC HOLE

O
CHN
CLASS_NO

O
SETNAME
1 2008-05-23 2008-08-08 0

2LED + CONNECTOR
P
2008-05-23 1 2 3 SUPERS. DATE 2008-04-20 1
C

3104 313 6314.3

2008-08-08 2008-10-31

2K9
CHECK

8204 000 8874


130 1

P
A2 ROYAL PHILIPS ELECTRONICS N.V. 2008

NAME Peter Van Hove

10

11

12

13

14

15

16

17

18

19

20
18310_653_090508.eps 090508

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 73

Layout 8 LED Low-Pow


2110 2109 3109 3108 3107

6216

7215

2103

2211 3216

2102

3117 3114

9102

3113

7101

3222

2104

9110

2130

9114

7212 7210

7209

9302 9107 2202

7000

7001

7002

7003

7004

7005

7006

1105

3303 3302 3301

3306 3305 3304

2218 3220 3212 9211 3209 9210 9214

7306

3217 9314

7305

9316

9312

9319

9304

9303

3215

3218

9305

9309

9320

9104 9103 3118 9101 2114

9108

2220 2201

9306

2115 3112

3223

2219

3101

3125

3105

2118

9318

9310

3203 3205

3536 3537 3539 3542

3338 3374 3340 3369 3343 3373 3346 3372 3349 3371 3352 3370 3355 3337 3336

9213

9301

9311

3207 2217 9209

3142

2216 3214 2215

2131

3541 3553 3544 3588 3547 3587 3550 3586 3556 3591 3584 3590 3585 3589

7201

3326 3328 3325

9208 3219

3102

2122

2124 2121

3104

2123

7214

3134 3141

3552 3555 3549 3570 3546 3571 3543 3572 3540 3573 3538 3569 3574

3385 3389 3384 3390 3356 3391 3350 3386 3347 3387 3344 3388 3341 3353

I115

7307 3334

3332

7315

7317

9317

2210

3330 3333 3327

3210

3123

9308 9307

7102

2113

3211

3204

7316

2203 9212

3331

3121

3124

3213 2214

9326

9325

9327

3130 2120

3309 3308 3307

I114

3126

7116

3140 3135

1X03

3131 2112 3116 9119

9106

3342 3339

7007
F120 F122 F128 F124 F340 F343 F341

3103

I113

2127

1101

2119
I111

2117 2116 3115 2126

7110

2111

I110

2209

2105 3137

3106

3127

C140

3111

1M83

3221 3224

3138 3136 2106 3139 2108 2107

3314 3320 3319 3318 3323 3322 3321

2129 2128

9313 3120 3119 9121

9109 9112 9111

9113

2125

2101

3128 3129

3132 3133

1M84

3364 3365 3366 3367 3363 3368 3354 3357 3358 3359 3360 3361 3362

9315

1M85 1X04

3110

F135 F346 F215 F107 F108 F105 F348 F347 F349

3317 3316 3315 3313 3312 3311 3310

3335 3345 3348 3351

F130

F132 F127 F123

1M3A

F344

F116

F106

F345

1M2A
F330 F326 F328 F329 F325 F327

F214 F139

I126

F126

F209

F104 F109

F213

F137

F101

I124

F212

F131

1M1A
F129 F121 F138 F206 F208 F205 F125 F342

F308

F134 F202 F133 F118 F136 F203 F112

I125
F103 F102

F210 F305 F211 F303 F207

F117

F307 F304 F302

F204

31043136314.3

18490_550_090326.eps 090326

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 74

SSB: DC/DC
1 A
2U06 B10 2U07 E11 2U0B H9 2U0D H6 2U0F A5 2U0H C9 2U0J E9 2U0K F9

2
2U0R G10 2U0S F1 2U0T E11 2U0U E12 2U0V E12 2U0W A5 2U0Y A12 2U0Z B10

3
2U10 C14 2U11 C14 2U12 C9 2U14 A12 2U15 B13 2U16 E13 2U17 E13 2U19 A13

4
2U1B E14 2U39 B6 2U50 D7 2U54 C2 2U55 D4 2U56 D4 2U57 D2 2U58 D3

5
2U59 E2 2U60 E6 2U61 E4 2U62 F2 2U63 F6 2U64 G9 2U65 G8 3U06 B6

6
3U09 H9 3U0A H10 3U0F H5 3U0G H6

7
3U0J B9 3U0K E9 3U13 C7 3U15 C5 3U16 C5 3U17 D3 3U18 D5 3U19 D5

8
3U1D F6 3U1J G14 3U1M B9 3U1V F1 3U20 D5 3U21 E2 3U22 E3 3U23 F2

9
3U24 F7 3U25 F8 3U30 E6 3U31 G8 3U74 E9 3U75 G10 3U76 E11 5U00 E9

10
5U01 B9 5U02 A13 5U03 C13 5U32 A13 5U33 B13 6U02 E2 6U03 D5 7U02 B6

11
7U03 D3 7U05 C8 7U06 D8 7U08 A6 7U09 E1 CU77 G2 FU04 E2 FU05 A8

12
FU06 F5 FU07 B9 FU08 G14 FU0A E8

13
FU0B E14 FU0C B14 FU0E C14 IU06 G9 IU07 E9 IU08 B9 IU0K D7 IU0N C7

14
IU0P B6 IU0S G5 IU0T G9 IU0U E1 IU11 B6 IU12 D7 IU19 H9 IU1B C9

15
IU1D G10 IU1E F9 IU1P B6 IU1R F1 IU1T A13 IU30 E6 IU31 G9 IU55 C4

16
IU56 D3 IU57 D3 IU58 E3 IU59 E3 IU60 E3 IU61 D5 IU62 F6 IU63 D5

17

18

19

20 A

1
B

2 DC / DC

10

11

12

13

14

15
B

C A
RES 22u 2U0W 2U0F 22u 7U08 IU1P 5 6 7 8 SI4800BDY 1 2 3 VSW 2U39

+12VF1 FU05 5U02 RES 10u 5U32 RES 30R 5U33 30R IU1T +12VF RES 22u 2U0Y 2U14 2U19 22u 1u0

A C

D
3U06 3R3

12V/3V3 CONVERSION
FU07

D
FU0C +3V3

B
E

5U01 10u 3U1M 22u 2U0Z 2U06

IU11

1n0 3U0J 22R 22R 22u 220u 25V

B
E

7U02 IU0P 5 6 7 8 SI4800BDY 1 2 3

IU08 2U0H 1n0

2U15

5U03 IU1B 2U12 2U10 2U11

FU0E RES 100u 4V RES 100u 4V

+3V3F

3U15 IU55 10R 3U16 2U54 10R 3U13 3R3 2u2 IU0N 4

5 6 7 8 SI4800BDY 1 2 3

2U50 1n0

IU56 3U17

2U55 100n RES 2U56

IU61 RES 6U03 3U19 3U18 10R BAT54 COL 10R

IU12

1n0

7U05

10u

GND-SIG

G
7U06

3R3

3U20

100n

D
RES 2U57 100n 2U58

IU57

100n

1 VBST1 EN1 TRIP1 VBST2 EN2 TRIP2 V5FILT 1 TEST 2

23

7U03 TPS53124PW

3R3

D
12V/1V2 CONVERSION
5U00 RES 330u 6.3V RES 330u 6.3V 2U0U 2U0V 2U0T FU0A 3U0K 3U74 22R 22R 10u 3U76 10R RES FU0B +1V2-PNX85XX RES 100u 6.3V 2U07 2U16 2U17

VIN DRVH1 DRVL1 DRVH2 DRVL2 LL1 LL2 VO1 VFB1 VO2 VFB2 VREG5 28 26 15 17 27 16 4 5 11 10 22 2 6 9 13

IU63

IU0K

5 6 78 4 1 2 3 SI4800BDY

H
GND-SIG ENABLE-3V3-5V RES 2U59 1n0

3 3U21 20K BAT54 COL 6U02 RES 3U22 GND-SIG FU04 IU0U 7U09 BC847BW IU1R 1 2U0S 3 RES 2 +1V2-PNX85XX GND-SIG RES 3U23 2U62 10R 1u0 8 20 20K IU60 IU59 IU58 24 14 12 19 21

+1V2-PNX85XX

2U1B

RES 22u

+3V3

3U30 4K7 4u7

IU30 2U60

1n0

RES 22u

E
I

22u

IU07 2U0J 1n0

NC GND

2U61

2U63 +3V3 3n3 FU06 1% 3K3 3U1D IU62

3U24 IU1E 33K 2U0K 1n0

is prohibited without the written consent of the copyright

PGND 25 18 GND-SIG

All rights reserved. Reproduction in whole or in parts

J F
3U1V 3K3 RES

GND-SIG

22u

100n RES

GND-SIG

F J

GND-SIG 3U25 IU0S 10K

IU06

2U64 3n3 2U0R

K
+1V2-STANDBY
owner.

CU77 2U65 1n0

K
1u0 3U1J FU08 SENSE+1V2-PNX85XX 120R 1%

G
L

GND-SIG IU31 3U31 4K7 IU1D 3U75 1% 470R

G
L

IU0T

RES 2U0B

3U09

3U0A

100p

RES 100p

1% 1K0

IU19

1% 1K0

3U0G

2U0D

3U0F

47K

22K

GND-SIG

GND-SIG

GND-SIG

GND-SIG

GND-SIG

GND-SIG

10

11

12

13

14

15

1X08 REF EMC HOLE

O
CHN
CLASS_NO

SETNAME
2 2008-11-21

DC/DC
P
2008-10-10 3 SUPERS. DATE 2007-11-20 3
C

TV543 R2 LDIPNX
NAME Maelegheer Ingrid CHECK

8204 000 8932


P
130 1 A2 ROYAL PHILIPS ELECTRONICS N.V. 2008

10

11

12

13

14

15

16

17

18

19

20
18310_500_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 75

SSB: DC/DC

10

11

12
1M20 A1 1M95 E1 1M99 C1 1U01 E2 1U03 E2 2U21 B1 2U22 D2 2U23 D2 2U24 A7 2U25 B8 2U26 B9 2U27 F7 2U28 F8 2U29 E8 2U2A E8 2U2B E8 2U2C B1 2U30 D2 2U31 D3 2U32 E1 2U33 F1 2U34 F1 2U35 F1 2U36 F1 2U37 C1 2U40 F3 2U41 A2 2U42 A2 2U43 A2 2U44 A2 2U45 B2 2U46 B2 2U47 D8 2U48 D8 2U49 D7 2U51 D1 2U52 D1 2U53 C1 3U35 B6 3U37 A6 3U3V B8 3U3W A8 3U3Y E6 3U3Z F6 3U40 E8 3U41 B5 3U42 E9 3U43 E8 3U44 E9 3U45 E9 3U46 A8 3U47 E8 3U4A B8 3U4B B4 3U55 C3 3U56 C3 3U57 C3 3U58 C3 3U59 B6 3U60 E5 3U61 E5 3U62 F5 3U63 F5 3U64 C2 3U65 C2 3U66 D1 3U67 D2 3U80 E3 3U81 E3 3U82 E4 3U83 E4 3U84 F2 3U85 F4 3U86 F4 3U88 F3 3U89 F3 3U90 A3 3U91 A3 3U92 A3 3U93 B2 3U94 B3 3U95 B3 3U96 A4 3U97 A4 3U98 C3 5U06 F2 5U07 A1 5U08 E7 5U10 A1 5U11 A1 5U12 A1

13
5U13 A1 5U14 A1 5U15 B1 5U16 B1 5U17 F2 5U20 F2 5U21 F2 6U0B E8 6U0C E8 6U40 E3 7U0M A9 7U0N B7 7U0P E7 7U0Q E9 7U10 B4 7U11 B3 7U40-1 E3 7U40-2 E4 7U41-1 F4 7U41-2 F5 7U50 C7 9U06 A2 9U07 B3 9U08 B5 CU70 D1 CU71 D1 FU10 F1 FU11 F1 FU12 F1 FU13 C1 FU14 C1 FU15 C2 FU16 C1 FU17 C2 FU18 C2 FU19 C1 FU1A E1 FU1B E1 FU1C E1 FU1D F1 FU1F B9 FU1G E9 FU1H C4 FU20 E1 FU21 E1 FU22 E1 FU23 E1 FU24 C1 FU25 D1 FU26 D1 FU30 A1 FU31 A1 FU32 A1 FU33 A1 FU34 A1 FU35 A1 FU36 B1 FU38 B1 FU39 E5 FU40 F4 IU20 B4 IU21 B4 IU34 A8 IU35 B8 IU36 F7 IU37 F8 IU38 E7 IU39 F9 IU3B E8 IU3C B8 IU3T C8 IU40 E3 IU41 E3 IU42 E4 IU43 E3 IU44 F3 IU45 F4 IU47 F3 IU48 A4 IU49 A4 IU50 A5 IU51 A3 IU52 B3 IU53 B4 IU54 F5

1
A
TO LED PANEL
1M20 1 2 3 4 5 6 7 8 FU32 FU30 FU31 30R FU33 FU34 FU35 30R FU36 5U16 FU38 30R 2U2C 100n 5U07 30R 5U10 30R 5U12 5U13 30R 5U14 5U15 30R 30R 5U11 +5V

2 DC / DC
2U41 100p 2U42 100p 2U43 100p 3U90 100R 3U91 100R 3U92 100R +3V3-STANDBY IU51

4
IU48

5
LIGHT-SENSOR LIGHT-SENSOR

6
3U37 100K +3V3

RESERVED
+3V3-STANDBY 3U3W 3U46 4K7

IU49 RC +3V3 +3V3-STANDBY 2U24 68K 1u0 3 7U0M BC847BW 2 FU1F

A
B

A
1 IU34

3U96

9U06 2U44

+5V +3V3-STANDBY

RES

3U97

10K

10K

RES 9U08 IU50 3U4A IU3C 2U25 22n

+1V2-STANDBY

3U94

3U95

10K

10K

100p 2U45 100p

3U93 100R

IU52

RES IU53 9U07 RES

7U10 RES IU20

LED2

3 7U0N TS431AILT

1
NC

C B
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

1u0

LED2

2U26

RES 3U41 10K

RES 3U59 10K

1K0

BC847BW 2U46 100p IU21 7U11 BC847BW +3V3 LED1 3U4B 10K LED1 3U35 10K 5 +12VD

2U21 RES 100p

REF

IU35

1K0 3U3V

A 2

1M99

3U98 FU13 FU19 FU14 FU16 FU17 FU18 100R FU24 1K0 3U64 2U53 3U65 100p RES 1K0 2U52 100p FU15 10n 1n0 10n 10n 100R 100R 3U57 3U58 3U56 BACKLIGHT-BOOST BACKLIGHT-PWM-ANA-DISP 100R 3U55 BACKLIGHT-OUT 2U37 10R 1u0 LAMP-ON-OUT FU1H

KEYBOARD

NC

C
owner.

2U51

1 2 3 4 5 6 7 8 9 10 11 12 1-1735446-2

7U50 LD3985M122 +3V3-STANDBY 1 3 IN INH OUT BP 5 IU3T 4 +1V2-STANDBY

COM 2U47 100n 1u0 1u0 2

100p

2U23

RES

RES

2U22

2U30

2U31

2U49 POWER-OK

2U48

D
FU26

FU25 100R 3U66

RES 100R 3U67 RES

SCL-SET SDA-SET

F
CU71 CU70 GND-AUDIO 2U32

6U0B BAS316 220n 6U0C 3U80 2U29 5U08 4 VSW 5 3 3U81 10K 3U60 IU42 RES 3U61 10K RES 10K 22K 3U82 3U83 6K8 FU39 ENABLE-3V3-5V IU38 1u0 3U43 3U3Y 3U40 68R 3U47 68R 1K0 BZX384-C8V2 IU3B 220u 10K 7U40-2 BC847BPN(COL) IU41 BZX384-C27 STANDBY

FU1G +33VTUN RES 220n 3U44 RES 33K RES 33K 2U2B 3U45

G E

1M95 1 2 3 4 5 6 7 8 9 10 11 FU1A FU1B FU20 FU23 FU1C FU22 FU21 FU1D FU11

10n +3V3-STANDBY

1U03 3.0A T 32V

+12VF

E
3U42 +12V 2K2 2U2A 100K 7U0P 2N7002 3

1U01 3.0A T 32V FU10 FU12 * 5U06 2U34 RES 30R 5U17 5U20 30R 5U21 30R

6U40

+12V

IU40 3U84 1K0

IU43 6 7U40-1 BC847BPN(COL) 1

FU40 3U85 3U86 10K

DETECT-12V 3K3

+AUDIO-POWER

2 1 IU36 3U3Z 10K 5 IU54 RES 3U63 3U62 22K 10K ENABLE-3V3 33p 2 3 2U27 IU37 IU39 1u0 RES IU44

7U0Q BC847BW

2U40

2U28

1-1735446-1 2U33 RES

+1V2-STANDBY 3U88

3U89 22K

IU47 6 2

IU45

7U41-2 BC847BS(COL) 4

220p

100p 2U35

10n 2U36

100p

10n

* *

2K8 supplies 10K 30R

* IN CASE OF ONLY-ANALOG TUNER

7U41-1 BC847BS(COL) 1

2K9 supplies

6
CHN
CLASS_NO

7
SETNAME

8
DC/DC

9
2 2008-11-21

J
2008-10-10 3 NAME Maelegheer Ingrid CHECK

TV543 R2 LDIPNX
SUPERS. DATE 2007-11-20 3
C

8204 000 8932


130 2 A3

ROYAL PHILIPS ELECTRONICS N.V. 2008

10

11

12

13
18310_501_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 76

SSB: DC/DC
1 A 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 A

2U00 A12 2U01 A4 2U02 C4 2U03 D2

2U04 D3 2U05 D2 2U08 E6 2U09 E4

2U13 E3 2U18 E6 2U20 F8 2U38 F8

2U66 B6 2U67 C7 2U80 C4 2U81 C2

2U83 G7 2U8A A5 2U8C B10 2U8D B10

2U8E A10 2U8F B12 2U8G D10 2U8H D10

2U8K D10 2U8M D10 2U8Q E9 2U8R E9

2U8T H6 2U8U C8 2U8V C8 2U8Y F9

2U90 A12 3U00 C5 3U01 C5 3U02 C6

3U03 C5 3U04 C3 3U05 C5 3U07 D2

3U08 D3 3U10 E2 3U11 E7 3U12 E8

3U14 B6 3U26 G9 3U27 G10 3U28 C6

3U2C H6 3U2D H6 3U2F F10 3U2G B8

3U2H D9 3U32 E6 3U33 F8 3U3A B12

3U3F E11 3U3G F11 3U3J B9 3U3N D9

5U04 D9 5U05 B9 5U09 A11 5U18 B11

5U19 C11 5U30 A11 5U31 A11 6U00 C5

6U01 D2 6U09 B11 7U01 C3 7U0D-1 B7

7U0D-2 C7 7U0H-1 A6 7U0H-2 B6 CU25 G2

FU00 E2 FU0D F13 FU80 B14 FU85 D14

FU87 D8 FU8B A14 FU8C B8 FU8D B14

FU90 E5 IU00 C4 IU01 C3 IU02 C5

IU03 C3 IU04 D5 IU05 D3 IU09 E8

IU10 D3 IU13 D3 IU14 B6 IU15 E6

IU16 C7 IU25 D6 IU28 C7 IU29 B6

IU2A B6 IU2C E5 IU2D D5 IU2T G7

IU2V C9 IU2Y F9 IU2Z E9 IU32 D6

IU33 F8 IU82 C9 IU85 E9

10

11

12

13

14

15

DC / DC
C

FU8B +12VF2 5U09 RES +12V 10u 5U30 RES 2U8A 2U8E 22u 22u 30R 5U31 30R 220u 25V 2U90 RES 2U00 1u0

A
220u 25V RES 2U01 7U0H-1 IU2A 7 8 SI4936BDY 1

D
3U14 3R3

12V/5V CONVERSION
FU8C 5U05 10u 3U2G 2U8C 22u 2U8D 3U3J 22R 22R 22u SS36 220u 25V 6U09 5U18 RES 30R 5U19 30R RES RES 2U8F 1%

FU8D +5V5-TUN

D
+5V

B
E
3U00 IU00 10R 2U81 2u2 3U01 10R

2U66 1n0 4 IU29 IU28 3U28 3R3 7U0H-2 5 6 SI4936BDY 3 7U0D-1 2 1 2U67 IU2V IU16 1n0 2U8U 1n0 7U0D-2 5 6 FU80

IU14

B
E

3U3A

7 8 IU82 SI4936BDY 2U8V 1n0

2K7

3U04

3U03

3U02

3R3

BAT54 COL

GND-SIG1

100n RES 2U80 3U05 100n 3R3 7U01 TPS53124PW

10R

10R

C
IU03

IU01

2U02

IU02

4 3

SI4936BDY

RES 2U03

100n 2U04

100n

1 3 VBST1 EN1 TRIP1 VBST2 EN2 TRIP2 V5FILT 1 TEST 2

VIN DRVH1 DRVL1 DRVH2 DRVL2 LL1 LL2 VO1 VFB1 VO2 VFB2 VREG5 28 26 15 17 27 16 4 5 11 10 22 2 6 9 13

RES 6U00

23

IU04

IU25

12V/1V2 CONVERSION

G
FU87 5U04 10u 3U2H 3U3N 22R +1V2-PNX5100 IU2D 3U32 4K7 2U09 4u7 IU32 IU85 2U8Q 2U08 1n0 1n0 22R FU85 +1V2-PNX5100

3U07 GND-SIG1 20K BAT54 COL 6U01 RES RES 2U05 1n0 3U08 GND-SIG1 FU00 GND-SIG1 3U10 2U13 10R 18K IU10

IU05

24 14 12

ENABLE-3V3-5V

19 21 8 20

3U3F

+5V5-TUN IU2C

10R RES

IU13

2U8G

2U8K

2U8M

2U8H

NC GND

3U12

2U8R

RES

25 18

GND-SIG1

GND-SIG1 FU90

3n3

IU15

22K

1n0

PGND

+5V5-TUN

10K

E
I

1u0

IU2Z 2U18 3U11

RES 22u

22u

RES 22u

22u

E
I

GND-SIG1 IU09 GND-SIG1 2U8Y 2U20 1u0 3n3

is prohibited without the written consent of the copyright

2U38

All rights reserved. Reproduction in whole or in parts

1n0

3U3G IU2Y 3U2F 1% 470R IU33 120R 1%

FU0D

SENSE+1V2-PNX5100

F
3U33

4K7

RES 2U83

3U27

100p

K
owner.

1% 1K0

6K8

CU25

3U26

IU2T

G
L

GND-SIG1 GND-SIG1 GND-SIG1 GND-SIG1

G
L

3U2C

3U2D

1% 470R

GND-SIG1

GND-SIG1

GND-SIG1

RES 100p

2U8T

100K

10

11

12

13

14

15

O
CHN
CLASS_NO

O
SETNAME
2 2008-11-21

DC/DC
P
2008-10-10 3 SUPERS. DATE 2007-11-20 3
C

TV543 R2 LDIPNX
NAME Maelegheer Ingrid CHECK

8204 000 8932


P
130 3 A2 ROYAL PHILIPS ELECTRONICS N.V. 2008

10

11

12

13

14

15

16

17

18

19

20
18310_502_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 77

SSB: Front End


1 A 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
1T01 A5 1T11 C5 1T21 E5 1T25 C10 2T10 B3 2T11 B3 2T12 C2 2T13 C12 2T14 C2 2T15 C10 2T16 C13 2T17 C10 2T18 C13 2T19 F10 2T20 G10 2T21 E11 2T22 B7 2T23 D5 2T25 B7 2T26 E5 2T27 D7 2T28 E5 2T29 E7 2T35 B5 2T36 B5 2T37 C7 2T39 H9 3T10 B2 3T11 B2 3T12 B2 3T13 B5 3T14 B5 3T15 E5 3T16 E5 3T17 E11 3T18 E11 3T19 E11 3T22 G9 3T98 E11 5T10 B7 5T11 C2 5T12 F11 6T10 B2 6T11 B2 7T10 C11 9T10 B5 9T11 B7 9T12 B5 9T13 B7 9T14 C10 9T18 D5 9T20 D5 9T21 D7 9T22 D10 9T23 D7 9T24 E9 9T25 F5 9T27 G5 9T29 G7 9T30 G5 9T31 C13 9T32 D13 9T33 F11 9T34 G11 9T40 B7 9T41 E7 9T43 C10 9T44 D10 9T45 G7 AT10 B7 AT11 D7 FT17 C2 FT18 G5 FT21 H9 FT22 B3 FT23 B2 IT03 B5 IT04 B5 IT05 B1 IT08 C1 IT09 B5 IT0D B7 IT10 B5 IT11 B7 IT12 B7 IT13 B7 IT14 E5 IT15 F5 IT16 B9 IT17 B11 IT19 C10 IT20 C11 IT21 C12 IT22 C13 IT23 C11 IT24 C12 IT25 C13 IT26 D10 IT28 D7 IT30 D9 IT32 D11 IT34 F11 IT36 G11

20 A

5
1T01 UV1316E

6
16 17 19

10

11

12

13

14

FRONT-END
B

TUNER
18 14
MT

AGC TU AS SCL SDA NC +5V ADC +33V_TUN IF2 IF1

RF-IN

13
MT

A
TUN-P1 TUN-P2 TUN-P3 TUN-P4 TUN-P5

15

12

A
TUN-P11 TUN-P10 TUN-P9 TUN-P8 TUN-P7 TUN-P6

1 2 3 4 5 6 7 8 9 10 11

RESERVED
3T10 100R FT23 BZX384-C33 6T11 BZX384-C33 FT22 +VTUN

RF-AGC TUN-P1 TUN-P3 3T12 100R 2T10 220n 2T11 220n TUN-SCL TUN-P4 TUN-SDA TUN-P5 IT09

9T10

IT03 IT11

9T11 5T10

AT10

B-IF-_N-IFTUN-P11 TUN-P9

IT12

9T12 3T13 47R 3T14 47R IT10 IT04 2T35 18p

+VTUN 30R 2T25 220n 2T36 +5V-TUN-PIN 18p IT13 9T13 9T40 2T22 4n7 2T37 IT0D

B
D

3T11 +33VTUN IT05 100R

B
TUN-P7 TUN-P10 IT16 TUN-P8 9T14 RES TUN-P6 9T43 RES 2T13 +5V-TUN 10n 9T31 RES IT17

6T10

IT08

5T11 30R 2T12 22u 2T14 100n TUN-P1 TUN-P2 TUN-P3 TUN-P4 TUN-P5

+5V-TUN

1T11 HD1816AF/BHXP

4n7

TUNER
FT17 14 15
MT

DC_PWR NC1 RF_AGC NC2 AS SCL SDA XTAL_OUT +5V IF_OUT1 IF_OUT2

+5V-TUN-PIN

RF-IN

13
MT

7T10 UPC3221GV-E1 1T25 B-IF-_N-IFB-IF+_N-IF+ TUN-P11 TUN-P10 TUN-P9 TUN-P8 TUN-P7 TUN-P6 1 2 3 I IGND GND OFWX6966M 36M125 9T44 RES O1 O2 IT19 5 4 IT26 2T15 10n 2T17 10n IT20 2 IT23 3 INPUT2 INPUT1

C
IF-

VCC

IT21 OUTPUT1 7 IT24 OUTPUT2 GND1 GND2 6

12

2T16 10n 2T18 10n

IT22

1 2 3 4 5 6 7 8 9 10 11

IT25

IF+

VAGC

AGC CONTROL

TUN-P1

9T18 2T23 4n7

ANTENNA-SUPPLY IT28

9T21

AT11

B-IF+_N-IF+ TUN-P10 TUN-P9 9T22 TUN-P2 9T24 RES RES IT32

RF-AGC TUN-P3 TUN-SCL TUN-P6 TUN-SDA

9T20 3T15 47R 3T16 47R IT14 2T26 18p 2T28 18p

+5V-TUN-PIN

9T23 2T27 4n7 9T41 2T29 4n7

9T32 RES

IT30

TUN-P5

3T98 TUN-P4 +5V-TUN 10K 3T17 RES 6K8 220K 2T21 22n 3T18 3T19 22K

TUN-P7

IF 1T11 IS USED THEN 2T25 AND 9T11 ARE ALSO STUFFED


1T21 HD1816AF/BHXP

IF-AGC

E
+3V3A

TUNER
14 15
MT

DC_PWR NC1 RF_AGC NC2 AS SCL SDA XTAL_OUT +5V IF_OUT1 IF_OUT2

RF-IN

13
MT

12 B-IF-_N-IF2T19 10n 9T33 RES IT34 PDP

F
is prohibited without the written consent of the copyright All rights reserved. Reproduction in whole or in parts

1 2 3 4 5 6 7 8 9 10 11

TUN-P1 TUN-P2 TUN-P3 TUN-P4 TUN-P5 IT15 RF-AGC TUN-P2 TUN-P3 FT18 IF-AGC TUN-P9 9T25 9T45 9T29 9T27 9T30 ANTENNA-SUPPLY

TUN-P11 TUN-P10 TUN-P9 TUN-P8 TUN-P7 TUN-P6 PDN TUN-P8

5T12

820n

B-IF+_N-IF+

2T20 10n IT36 9T34 RES

PDN

G
K

IF 1T21 IS USED THEN 2T23,2T25,3T14, 3T15, 9T13, 9T11 AND 9T21 ARE ALSO STUFFED

+5V-TUN

3T22
owner.

RF-AGC 2T39

6K8 FT21 22n

I
N

I
N

1
O

10

11
CHN
CLASS_NO

12
SETNAME

13

14
O
2 2008-11-21

FRONT-END
P
2008-10-10 3 SUPERS. DATE 2008-06-03 3
C

TV543 R2 LDIPNX
NAME Randal De Keyzer CHECK

8204 000 8929


P
130 1 A2 ROYAL PHILIPS ELECTRONICS N.V. 2008

10

11

12

13

14

15

16

17

18

19

20
18310_503_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 78

SSB: Demodulator
1 A 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
1T50 A5 2T24 G5 2T50 A4 2T51 A4 2T52 A4 2T53 B3 2T54 B4 2T55 B3 2T56 B4 2T57 B3 2T58 B4 2T59 B3 2T60 C8 2T61 E10 2T62 D12 2T63 D9 2T64 F6 2T65 G6 2T66 G6 2T67 G7 2T68 G7 2T69 G7 2T70 G7 2T71 G8 2T72 G8 2T73 H6 2T74 H7 2T75 H6 2T76 H7 2T77 I6 2T78 I6 2T79 I6 2T80 I7 2T81 I7 2T82 I7 2T83 E4 2T84 E3 2T85 E2 3T50 A2 3T51 A10 3T52 B2 3T53 B2 3T54 B3 3T55 B2 3T56 D11 3T57 C3 3T58 C4 3T59 C4 3T60 C9 3T61 C4 3T62 C9 3T63 C9 3T64 C9 3T65 C9 3T66-1 D4 3T66-2 D4 3T66-3 D3 3T66-4 D4 3T67 D4 3T68 E2 3T69 E3 3T70 D9 3T71 D9 3T72 E9 3T73 E11 3T74 E12 3T75 E9 3T76 E9 3T77 E9 3T78 E11 3T79 E12 3T80 A9 3T81 A9 3T82 A9 3T83 E3 3T84 F3 3T86 F3 3T87 F3 3T88 F5 3T89 F3 3T90 F3 3T91 F5 3T92 G3 3T93 G3 3T94 H3 3T95 E9 5T50 B3 5T51 G7 5T52 G6 5T53 H6 5T54 I7 5T55 I6 6T50 E3 6T51 F2 7T50 A6 7T51-1 C9 7T51-2 C10 7T52-1 E9 7T52-2 E10 7T53-1 E11 7T53-2 E11 7T54 F7 7T55-1 F4 7T55-2 G4 7T56 E3 9T15 C1 9T16 C1 9T62 F6 9T63 E11 9T64 F6 9T70 C2 9T71 C2 AT50 A4 AT51 B4 FT20 E6 FT24 C5 FT25 C3 FT50 B8 FT51 C3 FT52 C3 FT53 C3 FT54 C3 FT55 F7 FT56 G8 FT57 G6 FT58 H7 FT59 I7 FT60 C10 FT61 D11 FT62 E11 FT63 I6 IT50 A5 IT51 A5 IT53 B5 IT55 B4 IT56 B3 IT57 B4 IT58 B10 IT59 B9 IT60 B4 IT61 B3 IT62 B9 IT63 B9 IT65 C3 IT66 C4 IT67 C4 IT68 C3 IT69 C8 IT70 C9 IT73 C9 IT75 D9 IT76 D8 IT77 D9 IT79 D3 IT80 E9 IT81 E10 IT83 E9 IT84 E2 IT85 E3 IT86 F6 IT88 F6 IT89 F3 IT90 F3 IT91 F4 IT93 G2 IT94 G3 IT95 G3 IT96 E11 IT97 E11 IT98 E5

20 A

2 DEMODULATOR

10

11

12

13

2T50

IT50 +3V3E 1T50 27M +3V3A +1V2A +3V3 +1V2 +3V3

A
IF+ 3T50 2T59 5T50 2T53 680n 2p2 22p 220R 3T52 220R AT50 2T52 100p AT51 2T54 100p IT56 470R 3T54 2T55 10n 2T57 10n IT60 2T58 RES 100n IT57 2T56 RES IT55

12p

+3V3D

A
3T82 RES 10K 3T51 10K FE-SOP

2T51 12p

IT51 36 VDDAL_AFE1 46 VDDAL_AFE2 3T80 3T81 RES 10K RES 10K 7T50 DRX3926K-XK-A2 IT53 49 50 40 39 47 48 32 31 P PD N RSTN SAW_SW SCL1 I2C SDA1 SCL2 I2C SDA2 TCK TDI TDO TMS GPIO1 GPIO2 XI XO 37 42 52 8 18 26 53 VDDH 2 16 27 56 VDDL 5 6 9 10 11 12 13 14 19 20 21 22 33 34 IT69 44 43 64 63 1 29 2T60 100n IT70 3T60 470R 3T62 18K +5V-TUN-CVBS 4

VDDAH_CVBS

VDDAH_AFE1

VDDAH_OSC

C
IF-

B
D
SCL-SSB SDA-SSB 9T15 RES 9T16 RES TUN-SCL TUN-SDA

PDP

3T53 560R 3T55 560R

DEMODULATOR

100n

PDN RESET-SYSTEM

IT61

MSTRT MERR MCLK MVAL 0 1 2 3 MD 4 5 6 7 RF_AGC IF_AGC SIF CVBS DA I2S CL WS VSYNC

FT50 FE-CLK FE-VALID FE-DATA0 FE-DATA1 FE-DATA2 FE-DATA3 FE-DATA4 FE-DATA5 FE-DATA6 FE-DATA7 RF-AGC IF-AGC

IT58 IT59

IT62 IT63

IT65 SCL-SSB SDA-SSB IT68 TUN-SCL TUN-SDA 9T70 9T71 FT25 JTAG-TCK-DRXK JTAG-TDI-DRXK JTAG-TDO-DRXK JTAG-TMS-DRXK FT51 FT52 FT53 FT54

3T57 100R 100R 3T58

IT66 IT67 3T59 4K7 3T61 4K7 59 60 57 58 4 30 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 IT98 +5V-TUN FT20 23 24 FT24 62 61

+3V3

+3V3

IT73 5

3T63 10K 3T64 150R

4 3T66-4 5

3 3T66-3 6

3T66-1

RES 10K

RES 10K

RES 10K

3T66-2

RES 10K

7T51-2 BC847BPN(COL) 7T51-1 RES BC847BPN(COL) 3 RES FT60 3T65 IT75 150R 2T62 3p3

IF-P

+3V3

+3V3

+3V3

+3V3 3T67

D
G

ANTENNA-CTRL +3V3 4K7 IT79 +5V-TUN 6T50 ANTENNA-SUPPLY BZX384-C6V8 2T83 100n

VIA

VIA

VSSAH_CVBS

VSSAH_AFE1

35 VSSAL_AFE1 45 VSSAL_AFE2

VSSAH_OSC

GND_HS

84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101

RESERVED
3T70 100R 3T56 +5V-TUN-CVBS IT76 2T63 22u IT77 3T71 470R 3T72 18K IT96 2 1 7T53-1 RES BC857BS(COL) 6 FT62 4 5 7T53-2 RES BC857BS(COL) 3 68R FT61

D
CVBS4

6 3T75 10K 3T76 150R 2

IT80

2T84

100n

7 17 25 54

3 15 28 55

38

41

51

65

E
H
+12V 2T85 3T68 4K7 IT84 1 22n

VSSH

VSSL

5 7T52-1 BC847BPN(COL) 3 1 3T77 IT81 IT83 180R 3T95

7T52-2 BC847BPN(COL)

22u

100R

150R

2T61

3T74

3T73

+5V-TUN-CVBS CVBS-TER-OUT 150R 3T79

9T63 3T78 100R IT97

2 4

7T56 BCP56 3 IT85

100K

3T83

3T69 2R2 3T84

2K2 9T64 IT86 FT55 9T62 7T54 LD1117DT12 IT88 +3V3 3T88 RES 100n 2T64 10K 3T91 6K8 3 IN OUT COM RES 1 2 +1V2 +1V2-PNX85XX

6T51 BAS316 220R 3T86

2R2 220R 3T87 +12V 7T55-1 LM393PT 1 IT91

+5V-TUN-CVBS

RESERVED

F
3T89
is prohibited without the written consent of the copyright

IT89 IT90

3 2

3T90

27K

All rights reserved. Reproduction in whole or in parts

J
+12V 2T24

27K

5T51 +1V2 600R 100u 4V 2T66 100n 2T67 2T65 100n 2T69 2T70 100n 2T68

FT56 +1V2A 2u2 2T71 100n 2T72

100n

100n

G
ANTENNA-CTRL

IT93 3T93 2K7

3T92 10K +3V3

IT94 IT95

5 6

7T55-2 LM393PT 7

G
FT57 +3V3E

2u2

K
owner.

5T52 +3V3 30R 4

3T94

4K7

2T73

2u2 2T74 FT58

RESERVED
L

5T53 +3V3 30R 2T75

100n

+3V3D 100n

2u2 2T76

5T54

FT59 +3V3A

+3V3 600R 2T77 2u2 2T78 2u2 2T79 100n 2T80 2T81 2u2 2T82 100n 100n

I
5T55 FT63 +5V-TUN-CVBS 30R

I
+5V-TUN

1
O

10

11

12
SETNAME

13
O

CLASS_NO

2008-11-21

FRONT-END
P
2008-10-10 3 SUPERS. DATE 2008-06-03 3
C

TV543 R2 LDIPNX
NAME Randal De Keyzer CHECK

8204 000 8929


P
130 2 A2 ROYAL PHILIPS ELECTRONICS N.V. 2008

10

11

12

13

14

15

16

17

18

19

20
18310_504_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 79

SSB: PNX8543 - Stand-by Controller


1 A 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
1HF0 A4 2H00 C3 2H01 E3 2H03 F6 2H10 D11 2H11 H7 2H12 H6 2HC0 H13 2HD0 F12 2HF0 A3 2HF1 B3 3H00 E2 3H01 E2 3H02 B11 3H03 B11 3H04 B11 3H05 B11 3H06 C11 3H07 C11 3H08 C11 3H10 B2 3H12 C12 3H13 B1 3H14 B2 3H15 B1 3H16 B2 3H17 B1 3H19 B2 3H20 C1 3H21 C2 3H22 C13 3H23 C1 3H24 C2 3H25 C13 3H26 C1 3H27 C2 3H28 C1 3H30 D2 3H31 D1 3H32 B11 3H36 D2 3H39 C2 3H41 H6 3H42 C1 3H43 H7 3H44 I4 3H46 C2 3H48 C1 3H51 C2 3H52 I13 3H53 I13 3H54 C7 3H56 C7 3H58 D2 3H60 D1 3H64 D2 3H65 B7 3H66 B7 3H67 B7 3H68 B7 3H69 C7 3H70 E2 3H72 G7 3H78-1 E6 3H78-2 E5 3H78-3 H4 3H78-4 H4 3H86-1 F4 3H86-2 F4 3H86-3 F3 3H86-4 F2 3H87-1 I2 3H87-2 I3 3H87-3 I3 3H87-4 I4 3H92-1 G4 3H92-2 G4 3H92-3 G3 3H92-4 H3 3HC2-1 H12 3HC2-2 G12 3HC2-3 H12 3HC2-4 H13 3HD4 E13 6H10 H7 6HW2 F5 7H00-6 A5 7H02 D10 7H03 C13 7H11 H8 7H14 F6 7H16-1 F5 7H16-2 G5 7H93-1 H5 7H93-2 I5 7HC3 H12 7HC4 H12 7HD0 E12 9H05 D13 9H13 G8 9H14 E11 9H15 F11 9H25 E3 9H26 E3 9H27 E3 9H28 H13 FH09 H12 FHC1 H13 FHC2 I14 FHC3 C5 FHC6 H11

20
FHC7 I13 FHD0 E13 FHD1 F11 FHD2 D13 IH00 D10 IH01 D11 IH02 D3 IH03 D10 IH04 G4 IH06 D10 IH07 D10 IH08 H5 IH09 C13 IH14 F5 IH15 C10 IH16 F5 IH17 G5 IH18 I4 IH19 F4 IH20 F7 IH21 I12 IH26 H4 IH32 C10 IH33 H7 IH34 G8 IH35 H7 IH36 H7 IH37 C10 IH91 H4 IH92 F9 IHC1 H12 IHC2 G12 IHD0 F12 IHW1 B4 IHW2 B4 IHW3 B4 IHW4 B4 IHW5 B5 IHW6 B4 IHW9 B4 IHWA C5 IHWB C4 IHWC C4 IHWD C4 IHWF C5 IHWG C4 IHWH C4 IHWM D4 IHWN D5

10

11

12

13

14

PNX 8543 : STANDBY CONTROLLER


B

A
2HF0 1HF0 27M 7H00-6 PNX85439EH/M2/24182 W1 22p

STANDBY
I XTAL O VSS_XTAL 0 1 2 3 P0 4 5 6 7 0 1 2 P1 3 7 0 1 2 3 P2 4 5 6 7 0 UA_RX 1 UA_TX 2 P3 3 4 5 SPI AJ1 CLK AK3 CSB AK1 SDI AJ4 SDO AL5 SCL AK5 SDA 0 1 AJ3 AJ2 3H66 3H65 100R 3H67 100R 3H69 3H54 100R 100R 3H56 100R 100R SPI-CLK SPI-CSB SPI-SDI SPI-SDO SCL-UP-MIPS SDA-UP-MIPS LED1 LED2

2HF1

W2 W3

22p

SPI-SDI

3H32 +3V3-STANDBY 10K 3H02 RES 4K7 RES 3H04 10K 10K IH15 3H06 10K 3H08 10K 3H25 10K 3H07 10K 4K7 3H05 3H03 RES

B
+3V3-STANDBY

3H10 3H13 3H15 3H17 3H20 10K +3V3-STANDBY 3H42 3H48 10K RES 10K 3H51 3H21 3H23 +3V3-STANDBY 3H26 3H28 3H31 10K 10K RES RES 10K 10K 10K RES 10K RES 10K

RES 10K 3H14 RES 10K 3H16 3H19 4K7 BOLT-ON-TS-ENn RESET-NVM RESET-PNX5100 RESET-ETHERNET UART-SWITCH 10K WP-NANDFLASH RESET-AUDIO AUDIO-MUTE 2H00 1n0 RC-UP REGIMBEAU_CVBS-SWITCH CEC-HDMI SUPPLY-FAULT SDM MHP-SWITCH EJTAG-DETECT LAMP-ON STANDBY DETECT1 DETECT2 POWER-OK ENABLE-3V3 RXD-UP TXD-UP BOLT-ON-IO IH02 BOLT-ON-TS-ENn RESET-NVM RESET-PNX5100 RESET-ETHERNET UART-SWITCH WP-NANDFLASH RESET-AUDIO AUDIO-MUTE RC-UP REGIMBEAU_CVBS-SWITCH CEC-HDMI SUPPLY-FAULT SDM MHP-SWITCH EJTAG-DETECT LAMP-ON STANDBY DETECT1 DETECT2 POWER-OK ENABLE-3V3 RXD-UP TXD-UP BOLT-ON-IO

IHW1 IHW3 IHW4 IHW5 IHW2 IHW6 IHW9 IHWA FHC3

AC2 AC1 AB3 AB2 AB1 AD2 AD1 AC5 AF2 AF1 AG4 AG3 AG2 AC4 AC3 AE1 AD5 AD4 AD3 AE5 AE4 AG1 AH5 AH4 AH3 AH2 AH1

MC

SCL-UP-MIPS SDA-UP-MIPS LED1 LED2

100R

PWM

3H68

3H39 10K 3H46 27K 10K

PSEN ALE EA RESET_IN

AE2 AE3 AF4 AF3

PSEN ALE EA RESET-STBY

PSEN ALE EA IH32 IH37

+5V

+3V3-PER

+3V3-PER

3H58 10K 3H36 RES 10K

2H10

100n RES

RES 10K 3H24 RES 10K 3H27 10K 3H30 10K

IHWB IHWC IHWD IHWF IHWG IHWH IHWM IHWN

C
7H03 BC847BW

+3V3-STANDBY 4K7 RES 3H12 3H22 IH09 1 3

4K7

+3V3-STANDBY

3H60 10K

FHD2 8 7H02 M25P05-AVMN6 IH00 SPI-SDO IH03 SPI-CLK IH06 SPI-CSB IH07 SPI-WP 3 7 +3V3-STANDBY 1 5 6 D C S W HOLD VSS 4 9H05 RES IH01 Q 2 SPI-SDI LAMP-ON LAMP-ON-OUT

D
3H64 RES 10K

VCC

RESET-SYSTEM

G
3H01

3H70 100K 3H00 10K 10K 2H01 100n

KEYBOARD

RESET-SYSTEM AV2-BLK AV1-BLK KEYBOARD LIGHT-SENSOR AV1-STATUS AV2-STATUS SPI-PROG SPI-WP

AN3 0 AN2 1 AP2 CADC 2 AP1 3 AK2 4 P6 AK4 5

512K FLASH

SPI-PROG SPI-WP

E
H

+3V3-STANDBY +3V3-STANDBY 9H25 RC RC-UP RC RC-OUT RC-UP RC-IN

+3V3-STANDBY

E
FHD0 RESET-STBY

3H78-2

3H78-1

9H27

9H14

10K

10K

* HOTEL TV

3 6 IH14 1 2 7H14 PDTC114EU

IH20

IH92 DETECT1 DETECT2

FHD1 1

7HD0 NCP303LSN30 2 IHD0 5

INP OUTP CD NC GND 3

1 3H86-1 8

2HD0

9H15

10K

10K

10K

10K

BAS316

6HW2

IH16

2H03 1u0

is prohibited without the written consent of the copyright

All rights reserved. Reproduction in whole or in parts

7 3H92-2 2

100n

RES

+3V3

3H86-4

3H86-3

3H86-2

IH19

10K

9H26

3HD4

7H16-1 BC847BS(COL) 1

+1V2-PNX85XX

3H92-3 10K

3 10K

IH04

7H16-2 BC847BS(COL) 4

RES

G
K
owner.

+3V3-STANDBY +3V3-PER 3H72

G
IHC2

1 3H92-1 8

IH17 10K

4K7

2 3HC2-2 7

IH34

9H13

10K

9H28 BC857BW 7HC4 2HC0 RES 4 3HC2-4 5

6 +1V2-PNX5100 5 3H92-4 4 3 3H78-3 6 10K 10K IH26 2 7H93-1 BC847BS(COL) 1 3H41 DETECT-12V 10K 6H10 IH33 BAS316 IH36

7H11 NCP303LSN30 2 IH35 5

RESET-NVM INP OUTP CD NC GND 3 1

FHC6

8 3HC2-1 1 10K

FH09

RES

3 3HC2-3 6

2H12

3H43

2H11

100n

100n

5 3H78-4 4

3K3

IH91 10K

IH08

7HC3 M24C64 10K

100n 8

10K

+3V3-PER

IHC1

7H93-2 BC847BS(COL) 3 IH18 5 4 3H44 10K

IH21

1 2 3

(8Kx8) EEPROM
0 1 2 ADR

WC SCL

7 6 5 3H52 100R 3H53 100R FHC1 FHC2 SCL-UP-MIPS SDA-UP-MIPS

SDA 4

+5V

3H87-1 10K

10K 7 3H87-2 2

10K 3 3H87-3 6

10K 5 3H87-4 4

FHC7

MAIN NVM

1
O

5
1X03 EMC HOLE

10

11

12

13

14
O

CHN
CLASS_NO

SETNAME
2 2008-11-21

STANDBY CONTROLLER
P
2008-10-10 3 SUPERS. DATE 2007-11-29 16
C

PNX8543 TV543 R2 LDIPNX


NAME Randal De Keyzer CHECK

8204 000 8927


P
130 1 A2 ROYAL PHILIPS ELECTRONICS N.V. 2005

10

11

12

13

14

15

16

17

18

19

20
18310_505_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 80

SSB: PNX8543 - Debug

Personal Notes:

1H11 C2

2H06 C3

2H07 D3

3HF3 A3

6HF0 B3

7HF2 B3

FH00 C2

FH01 D2

FH08 D3

IH93 C2

IH94 C3

IH95 D2

1
C
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

4
C

PNX8543 : DEBUG A
+3V3-PER

A
D

3HF3 6HF0

owner.

SML-310

330R

E B

BE
RESET-SYSTEM 7HF2 PDTC114EU

SPI-PROG

FH00 2 1

IH93 TSTPOINT FOR DEBUG SPI-PROG

2H06 RES 100p

SKHUBHE010 1H11

IH94 GND TSTPOINT FOR DEBUG

D
H

SDM

FH01

IH95 TSTPOINT FOR DEBUG SDM

2H07 RES 100p FH08

D
H

1
I
CHN
CLASS_NO

4
I

SETNAME
2 2008-11-21

DEBUG STBY CTRL


J
2008-10-10 3 SUPERS. DATE 2007-11-29 16
C

PNX8543 TV543 R2 LDIPNX


NAME Maelegheer Ingrid CHECK

8204 000 8927


130 2 A4

ROYAL PHILIPS ELECTRONICS N.V. 2005

6
18310_506_090302.eps 090302

10000_012_090121.eps 090121

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 81

SSB: PNX8543 - Control

10

11

12

13
3H09 C6 3H11 C1 3H33 C6 3H37 D4 3H38 D5 3H45 D4 3H49 E4 3H50 E4 3HF9 A3 3HFY C1 3HP2 C4 3HP3 B1 3HP4 B1 3HP6 B1 3HP8 C1 3HPA C1 3HPB C1 3HPC C1 3HPD E2 3HPE E2 3HPF E2 3HPG E2 3HPH E2 3HPJ F2 3HPK E4 3HPL C1 3HPM F4 3HPP D1 3HPR D1 3HPS F2 3HPT F4 3HPU F2 3HPV F4 3HPW B3 7H00-8 B3 9H17 D3 FH03 C5 FH04 E4 FH05 F4 FH11 F4 FH12 F4 IH12 C1 IHF4 B3 IHF6 C3 IHF7 C3 IHF8 C3 IHF9 C3 IHFA C3 IHFB B3 IHS8 C1

1
A

2 PNX8543 : CONTROL

A
B

+3V3-PER

3HF9

10K

7H00-8 PNX85439EH/M2/24182

C
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

B
RESET-SYSTEM +3V3-PER 10K 10K 10K 10K 10K 10K 3HP3 3HP4 3HP6 3HPA 3HPB 3HFY 3H11 3HP8 3HPC 3HPL EJTAG-TCK EJTAG-TDI EJTAG-TDO EJTAG-TMS EJTAG-TRSTN IHS8 BOOTMODE IH12
IRQ-PCI

IHF4 IHFB

AP27 AN28 AN4 AP3 AP4 AM4 AL4 U2 U3 U4 IHF7 L34 L32 L31 V2 V3 V4 V5

CONTROL
BL_PWM RESET_SYS TCK TDI EJTAG TDO TMS TRSTN GPIO_0 GPIO_1 GPIO_2 GPIO_3 GPIO_4 GPIO_5 GPIO_6 GPIO_7 GPIO_8 GPIO_9

F33 SCL 1 H33 SDA 1 D32 SCL 2 B33 SDA 2 D33 SCL 3 G32 SDA 3

SCL1 SDA1 SCL2 SDA2

EJTAG-TCK EJTAG-TDI EJTAG-TDO EJTAG-TMS 33R EJTAG-TRSTN

3HPW

SCL3 SDA3 USB20-DM

+3V3-PER

10K 10K 10K 10K

3H33

IRQ-CA RXD-MIPS TXD-MIPS

15K

BOOTMODE WC-EEPROM-PNX5100 IRQ-PCI IRQ-CA RXD-MIPS TXD-MIPS IHF6 IHF8 IHF9 IHFA TXD-MIPS2 RXD-MIPS2 PCI-CLK-OUT 9H17 RES

3H09

12K 1% AM17 3H37 USB_RPU AP17 USB_ID AN17 3H45 USB_VBUS 1K5 3H38 10K

owner.

+3V3-PER

10K 10K

3HPP 3HPR

TXD-MIPS2 RXD-MIPS2

AK27 AL27 UA2_TX UA2_RX AP29 CLK_27_OUT

15K

DM DP USB FAULT PWR_EN RREF

AN16 AP16 AL16 AK16 AM16

USB20-DM USB20-DP USB-OC 3HP2 FH03

USB20-DP

10K

+3V3-PER +3V3-PER

D
F
3HPD 3HPE 100R SCL2 SDA2 SCL3 SDA3 3HPJ 100R SCL2 3HPS 3HPU 100R 100R SCL-SET SDA-SET SCL-SET SDA-SET FH11 FH12 3HPT +3V3-PER 4K7 3HPV 4K7 RES 3HPG 100R 100R SDA-UP-MIPS 3HPF RES 100R SDA-UP-MIPS 3HPH 100R SDA-SSB SDA-SSB SCL-SSB SCL-SSB FH04 FH05 3HPK +3V3-PER 1K5 3HPM 1K5 SCL-UP-MIPS SDA-UP-MIPS 3H49 +3V3-PER 4K7 3H50 4K7

SCL1

SCL-UP-MIPS

SCL-UP-MIPS

SDA1

SDA2

6
CHN
CLASS_NO

7
SETNAME

2008-11-21

MIPS , I2C & EJTAG


J
2008-10-10 3 SUPERS. DATE 2007-11-29 16
C

PNX8543 TV543 R2 LDIPNX


NAME Maelegheer Ingrid CHECK

8204 000 8927


130 5 A3

ROYAL PHILIPS ELECTRONICS N.V. 2005

10

11

12

13
18310_507_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 82

SSB: PNX8543 - Control

10

11

12

13

1
B

2 PNX 8543 : CONTROL

A
C
PCI-AD0 PCI-AD1 PCI-AD2 PCI-AD3 PCI-AD4 PCI-AD5 PCI-AD6 PCI-AD7 PCI-AD8 PCI-AD9 PCI-AD10 PCI-AD11 PCI-AD12 PCI-AD13 PCI-AD14 PCI-AD15 PCI-AD16 PCI-AD17 PCI-AD18 PCI-AD19 PCI-AD20 PCI-AD21 PCI-AD22 PCI-AD23 PCI-AD24 PCI-AD25 PCI-AD26 PCI-AD27 PCI-AD28 PCI-AD29 PCI-AD30 PCI-AD31 A29 B29 C29 D29 A28 B28 C28 D28 E28 A27 B27 C27 D27 E27 A26 B26 E24 D24 C24 B24 A24 E23 D23 C23 B23 A23 E22 D22 C22 B22 A22 E21
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

7H00-3 PNX85439EH/M2/24182

PCI
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 PCI_AD 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

D21 0 C21 1 B21 PCI_CBE 2 A21 3 A30 A25 C26 B30 C30 D26 E25 C25 D25 B25 E26

PCI-CBE0 PCI-CBE1 PCI-CBE2 PCI-CBE3 PCI-CLK-PNX8535 PCI-DEVSEL PCI-FRAME PCI-AD24 IH30 PCI-IRDY PCI-PAR PCI-PERR PCI-SERR PCI-STOP PCI-TRDY PCI-REQ PCI-GNT PCI-REQ-B PCI-GNT-B IHS7 9HG3 PCI-CLK-OUT XIO-ACK 3HF5 100R

PCI-DEVSEL PCI-FRAME PCI-IRDY PCI-TRDY PCI-STOP PCI-PERR PCI-SERR

3HFD-4 5 4K7 3HFD-2 7 4K7 7 4K7 6 4K7

4 3HFD-1 8 2 3HFD-3 6 2 3HFE-2 3 3HFE-3 3HFE-1 8

1 4K7 3 4K7 1 4K7

A
+3V3-PER

CLK DEVSEL FRAME IDSEL INTA_OUT IRDY PAR TRDY PERR SERR STOP TRDY

3HEU 100R

B
9HF6 2 4K7 3 4K7 1 4K7 4 4K7 7 3HES-2 +3V3-PER 9HF7 6 3HES-3 +3V3-PER 9HF4 8 3HES-1 +3V3-PER 9HF5 5 3HES-4 +3V3-PER PCI-GNT-MINI PCI-REQ-MINI PCI-REQ PCI-GNT PCI-REQ-B PCI-GNT-B PCI-GNT-ETH PCI-REQ-ETH

owner.

D30 REQ E30 GNT REQ_B GNT_B PLL_OUT E31 E29 AP28

A20 XIO_ACK B19 XIO_AD25 B20 0 C20 IHF1 1 XIO_SEL D20 IHF2 2 E20 IHF3 3

2HF5 D7 2HF6 D7 2HF7 D7 3HES-1 C5 3HES-2 B5 3HES-3 C5 3HES-4 C5 3HEU B3 3HF2 E2 3HF4 E2 3HF5 C3 3HFD-1 A6 3HFD-2 A5 3HFD-3 A6 3HFD-4 A5 3HFE-1 A6 3HFE-2 A6 3HFE-3 A6 3HFG D2 3HFH E2 3HFK E7 3HFM E7 3HFN E7 3HFP E7 3HFR E5 7H00-3 A2 7HF1 D6 9HF4 C6 9HF5 C6 9HF6 B6 9HF7 B6 9HG3 C3 IH30 B4 IHF0 E2 IHF1 C3 IHF2 C3 IHF3 D3 IHF5 E2 IHS7 C3

XIO-SEL-NAND

F
RESERVED
+3V3-PER 2HF5

D
G
PCI-CLK-OUT 3HFG 10R 3HFH IHF0 10R IHF5 3HF2 PCI-CLK-PNX8535 PCI-CLK-PNX5100 3HFR 33R 1 PCI-CLK-ETHERNET PCI-CLK-OUT 7HF1 CY2305S

10n 2HF6 6 100n

D
G
2HF7 10p 3HFK 3HFP 33R 33R PCI-CLK-PNX8535 PCI-CLK-ETHERNET

ZERO DELAY BUFFER


REF CLK

VDD 1 2 3 4 3 2 5 7 8 3HFM 33R 3HFN 33R

10R 3HF4 10R

PCI-CLK-MINI

GND 4

CLKOUT

E
PCI-CLK-PNX5100 PCI-CLK-MINI

5
CHN
CLASS_NO

6
SETNAME

7
CONTROL

8
2 2008-11-21

J
2008-10-03 2 NAME Maelegheer Ingrid

PNX8543 TV543 R2 LDIPNX


SUPERS. DATE 2007-11-29 16
C

8204 000 8927


130 6 A3

CHECK

ROYAL PHILIPS ELECTRONICS N.V. 2005

10

11

12

13
18310_508_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 83

SSB: PNX8543 - SDRAM


1 A 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
2HG0 E3 2HG1 E3 2HG2 E3 2HG3 E3 2HG4 E3 2HG5 E4 2HG6 E4 2HG7 E4 2HG8 E4 2HG9 E6 2HGA E7 2HGB E7 2HGC E7 2HGD E7 2HGE E7 2HGF E8 2HGG E8 2HGH E9 2HGJ E9 2HGK E9 2HGM E9 2HGN E10 2HGP E10 2HGR E10 2HGS E10 2HGT E10 2HGU E12 2HGV E13 2HGW E13 2HGY E13 2HGZ E13 2HH0 E13 2HH1 E14 2HH2 E14 2HH3 H13 2HH4 C8 2HH5 C8 2HHA H7 2HHB A11 2HHK E6 2HHM E6 2HHN E11 2HHP E12 3HGP F7 3HGR F7 3HGS F8 3HGT G7 3HGU G8 3HGV G7 3HGW G8 3HGY G7 3HGZ G8 3HH0 G7 3HH1 G8 3HH2 G7 3HH3 G8 3HH4 G7 3HH5 G8 3HH6 G7 3HH7 H3 3HH8 H4 3HH9 H3 3HHA H4 3HHB F13 3HHC F13 3HHD G14 3HHE F13 3HHF G13 3HHG G13 3HHH G14 3HHJ G13 3HHK G14 3HHM G13 3HHN G14 3HHP G13 3HHR G14 3HHS G13 3HHT G14 3HHU G13 3HHV H10 3HHW H10 3HHY H9 3HHZ H10 3HJ0 C1 3HJ1 A11 3HJ2 B11 3HJ3 A13 3HJ4 B13 3HJ5 C8 3HJY C8 3HKM G3 3HKN G10 7H00-2 A7 7HG0 F5 7HG1 F11 FH06 A12 FH07 A11 IHG0 C7

20 A

2 PNX 8543 : SDRAM

6
7H00-2 PNX85439EH/M2/24182

10

11

12

13

14

DDR2-A0 DDR2-A1 DDR2-A2 DDR2-A3 DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9 DDR2-A10 DDR2-A11 DDR2-A12 DDR2-BA0 DDR2-BA1
DDR2-BA2

AA34 0 AE33 1 AA33 2 AD31 3 Y34 4 AD32 5 W33 M_A 6 AC32 7 W34 8 Y31 9 AD34 10 V33 11 Y32 12

MEMORY

AC34 0 AD33 1 M_BA AA32 2 W32 AE31 M_CASB M_CKE

B
D
3HJ0 220R DDR2-CLK_P DDR2-CLK_N

DDR2-CAS DDR2-CKE DDR2-CLK_N DDR2-CLK_P DDR2-CS DDR2-DQM0 DDR2-DQM1 DDR2-DQM2 DDR2-DQM3 DDR2-DQS0_N DDR2-DQS0_P DDR2-DQS1_N DDR2-DQS1_P DDR2-DQS2_N DDR2-DQS2_P DDR2-DQS3_N DDR2-DQS3_P

AB33 N AB34 M_CLK P W31 M_CSB

AJ34 0 AJ31 1 R34 M_DQM 2 R31 3 AG33 N AG34 M_DQS0 P AH31 N AH32 M_DQS1 P N34 N M_DQS2 N33 P N31 N M_DQS3 N32 P

AH34 0 AK33 1 AH33 2 AL34 3 AL33 4 AE34 5 AK34 6 AF34 7 AG32 8 AK31 9 AJ32 10 AL32 11 AL31 12 AF31 13 AK32 14 AF32 15 P34 M_DQ 16 T34 17 R33 18 U34 19 V34 20 M33 21 T33 22 M34 23 P31 24 T32 25 P32 26 U31 27 U32 28 M31 29 R32 30 M32 31 IREF ODT M RASB VREF WEB AA31 V31 V32 AB32 AE32 IHG0 3HJ5 5K6 3HJY 820R 2HH5 100n 2HH4

DDR2-D0 DDR2-D1 DDR2-D3 DDR2-D2 DDR2-D6 DDR2-D5 DDR2-D4 DDR2-D7 DDR2-D8 DDR2-D9 DDR2-D10 DDR2-D11 DDR2-D12 DDR2-D13 DDR2-D14 DDR2-D15 DDR2-D16 DDR2-D17 DDR2-D19 DDR2-D18 DDR2-D22 DDR2-D23 DDR2-D20 DDR2-D21 DDR2-D24 DDR2-D30 DDR2-D26 DDR2-D25 DDR2-D28 DDR2-D31 DDR2-D27 DDR2-D29 +1V8-PNX85XX

+1V8-PNX85XX

+1V8-PNX85XX

A
330u 6.3V 1K0 1% 1K0 1% 2HHB 3HJ1 3HJ3

FH07 DDR2-VREF-CTRL 1K0 1% DDR2-VREF-DDR

FH06

1K0 1%

3HJ2

3HJ4

100n DDR2-VREF-CTRL

DDR2-ODT DDR2-RAS

D
G
+1V8-PNX85XX

DDR2-WE

D
+1V8-PNX85XX

RES 2HHK

330u 6.3V 2HHM

RES 2HHN

330u 6.3V 2HHP

1u0

1u0

E
100n 2HG4 100n 2HG3 100n 2HG6 2HG0 100n 2HG1 100n 2HG2 100n 2HG5 100n 2HG7 100n 2HG8 100n

E
100n 2HGW 2HGU 100n 2HGV 100n 2HGY 100n 2HGZ 100n 2HH0 100n 2HH1 2HH2 100n 22u

100n 2HGM

100n 2HGG

100n 2HGC

100n 2HGD

2HGH

100n 2HGN

100n 2HGR

100n 2HGA

100n 2HGB

100n 2HGE

100n 2HGK

100n 2HGP

100n 2HGS

100n 2HGF

100n 2HGT

2HG9

100n 2HGJ

A1 E1 J9 M9 R1

A1 E1 J9 M9 R1

VDDL

J1

F
is prohibited without the written consent of the copyright All rights reserved. Reproduction in whole or in parts

DDR2-ODT DDR2-CKE DDR2-WE DDR2-CS DDR2-RAS DDR2-CAS DDR2-BA0 DDR2-BA1


DDR2-BA2

K9 K2 K3 L8 K7 L7 L2 L3 L1 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 3HKM RES 220R J8 K8 F7 E8 B7 A8

VDD ODT CKE WE CS RAS CAS 0 1 BA 2 0 1 2 3 4 5 6 A 7 8 9 10 11 12 CK

VDDQ

SDRAM

NC

A2 E2 R3 R7 R8 3HGP 3HGR 33R 3HGT 33R 3HGV 33R 3HGY 33R 3HH0 33R 3HH2 33R 3HH4 33R 3HH6 33R 33R 3HGS 33R 3HGU 33R 3HGW 33R 3HGZ 33R 3HH1 33R 3HH3 33R 3HH5 33R

DDR2-ODT DDR2-CKE DDR2-WE DDR2-CS DDR2-RAS DDR2-CAS DDR2-BA0 DDR2-BA1


DDR2-BA2

K9 K2 K3 L8 K7 L7 L2 L3 L1 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 3HKN RES 220R J8 K8 F7 E8 B7 A8

VDD ODT CKE WE CS RAS CAS 0 1 BA 2

VDDL

J1

7HG0

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 VDDQ

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

7HG1

100n

22u

SDRAM

NC

A2 E2 R3 R7 R8 3HHB 3HHC 3HHE 33R 33R 33R 33R 3HHF 33R 3HHJ 33R 3HHM 33R 3HHP 33R 3HHS 33R 3HHU 33R 3HHD 33R 3HHH 33R 3HHK 33R 3HHN 33R 3HHR 33R 3HHT 33R

F
DDR2-D16 DDR2-D17 DDR2-D19 DDR2-D18 DDR2-D20 DDR2-D21 DDR2-D22 DDR2-D23 DDR2-D24 DDR2-D30 DDR2-D26 DDR2-D25 DDR2-D28 DDR2-D29 DDR2-D27 DDR2-D31 DDR2-DQM3 DDR2-DQM2 DDR2-VREF-DDR

EDE1116AEBG-8E

G
K
owner.

DDR2-A0 DDR2-A1 DDR2-A2 DDR2-A3 DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9 DDR2-A10 DDR2-A11 DDR2-A12 DDR2-CLK_P DDR2-CLK_N DDR2-DQS0_P DDR2-DQS0_N 3HH9 33R 3HH7 33R 33R 33R 3HH8

DQ

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 B3 F3 J2

DDR2-D0 DDR2-D1 DDR2-D3 DDR2-D2 DDR2-D4 DDR2-D5 DDR2-D6 DDR2-D7 DDR2-D8 DDR2-D9 DDR2-D10 DDR2-D11 DDR2-D12 DDR2-D13 DDR2-D14 DDR2-D15 DDR2-DQM1 DDR2-DQM0

DDR2-A0 DDR2-A1 DDR2-A2 DDR2-A3 DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9 DDR2-A10 DDR2-A11 DDR2-A12 DDR2-CLK_P DDR2-CLK_N DDR2-DQS2_P DDR2-DQS2_N DDR2-DQS3_P DDR2-DQS3_N 3HHY 33R 3HHV 33R 33R 33R 3HHW

EDE1116AEBG-8E 0 1 2 3 4 5 6 A 7 8 9 10 11 12 CK

DQ

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 B3 F3 J2

3HHG

UDM LDM VREF

UDM LDM VREF

3HHA

LDQS

2HHA 100n

DDR2-VREF-DDR

3HHZ

LDQS

2HH3 100n

VSSDL

UDQS VSS A3 E3 J3 N1 P9

UDQS VSS A3 E3 J3 N1 P9

VSSQ A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

VSSDL

L H

DDR2-DQS1_P DDR2-DQS1_N

H
VSSQ A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

J7

J7

I
N

I
N

1
O

10

11
CHN
CLASS_NO

12
SETNAME

13

14
O
2 2008-11-21

DDR2 INTERFACE
P
2008-10-10 3 SUPERS. DATE 2007-11-29 16
C

PNX8543 TV543 R2 LDIPNX


NAME Maelegheer Ingrid CHECK

8204 000 8927


P
130 7 A2 ROYAL PHILIPS ELECTRONICS N.V. 2005

10

11

12

13

14

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16

17

18

19

20
18310_509_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 84

SSB: PNX8543 - Digital Video In

10

11

12
3HK0 B2 7H00-4 A3 9HK0 D2 IHSM B2 TH01 C2 TH02 C2 TH03 C2 TH04 C2 TH05 C2 TH06 C2 TH07 D2 TH08 D2 TH09 B2 TH10 B2 TH11 B2 TH12 B2 TH13 B2 TH14 C2 TH15 C2 TH16 C2

13

PNX 8543 : DIGITAL VIDEO IN


B

A
7H00-4 PNX85439EH/M2/24182 DDCA-SCL DDCA-SDA C18 E19 C15 D15 3HK0 12K TH10 TH11 TH12 TH13 TH14 TH15 TH16 TH01 TH02 TH03 TH04 TH05 TH06 TH07 TH08 9HK0 IHSM C16

A
HDMI_DV
DDC_SCL_A DDC_SDA_A DDC_SCL_B DDC_SDA_B HDMI_RREF DV CLK FID HS B8 C9 D9 B6 A6 E7 D7 C7 B7 A7 E8 D8 C8 A8 E9 B4 A4 E5 D5 C5 B5 A5 E6 D6 C6

C
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

DDC-SCL DDC-SDA RREF-PNX85XX

HDMIA-RX0HDMIA-RX0+ HDMIA-RX1HDMIA-RX1+

TH09

B18 P HDMI_RX0_A B17 N A17 P HDMI_RX1_A A16 N B16 B15 A19 A18 B14 B13 A13 A12 B12 B11 A15 A14 D19 E15

HDMIA-RX2HDMIA-RX2+ HDMIA-RXCHDMIA-RXC+ HDMIB-RX0HDMIB-RX0+ HDMIB-RX1HDMIB-RX1+ HDMIB-RX2HDMIB-RX2+ HDMIB-RXCHDMIB-RXC+ HOT-PLUG-A HOT-PLUG

C
owner.

0 1 2 3 P 4 HDMI_RX2_A DV_UVIN N 5 6 P HDMI_RXC_A 7 N 8 9 P HDMI_RX0_B N DV_VALID DV_VS P HDMI_RX1_B N 0 1 P 2 HDMI_RX2_B N 3 4 DV_YIN P 5 HDMI_RXC_B N 6 7 HOT_PLUG_A 8 HOT_PLUG_B 9

C
E

1
I

7
I

CHN
CLASS_NO

SETNAME
2 2008-11-21

VIDEO IN
J
2008-10-10 3 SUPERS. DATE 2007-11-29 16
C

PNX8543 TV543 R2 LDIPNX


NAME Maelegheer Ingrid CHECK

8204 000 8927


130 8 A3

ROYAL PHILIPS ELECTRONICS N.V. 2005

10

11

12

13
18310_510_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 85

SSB: PNX8543 - Audio


1 A 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 A

10

11

12

13

A
C

PNX 8543 : AUDIO


AUDIO-VDD 2HMJ FHR3 IHMW ADAC(7) IHMV 9HM0 3 2 11 7HM5 BC807-25W 2 3 3HM0-2 IHM0 2HMG 1u0 BZX384-C6V8 6HM0 7 100n 4 7HM1-1 LM324 1 FHM0 AUDIO-CL-L

B
D
+AUDIO-POWER IHM6 3HMF 4R7 22K

B
1

AUDIO-VDD

3HME-2 10K

3HME-1 10K 2HMP 33p

IHM8 8 3HM0-1 1

22K

C
IHM2 6 3HM0-3 22K 3 IHM4

C
AUDIO-VDD

IHM7 7HM6 BC847BW

F
5 3HM0-4 4 3HM1 10K

IHM5 IHN3 ADAC(8) IHN6 6 22K 11 5 4 7HM1-2 LM324 7 FHM1 AUDIO-CL-R

D
G

3 3HME-3 6 10K

5 3HME-4 4 10K 2HMT 33p

E
AUDIO-VDD

AUDIO-VDD

3HMY

IHNB 2 BC857BW 7HM3 3 ADAC(5) IHNA 9 2HN1 3n3 10 2K2

7HM1-3 LM324 8

FHM2

AUDIO-OUT-L

F
is prohibited without the written consent of the copyright

IHN8 6 IH22 ADAC(1) IHN0 2 7HM2-1 BC847BS(COL) 1 IHNG 3HMA 470R

11

All rights reserved. Reproduction in whole or in parts

3HMZ 22K 2HM1 1u0

J
2HM3 3n3

3HML 2K2

IHM1 +AUDIO-L 3 3HMM-3 10K 6 5 3HMM-4 10K 2HMW 33p 4

G
K
owner.

IHNJ 3HMC 22K

2HM1 G5 2HM2 H5 2HM3 G4 2HM4 G5 2HM5 H5 2HM8 H4 2HMG B3 2HMJ A10 2HMP C10 2HMT E10 2HMW G10 2HMY H9 2HMZ I10 2HN1 F9 3HM0-1 C5 3HM0-2 B4 3HM0-3 C4 3HM0-4 D5 3HM1 D4 3HMA G6 3HMB H6 3HMC G5 3HMD I5 3HME-1 B10 3HME-2 B9 3HME-3 E9 3HME-4 E10 3HMF B3 3HML G6 3HMM-1 I10 3HMM-2 I9 3HMM-3 G9 3HMM-4 G10 3HMU H6 3HMV H5 3HMW H5 3HMY F5 3HMZ F5 6HM0 B4 7HM1-1 B10 7HM1-2 D10 7HM1-3 F10 7HM1-4 H10 7HM2-1 F5 7HM2-2 H5 7HM3 F7 7HM4 H7 7HM5 B5 7HM6 C5 9HM0 B5 FHM0 B11 FHM1 D11 FHM2 F11 FHM3 H11 FHR3 A10 IH22 F4 IH23 H4 IHM0 B3 IHM1 F7 IHM2 C4 IHM4 C4 IHM5 D5 IHM6 B3 IHM7 C5 IHM8 C5 IHMG H7 IHMV B9 IHMW B9 IHN0 F5 IHN3 D9 IHN4 H5 IHN6 D10 IHN8 F6 IHNA F10 IHNB F9 IHND H9 IHNE H10 IHNF H6 IHNG F6 IHNH H6 IHNJ G5 IHNK I5

2HM4

100n

AUDIO-VDD

3HMW

AUDIO-VDD 2 BC857BW 7HM4 3 ADAC(6) 7HM2-2 BC847BS(COL) 4 IHNH 3HMB 470R IHND 12 IHNE 2HMY 13 3n3 11 3HMU 2K2 IHMG -AUDIO-R 4 2K2

1 IHNF

IH23 ADAC(2)

3HMV 22K 2HM2 1u0

IHN4 5

7HM1-4 LM324 14

FHM3

AUDIO-OUT-R

2HM8

2HM5

100n

3n3

M
3HMD

IHNK 22K

3HMM-2 10K

3HMM-1 10K 2HMZ 33p

M
1

I
N

I
N

1
O

10
CHN
CLASS_NO

11
SETNAME

12

13
O
2 2008-11-21

AUDIO
P
2008-10-10 3 SUPERS. DATE 2007-11-29 16
C

PNX8543 TV543 R2 LDIPNX


NAME Maelegheer Ingrid CHECK

8204 000 8927


P
130 9 A2 ROYAL PHILIPS ELECTRONICS N.V. 2005

10

11

12

13

14

15

16

17

18

19

20
18310_511_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 86

SSB: PNX8543 - Analogue AV


1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
2H80 A6 2H81 A5 2H82 A5 2H83 A5 2H84 B6 2H85 B5 2H86 D3 2H87 A5 2H88 A4 2H89 B4 2H90 B5 2H91 C4 2H92 C5 2H93 C5 2H94 C4 2H95 C4 2H96 D5 2H97 D4 2H98 D4 2H99 D3 2HA3 E3 2HA4 E3 2HA5 F5 2HKL E1 2HRZ A8 2HS0 G4 2HS1 B8 2HS2 B8 2HS3 B9 2HS4 A10 2HS7 B8 2HS8 B8 2HS9 B9 2HSA C10 2HSB E8 2HSC C10 2HSD D10 2HSE D11 2HSF D10 2HSJ D8 2HSK D8 2HSM D9 2HSN G8 2HSP F10 2HSR H10 2HSS I10 2HST G3 2HSU I9 2HSV G4 2HSW D1 2HSY G3 2HT1 E5 2HT5 F3 2HT6 F3 2HT7 E5 2HT8 F8 2HTB G9 2HTC G10 2HTD G10 2HTE G10 2HTF G11 2HTG G11 2HTH D3 2HTK G3 2HTL B2 2HTP A8 2HTR A9 2HTU C10 2HTV C11 2HTZ G8 2HU0 G9 2HU5 E3 2HU8 F3 2HUB H11 2HUC H9 2HUK E1 2HUN G4 2HUP G4 3H29 C4 3H34 F9 3H40 G10 3H47 G11 3H79 A4 3H80 A5 3H81 A4 3H82 A5 3H83 B4 3H84 B5 3H85 B4 3H88 C5 3H89 C4 3H90 C5 3H91 D4 3H93 D5 3H95 A4 3H96 A4 3H97 B4 3H98 B4 3H99 C4 3HRP B8 3HRR B9 3HRS A12 3HRT A10 3HRU B9 3HRV B8 3HRW C12 3HRY D10 3HRZ D12 3HS0 E10 3HS1 D9 3HS2 D8 3HS3 H9 3HS4 I9 3HS5 E1 3HS6 E1 3HS7 E1 3HS8 F8 3HS9 F12 3HSA G9 3HSB G10 3HSD G10 3HSE G11 3HSF B2 3HSH A9 3HSJ A8 3HSK E1 3HSM C12 3HSN C10 3HSQ E8 3HSR G10 3HST F12 3HSU G8 3HSV F10 3HSW E1 3HT3 H11 3HT4 H11 3HT9 E1 5H80 A5 5H81 A5 5H82 B5 5H85 B4 5H86 C4 5H87 D4 5HR0 B9 5HR2 B9 5HR3 C11 5HR5 D9 5HR9 G10 5HRA G11 5HRC A9 5HRG C11 5HRL F9 7H00-1 D2 9H50 D4 9H51 D5 9H52 E4 9H53 E5 9H54 E4 9H55 E5 FHR1 B8 FHR5 B2 FHR6 B2 IH38 A4 IH39 A4 IH40 B4 IH41 B4 IH42 C4 IH43 D4 IH44 A5 IH45 C5 IH46 G10 IH80 A5 IH81 B5 IH85 B5 IH87 D5 IHPF A8 IHR0 B8 IHR1 A10 IHR3 C11 IHR4 D10 IHR5 D8 IHR6 F9 IHR8 G11 IHRB F4 IHRC C10 IHRD E8 IHRE F8 IHRF F10 IHS2 A2 IHS3 E1 IHS4 E3 IHS5 F4 IHS6 H11 IHSA E3 IHSB E1 IHSC F3 IHSD F3 IHSE E1 IHSG E1 IHSH G3 IHSR A12 IHSS B12 IHST B12 IHV3 G3 IHV6 G3 IHVE D1

20 A

1
A

2
PNX 8543 : ANALOGUE AV

3
3H95 IH38 AV4-PR

4
18R 3H79 18R 2H87 100p 5H80 330n

5
IH80 22n 2H81 100p 3H80 56R 2H80

10
2HS4 3HRT 22n IHR1 47R

11
3HRS 27R

12
AV1-Y_CVBS

13

A
B
AV4-PB IHS2 Y_CVBS-MON-OUT 3HSF 3H96 IH39 18R 3H81 2H88 100p 18R 5H81 2H83 330n IH44 100p 3H82 56R 2H82 22n

2HRZ 22n

IHPF

5HRC 330n 2HTR

3HSH 27R 100p

IHSR AV1-PR

56R 2HTP

3HSJ

75R 2HTL

270p

100p

3H97 IH40 AV4-Y 18R 3H83 2H89 100p 18R 5H82 2H85 330n IH81 100p 3H84 56R 2H84 22n

2HS7 3HRV 22n

FHR1 56R 2HS8 100p

5HR2 2HS9 100p 330n

3HRU 27R

IHSS AV1-Y

FHR5 FHR6

H-SYNC-VGA V-SYNC-VGA 3H98 IH41 AV5-PR 3H85 18R 18R 2H91 100p 5H85 330n

B
2HS1 3HRP IHR0 56R 2HS2 100p 5HR0 2HS3 100p 330n 3HRR 27R IHST AV1-PB 22n

IH85

2H90 22n

2H92

100p 3H88

56R

2HSA 22n 3H99 3HSN

IHRC

5HRG 330n

3HSM 27R 2HTV 100p

AV3-PR

56R 2HTU

C
E
2H86 10n AV4-Y

IH42 AV5-PB

3H89 18R 2H94 100p 18R

100p

5H86 2H95 330n

IH45 100p 3H90 56R

2H93 22n

C
3HRW AV3-PB

3H29 IH43 AV5-Y 2H99 AV5-Y 3H91 18R 18R 2H97 100p 5H87 2H98 330n IH87 100p 3H93 56R 2H96 22n 2HSJ 3HS2 22n 9H50 P1 P3 P4 P5 N1 N2 N3 N4 M1 M3 M4 M5 L1 L2 L3 L4 K1 K3 K4 K5 J1 J2 J3 J4 G3 G4 H1 H2 H3 H4 F1 F2 F3 F4 G1 G2 D2 D1 E1 E2 IHSH IHV3 2HTK 22n IHV6 2HST 22n 2HUP 22n 9H51 IHR5 56R 2HSK 100p 5HR5 2HSM 100p 330n 3HS1 27R

2HSC 3HRY 22n

IHR3 56R 2HSD 100p

5HR3 2HSE 330n 100p

27R

10n

7H00-1 PNX85439EH/M2/24182

AV3-Y

D
T1 T2 U1 A1 10K IHSG 4K7 4K7 3HS6 75R 3HSW 75R 2HKL 270p A3 B3 IHSB IHS3 IHSE A2 B2 C3 C2 2HSW IHVE 22n 3HSK

ANALOG_VIDEO
SYNC_IN_1 SYNC_IN_2 HSYNCIN IN VSYN OUT CURREF BIAS DAC AGC P CVBS1Y N P CVBS2C N PC1_AI1 PC1_AI2 PC1_AI3 PC1_AID AI11 AI12 AI13 REF 1 PC2_AI1 PC2_AI2 PC2_AI3 PC2_AID AI21 AI22 AI23 REF 2 PC3_AI1 PC3_AI2 PC3_AI3 PC3_AID AI31 AI32 AI33 REF 3 AI4N AI41 AI42 AI43 AI44 REF 4 AI5N AI51 AI52 AI53 AI54 REF 5 AI1N_IF AI1P_IF AI2P_IF AI2N_IF

R1 R3

D
2HSF IHR4 3HS0 47R 3HRZ 27R AV2-Y_CVBS

2HTH IHSA

22n

2HT1 22n IHRD 22n 3HSQ 47R

22n

3HS5 3HT9

2HA3 22n 9H52 9H53 2HSB

E
2HUK 270p 3HS7 75R

2HU5 22n

IHS4 2HT7 22n 2HA4

22n

9H54

9H55 2HT8 IHR6 3HS8 47R 3HS9 27R FRONT-Y_CVBS

2HT5 IHSC

22n 22n 2HA5 22n

18R 2HS0 22n IHRB 2HSN 22n 3HSU IHRE 5HRL 120n 2HU0 56R 2HTZ 100p 100p 2HTB 3HSA 22n 3HSR 18R 18R IH46 56R 2HTC 100p 5HR9 2HTD 3H40

47R

22n

3HSV

2HU8 22n 2HT6 IHSD

IHS5

2HSP 22n 3H34

IHRF

3HST 27R

FRONT-C

R-VGA

is prohibited without the written consent of the copyright

All rights reserved. Reproduction in whole or in parts

2HSV RES 2HSY 22n 2HUN 22n

3HSB 100p 18R 3H47 18R 2HTE 3HSD 22n IHR8 56R 2HTF 100p 5HRA 2HTG 100p 120n 3HSE 18R

G-VGA

22n

120n

G
J5 GND_A3_TG

G
B-VGA

K
owner.

2HUB 3HT3

IHS6 47R

3HT4 27R

CVBS4

H
L
2HUC 100p 3HS3 820R 2HSU 12p 2HSR 100n

22n

H
IF-N

3HS4 820R

2HSS 100n

IF-P

10

11

12

13

O
CHN
CLASS_NO

O
SETNAME
2 2008-11-21

ANALOG AV
P
2008-10-10 3 SUPERS. DATE 2007-11-29 16
C

PNX8543 TV543 R2 LDIPNX


NAME Maelegheer Ingrid CHECK

8204 000 8927


P
130 11 A2 ROYAL PHILIPS ELECTRONICS N.V. 2005

10

11

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17

18

19

20
18310_512_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 87

SSB: PNX8543 - Audio


1 A 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
2HP4 D10 2HP5 D9 2HP6 D9 2HP7 D9 2HP8 D9 2HPA C11 2HPB D10 2HR0 C4 2HR1 D5 2HR2 C4 2HR3 C5 2HR4 D4 2HR5 D4 2HR6 D4 2HR7 D4 2HR8 E4 2HR9 E4 2HRA D4 2HRB D4 2HRC E4 2HRD E4 2HRE E4 2HRF E4 2HRG E3 2HRH F4 2HRJ F3 2HRK F4 2HRM D6 2HRN D6 2HRP C6 2HRS E11 2HRT E11 2HRU C6 2HRV C6 2HRW G6 2HRY G6 3H62 F6 3H63 F6 3HAG D11 3HAH D11 3HP0 F9 3HP1 F10 3HP5-1 E10 3HP5-2 E9 3HP5-3 F10 3HP5-4 F9 3HPN G9 3HR0-1 C3 3HR0-2 C4 3HR0-3 C3 3HR0-4 D3 3HR3-1 D3 3HR3-2 D4 3HR3-3 D3 3HR3-4 D3 3HR8-1 E3 3HR8-2 E3 3HR8-3 D3 3HR8-4 D3 3HRC-1 E3 3HRC-2 E3 3HRC-3 E3 3HRC-4 E2 3HRJ-1 F2 3HRJ-2 E3 3HRJ-3 F3 3HRJ-4 F2 3HRK H6 3HRM G5 3HRN G5 3HT8-1 F9 3HT8-2 F9 3HT8-3 D10 3HT8-4 E9 5HP2 C10 5HRW D6 5HRZ D6 7H00-7 D7 7HP0 C10 9H11 C4 9H12 C4 FHPE C10 IH11 C10 IH13 C11 IHPD F9 IHRH C4 IHRJ D4 IHRK G5 IHRL G6 IHRM G6 IHRT F3 IHRU F3 IHRV E3 IHRW E3 IHRY D3 IHRZ E3 IHS0 D3 IHS1 D3 IHSU C6 IHSV D6 IHSW C9 IHSY D11 IHSZ D6

18

19

20 A

2 PNX 8543 : AUDIO

10

11

12

B
D
VDDA-AUDIO VDDA-DAC 7HP0 LD2985BM33R 9H12 8 AUDIO-IN1-L 3HR0-2 2 7 3HR0-1 1 IHRH 33K 9H11 33K 3HR0-3 6 3 4 IHRJ 33K 3 3HR3-3 IHS0 33K IHSU RES 2HR2 33p 2HR3 2HRU 100n 2HRV 100n 2HRP 1u0 2HR0 RES 33p 2HR1 1u0 6 33K 2HR6 33p 2HR7 1u0 2HR4 RES 33p 2HR5 1u0 3 6 33K 2HRA 33p 2HRB 1u0 3HR8-2 2 7 33K IHRZ 2HR8 RES 33p 2HR9 1u0 6 33K 2HRE 33p 2HRF 1u0 3HRC-2 2HRC RES 33p 2HRD 1u0 2HRH 1u0 2HRK VDDA-AUDIO 1u0 SPDIF-IN1 3H63 3H62 47K VDDA-AUDIO 2HRM 100n VDDA-AUDIO 5HRW 30R IHSZ 2HRN 100n 5HRZ 30R IHSV 7H00-7 PNX85439EH/M2/24182 10u 30R IHSW 5HP2 FHPE IH11 IH13 5 4 OUT BP IN INH 1 2HPA 3 +5V

2HP8

10u 2HPB

COM 10n IHSY 2

100n 2HP7

100n 2HP6

100n 2HP5

AUDIO-IN1-R

5 3HR0-4

2HP4

100n

10u 3HAG +3V3

AUDIO-IN2-L

D
AUDIO-IN2-R AUDIO-IN3-L 3HR8-4 4

33K 2 3HR3-2 7 1 3HR3-1 8 IHS1 33K 33K 3HR8-3 IHRY 33K 5 RES

22K

3HR3-4

RES

3HAH

22K

G
AUDIO-IN3-R 3HRC-4 4 33K 5

2HRS

3n3 2HRT

1 3HR8-18 33K

E
H

AUDIO-IN4-L

3 3HRC-3 IHRV

AUDIO AK7 L AK9 VREF_AADC AL7 VDDA_3V3_DAC R AJ10 VSSA_ADAC AM8 NEG AN14 VREF AM9 POS AP14 ADAC1 N AL13 AP8 VRNEG P AADC AN8 AADC AP13 AN13 AN7 L ADAC2 N AM13 AIN_1 AP7 R P
AK6 L AIN_2 AL6 R AM6 L AIN_3 AN6 R AP6 L AIN_4 AM5 R AN5 L AIN_5 AP5 R U5 1 SPDIF_IN C19 2 AN15 OSCLK I2S_IN AL14 SCK AK14 SD1 AP15 SD2 AM15 I2S_IN SD3 AL15 SD4 AM14 B1 I2S_IN_WS RESREF I2S_OUT OSCLK SCK AM12 AN12 ADAC3 N AP12 P AM11 AL11 ADAC4 N AK11 P AN11 AP11 ADAC5 N AL10 P AP10 AN10 ADAC6 N AM10 P ADAC7BUF ADAC8BUF ADAC 7 8 AP9 AN9 AL9 AL8 V1 AA2 Y2

D
3HT8-3 33R ADAC(1) ADAC(8) ADAC(7) ADAC(2)

3n3

3HT8-4 33R

RES

3HP5-1 33R

ADAC(3)

AUDIO-IN4-R

AUDIO-IN5-L

AUDIO-IN5-R

2 7 1 3HRC-1 33K IHRW 8 33K 2 2HRG 3HRJ-2 7 1 3HRJ-1 33K RES 33p IHRU 8 33K 3HRJ-3 6 2HRJ 3 4 3HRJ-4 33K RES 33p IHRT 33K 5

3HP5-2 33R

ADAC(4)

3HP5-3 33R

ADAC(5)

3HP5-4 33R

ADAC(6)

F
3HP0 RES 33R 3HPN 68R IHPD 3HT8-1 33R SPDIF-OUT RES 33R 3HT8-2 3HP1 33R ADAC(7) ADAC(8) ADAC(7) ADAC(8)

All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright owner.

47K

SPDIF_OUT

G
3HRM

AM7 IHRK IHRL IHRM 2HRW 4K7 3HRN C1 D3 3HRK

VCOM_ADC AOUT AGND1

I2S_OUT_SD

Y3 1 AA1 2 AA3 3 AA4 4 Y1

100n 2HRY

4K7

10u

I2S_OUT_WS

75R

1
O

10

11

12
O

CHN
CLASS_NO

SETNAME
2 2008-11-21

AUDIO
P
2008-10-10 3 SUPERS. DATE 2007-11-29 16
C

PNX8543 TV543 R2 LDIPNX


NAME Maelegheer Ingrid CHECK

8204 000 8927


P
130 12 A3 ROYAL PHILIPS ELECTRONICS N.V. 2006

10

11

12

13

14

15

16

17

18

19

20
18310_513_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 88

SSB: PNX8543 - Audio

10

11

12

13

2 PNX 8543 : AUDIO

AUDIO-VDD

A
6 3H71 5K6 2 7H01-1 BC847BS(COL) 1 IH51 2H04 1u0 3H77 470R IH52 3H75 100R 2HYC 100p FHV4 2HVA 33p 1 3H18-1 8 22K 4 3H18-4 22K 2HVB 1HV9 3 FH50 3H74 5K6 IH54 3H94 470R IH53 5 7H01-2 BC847BS(COL) 4 2H05 1u0 IH55 3H76 100R 2HYD FHV5 100n 1 2 3 1735446-3 2HVC 100n 33p +3V3 5

C
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

AUDIO-VDD

B
D

+AUDIO-POWER

7HV0 TPA6111A2DGN

owner.

C
E
IH47 ADAC(3) IH48 ADAC(4) 2HVD IH24 6 3H18-3 3 IHWL IHWE 2 6 5 2H02 1u0 IH27 3 1 2 100n 2HVE 100n 2H25 3n3 2H26 3n3 22K 3H18-2 7 2 IH25 22K IN-

AMPLIFIER
VO

VDD 1 1 IHWJ AUDIO-HDPH-L-AP 2 3HV4-2 7 IH31

C
3H35 10K IHV1 AUDIO-HDPH-R-AP 22K

SHUTDOWN BYPASS 4

7 10 11

VIA GND GND_HS 9

IHW7

3HV4-1 22K

1 IHVA 5

RESET-AUDIO

3HV3 10K

4 BC847BPN(COL) 7HVA-2 A-PLOP 3 IH29

A-STBY

6 RESET-AUDIO FHV3 3HV4-4 4 5 22K 2HVG 1n0 22K 3 3HV4-3 6 IHW8 2 7HVA-1 BC847BPN(COL) 1

E
H

1HV9 B3 2H02 D4 2H04 A2 2H05 B2 2H25 D1 2H26 D1 2HVA A5 2HVB B5 2HVC C5 2HVD C1 2HVE C2 2HVG E6 2HYC B3 2HYD C3 3H18-1 B5 3H18-2 C2 3H18-3 C2 3H18-4 B5 3H35 C7 3H71 A1 3H74 B1 3H75 A3 3H76 B2 3H77 B2 3H94 C2 3HV3 D2 3HV4-1 D7 3HV4-2 C8 3HV4-3 E6 3HV4-4 E6 7H01-1 A2 7H01-2 B2 7HV0 C4 7HVA-1 E7 7HVA-2 D8 FH50 B3 FHV3 E6 FHV4 A3 FHV5 C3 IH24 C2 IH25 C2 IH27 D4 IH29 D8 IH31 C8 IH47 C1 IH48 C1 IH51 A2 IH52 A2 IH53 B1 IH54 C2 IH55 B2 IHV1 C5 IHVA D8 IHW7 D7 IHW8 E7 IHWE C2 IHWJ C5 IHWL C2

1
I

8
I

CHN
CLASS_NO

SETNAME
2 2008-11-21

AUDIO
J
2008-10-10 3 SUPERS. DATE 2007-11-29 16
C

PNX8543 TV543 R2 LDIPNX


NAME Maelegheer Ingrid CHECK

8204 000 8927


130 13 A3

ROYAL PHILIPS ELECTRONICS N.V. 2005

10

11

12

13
18310_514_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 89

SSB: PNX8543 - Video Streams


1 A 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 A

10

11

PNX 8543 : VIDEO STREAMS


C

A
D
FE-ERR 4 9H06-4 5 TSO-BIT-ERR 7H00-12 PNX85439EH/M2/24182

FE-CLK FE-VALID FE-SOP FE-DATA0 FE-DATA1 FE-DATA2 FE-DATA3 FE-DATA4 FE-DATA5 FE-DATA6 FE-DATA7 SCL-BOLT-ON SDA-BOLT-ON

3 2 1 4 3 2 1 4 3 2 1

9H06-3 9H06-2 9H06-1 9H07-4 9H07-3 9H07-2 9H07-1 9H08-4 9H08-3 9H08-2 9H08-1 3HB1

6 7 8 5 6 7 8 5 6 7 8

TSO-BIT-CLK TSO-BIT-VALID TSO-SYNC TSINO-DATA0 TSINO-DATA1 TSINO-DATA2 TSINO-DATA3 TSINO-DATA4 TSINO-DATA5 TSINO-DATA6 TSINO-DATA7 I2C-SCL I2C-SDA RESET-BOLT-ON

CA-MDO0 CA-MDO1 CA-MDO2 CA-MDO3 CA-MDO4 CA-MDO5 CA-MDO6 CA-MDO7 CA-MOSTRT CA-MOVAL CA-MOCLK_VS2 9HW2

E33 C32 B32 J30 K34 K33 H30 J33 E34 D34 H31

TUN_CA
0 1 2 3 CA_MDO 4 5 6 7 CA_MOSTRT CA_MOVAL CA_MOCLK

0 1 2 3 CA_MDI 4 5 6 7

100R 3HB3 100R

3HB2 100R

2 G33 1 83HWV-1 G31 47R 2 G30 4 5 47R H34 3HWR-4 47R 1 F34 5 F32 3HWV-4 4 47R 1 F31 3 6 47R G34 3HWR-3 47R 2 7 3HWV-2 J31 CA_MISTRT 47R 3HWV-3 3 E32 CA_MIVAL CA_MICLK H32 B31 3HWP 33R

7 3HWR-2 47R 7 3HWN-2 8 3HWR-1 47R 8 3HWN-1

CA-MDI0 CA-MDI1 CA-MDI2 CA-MDI3 CA-MDI4 CA-MDI5 CA-MDI6 CA-MDI7 CA-MISTRT

6 47R

CA-MIVAL CA-MICLK
CA-ADDEN

BOLT-ON-IO

CA_ADD_EN
FE-DATA0 FE-DATA1 FE-DATA2 FE-DATA3 FE-DATA4 FE-DATA5 FE-DATA6 FE-DATA7

G
+3V3 +3V3 2H08 3HB4 10K 7H04 74LVC245A 1 19 2 3 4 5 6 7 8 9 2 100n 20 +3V3-PER 3HWK 4K7 9HW0 IHW0
FE-ERR

D10 E10 A9 A11 C11 D11 E11 A10

0 1 2 3 TNR_TSDI 4 5 6 7

CA_CDN

K32 0 A32 1

CA-CD1 CA-CD2
CA-DATADIR CA-DATAEN

D31 DIR CA_DATA A31 EN CA_OOB_EN CA_RDY C31 J34 C34 C33 A33

2H08 D3 2H09 F3 3H73 F2 3HB1 C2 3HB2 C2 3HB3 C2 3HB4 D2 3HB5 D2 3HB6 F2 3HB7 F4 3HWK D5 3HWN-1 B11 3HWN-2 B11 3HWP C10 3HWR-1 B11 3HWR-2 B11 3HWR-3 C10 3HWR-4 B10 3HWV-1 B10 3HWV-2 C10 3HWV-3 C10 3HWV-4 B10 7H00-12 B9 7H04 D3 7H05 F3 9H06-1 B2 9H06-2 B2 9H06-3 B2 9H06-4 B2 9H07-1 B2 9H07-2 B2 9H07-3 B2 9H07-4 B2 9H08-1 C2 9H08-2 C2 9H08-3 C2 9H08-4 B2 9HW0 D6 9HW1 D10 9HW2 C8 IH50 F2 IHW0 D6

G
IRQ-CA
CA-RST

D
H
FE-DATA7 FE-DATA6 FE-DATA5 FE-DATA4 FE-DATA3 FE-DATA2 FE-DATA1 FE-DATA0 3HB5 10K 3EN1 3EN2 G3 1

FE-ERR FE-CLK FE-SOP FE-VALID

C12 B10 B9 C10

TNR_ERROR TNR_MICLK TNR_MISTRT TNR_MIVAL

CA_RST CA_VCCEN CA_VPPEN CA_VSN

D
H

J32 0 A34 1

9HW1

CA-VS1 CA-MOCLK_VS2

18 17 16 15 14 13 12 11

TSINO-DATA7 TSINO-DATA6 TSINO-DATA5 TSINO-DATA4 TSINO-DATA3 TSINO-DATA2 TSINO-DATA1 TSINO-DATA0

is prohibited without the written consent of the copyright

All rights reserved. Reproduction in whole or in parts

IH50 +3V3

10

+3V3 2H09

J
100n

F
3H73 10K BOLT-ON-TS-ENn

7H05 74LVC245A 1 19

F
3HB7 10K

K
owner.

3EN1 3EN2 G3 1 2 18 17 16 15 14 13 12 11 10

20

3HB6 10K

2 3 4 5 6 7 8 9

G
L

FE-SOP FE-VALID FE-CLK FE-ERR

TSO-SYNC TSO-BIT-VALID TSO-BIT-CLK TSO-BIT-ERR

G
L

10

11

O
CHN
CLASS_NO

O
SETNAME
2 2008-11-21

CONDITIONAL ACCESS
P
2008-10-10 3 SUPERS. DATE 2008-06-05 16
C

PNX8543 TV543 R2 LDIPNX


NAME Maelegheer Ingrid CHECK

8204 000 8927


P
130 14 A2 ROYAL PHILIPS ELECTRONICS N.V. 2008

10

11

12

13

14

15

16

17

18

19

20
18310_515_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 90

SSB: PNX8543 - Digital Video Out/LVDS

10

11

12

13
3HP9 A7 7H00-11 B2 7H00-5 A6 IHPG A7

PNX8543 : DIGITAL VIDEO OUT / LVDS A


B
W29 Y29 AA29 AB29 AC29 AD29 AE29 AF29 AG29 AM30 AN30 AP30 AN31 AP31 AP32 M30 K31 7H00-11 PNX85439EH/M2/24182 7H00-5 PNX85439EH/M2/24182

A
B
IHPG AK19 3HP9 VDDA-LVDS 12K 1% TX851ATX851A+ TX851BTX851B+ TX851CTX851C+ TX851DTX851D+ TX851ETX851E+ TX851CLKTX851CLK+ AN18 N A AP18 P AK28 AL28 AM28 AK29 AL29 AM29 AN29 K29 L29 NC M29 N29 P29 R29 T29 U29 V29 B N P AK18 AL18

LVDS
IREF_LVDS

C B
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

C
owner.

Y4 R2 C4 R4 T4 W4 R5 W5 F11 NC F12 F13 F14 F15 C14 AJ11 AL12 AK15 NC

NC

NC

AN19 N AP19 P AN20 N AP20 P AL20 N AM20 P AL19 N AM19 P AN22 N AP22 P

CLK

LOUT2_A

TX852ATX852A+ TX852BTX852B+ TX852CTX852C+ TX852DTX852D+ TX852ETX852E+ TX852CLKTX852CLK+

AL17 AN21 AP21 AL25 AM25 AN25 AP25 AK26 AL26 AM26 AN26 AP26 AM27 AN27

AK22 N LOUT2_B AL22 P LOUT2_C AN23 N AP23 P AN24 N AP24 P AL24 N AM24 P AL23 N AM23 P

LOUT2_D

LOUT2_E

D
LOUT2_CLK

D
F

6
CHN
CLASS_NO

7
SETNAME

9
2 2008-11-21

LVDS
J
2008-10-10 3 SUPERS. DATE 2007-11-29 16
C

PNX8543 TV543 R2 LDIPNX


NAME Maelegheer Ingrid CHECK

8204 000 8927


130 15 A3

ROYAL PHILIPS ELECTRONICS N.V. 2005

10

11

12

13
18310_516_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 91

SSB: PNX8543 - Power


1 A 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
2H13 E4 2H14 D2 2H15 A3 2H16 A3 2H17 A3 2H18 A3 2H19 A4 2H20 A4 2H21 A4 2H22 A4 2H23 A5 2H24 F11 2H27 D10 2H28 D11 2H29 D11 2H30 A9 2H31 A9 2H32 A10 2H33 A10 2H34 A10 2H35 A10 2H36 A11 2H37 A11 2H38 A11 2H39 C10 2H40 C11 2H41 C11 2H42 C2 2H43 D2 2H44 D2 2H50 C4 2H51 C4 2H52 C3 2HH6 E11 2HH9 E11 2HU1 B3 2HU2 A12 2HU3 C12 2HU4 F9 2HU6 F9 2HU7 F3 2HU9 B2 2HUA A2 2HV0 B4 2HV1 C3 2HV2 F2 2HV3 C4 2HV4 C3 2HV5 D4 2HV6 D4 2HV7 E2 2HV8 D2 2HV9 F2 2HVF E3 2HVH E5 2HVJ F4 2HVK D10 2HVL C12 2HVM C10 2HVN B11 2HVP B13 2HVR B10 2HVS B3 2HVT B4 2HVU A11 2HVV A10 2HVW A9 2HVY G3 2HVZ G3 2HY2 E2 2HY3 E3 2HY4 B11 2HY5 B12 2HY6 C10 2HY7 C11 2HY8 D11 2HY9 D12 2HYA A13 2HYB A13 2HYE F4 2HYF F5 2HZB F10 2HZC-1 F11 2HZC-2 F11 2HZC-3 F10 2HZC-4 F10 2HZD F11 2HZE F10 2HZF F9 2HZG F9 2HZH H4 2HZK A5 2HZL A4 2HZM A3 2HZV I4 2HZY-1 B3 2HZY-2 B2 2HZY-3 B2 2HZY-4 B2 3H55 D2 3H57 C2 5H50 C3 5HG0 E12 5HV0 B4 5HV1 C3 5HV2 C1 5HV3 F4 5HV4 C3 5HV5 D3 5HV6 D1 5HV7 E1 5HV8 F2 5HV9 E3 5HVA E3

20
5HVB D11 5HVC C13 5HVD C13 5HVE B12 5HVF B13 5HVG B10 5HVH A12 5HY2 A12 5HY3 C11 5HY4 H3 5HY5 D12 5HY6 A13 5HY7 I3 5HYB E4 7H00-10 F6 7H00-9 A6 7H06 C2 9H18 E5 9H19 E5 9H20 E5 9H21 E5 CH53 F3 FHK1 D4 IH05 E5 IH10 E5 IH28 B10 IH49 C4 IH60 C2 IH61 D2 IHK1 B12 IHK2 D11 IHK3 C12 IHK4 C12 IHSK E11 IHSL B11 IHSN D11 IHSP A13 IHY0 E5 IHY1 H3 IHY2 I4 IHY3 F11 IHY4 A12 IHY5 A11 IHY6 C10 IHY7 E4 IHY8 D4 IHY9 B5 IHYA E2 IHYC D4 IHYF C3 IHYH D2 IHYM F5 IHYN F2 IHYP F3

2 PNX 8543 : POWER

10

11
IHY4

12
5HVH +3V3 30R

13

14

+3V3-PER 2HVW 100n 2HVU 100n 2HVV 100n 2H38 2HU2 100n 2H32 100n 2H34 100n 2H33 100n 2H35 100n 2H30 100n 2H31 100n 2H36 100n 2H37 100n 1u0

+1V2-PNX85XX 2H15 100n 2HUA 2H16 100n 2H17 100n 2HZM 100n 2H20 100n 2HZK 2HZL 100n 2H18 100n 2H19 100n 2H21 100n 2H22 100n 2H23 100n 1u0 100n

A
IHSP IHY5 5HY2 +3V3 IH28 AJ21 AJ22 AJ27 AJ28 AJ8 F10 F23 VDD_3V3_PER F24 F28 F6 H29 J29 J6 W6 2HVR 100n 5HVG 2HY4 30R 2HY5 100n 1u0 +1V2-PNX85XX 30R 5HY6 +1V2-PNX85XX 30R 2HYA 2HYB 100n 1u0

+1V2-STANDBY 5 6 7 8 2HZY-4 100n 2HZY-3 100n 2HZY-2 100n 2HZY-1 +3V3-STANDBY 2HVS 100n 2HU9 1u0 100n

7H00-9 PNX85439EH/M2/24182 AJ12 AJ13 AJ14 AJ20 AJ23 F18 F19 F20 VDD_1V2_CORE F25 F26 F9 K30 L30 U30 V30 V6 AF5 AF6 AG5 AG6 2H50 2H51 100n AC6 AD6 P6 R6 H5 T5 T3 L6 M6 N6 T6 D16 E17 F16 E16 C13 C17 D14 E13 E14 10u

2HU1

2HVT

1u0 100n

IHK1 2HVP 100n

B
D

5HVF 30R +3V3

5HV0 2HV0 100n +3V3 30R

IHY9

IHSL 2HVN 100n

5HVE 30R +1V2-PNX85XX

5HV1 +3V3 100n 30R

IHYF 2HV1 2HV3 10u

VDDA-LVDS 2HVM 100n 2H39 100n 2H40 100n 2H41 100n 5HVD +3V3 IHK4 30R

VDD
AA6 VDDA_1V2_CAB AB6 VDDA_3V3_MCAB JTAG_VSST1 AM3

C
+3V3

7H06 LD1117 5HV2 30R 2H42 IH60 3 10u 6.3V IN OUT COM 3H57 68R 1 2 4 +3V3

5H50 30R 5HV4 2HV4 2H52 1u0 +1V2-PNX85XX 100n 30R

IH49

VDD_1V2_SBCORE

IHK3 2HU3 1u0 2HVL 100n IHY6 5HY3 30R 2HY6 2HY7 100n 1u0 +1V2-PNX85XX

5HVC +3V3 30R

VDD_3V3_SBPER VDDA_3V3_VID_1_1 VDDA_3V3_VID_1_2 VDDA_3V3_VID_4 VDDA_3V3_DCSCCO VDDA_1V2_DCS_A VDDA_1V2_VID VSS_CL VDDA_1V2_HDMI_EQ VDD_3V3_HDMI_TERM_2 VDDA_HDMI_3V3_BIAS VDDA_3V3_HDMI_PLL_2 VDD_1V2_HDMI_1 VDD_1V2_HDMI_2 VDDA_1V2_HDMI_EQ VDD_3V3_HDMI_TERM_1 VDDA_3V3_HDMI_PLL_1

AK17 VDDA_1V2_USB_PLL AJ17 VDDA_3V3_USB AJ16 GNDA_USB VDDA_1V2_LVDS_PLL AJ18 AK20 AK21 VDD_3V3_LVDS AK24 AL21 VDDA_3V3_LVDS AJ19

F
3H55

IH61 RES 2H43 2R2 10u 10u 35V

IHYC 6.3V

2HV6

2HV5

2H44

2HVK

100n 2H27

100n 2H28

100n 2H29

30R

100n

22u

D
5HV6 2HV8 100n 2H14 100n

100n

FHK1

IHK2

5HVB +1V2-PNX85XX 30R IHSN 5HY5 +3V3 30R 2HY8 2HY9 100n 1u0

+1V2-PNX85XX

5HV5

+1V2-PNX85XX 30R

IHYH

AJ7 VDDA_1V2_AADC AJ6 VDDA_3V3_AADC AK8 VDDA_3V3_ACT AK12 VDDA_3V3_ADAC Y30 AJ30 P30 AF30 AC30 AD30 AB30 AA30 W30 AK30 N30 AE30

VDDA-ADC VDDA-DAC

+3V3

5HV9 2HVF 100n 2HY3 30R 1u0

IHY8 5HYB 2H13 30R IHY0 2HVH 1u0 100n

VDDA_1V2_DLL

5HV7 +3V3 2HV7 100n 100n 30R

IHYA 2HY2

+1V2-PNX85XX

2HH9 100n

2HH6

100n

E
RREF-PNX85XX

5HVA +3V3 2HU7 30R

IHY7 1u0 2HVJ 100n

+3V3-PER +1V2-PNX85XX +3V3-PER +1V2-PNX85XX

IH10

AG30 AH30 R21 R30 T21 T30 U21 V21 W21 Y21

RES 9H18 RES 9H19 9H20 RES 9H21

IH05

AJ26 VPP_ID_8542 F17 VPP_ID_8543 D4 VDDA_3V3_VIDOUT K6 VDDA_1V2_ADC4A

VDDA_3V3_DDRPLL0 VSSA_DDRPLL0 VDD_1V2_DDRPLL0 VSS_DDRPLL 0 1 VSSA_DLL 4 7 VDD_1V8_DDR

IHSK

5HG0 30R +1V2-PNX85XX

100n 2HZC-4

100n 2HZC-3

100n 2HZC-2

100n 2HZC-1

1 100n 2HZD

1u0 2HZG

2HU6

1u0 2HU4

100n 2HZE

100n 2HZB

100n 2HZF

100n 2H24

5HV8 +3V3 30R 2HV2

IHYN

100n

2HV9

100n

1u0

2HYE

1u0 2HYF

is prohibited without the written consent of the copyright

All rights reserved. Reproduction in whole or in parts

U6 V14 V15 V16 V17 V18 V19 V20 W14 W15 W16 W17 W18 W19 W20 Y14 Y15 Y16 Y17 Y18 Y19 Y20 Y33 Y5 Y6

IHYP +1V2-PNX85XX 330u 6.3V 2HVY CH53 SENSE+1V2-PNX85XX 7H00-10 PNX85439EH/M2/24182 AA14 AA15 AA16 AA17 AA18 AA19 AA20 AA21 AA5 AB31 AB4 AB5 AC31 AC33 AE6 AF33 AG31 AH29 VSS AH6 AJ15 AJ24 AJ25 AJ29 AJ33 AJ5 AJ9 AK10 AK13 AK23 AK25 AL1 AL2 AL3 AL30 AM1 AM18

100n

RREF-PNX85XX +1V2-PNX85XX

5HV3 30R

IHYM

+1V8-PNX85XX IHY3

VSS

G
K
owner.

+1V8-PNX85XX 330u 6.3V 2HVZ

VSS
VSS

5HY4 VDDA-AUDIO 30R

IHY1 VDDA-DAC 2HZH 100n

M
5HY7 IHY2 VDDA-ADC 30R 2HZV 100n

I
N

VDDA-AUDIO

L5 M2 N5 P14 P15 P16 P17 P18 P19 P2 P20 P21 P33 R14 R15 R16 R17 R18 R19 R20 T14 T15 T16 T17 T18 T19 T20 T31 U14 U15 U16 U17 U18 U19 U20 U33

VSS AM2 AM21 AM22 AM31 AM32 AM33 AM34 AN1 AN32 AN33 AN34 AP33 AP34 B34 D12 D13 D17 D18 E12 E18 E3 E4 F21 F22 F27 F29 F30 F5 F7 F8 G29 G5 G6 H6 K2 L33

10

11
CHN
CLASS_NO

12
SETNAME

13
POWER

14
2 2008-11-21

P
2008-10-10 3 NAME Maelegheer Ingrid

PNX8543 TV543 R2 LDIPNX


SUPERS. DATE 2007-11-29 16
C

8204 000 8927


P
130 16 A2 ROYAL PHILIPS ELECTRONICS N.V. 2005

CHECK

10

11

12

13

14

15

16

17

18

19

20
18310_517_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 92

SSB: PNX5100 - SDRAM


1 A 2 3 4 5 6 77 8 9 10 11 12 13 14 15 16 17 18 19 20 A

1
B

10

11

12

13

PNX5100 : SDRAM

7C00-8 PNX5100E +1V8-PNX5100 +1V8-PNX5100

A
DDR2

1K0 1%

1K0 1%

3C21

3C23

1K0 1%

0 1 2 3 4 5 6 7 8 9 10 11 12 BA0 BA1 BA2

PNX5100-DDR2-BA0 PNX5100-DDR2-BA1

R26 T25 N24

PNX5100-DDR2-RAS PNX5100-DDR2-CAS PNX5100-DDR2-WE PNX5100-DDR2-CS PNX5100-DDR2-ODT PNX5100-DDR2-CKE +1V8-PNX5100

K24 L24 U24 L23 K23 U23 3C00 5K6 1% 3C01 PNX5100-DDR2-VREF-CTRL 1% RES 3C02 100n IC04 3C10 3K3 RES 2C01 P26 P25 N23 P24

RASB CASB WEB CSB ODT CKE IREF VREF P N CLK

PNX5100-DDR2-CLK_P PNX5100-DDR2-CLK_N

820R

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 0 1 2 3 P N P N P N P N

3C20

FC06 PNX5100-DDR2-VREF-CTRL PNX5100-DDR2-VREF-DDR

FC05

3C22

1K0 1%

PNX5100-DDR2-A0 PNX5100-DDR2-A1 PNX5100-DDR2-A2 PNX5100-DDR2-A3 PNX5100-DDR2-A4 PNX5100-DDR2-A5 PNX5100-DDR2-A6 PNX5100-DDR2-A7 PNX5100-DDR2-A8 PNX5100-DDR2-A9 PNX5100-DDR2-A10 PNX5100-DDR2-A11 PNX5100-DDR2-A12

N26 U25 N25 T23 M26 T24 L25 R24 L26 M23 T26 K25 M24

Y26 AB25 Y25 AC26 AC25 U26 AB26 V26 W24 AB23 AA24 AC24 AC23 V23 AB24 V24 F26 H26 G25 J26 K26 D25 H25 D26 F23 H24 F24 J23 J24 D23 G24 D24 AA26 AA23 G26 G23 W26 W25 Y24 Y23 E25 E26 E24 E23

PNX5100-DDR2-D0 PNX5100-DDR2-D1 PNX5100-DDR2-D2 PNX5100-DDR2-D3 PNX5100-DDR2-D4 PNX5100-DDR2-D5 PNX5100-DDR2-D6 PNX5100-DDR2-D7 PNX5100-DDR2-D8 PNX5100-DDR2-D9 PNX5100-DDR2-D10 PNX5100-DDR2-D11 PNX5100-DDR2-D12 PNX5100-DDR2-D13 PNX5100-DDR2-D14 PNX5100-DDR2-D15 PNX5100-DDR2-D16 PNX5100-DDR2-D17 PNX5100-DDR2-D18 PNX5100-DDR2-D19 PNX5100-DDR2-D20 PNX5100-DDR2-D21 PNX5100-DDR2-D22 PNX5100-DDR2-D23 PNX5100-DDR2-D24 PNX5100-DDR2-D25 PNX5100-DDR2-D26 PNX5100-DDR2-D27 PNX5100-DDR2-D28 PNX5100-DDR2-D29 PNX5100-DDR2-D30 PNX5100-DDR2-D31 PNX5100-DDR2-DQM0 PNX5100-DDR2-DQM1 PNX5100-DDR2-DQM2 PNX5100-DDR2-DQM3 PNX5100-DDR2-DQS0_P PNX5100-DDR2-DQS0_N PNX5100-DDR2-DQS1_P PNX5100-DDR2-DQS1_N PNX5100-DDR2-DQS2_P PNX5100-DDR2-DQS2_N PNX5100-DDR2-DQS3_P PNX5100-DDR2-DQS3_N

D
G

100R

DQM

D
1C00 HOOK1

DQS0

DQS1

DQS2

DQS3

+1V8-PNX5100

+1V8-PNX5100

E
1u0

2C41-1

100n 2C41-2

100n 2C44-1

100n 2C42-2

100n 2C41-3

100n 2C42-1

100n 2C41-4

100n 2C42-4

100n 2C43-3

100n 2C43-4

100n 2C42-3

2C43-1

100n 2C43-2

100n 2C44-2

100n 2C44-3

100n 2C44-4

is prohibited without the written consent of the copyright

All rights reserved. Reproduction in whole or in parts

7C01 HYB18TC512160CF-2.5

7C02 HYB18TC512160CF-2.5 PNX5100-DDR2-ODT PNX5100-DDR2-CKE PNX5100-DDR2-WE PNX5100-DDR2-CS PNX5100-DDR2-RAS PNX5100-DDR2-CAS PNX5100-DDR2-BA0 PNX5100-DDR2-BA1 PNX5100-DDR2-A0 PNX5100-DDR2-A1 PNX5100-DDR2-A2 PNX5100-DDR2-A3 PNX5100-DDR2-A4 PNX5100-DDR2-A5 PNX5100-DDR2-A6 PNX5100-DDR2-A7 PNX5100-DDR2-A8 PNX5100-DDR2-A9 PNX5100-DDR2-A10 PNX5100-DDR2-A11 PNX5100-DDR2-A12 3C04 PNX5100-DDR2-CLK_P PNX5100-DDR2-CLK_N PNX5100-DDR2-DQS2_P PNX5100-DDR2-DQS2_N PNX5100-DDR2-DQS3_P PNX5100-DDR2-DQS3_N 3 5 150R 3C27-3 J8 K8 6 33R F7 E8 B7 A8 K9 K2 K3 L8 K7 L7 L2 L3 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2

G
K
owner.

PNX5100-DDR2-ODT PNX5100-DDR2-CKE PNX5100-DDR2-WE PNX5100-DDR2-CS PNX5100-DDR2-RAS PNX5100-DDR2-CAS PNX5100-DDR2-BA0 PNX5100-DDR2-BA1 PNX5100-DDR2-A0 PNX5100-DDR2-A1 PNX5100-DDR2-A2 PNX5100-DDR2-A3 PNX5100-DDR2-A4 PNX5100-DDR2-A5 PNX5100-DDR2-A6 PNX5100-DDR2-A7 PNX5100-DDR2-A8 PNX5100-DDR2-A9 PNX5100-DDR2-A10 PNX5100-DDR2-A11 PNX5100-DDR2-A12 PNX5100-DDR2-CLK_P PNX5100-DDR2-CLK_N 3C03 PNX5100-DDR2-DQS0_P PNX5100-DDR2-DQS0_N 3C06-4 4 150R 5 33R 3C13 33R 3 3C06-3 6 33R

K9 K2 K3 L8 K7 L7 L2 L3 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 J8 K8 F7 E8 B7 A8

VDD ODT CKE WE CS RAS CAS 0 BA 1 0 1 2 3 4 5 6 A 7 8 9 10 11 12 CK

VDDL

VDDQ

VDD ODT CKE WE CS RAS CAS 0 BA 1 0 1 2 3 4 5 6 A 7 8 9 10 11 12 CK

VDDL

VDDQ

SDRAM
NC

A2 E2 L1 R3 R7 R8 G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 B3 F3 J2 8 3C07-3 3 3C07-2 2 3C06-1 8 3C06-2 7 3C09-3 3 3C09-2 2 3C08-1 8 3C08-2 7 5 6 3 33R 3C05-3 PNX5100-DDR2-VREF-DDR 2C40 6 33R 7 33R 1 33R 2 33R 6 33R 7 33R 1 33R 2 33R 3C05-4 4 33R 7 1 4 6 1 3C05-1 33R 2 3C05-2 33R 8 3C07-1 33R 5 3C07-4 33R 3 3C08-3 33R 3C11 33R 8 3C09-1 33R 5 3C09-4 33R PNX5100-DDR2-D0 PNX5100-DDR2-D1 PNX5100-DDR2-D2 PNX5100-DDR2-D3 PNX5100-DDR2-D4 PNX5100-DDR2-D5 PNX5100-DDR2-D6 PNX5100-DDR2-D7 PNX5100-DDR2-D8 PNX5100-DDR2-D9 PNX5100-DDR2-D10 PNX5100-DDR2-D11 PNX5100-DDR2-D12 PNX5100-DDR2-D13 PNX5100-DDR2-D14 PNX5100-DDR2-D15 PNX5100-DDR2-DQM1 PNX5100-DDR2-DQM0

SDRAM
NC

A2 E2 L1 R3 R7 R8 G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 B3 F3 J2 2C39 8 3C26-3 3C26-2 3C27-1 3C27-2 3C28-2 3C28-3 3C30-1 3C30-2 3 2 8 7 7 6 8 7 6 33R 7 33R 1 33R 2 33R 2 33R 3 33R 1 33R 2 33R 3 33R PNX5100-DDR2-VREF-DDR 7 1 4 1 3C25-1 33R 2 3C25-2 33R 8 3C26-1 33R 5 3C26-4 33R 3C31 33R 3C32 33R 4 3C28-4 33R 1 3C28-1 33R 4 33R PNX5100-DDR2-D16 PNX5100-DDR2-D17 PNX5100-DDR2-D18 PNX5100-DDR2-D19 PNX5100-DDR2-D20 PNX5100-DDR2-D21 PNX5100-DDR2-D22 PNX5100-DDR2-D23 PNX5100-DDR2-D24 PNX5100-DDR2-D25 PNX5100-DDR2-D26 PNX5100-DDR2-D27 PNX5100-DDR2-D28 PNX5100-DDR2-D29 PNX5100-DDR2-D30 PNX5100-DDR2-D31 PNX5100-DDR2-DQM3 PNX5100-DDR2-DQM2

DQ

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

DQ

1 4

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

5 8

UDM LDM VREF VSSDL

UDM LDM VREF VSSDL

5 3C25-3 6

3C25-4

LDQS

LDQS

1C00 D9 2C00 E4 2C01 D4 2C02 E4 2C13 F4 2C14 F5 2C15 F5 2C16 F5 2C17 F5 2C18 F6 2C19 F6 2C29 E10 2C30 E10 2C32 F11 2C33 F11 2C34 F12 2C35 F12 2C36 F12 2C38 F12 2C39 I12 2C40 I6 2C41-1 F1 2C41-2 F1 2C41-3 F2 2C41-4 F2 2C42-1 F2 2C42-2 F2 2C42-3 F2 2C42-4 F3 2C43-1 F8 2C43-2 F8 2C43-3 F8 2C43-4 F8 2C44-1 F9 2C44-2 F9 2C44-3 F9 2C44-4 F9 3C00 C2 3C01 D2 3C02 D3 3C03 H2 3C04 H8 3C05-1 G6 3C05-2 G6 3C05-3 I5 3C05-4 H5 3C06-1 H5 3C06-2 H5 3C06-3 H2 3C06-4 I2 3C07-1 G6 3C07-2 G5 3C07-3 G5 3C07-4 H6 3C08-1 H5 3C08-2 H5 3C08-3 H6 3C09-1 H6 3C09-2 H5 3C09-3 H5 3C09-4 H6 3C10 C4 3C11 H6 3C12 I2 3C13 I2 3C20 B9 3C21 B9 3C22 B12 3C23 B12 3C25-1 G12 3C25-2 G12 3C25-3 H11 3C25-4 H12 3C26-1 G12 3C26-2 G11 3C26-3 G11 3C26-4 H12 3C27-1 H11 3C27-2 H11 3C27-3 H9 3C27-4 I8 3C28-1 H12 3C28-2 H11 3C28-3 H11 3C28-4 H12 3C30-1 H11 3C30-2 H11 3C30-3 I8 3C30-4 I9 3C31 H12 3C32 H12 7C00-8 A6 7C01 F3 7C02 F9 FC05 B11 FC06 B9 IC04 C2

330u 6.3V 2C02

RES 2C29

330u 6.3V 2C30

RES 2C00

1u0

100n 2C16

2C13

100n 2C15

100n 2C18

100n 2C14

100n 2C17

100n 2C33

2C19

100n 2C34

100n 2C35

2C32

100n 2C36

2C38

100n

100n

100n

100n

22u

A1 E1 J9 M9 R1

A1 E1 J9 M9 R1

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

J1

J1

22u

PNX5100-DDR2-DQS1_P PNX5100-DDR2-DQS1_N

3C12 33R

UDQS VSS A3 E3 J3 N1 P9

100n VSSQ A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

3C27-4 33R 3C30-4 4 5 3 6 33R 3C30-3 33R

UDQS VSS A3 E3 J3 N1 P9

100n VSSQ

I
N

I
N

1
O

3
1X01 REF EMC HOLE

10

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

J7

J7

11

12

13
O

CHN
CLASS_NO

SETNAME
2 2008-11-21

DDR2 PNX5100
P
2008-10-10 3 SUPERS. DATE 9
C

TV543 R2 LDIPNX
NAME Maelegheer Ingrid CHECK

8204 000 8928


P
130 1 A2 ROYAL PHILIPS ELECTRONICS N.V. 2008

10

11

12

13

14

15

16

17

18

19

20
18310_518_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 93

SSB: PNX5100 - Video-In

10

11

12

13
3C14 B2 3C15 B2 3C16 B2 3C17 C2 3C18 C2 3C19 D2 3C24 D2 3C29 D2 3C33 E2 3C34 E2 3C35 E2 3C36 F2 3C50 C6 3C51 C7 7C00-5 B4 7C00-9 C7 IC54 C7

1
A

PNX5100 : VIDEO-IN A
B
RX51002A+ RES

3C14
RX51002ARX51002B+

3C15

100R

C
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

100R

B
RX51002BRX51002CLK+

7C00-5 PNX5100E AE17 AF17

AP AN BP BN CLKP CLKN

LVDS_RX

3C16

100R

AC17 AD17 AC16 AD16

RX51002CLKRX51002C+

7C00-9 PNX5100E LIN1 IC54 3C50 +3V3 1K0 3C51 1K0

100R

3C17

C
owner.

RX51002CRX51002D+

AE16 AF16 AE15 AF15

CP CN DP DN EP EN AP AN BP BN CLKP CLKN LIN2 CP CN DP DN EP EN

D6 A4 E2 G4 G3 G2 G1 F4 F3 F2 F1 E3 E1 D2 D1 C1 A2 A3 B3 B4

1 2 CLK 3 4 0 1 2 3 4 5 6 7 D 8 9 10 11 12 13 14 15

VDI

C
16 17 18 19 20 21 22 23 D 24 25 26 27 28 29 30 31 C4 A5 B5 C5 D5 A6 B6 C6 A7 B7 C7 D7 A8 B8 C8 D8

3C18

100R

RX51002DRX51002E+

AC15 AD15 AE20 AF20 AC20 AD20

3C19

RX51002ERX51001A+

3C24

100R

100R

D
F

AC19 AD19 AE19 AF19

RX51001ARX51001B+

D
F

100R

3C29

RX51001BRX51001CLK+

AE18 AF18 AC18 AD18

RX51001CLKRX51001C+

3C34

E
RX51001CRX51001D+

100R

3C33

1K0

3C35
RX51001DRX51001E+

3C36

1K0

1K0

RX51001E-

6
CHN
CLASS_NO

7
SETNAME

9
2 2008-11-21

VIDEO PNX5100
J
2008-10-10 3 SUPERS. DATE 9
C

TV543 R2 LDIPNX
NAME Maelegheer Ingrid CHECK

8204 000 8928


130 2 A3

ROYAL PHILIPS ELECTRONICS N.V. 2008

10

11

12

13
18310_519_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 94

SSB: PNX5100 - Power

10

11

12
2C45 D1 2C55 D1 2C56 D1 2C57 D9 2C58 F9 2C59 A1 2C60-1 B1 2C60-2 B1 2C60-3 B1 2C60-4 B1 2C61-1 B2 2C61-2 B2 2C61-3 B2 2C61-4 B2 2C62-1 B2 2C62-2 D6 2C62-3 B2 2C62-4 E6 2C63-1 B3 2C63-2 B3 2C63-3 E6 2C63-4 B3 2C64 B3 2C65 B3 2C66-1 C1 2C66-2 C2 2C66-3 C2 2C66-4 C2 2C67-1 C2 2C67-2 C2 2C67-3 C2 2C67-4 C2 2C68-1 D1 2C68-2 D2 2C68-3 D2 2C68-4 D2 2C69-1 D2 2C69-2 D2 2C69-3 D2 2C69-4 D2 2C70-1 D3 2C70-2 D3 2C70-3 D3 2C70-4 D3 2C71 E2 2C72 E2 2C73 E2 2C74 E2 2C75 E2 2C76 E3 2C77 C9 2C78-1 B1 2C78-2 B1 2C78-3 B1 2C78-4 D3 2C79 D6 2C80 D6 2C81 B3 2C82 F6 2C83 F6 2C84 D8 2C85 D9 2C86 D9 2C87 D9 2C88 E9 2C89 E9 2C90 F9 2C91 F8 2C92 F9 2C94 F7 2C95 A1 2C96 A2 2C97 A2 5C60 D6 5C61 D6

13
5C62 E6 5C63 E6 5C64 F6 5C65 F6 5C66 D8 5C67 E8 5C68 E8 5C69 E8 5C70 F8 7C00-10 A4 7C00-11 A7 CC60 A3 FC07 A2 IC80 D7 IC81 D7 IC82 E7 IC83 E7 IC84 E7 IC85 F7 IC86 D9 IC87 E9 IC88 E9 IC89 E9 IC90 F9

1
A

2 PNX5100 : POWER

7C00-11 PNX5100E

SUPPLY_2
VDDA_3V3_LVDSIN VSSA_LVDSIN VDDD_1V2_TRI_PLL1 VSSD_TRI_PLL1 VDDA_1V2_TRI_PLL1 VSSA_TRI_PLL1 VDDD_1V2_TRI_PLL2 VSSD_TRI_PLL2 VDDA_1V2_TRI_PLL2 VSSA_TRI_PLL2 VDDA_1V2_TRI_PLL3 VSSA_TRI_PLL3 VDDD_1V2_TRI_PLL3 VSSD_TRI_PLL3 VDDA_1V2_DLL0 VSSA_DLL0 VDDA_1V2_DLL1 VSSA_DLL1 VDDA_1V2_DLL4 VSSA_DLL4 VDDA_1V2_DLL7 VSSA_DLL7 VDD_1V2_DDRPLL0 VSS_DDRPLL0 VDDA_1V2_DDRPLL1 VSSA_DDRPLL1 VDDA_3V3_DDRPLL0 V22 U22 AD25 AD26 P22 T22 AE25 +1V2-PNX5100-DLL

A
330u 10V 2C59 2C96 2C95 2C97 10u 10u 10u

+3V3-PNX5100-LVDS-IN FC07 +1V2-PNX5100 CC60


SENSE+1V2-PNX5100

AB18 AB19 H5 J3 J5 J4 K5 K3 L5 K4 T5 U4 U5 U3 M22 L22 AA22 AB22 F22 E22

+1V2-PNX5100

+1V2-PNX5100

7C00-10 PNX5100E

+1V2-PNX5100-TRI-PLL1

+1V2-PNX5100-DDR-PLL1

+1V2-PNX5100 AA5 AB16 AB8 AB9 AC9 AD9 AE9 AF9 E16 E8 E9 F5 J22 K22 P5 R5 Y5 L16 M16 N16 P16 R16 T16 AB20 AB6 AB7 D22 E6 E7 G5 M5 N5 V5 W5 AB15 AB17 100n 2C72 2C71 100n D10 D13 D17 D20 A1 AA25 AB3 AB4 AB5 AC1 AC2 AC3 AC4 AD1 AD2 AD24 2C78-1 1 8 100n 2C78-2 2 7 100n 2C78-3 3 6 100n 1 8 100n 2C61-2 2 7 100n 2C61-3 3 6 100n 2C61-4 4 5 100n 2C62-1 1 8 100n 2C62-3 3 6 100n 2C63-1 1 8 100n 2C63-2 2 7 100n 2C63-4 4 5 100n 2C81 8 7 6 5

SUPPLY_1
AD3 AE1 AE2 AF1 B1 A10 A13 A17 B2 A20 C2 C25 C3 D3 D4 E4 E5 F25 H23 J25 L11 L12 L13 L14 L15 M11 M12 M13 M14 M15 M25 N11 N12 N13 N14 N15 P11 P12 P13 P14 P15 P23 R11 R12 R13 R14 R15 R23 R25 T11 T12 T13 T14 T15 V25 W23 AE26

+1V2-PNX5100

+3V3-PNX5100-DDR-PLL0

2C60-1 1 100n 2C60-2 2 100n 2C60-3 3 100n 2C60-4 4 100n

2C61-1

2C64

2C65

100n

100n

CB
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

100n

+1V2-PNX5100-TRI-PLL2

VDD_1V2_DDRPLL1 VSS_DDRPLL1 VDDA_1V2_LVDS_PLL VDDA_3V3_LVDS1 VDDA_3V3_LVDS2 VSSA_LVDS1 VSSA_LVDS2 VDD_1V2_MCAB1 VDD_1V2_MCAB2 VDDA_1V2_1_7_MCAB VDDA_1V2_UIP_PLL VDDA_3V3_SYS_PLL VSS_MCAB1 VSS_MCAB2 VDDA_1V2_XTAL VSSA_XTAL

N22 R22 E15 B15 D15 A15 C15 AB14 AC14 AE14 AF12 AD14 AC13 AB13 AD13 AE12 2C77 100n

+1V2-PNX5100

+1V2-PNX5100-TRI-PLL3

+1V2-PNX5100-LVDS-PLL +3V3-PNX5100-LVDS-PLL

VDD_1V2_CORE

VSS

+1V2-PNX5100

+1V2-PNX5100-DLL

+1V2-PNX5100 +1V2-PNX5100-CLOCK +3V3-PNX5100-CLOCK

D
2C66-1 1 8 100n 2C66-2 2 7 100n 2C66-3 3 6 100n 2C66-4 4 5 100n 2C67-1 1 8 100n 2C67-2 2 7 100n 2C67-3 3 6 100n 2C67-4 4 5 100n

C
owner.

+1V8-PNX5100

+1V2-PNX5100-CLOCK

VDD_1V8_DDR

VSS

E
+3V3 220u 16V 2C45 2C55 10u 2C56 10u

2C68-1 8 1 100n 2C68-2 2 7 100n 2C68-3 3 6 100n 2C68-4 4 5 100n 2C69-1 1 8 100n 2C69-2 2 7 100n 2C69-3 3 6 100n 2C69-4 4 5 100n 2C70-1 1 8 100n 2C70-2 2 7 100n 2C70-3 3 6 100n 2C70-4 4 5 100n

2C78-4

100n

5C60 +1V2-PNX5100 2C79 2C80 100n 100n 30R

IC80 +1V2-PNX5100-CLOCK 5C66 +1V2-PNX5100 100n 2C57 IC81 2C62-2 100n 2C84 +1V2-PNX5100-TRI-PLL1 10u 30R 2C85 100n 100n 100n IC86 +1V2-PNX5100-DLL

VDD_3V3_PER

D
F

VSS VDD_3V3_LVDSIN

5C61 +1V2-PNX5100 30R

2C86

+3V3

5C67 +3V3 2C88 +1V2-PNX5100-TRI-PLL2 100n IC82 30R IC87 +3V3-PNX5100-LVDS-IN

VDD_3V3_LVDSOUT

5C62 +1V2-PNX5100 100n 30R 2C62-4

+3V3 2C73 100n 2C74 100n 2C75 100n 2C76

2C89

+1V2-PNX5100 100n 30R 2C63-3

+1V2-PNX5100-TRI-PLL3

100n

GE

100n

5C68 +3V3 IC83 30R

2C87

IC88 +3V3-PNX5100-CLOCK

VSS

5C63

VSS

5C69 +3V3 2C90 100n IC84 +1V2-PNX5100-DDR-PLL1 30R 100n

IC89 +3V3-PNX5100-DDR-PLL0 2C58 100n

5C64 +1V2-PNX5100 2C82 100n 30R

2C94

5C70 2C91 100n 2C92

2C83

5C65 +1V2-PNX5100 100n 30R

IC85 +1V2-PNX5100-LVDS-PLL

+3V3 30R

IC90

+3V3-PNX5100-LVDS-PLL

F
100n

6
CHN
CLASS_NO

7
SETNAME

9
2 2008-11-21

SUPPLY PNX5100
J
2008-10-10 3 SUPERS. DATE 9
C

TV543 R2 LDIPNX
NAME Maelegheer Ingrid CHECK

8204 000 8928


130 3 A3

ROYAL PHILIPS ELECTRONICS N.V. 2008

10

11

12

13
18310_520_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 95

SSB: PNX5100 - Audio

10

11

12

13
3C41 D4 3C95-1 B5 3C95-2 B5 3C95-3 B4 3C95-4 B4 7C00-6 B3 7C00-7 C3

1
A

2 PNX5100 : AUDIO

7C00-6 PNX5100E AC22 AD22 AF22 AD23 AE23 AF23 AE22 OSCLK SCK 0 1 SD 2 3 WS

C
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

AUDIO
OUT IN

OSCLK SCK

AF21 AC21

3C95-4 4 100R 3C95-3 3 100R 6 3C95-2 2 100R 7 5 1 3C95-1 100R 8

BL-OSCLK BL-SCK BL-SD0

SD0 WS

AE21 AD21

BL-WS

C
owner.

C
7C00-7 PNX5100E

AMBI

E
0 1 2 3 AMBI 4 5 6 7 CLK DE SYNC_H SYNC_V AF10 AE10 AD10 AC10 AB10 AF11 AE11 AD11 AC11 AB11 AB12 AC12 3C41 100R

D
AMBI-VS

I
CHN
CLASS_NO

I
SETNAME
2 2008-11-21

AUDIO PNX5100
J
2008-10-10 3 SUPERS. DATE 9
C

TV543 R2 LDIPNX
NAME Maelegheer Ingrid CHECK

8204 000 8928


130 4 A3

ROYAL PHILIPS ELECTRONICS N.V. 2008

10

11

12

13
18310_521_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 96

SSB: PNX5100 - LVDS


1 A 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 A

10

11

12

13

14

PNX5100 : LVDS

A
C

TX1ARES 2CA0 2CA1 TX1A+ 4p7 4p7 RES

TX3ARES 2CAS 2CAT +VDISP2 TX3A+ 4p7 4p7 RES

TX1B9CA5 9CA4 9CA3 9CA2 2CA2 2CA3 TX1B+ +3V3 +3V3 RES 4p7 4p7 RES TXDATRES 2CH4 2CH5 RES 3CA7 3CA6 12K 12K 7C00-4 PNX5100E TXDAT+ 2CA4 2CA5 TX1C+ RGB_CLK A22 TX1CLKRES AP AN BP BN LOUT1 LOUT3 CLKP CLKN CP CN DP DN EP EN AP AN BP BN LOUT2 LOUT4 CLKP CLKN B14 A14 D14 C14 E13 E12 C13 B13 B12 A12 D12 C12 B11 A11 D11 C11 E11 E10 TX4E+ TX4ETX1CLK+ TX4D+ TX4DTX1DTX4CLK+ TX4CLKTX4C+ TX4CTX4B+ TX4BTX4A+ TX4ATX3E+ TX3ETX3D+ TX3DTX3CLK+ TX3CLKTX2ATX3C+ TX3CTX3B+ TX3BTX3A+ TX3ATX2A+ 2CAC 2CAD RES 4p7 4p7 RES TX2CLKTX2CLK+ TX2DTX2D+ TX2ETX2E+ TX2ATX2A+ TX2BTX2B+ TX2CTX2C+ FCAC FCAD FCAE FCAF TX1D+ 2CA8 2CA9 RES 4p7 4p7 RES 2CA6 2CA7 4p7 4p7 RES TXCLK+ 2CH7 10p TX1ATX1A+ TX1BTX1B+ TX1CTX1C+ TX1CLKTX1CLK+ RES 2CAA 2CAB TX1E+ 4p7 4p7 RES TX1DTX1D+ TX1ETX1E+ RES FCA0 FCA1 FCJ5 4p7 4p7 RES TXCLK2CH6 RES 10p 10p 10p RES FC10 FCJ4 9C10 RES 9C11 RES FC08

RES

TX3BRES 2CAV 4p7 2CAW 4p7 RES

10p

TX3B+ FI-RE41S-HF 50 51 48 49 46 47 45 44 42 43 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 1G50

B
ICAA ICA9 E17 E14 B21 A21 D21 C21 E21 E20 C20 B20 B19 A19 D19 C19 B18 A18 D18 C18 E19 E18 C17 B17 B16 A16 D16 C16 LVDS1 IREF LVDS2 AP AN BP BN CLKP CLKN CP CN DP DN EP EN AP AN BP BN CLKP CLKN CP CN DP DN EP EN

2CBL RES 2CBM RES 2CBN RES 2CBP RES 2CBR RES 2CBS RES

2CBK

2CBJ

10p

FI-RE51S-HF 60 61 58 59 56 57 54 55 52 53

TX1C-

TX3CRES 2CAY 2CAZ TX3C+ 4p7 4p7 RES SDA-DISP SCL-DISP LAMP-ON-OUT BACKLIGHT-OUT TX3CLKRES 2CB0 2CB1 TX3CLK+ 4p7 4p7 RES CTRL-DISP4 CTRL-DISP3 CTRL-DISP2 CTRL-DISP1 TX3ATX3A+ TX3BTX3B+ TX3CTX3C+ TX3CLKTX3CLK+ RES 2CB4 2CB5 TX3E+ 4p7 4p7 RES TX3DTX3D+ TX3ETX3E+ 3CA4 3CA5 100R 100R 100R 3CA9 3CAA FC12 3CAC 100R RES 3CAE 100R FCAV FCAY FCAZ FCB0 FCB1 FCB2 FCB3 FCB4 FCB5 FCB6 FCB7 RES

FCBN ICA1

9CA1 FCAS FCAT 100R FC19 FC13 FC14 FC15 FC16

ICAE

B
51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

LVDS_TX

ICA2

RES 3CAB

TX2E+ TX2ETX2D+ TX2DTX2CLK+ TX2CLKTX2C+ TX2CTX2B+ TX2BTX2A+ TX2A-

RES 9C31 RES 9C32 FCAB

RES

100R 3CAD 100R

C
F

TX3D2CB2 2CB3 TX3D+ RES 4p7 4p7 RES

FCAW

FCA2 FCA3 FCA4 FCA5 FCA6 FCA7 FCA8 FCA9 FCAA

TX1E-

TX3E-

TX1E+ TX1ETX1D+ TX1DTX1CLK+ TX1CLKTX1C+ TX1C-

FCAG FCAH FCAJ FCAK FCAM FCAN FCAP FCAR RES 3CA3 100R RES FCBP

TX4ATX4A+ TX4BTX4B+ TX4CTX4C+ TX4A2CB6 2CB7 TX4A+ RES 4p7 4p7 RES TX4CLKTX4CLK+ TX4DTX4D+ TX4ETX4E+

FCB8 FCB9 FCBA FCBB FCBC FCBD FCBE FCBF FCBG FCBH FCBJ FCBK FCBM

C10 CP B10 CN DP DN EP EN B9 A9 D9 C9

TX1B+ TX1B-

E
I

TX1A+ TX1A-

TX2BRES 2CAE 2CAF TX2B+ 4p7 4p7 RES SCL-DISP SDA-DISP 3CA2 100R 10p 10p

TX4BRES 2CB8 2CB9 TX4B+ 4p7 4p7 RES +VDISP1 TX4CRES 2CBA 2CBB TX4C+ 4p7 4p7 RES

FCBR

9CA0

FC17

TO DISPLAY

TX2C2CAG 2CAH TX2C+


is prohibited without the written consent of the copyright All rights reserved. Reproduction in whole or in parts

4p7 4p7 RES

2CBY RES 2CBZ RES

RES

1G51

F
J

TX2CLK2CAJ 2CAK TX2CLK+ RES 4p7 4p7 RES

TX4CLK2CBC 2CBD TX4CLK+ RES 4p7 4p7 RES

TO DISPLAY

TX2DRES 2CAM 2CAN 4p7 4p7 RES

TX4DRES 2CBE 2CBF TX4D+ 4p7 4p7 RES

K
owner.

TX2D+

TX2ERES 2CAP 2CAR TX2E+ 4p7 4p7 RES

TX4ERES 2CBG 2CBH TX4E+ 4p7 4p7 RES

H
M

1G50 E8 1G51 F14 2CA0 A5 2CA1 A5 2CA2 B5 2CA3 B5 2CA4 B5 2CA5 B5 2CA6 C5 2CA7 C5 2CA8 C5 2CA9 C5 2CAA D5 2CAB D5 2CAC E5 2CAD E5 2CAE E5 2CAF E5 2CAG F5 2CAH F5 2CAJ F5 2CAK F5 2CAM G5 2CAN G5 2CAP G5 2CAR G5 2CAS A10 2CAT A10 2CAV B10 2CAW B10 2CAY B10 2CAZ B10 2CB0 C10 2CB1 C10 2CB2 C10 2CB3 C10 2CB4 D10 2CB5 D10 2CB6 E10 2CB7 E10 2CB8 E10 2CB9 E10 2CBA F10 2CBB F10 2CBC F10 2CBD F10 2CBE G10 2CBF G10 2CBG G10 2CBH G10 2CBJ B13 2CBK B13 2CBL B13 2CBM B13 2CBN B13 2CBP B13 2CBR B13 2CBS B14 2CBY F8 2CBZ F8 2CH4 B6 2CH5 B6 2CH6 B7 2CH7 C7 3CA2 E7 3CA3 E7 3CA4 B12 3CA5 B12 3CA6 B1 3CA7 B1 3CA9 B12 3CAA B12 3CAB C12 3CAC C12 3CAD C12 3CAE C12 7C00-4 B1 9C10 B7 9C11 C7 9C31 C8 9C32 C8 9CA0 E14 9CA1 B14 9CA2 B8 9CA3 B8 9CA4 B8 9CA5 B8 FC08 B7 FC10 B7 FC12 C12 FC13 C13 FC14 C13 FC15 C13 FC16 C13 FC17 E14 FC19 B12 FCA0 C7 FCA1 C7 FCA2 C8 FCA3 C7 FCA4 C8 FCA5 C7 FCA6 D8 FCA7 D7 FCA8 D8 FCA9 D7 FCAA D8

FCAB C8 FCAC D7 FCAD D7 FCAE D7 FCAF D8 FCAG D8 FCAH D8 FCAJ E8 FCAK E8 FCAM E8 FCAN E7 FCAP E7 FCAR E7 FCAS B12 FCAT B12 FCAV C12 FCAW C12 FCAY C12 FCAZ C12 FCB0 C12 FCB1 C12 FCB2 C12 FCB3 D12 FCB4 D12 FCB5 D12 FCB6 D12 FCB7 D12 FCB8 D12 FCB9 D12 FCBA D12 FCBB D12 FCBC D12 FCBD D12 FCBE E12 FCBF E13 FCBG E12 FCBH E12 FCBJ E12 FCBK E12 FCBM E14 FCBN B8 FCBP E8 FCBR E8 FCJ4 B7 FCJ5 C7 ICA1 B8 ICA2 B8 ICA9 B1 ICAA B1 ICAE B14

100p

100p

100p

100p

100p

100p

10

11

12

13

14

O
CHN
CLASS_NO

O
SETNAME
2 2008-11-21

LVDS PNX5100
P
2008-10-10 3 SUPERS. DATE 9
C

TV543 R2 LDIPNX
NAME Maelegheer Ingrid CHECK

8204 000 8928


P
130 5 A2 ROYAL PHILIPS ELECTRONICS N.V. 2008

10

11

12

13

14

15

16

17

18

19

20
18310_522_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 97

SSB: PNX5100 - Control

10

11

12

13

1
B

2 PNX5100 : CONTROL

C
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

A
2CD0 27p

1CD0
2CD1

7C00-1 PNX5100E
27p

A
IN OUT OUT2

27M

AE13 AF13

CONTROL
UA1 XTAL UA2

TX RX TX RX

AE8 AF8 AC8 AD8 K2 K1 L2 L1 AD12 G22 H22 W22 Y22 3CD7 100R 3CD9 100R RES 100R SCL-SSB SDA-SSB SCL-AMBI-3V3 SDA-AMBI-3V3 PNX5100-RST-OUT

CLK-OUT-PNX5100

3CD0 3CD3 100R FCD0 FCD1 FCD2 FCD3 FCD4 FCD8 ICD8
3CD1-2 3CD1-3 10K 3CD1-1 3CD1-4 3CD2 10K 10K 10K 10K 10K

AF14

B
owner.

EJTAG-PNX5100-TCK EJTAG-PNX5100-TDI EJTAG-PNX5100-TDO EJTAG-PNX5100-TMS EJTAG-PNX5100-TRSTn RESET-PNX5100

10K

H4 H2 H3 J1 J2 AF24 R1 AB21

TCK TDI TDO TMS TRST RESET_IN OBSERVE VPP_ID

SCL SDA SCL SDA

3CD8

3CDA

100R RES

RESET_SYS

1CD0 A2 2CD0 A2 2CD1 A2 3C40 C1 3CD0 B2 3CD1-1 C2 3CD1-2 C2 3CD1-3 C2 3CD1-4 C1 3CD2 C2 3CD3 B2 3CD7 B5 3CD8 B5 3CD9 B5 3CDA B5 3CDB D7 3CDC D6 3CDD D6 7C00-1 A3 7CD0 C4 9CD0 D7 FCD0 B3 FCD1 B3 FCD2 B3 FCD3 B3 FCD4 B3 FCD6 D5 FCD8 B3 FCD9 D5 ICD8 B3

3C40

NC

+3V3

C
F

+3V3

+3V3

+3V3

+3V3

+3V3

+3V3

C
F

7CD0 M24C16-WDW6

C08 OR C16
1 2 3 0 1 2

(2Kx8) EEPROM
ADR

WC SCL

7 6 5

FCD6

WC-EEPROM-PNX5100 3CDC 3CDD 100R 100R SDA-SSB SCL-SSB

WC-EEPROM-PNX5100
9CD0

3CDB 4K7

+3V3

SDA
4

only for DEBUG

FCD9

1
I

7
I

CHN
CLASS_NO

SETNAME
2 2008-11-21

CONTROL PNX5100
J
2008-10-10 3 SUPERS. DATE 9
C

TV543 R2 LDIPNX
NAME Maelegheer Ingrid CHECK

8204 000 8928


130 6 A3

ROYAL PHILIPS ELECTRONICS N.V. 2008

10

11

12

13
18310_523_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 98

SSB: PNX5100 - PCI

10

11

12
3CF1 C5 3CFK-1 B5 3CFK-2 B5 3CFK-3 B5 3CFL-1 B5 3CFL-2 B5 3CFL-3 B5 3CFN B5 7C00-2 A3 IC50 C5 IC51 C5

13

1
A

2 PNX5100 : PCI

3
7C00-2 PNX5100E AF5 AE4 AD4 AF3 AE3 AF2 AB2 AB1 AA4 AA3 AA2 AA1 Y4 Y3 Y2 Y1 W4 U1 T4 T3 T2 T1 R4 R3 R2 P4 P3 P2 P1 N4 N3 N2 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

A
B

C
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

PCI-AD0 PCI-AD1 PCI-AD2 PCI-AD3 PCI-AD4 PCI-AD5 PCI-AD6 PCI-AD7 PCI-AD8 PCI-AD9 PCI-AD10 PCI-AD11 PCI-AD12 PCI-AD13 PCI-AD14 PCI-AD15 PCI-AD16 PCI-AD17 PCI-AD18 PCI-AD19 PCI-AD20 PCI-AD21 PCI-AD22 PCI-AD23 PCI-AD24 PCI-AD25 PCI-AD26 PCI-AD27 PCI-AD28 PCI-AD29 PCI-AD30 PCI-AD31

PCI_XIO

AD

0 1 CBE 2 3 PAR FRAME IRDY TRDY STOP DEVSEL IDSEL PERR SERR REQ REQA REQB GNT GNTA GNTB INTA CLK PLL_OUT

AE5 AD5 AC5 AF4 W3 U2 V1 V2 V4 V3 L4 W1 W2 AD6 AC7 AD7 AE6 AF6 AE7 M1 L3 H1

PCI-CBE0 PCI-CBE1 PCI-CBE2 PCI-CBE3 PCI-PAR PCI-FRAME PCI-IRDY PCI-TRDY PCI-STOP PCI-DEVSEL PCI-AD25 PCI-PERR PCI-SERR RES RES RES RES RES RES 3CFK-1 1 3CFK-3 3 3CFK-2 2 3CFL-1 1 3CFL-3 3 3CFL-2 2 3CFN 8 6 7 8 6 7 100R 100R 100R 100R 100R 100R 10K

B
+3V3 PCI-CLK-PNX5100

XIO
0 1 SEL 2 3 ACK AD25

IC50 M2 M3 M4 N1 AC6 AF7

IC51

3CF1 +3V3 10K

owner.

D
F

D
F

E
G

E
G

1
H

8
H

I
CHN
CLASS_NO

I
SETNAME
2 2008-11-21

PCI
J
2008-10-10 3 SUPERS. DATE NAME Maelegheer Ingrid CHECK

PNX5100 8204 000 8928


9
C

TV543 R2 LDIPNX

J
A3

130

ROYAL PHILIPS ELECTRONICS N.V. 2008

10

11

12

13
18310_524_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 99

SSB: PNX5100 - Display-Interfacing


1 A 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
1C01 A5 1C02 B5 2C03 H5 2C04 G4 2CG0 A5 2CG1 B5 2CG2 C4 2CG3 C2 2CG4 D5 2CG5 F5 2CG6 F5 2CG7 F5 2CG8 F5 2CGB H12 2CGC H12 2CGD G11 2CH0 E11 2CH1 E12 3C37 G3 3C38 G3 3C39 G3 3C42 G9 3C43 A7 3C44 B8 3CG0-2 D5 3CG0-3 D5 3CG0-4 C3 3CG1 C2 3CG5 D4 3CG6 E5 3CG7 E5 3CG8 E5 3CG9 E5 3CGA E3 3CGF E3 3CGG E3 3CGH E3 3CGJ E3 3CGN H11 3CGP H12 3CGR H13 3CGS G12 3CGT G11 3CGV G13 3CGZ B12 3CH0 B12 3CH1 B12 3CH2 C4 3CH3 G11 3CH4 H11 3CH5 G11 3CH7 C2 3CH8 D11 3CH9 D11 3CHA D13 3CHB D12 3CHC D11 3CHD D11 3CHE E11 3CHF E12 3CHG E13 5CG0 A4 5CG1 A4 5CG2 B4 5CG3 B4 6CG0 C3 6CG2 C5 7C00-3 A9 7C03 G4 7CG0 B2 7CG1 C3 7CG2 C4 7CG4 H12 7CG5 G12 7CG6-1 G13 7CG6-2 G13 7CG8 B12 7CH0 D12 7CH1-1 D13 7CH1-2 D13 9CG0 B3 9CG1 B3 9CG4 H13 9CG7 G10 9CG8 G10 9CG9 H10 9CH0 E13 BCG0 E6 BCG1 E6 BCG2 E6 BCG3 E6 BCG5 A5 BCG6 B5 FCG0 A5 FCG1 B5 FCG2 E6 FCG3 E6 FCG4 E6 FCG5 E6 FCG6 H13 FCG7 E13 FCG8 B4 IC01 E3 IC02 G3 IC03 G3 ICG1 C4 ICG2 C2

20
ICG3 C2 ICG4 D4 ICG5 D4 ICG6 D5 ICG7 E2 ICG8 E2 ICG9 E2 ICGA E2 ICGH H12 ICGK G13 ICGM G12 ICGN G11 ICGP G11 ICGR G10 ICGV B8 ICGW C3 ICGY B12 ICGZ B8 ICH1 G9 ICH2 G9 ICH3 H9 ICH4 A8 ICH5 D10 ICH6 D11 ICH7 D11 ICH8 D12 ICH9 D13 ICHA B8 ICHB B8

5
+VDISP

10

11

12

13

14

PNX5100 : DISPLAY-INTERFACING
2CG0

100n

30R 5CG1 30R RES

3.0A T 32V

100R

3C43

5CG0

1C01

FCG0

BCG5

BACKLIGHT-OUT2 +VDISP2
7C00-3 PNX5100E ICH4 ICHA CTRL4-PNX5100 3C44 100R ICHB AE24 AF25 AF26 C24 C26 B25 B26 A26 A25 A24 B24 A23 B23 C23 B22 C22 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

+3V3

GPIO
3CH1 10K RES

3CGZ

2CG1

100n

30R FCG8 5CG3 30R 3CH2 2CG2 22u RES 7CG1 SI3441BDV 2K2

3.0A T 32V

+VDISP1
BACKLIGHT-CTRL CTRL3-PNX5100 CTRL2-PNX5100 CTRL1-PNX5100

FAN-CTRL-1 FAN-CTRL-2

ICGZ ICGV

D
+12VD
ICG2

7CG0 SI4835DDY RES

10K RES

9CG1 RES 9CG0 RES

BACKLIGHT-PWM-ANA-SSB LCD-PWR-ON BACKLIGHT-PWM-ANA-DISP 5CG2 1C02 FCG1 BCG6 BOOST-CTRL

7CG8 PDTA114EU GPIO

+3V3

ICGY

3CH0 100R

BACKLIGHT-BOOST

6CG2 LTST-C190KGKT

BOOST-CTRL

C
E
3CG1 47R ICG3

3CH7 47K 2CG3 1u0 6CG0 BZX384-C5V6 3 ICGW ICG1

+3V3
5 3CG0-4 4 47K 7CG2 BC847BW 1 ICG4 3CG0-2 ICG6 3CG0-3 3 6 2 7 47K 2CG4 100n 2 47K 3CH8 3CH9 10K 27K RES

+12VD

3CHA

47K 7CH1-1 BC847BPN(COL) 6 ICH9

+3V3

VDISP-SWITCH

ICG5 3CG5 4K7 ICH7

+3V3

+3V3
3CHC ICH5 47R RES 3CG8 47R RES 3CG7

3CHB

ICH8 5

2 1

ICH6 1 3CHD 2K2 RES

4K7 RES 2CH0 470p RES

12K 7CH0 BC847BW 2

BC847BPN(COL) 7CH1-2 3

LCD-PWR-ON

3CG6

3CG9

IC01

3CGA 100R

47R RES

10K RES

G
CTRL1-PNX5100

ICG7

3CGF 47R RES

FCG2

BCG0

CTRL-DISP1

3CHE 1u0 RES 1K0 RES

9CH0 RES 3CHG 3CHF 15K RES

FCG7

2CH1

CTRL2-PNX5100 ICG9 CTRL3-PNX5100

CTRL-DISP2

47R RES 3CGH 47R RES 3CGJ 47R RES

FCG4

BCG2

CTRL-DISP3

1K0

E
H

ICG8

3CGG

FCG3

BCG1

ICGA CTRL4-PNX5100

FCG5

BCG3

CTRL-DISP4

RESERVED
2CG5 100p 2CG6 100p 2CG7 100p 2CG8 100p NOTE : CAN BE CAPACITOR OR WIRE BRIDGE

+12VD

F
RES

RES

+3V3 +3V3
is prohibited without the written consent of the copyright All rights reserved. Reproduction in whole or in parts

3CGV

3CGT

470K

2C04 3C42 100n 10K

47K

6 2 7CG6-1 BC847BPN(COL) 1

BACKLIGHT-CTRL

3C37 47R

IC02

7C03 74LVC1G125GW 5 2

ICGK 3CGS ICGM 5 4

ICGN 4

G
CTRL4-PNX5100
3C38 47R 3C39 10K IC03

CTRL-DISP4
BACKLIGHT-CTRL

ICH1 9CG7 ICGR ICH2 BACKLIGHT-CONTROL-FPGA-IN 9CG8 RES

3CH5

ICGP 1 3CH3 2K2 RES

EN 3

4K7 RES 2CGD 470p RES

470K RES 7CG5 BC847BW 2 RES

7CG6-2 BC847BPN(COL) 3

2CGC

3CGR

3CGP

15K RES

owner.

2CGB

+3V3

1u0

1K0

+3V3

1u0 RES

9CG9

3CH4

+3V3F
10K

9CG4 RES

FCG6

3CGN

220u 25V

10K

2C03

H
L

ICGH 7CG4 PDTC114EU

ICH3 BACKLIGHT-PWM-ANA-SSB

BACKLIGHT-OUT

10

11

12

13

14

O
CHN
CLASS_NO

O
SETNAME
2 2008-11-21

DISPLAY INTERF PNX5100


P
2008-10-10 3 SUPERS. DATE 9
C

TV543 R2 LDIPNX
NAME Maelegheer Ingrid CHECK

8204 000 8928


P
130 8 A2 ROYAL PHILIPS ELECTRONICS N.V. 2008

10

11

12

13

14

15

16

17

18

19

20
18310_525_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 100

SSB: PNX5100 - Debug

Personal Notes:

3CJ0 C3

3CJ1 C3

6CJ0 C3

7CJ0 D3

FCJ0 D3

1
C
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

2 PNX5100 : DEBUG

4
C

A
D

RESERVED

A
D

owner.

+3V3

+3V3

330R

3CJ1

3CJ0

10K

F
PNX5100-RST-OUT

C
SML-310 6CJ0

G
7CJ0 PDTC114EU

D
H

FCJ0

D
H

I
CHN
CLASS_NO

1
SETNAME

2008-11-21

DEBUG SHEET PNX5100


J
2008-10-10 3 SUPERS. DATE 9
C

TV543 R2 LDIPNX
NAME Maelegheer Ingrid CHECK

8204 000 8928


130 9 A4

ROYAL PHILIPS ELECTRONICS N.V. 2008

6
18310_526_090302.eps 090302

10000_012_090121.eps 090121

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 101

SSB: FPGA Backlight-LVDS I2C-Mux


1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
1F03 H5 1F05 H1 1F29 I6 1F50 B14 1F53 E14 1M59 A14 1M71 C14 2F00 I2 2F01 H9 2F02 I10 2F03 D11 2F04 C11 2F05 I4 2F06 D13 2F07 D13 2F08 E13 2F09 C2 2F10 C2 2F11 D3 2F12 C2 2F13 C3 2F14 C3 2F15 C3 2F16 C2 2F17 C3 2F18 D1 2F19 D2 2F20 B2 2F21 C3 2F22 B2 2F23 B2 2F24 B2 2F25 B3 2F26 A11 2F27 A11 2F28 E13 2F29 F13 2F30 A2 2F31 A2 2F32 A2 2F33 A2 2F34 B3 2F35 B3 2F36 A3 2F37 A3 2F38 A3 2F39 A3 2F40 F13 2F41 G13 2F42 G13 2F46 C13 2F47 C13 2F48 C14 2F49 A6 2FA6 B13 2FA7 B13 2FND F11 2FNE F11 3F00-1 I3 3F00-2 I2 3F00-3 H2 3F00-4 H2 3F01 I2 3F02 H8 3F03 H10 3F06 I8 3F07 D11 3F08 D11 3F09 D11 3F10 E11 3F11 D7 3F12 C11 3F13 C10 3F14 F7 3F15-1 G4 3F15-2 G4 3F15-3 G5 3F16-1 H4 3F16-2 H4 3F16-3 H4 3F16-4 H5 3F17 D13 3F18 D13 3F19 E13 3F20 E13 3F21 F13 3F22 E7 3F23 E7 3F24 E1 3F25 E2 3F26 F6 3F27 F2 3F28 F4 3F29 F13 3F30 G13 3F31 G13 3F36 A8 3F37 A8 3F38 A8 3F39 B8 3F40 C13 3F41 C13 3F79 F10 3F80 F10 3F82 E7 3F83 E7 3F84 E7 3F85 E7 3FA5 A12 3FA6 A12 3FAA A10 3FAB A10 5F02 C1 5F03 A2 5F04 A2 5F05 B14 5F06 B14 6F13 E2 6F82 E6 6F83 E6 6F84 E6 6F85 F6 7F00 B8 7F01 H9 7F05 E2 7F06 B2 7F07 D2 7F08 A6 9F00 D11 9F01 E11 9F02 E11 9F03 D10 9F04 D7 9F05-1 F9 9F05-2 F9 9F05-3 F9 9F05-4 F9 9F06 D10 9F08 E10 9F09 A5 9F10 A5 9F11 A5 9F12 A5 9F13 A8 9F14 A8 9F15 A8 9F16 A8 9F17 B6 9F18 B6 9F19 B6 9F20 B6 9F21 A12 9F22 A12 9FA1 A6 9FA2 A6 FF00 I2 FF01 I1 FF02 H10 FF03 H8 FF04 I8 FF05 I8 FF06 G4 FF07 G4 FF08 B6 FF09 C3 FF10 A3 FF11 B6 FF12 F7 FF13 G5 FF14 G4 FF15 B6 FF16 B6 FF17 A3 FF20 B14 FF21 C14 FF22 C14 FF23 F14 FF24 F14 FF25 F14 FF30 G5 FF31 F14 FF40 E14 FF41 E14 FF42 E14 FF43 E14 FF44 E14 FF54 F6 FFA7 A13 FFA8 A14 FFA9 A13 IF00 H9 IF01 F10 IF02 D10 IF07 C10 IF08 D9 IF09 C10 IF12 B3 IF13 C10 IF14 D7 IF15 D10 IF16 D10 IF17 D10 IF18 D9 IF19 E9 IF20 C13 IF21 C13 IF29 B14 IF32 E7 IF33 E7 IF34 F7 IF35 F7 IF36 E10 IF37 E10 IF38 F10 IF39 F10 IFA8 A11 IFA9 A10

1
A

2
FPGA Backlight-LVDS & I2C-MUX

6
+3V3 2F49 100n

7
RESERVED
+3V3

8
RES 3F36 4K7 RES +3V3 4K7 3F38 SCL-BOLT-ON 3F37 SDA-DISP SCL-DISP

10

11

12

13

14

+3V3 3FAB 2F26 150p 2K2

5F04 100n RES 2F31

FF17

+3V3 120R RES 2F30 100n 2F37 100n 2F33 4u7 2F32 100n 2F36 100n 2F38 100n 2F39 100n

+3V3M

+3V3 +3V3M 7F08 PCA9540B RES 4K7 9F13 VDD SCL-SET SCL-SET0 SCL-SET1 9FA1 9F09 RES 9F10 RES 9F11 RES 9F12 RES 9FA2 1 2 SCL SDA
INP FIL

SC0 SC1

5 9F14 8 9F15 4 9F16 RES 7 3F39 +3V3 RES 4K7 RES

3FAA

2F27

RES 2F34

RES 2F35

2FA7

2FA6

120R 100n 2F23 100n 2F24 2F20 100n 2F22 100n 2F25 100n

SDA-BOLT-ON

100n

100n

10p

10p

+2V5

+2V5M

150p

2K2

RES 5F03

FF10

SDA-SET0 SDA-SET1 SDA-SET

I2 C -BUS CTRL

SD0 SD1

SCL-DISP SCL-SET0 SCL-BOLT-ON SCL-SET1 SDA-DISP SDA-SET0 SDA-BOLT-ON SDA-SET1

A
9F21 220R 9F22 3FA5 3FA6 220R FFA9 FFA7 FFA8 1M59 1 2 3 4 5 6 7

SCL-AMBI-3V3 SDA-AMBI-3V3 IFA9

IFA8

VSS 6

FF20 +3V3 1F50 T 1A 63V

TO AMBILIGHT

+2V5M +2V5M +2V5M +2V5M

7F06 LD3985M25

+3V3 2F16

1 3 1u0

IN INH

OUT BP

5 IF12 4 2F21 1u0 2F17 10n

SCL-SET SDA-SET SCL-SET SDA-SET

9F17 9F18 9F19 RES 9F20 RES

FF08 FF11 FF15 FF16

SCL-DISP SDA-DISP SCL-BOLT-ON SDA-BOLT-ON 7F00 XC3S100E-4VQG100C

+1V2M +1V2M +1V2M +1V2M

5F05 +3V3 30R IF29 5F06 +5V RES 30R IF20 SCL-SET 100R 1M71 1 2 3 4 1735446-4 10p RES 2F47 RES 2F46 2F48 100n 10p

21 46 74 96

COM 2

VCCAUX

SPARTAN-3 FPGA
+1V2M 78 79 83 84 85 86 90 91 94 95 98 99 88 89 92 +3V3M +3V3M 82 97 IO_L01P IO_L01N IO_L02P|GCLK4 IO_L02N|GCLK5 IO_L03P|GCLK6 IO_L03N|GCLK7 IO_L05P|GCLK10 IO_L05N|GCLK11 IO_L06P IO_L06N|VREF IO_L07P IO_L07N|HSWAP IP_L04P|GCLK8 IP_L04N|GCLK9 IO VCCO IP_L05P|RDWR_B|GCLK0 IP_L05N|M2|GCLK1 IO_L01P|CSO_B IO_L01N|INIT_B IO_L02P|DOUT|BUSY IO_L02N|MOSI|CSI_B IO_L03P|D7|GCLK12 IO_L03N|D6|GCLK13 IO_L04P|D4|GCLK14 IO_L04N|D3|GCLK15 IO_L06P|D2|GCLK2 IO_L06N|D1|GCLK3 IO_L07P|M0 IO_L07N|DIN|D0 IO_L08P|VS2 IO_L08N|VS1 IO_L09P|VS0 IO_L09N|CCLK 24 25 26 27 32 33 35 36 40 41 43 44 47 48 49 50 38 39 30 34 42 31 45 CSO-B IF13 INIT 3F13 RES 10K +3V3M BACKLIGHT-CONTROL-FPGA-IN 3F12 MOSI 100R 33p SDA-SET

6 28 56 80 VCCINT

3F40 IF21 3F41

FF21 FF22

RES 5F02 100n RES 2F10 47u 6.3V

+1V2-PNX85XX 120R RES 2F09 100n 2F13 2F12

FF09

1 100R

100n 2F14

100n 2F15

100n

2F04

BL-CS BL-MISO BL-MOSI BL-CLK

TO TEMPERATURE SENSOR

IF07 IF09

F
+3V3 3 2F18 100n

7F07 LD1117DT12 IN OUT COM 2F19 2F11 100n 4u7 2

BL-HS BL-VS +3V3M 9F04 RES 1K0 IF14 3F11

CLK-OUT-PNX5100 IF02 IF15 IF16 IF17 2F03 IF08 IF18 10p 9F03 3F07 3F08 1K0 RES 1K0 RES 9F01 9F02 IF19 9F08 +3V3M +3V3M BL-MOSI 3F10 RES 1K0 9F00 9F06 +3V3 MISO SDA-SET

3F17 2F06 10p 100R

D
G

3F09 100R +3V3

CCLK SCL-SET

3F18 2F07 10p 100R

BANK0
SCL-SSB SDA-SSB 3F22 3F23 IF32 IF33 100R 100R 53 54 57 58 60 61 62 63 65 66 67 68 70 71 69 +2V5M +2V5M AMBI-VS 3F28 10K +3V3M +3V3M 10K 55 73 IO_L01P IO_L01N IO_L02P IO_L02N IO_L03P|RHCLK0 IO_L03N|RHCLK1 IO_L04P|RHCLK2 IO_L04N|RHCLK3 IO_L05P|RHCLK4 IO_L05N|RHCLK5 IO_L06P|RHCLK6 IO_L06N|RHCLK7 IO_L07P IO_L07N IP|VREF VCCO

IP|VREF IO|D5 IO|M1 VCCO

+3V3 +3V3

BL-CLK

3F19 2F08 10p 100R

6F82 +3V3M 3F24 470R 6F13 SML-310 7F05 BC847BW 3F25 100K 100K 3F27 +2V5M DONE 6F83 6F84 6F85

LTST-C190KGKT LTST-C190KGKT LTST-C190KGKT

3F82 3F83 3F84 3F85

470R 470R 470R 470R IF34 IF35

10p

LTST-C190KGKT

2F28

BL-SCK BL-WS BL-SD0 BL-OSCLK

BANK2
IO_L01P IO_L01N IO_L02P IO_L02N|VREF IO_L03P|LHCLK0 IO_L03N|LHCLK1 IO_L04P|LHCLK2 IO_L04N|LHCLK3 IO_L05P|LHCLK4 IO_L05N|LHCLK5 IO_L06P|LHCLK6 IO_L06N|LHCLK7 IO_L07P IO_L07N IP VCCO 2 3 4 5 9 10 11 12 15 9F05-4 16 9F05-3 17 9F05-2 18 9F05-1 22 23 13 8 20 IF36 IF37

3F20 100R

1F53 FF40 FF41 FF42 FF43 FF44 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 15 502382-1470 10p

BL-MISO RES 2FND 150R RES 3F79 TXDAT4p7 TXDAT+

3F21 2F29 10p 100R

FF23 FF24 FF31 FF25

3F26

10K 3F14

F
is prohibited without the written consent of the copyright All rights reserved. Reproduction in whole or in parts

FOR DEBUG

BANK1
51 1 DONE PROG_B TCK TDI TDO TMS

IF38 IF39 RES 2FNE 150R RES 3F80 IF01 +2V5M +2V5M 4p7

TXCLK+

PROG-B FF12

J
FF07 1 3F15-1 8 2 3F15-2 7

FF06 FF14 FF13

77 100 76 75

BANK3
BL-VS GND 7 14 19 29 37 52 59 64 72 81 87 93 3F30 2F41 10p 100R

2F40

DONE

FF54

TXCLK-

BL-CS

3F29 100R

G
K
owner.

3F15-3

330R

330R

330R

BL-HS

3F31 2F42 10p 100R

3 FF30 +3V3

FOR FACTORY USE ONLY


2 3F16-2 7 3F16-3 100R 3F16-1 3F16-4 100R 100R 100R

2F01

1F05 1 2 3 4 5 6 7 4 100R 3F00-2 2 100R FF00 FF01 RES 2F00

3F00-4

5 3 7 6 3F00-3 100R 8 3F00-1

+3V3M +3V3M RES 2F05 100n 9 100n 8

CSO-B

S W HOLD VSS 4

100R

3 7

33p

2F02

1 100R

CSO-B MOSI MISO CCLK

1F03 1 2 3 4 5 6 7 MOSI 1F29 HOOK1 CCLK

FF03 FF04 FF05 3F06

*
5 6 D C

7F01 M25P20-VMN 3F03 Q 2 10R FF02 MISO

VCC

2M FLASH

100n

CSO-B

3F02 4K7 RES

IF00

I
N

3F01 100R

PROG-B

FOR DEBUG

1X02 EMC HOLE

10

11
CHN
CLASS_NO

12
SETNAME

13

14
2 2008-11-21

FPGA Backlight-LVDS & I2C-MUX

P
2008-10-10 3 NAME Maelegheer Ingrid CHECK

TV543 R2 LDIPNX
SUPERS. DATE 2007-12-04 8
C

8204 000 8933


P
130 1 A2 ROYAL PHILIPS ELECTRONICS N.V. 2005

10

11

12

13

14

15

16

17

18

19

20
18310_527_090302.eps 090302

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 102

SSB: U-Wand

Personal Notes:

C
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

1F10 B3 1R20 A3

5FC5 A3 5FC6 A2

5FC7 A3 5FC8 A2

5FC9 A3 FFC2 A3

FFC3 A3 FFC4 A3

FFC5 A3 FFHB B3

FFHC B3 FFHD B3

FFHE B3 FFHF C3

FFHG C3 FFHH C3

FFHJ C3 FFHK C3

FFHL C3 IFC0 A2

IFC1 A3 IFC5 A2

1
D
RES U-WAND
owner.

2 U-WAND

4
D

A
TXD-MIPS2

IFC0 5FC6 IFC5 5FC8 30R

5FC5 30R 30R 30R 30R

FFC2 5FC7 IFC1 5FC9 FFC3 FFC4 FFC5

1R20 1 2 3 4 5

A
E

RXD-MIPS2 +12V

1735446-5

F B

1F10 EJTAG-TRSTN EJTAG-DETECT EJTAG-TDI EJTAG-TDO EJTAG-TMS EJTAG-TCK FFHB FFHC FFHD FFHE FFHF FFHG 1 2 3 4 5 6 7 8 9 10 11 12 13 14 5-147279-3

B FOR FACTORY USE ONLY C

FFHH

FFHJ FFHK FFHL

+3V3

1
I
CHN
CLASS_NO

4
I

SETNAME
2 2008-11-21

U-WAND

J
2008-10-10 3 NAME Maelegheer Ingrid CHECK

TV543 R2 LDIPNX
SUPERS. DATE 2007-12-04 8
C

8204 000 8933


130 2 A4

ROYAL PHILIPS ELECTRONICS N.V. 2007

6
18310_528_090302.eps 090302

10000_012_090121.eps 090121

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 103

SSB: Temperature & Fan control

10

11

12

13
1F01 A1 1F02 B1 2F50 B2 2F51 B2 2F52 B2 2F53 C2 2F54 C2 2F55 C2 2F56 E4 2F57 E4 2F58 B8 2F59 C8 2F60 E8 2F61 F8 3F50 E3 3F51 E2 3F52 E5 3F53 E3 3F54 E4 3F55 E5 3F56 E2 3F57 F2 3F58 F3 3F59 D2 3F60 A7 3F61 B7 3F62 B7 3F63 C8 3F64 C9 3F65 B9 3F66 D7 3F67 D7 3F68 E8 3F69 E8 3F70 E6 3F71 F8 3F72 F8 3F73 F8 6F50 B7 6F51 D2 7F50 B7 7F51 C8 7F52 D3 7F53 E4 7F54 D9 7F55 E3 7F56 F9 7F57 F6 9F07 F6 9F50 B8 9F51 B9 9F52 C9 FF49 A2 FF50 A3 FF51 B3 FF52 C3 FF53 C3 IF50 D2 IF51 E3 IF52 E3 IF53 E4 IF54 E5 IF55 F2 IF56 F3 IF57 E8 IF58 E8 IF59 E6 IF60 F8 IF61 F8 IF62 B8 IF63 B7 IF64 B9 IF65 B7 IF66 B9 IF67 E4 IF68 D7 IF69 D7

TEMPERATURE- & FAN-CONTROL


B

A
FF49 +12V FF50 FF51 FAN1-DRV TACHO1 1 2 3

+3V3

1K0

1F01

3F60

2F58

100n

6F50

+VS

C
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

7F50 LM75ADP 3 OS SDA

3F65 RES

SML-310

2F50

1u0 2F51

100p 2F52

9F50

9F51

1K0

1u0

B
SDA-SET SCL-SET 1F02 1 2 3 +12V FF52 FF53 FAN2-DRV TACHO2 3F62 100R

A0 A1

7 6 5

IF62 IF64 IF66

3F61 100R

IF63 IF65

B
1K0 3F64 RES

1 2

GND

SCL

A2

3F63 RES

9F52

1K0

2F53

1u0 2F54

100p 2F55

C
2F59
owner.

1u0

+3V3

C
100n

+12V 3F66 IF69 3F67 100R IF68

7F51

VDD

LED0 LED1 LED2

1 2 3 5

FAN1-OUT TACHO1-INV

3F59

SCL-SET 100R SDA-SET +12V +12V

6 7

1K0

SCL SDA PCA9533

D
SML-310 6F51

LED3 VSS

TACHO2-INV

F
FAN1-DRV 3F51 10R

+12V

IF50

3F50

7F52 BCP53 IF51 1 3F53 100R IF52

10K

7F54

7F53 BC857BW IF67 3F54 100R IF53 3F55 22K IF54

3F52

10K

TACHO1 TACHO1-INV 3F68 IF58 27K IF57 PDTA114EU

2F60

100n 3F69

RES 3F70

10K

10R

RES

10u

3F56

2F56

1u0 2F57

+3V3 PDTC114EU

10K

+3V3

4 2

E
+12V

+3V3 FAN2-DRV RES 3F57 10R IF55 3 1 RES 7F55 BCP53 IF56 IF59 RES 3F58 100R 7F57 FAN1-OUT

7F56

9F07

RES 3F73

RES

1K0

TACHO2 3F71 IF60 PDTA114EU

FAN-CTRL-1

TACHO2-INV IF61

2F61

100n 3F72

4 2

27K

10K

6
CHN
CLASS_NO

7
SETNAME

9
2 2008-11-21

TEMPERATURE- & FAN-CONTROL

J
2008-10-10 3 NAME Maelegheer Ingrid CHECK

TV543 R2 LDIPNX
SUPERS. DATE 2007-12-04 8
C

8204 000 8933


130 3 A3

ROYAL PHILIPS ELECTRONICS N.V. 2007

10

11

12

13
18310_529_090303.eps 090303

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 104

SSB: FPGA WOW - LVDS In/Out

1
A
TX851A3FG1 100R TX851A+

2
With FPGA
9FG2-1 1 8

3
No FPGA
9FG8-1 1 8 RX51001A-

5 4

5
With FPGA
TXF1A4 3FF4-4 150R 3FF5 180R 5 3FF4-3 3 180R 6 3FF4-2 2 150R 3FF8 180R 3FF4-1 1 180R 3FF6-4 4 3FFB 150R 180R 3FF6-3 3 180R 3FF6-2 2 3FFE 150R 180R 7 3FF6-1 1 180R 8 3FF7-4 4 3FFH 150R 180R 3FF7-3 3 180R 3FF7-2 2 150R 3FFL 180R 3FF7-1 1 180R 3FF9-4 4 3FFP 150R 180R 5 3FF9-3 3 180R 3FF9-2 2 150R 3FFT 180R 3FF9-1 1 180R 3FFA-4 4 3FFW 150R 180R 3FFA-3 3 180R 6 3FFA-2 2 3FE0 150R 180R 7 3FFA-1 1 8 180R 3FFC-4 3FE3 150R 180R 5 5 8 7 6 8 7 6 5 6 5 8 7

10

11

12

6
RES 2F62 4p7

FPGA WOW - LVDS IN/OUT

RX51001ARES 2F63 4p7 RX51001A+ RES 2F64 4p7 RX51001BRES 2F65 4p7 RX51001B+ RES 2F66 4p7 RX51001CRES 2F67 4p7 RX51001C+ RES 2F68 4p7 RX51001CLKRES 2F69 4p7 RX51001CLK+ RES 2F70 4p7 RX51001DRES 2F71 4p7 RX51001D+ RES 2F72 4p7 RX51001ERES 2F85 4p7 RX51001E+ RES 2F73 4p7 RX51002ARES 2F74 4p7 RX51002A+ RES 2F75 4p7 RX51002BRES 2F76 4p7 RX51002B+ RES 2F77 4p7 RX51002C5FG2 RES RES 2F78 4p7 RX51002C+ RES 2F79 4p7 RX51002CLKRES 2FN8 RES 2F80 4p7 RX51002CLK+ RES 2F81 4p7 RX51002DRES 2F82 4p7 RX51002D+ RES 2F83 4p7 RX51002E3FE6 150R RES 2F84 4p7 RX51002E+ +VDISP RES 5FG1 30R 30R RX51002CRX51002C+ RX51002CLKRX51002CLK+ RX51002DRX51002D+ RX51002ERX51002E+ RX51002ARX51002A+ RX51002BRX51002B+ RX51001ARX51001A+ RX51001BRX51001B+ RX51001CRX51001C+ RX51001CLKRX51001CLK+ RX51001DRX51001D+ RX51001ERX51001E+ SCL-DISP 3FH5 100R RES FFL4 SDA-DISP 3FH4 100R RES FFL3

A
B

9FG2-2 2 7 9FG2-3 3 6 3FG2 100R

9FG8-2 7 2 9FG8-3 3 6

RX51001A+

TXF1A+

TX851B-

RX51001B-

TXF1B-

TX851B+ 4

9FG2-4 5 4

9FG8-4 5

RX51001B+

TXF1B+

RES 2FN9

TX851C3FG3 100R

C B
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

TX851C+

9FG3-2 2 7 9FG3-3 3 6 3FG4 100R

9FG9-2 2 7 9FG9-3 3 6

RX51001C+

TXF1C+

10p

9FG3-1 1 8

9FG9-1 1 8

RX51001C-

TXF1C-

B
RES 1F51 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 51 50 FI-RE41S-HF

TX851CLK-

RX51001CLK-

TXF1CLK-

TX851CLK+ 4 TX851D3FG5 100R

9FG3-4 5 4

9FG9-4 5 9FGA-1 1 8

RX51001CLK+

TXF1CLK+

9FG4-1 1 8

RX51001D-

TXF1D-

C
owner.

TX851D+

9FG4-2 2 7 9FG4-3 3 6 3FG6 100R

9FGA-2 2 7 9FGA-3 3 6

RX51001D+

TXF1D+

TX851E-

RX51001E-

TXF1E-

TX851E+

9FG4-4 4 5 4

9FGA-4 5

RX51001E+

TXF1E+

E
TX852A3FG8 100R

9FG5-4 4 5

9FGB-4 4 5

RX51002A-

TXF2A-

D
F

TX852A+

9FG5-3 3 6

9FGB-3 3 6

RX51002A+

TXF2A+

TX852B3FG9 100R

9FG5-2 7 2

9FGB-2 2 7

RX51002B-

TXF2B-

TX852B+ 1 TX852C3FGE 100R

9FG5-1 8 1

9FGB-1 8 9FGC-4 4 5

RX51002B+

TXF2B+

9FG6-4 4 5

RX51002C-

TXF2C-

TX852C+

9FG6-3 3 6 9FG6-2 7 2 100R

9FGC-3 3 6 9FGC-2 2 7

RX51002C+

TXF2C+

TX852CLK3FGA

RX51002CLK-

TXF2CLK-

FFL2

TX852CLK+ 1

9FG6-1 8

9FGC-1 1 8 9FGD-4 4 5

RX51002CLK+

TXF2CLK+

3FGB

100R

TX852D-

9FG7-4 4 5

RX51002D-

TXF2D4

TX852D+

9FG7-3 3 6 9FG7-2 2 7 100R

9FGD-3 3 6 9FGD-2 2 7

RX51002D+

TXF2D+ 3

3FFC-3 180R 6

TO DISPLAY

TX852E3FGC

RX51002E-

TXF2E2

3FFC-2 180R 7

TX852E+ 1

9FG7-1 8

9FGD-1 1 8

RX51002E+

TXF2E+ 1

3FFC-1 180R 8

1F51 B9 2F62 A6 2F63 A6 2F64 A6 2F65 A6 2F66 B6 2F67 B6 2F68 B6 2F69 B6 2F70 C6 2F71 C6 2F72 C6 2F73 D6 2F74 D6 2F75 D6 2F76 E6 2F77 E6 2F78 E6 2F79 E6 2F80 F6 2F81 F6 2F82 F6 2F83 F6 2F84 F6 2F85 C6 2FN8 F8 2FN9 B8 2FNA B8 3FE0 E5 3FE3 F5 3FE6 F5 3FF4-1 A5 3FF4-2 A5 3FF4-3 A5 3FF4-4 A5 3FF5 A5 3FF6-1 B5 3FF6-2 B5 3FF6-3 B5 3FF6-4 B5 3FF7-1 C5 3FF7-2 C5 3FF7-3 C5 3FF7-4 C5 3FF8 A5 3FF9-1 E5 3FF9-2 D5 3FF9-3 D5 3FF9-4 D5 3FFA-1 F5 3FFA-2 E5 3FFA-3 E5 3FFA-4 E5 3FFB B5 3FFC-1 F5 3FFC-2 F5 3FFC-3 F5 3FFC-4 F5 3FFE B5 3FFH C5 3FFL C5 3FFP D5 3FFT D5 3FFW E5 3FG1 A2 3FG2 A2 3FG3 B2 3FG4 B2 3FG5 C2 3FG6 C2 3FG8 D2 3FG9 D2 3FGA E2 3FGB F2 3FGC F2 3FGE E2 3FH4 A8 3FH5 B8 5FG1 E8

5FG2 E8 9FG2-1 A2 9FG2-2 A2 9FG2-3 A2 9FG2-4 A2 9FG3-1 B2 9FG3-2 B2 9FG3-3 B2 9FG3-4 B2 9FG4-1 C2 9FG4-2 C2 9FG4-3 C2 9FG4-4 C2 9FG5-1 E2 9FG5-2 D2 9FG5-3 D2 9FG5-4 D2 9FG6-1 F2 9FG6-2 E2 9FG6-3 E2 9FG6-4 E2 9FG7-1 F2 9FG7-2 F2 9FG7-3 F2 9FG7-4 F2 9FG8-1 A3 9FG8-2 A2 9FG8-3 A3 9FG8-4 A2 9FG9-1 B3 9FG9-2 B2 9FG9-3 B3 9FG9-4 B2 9FGA-1 C3 9FGA-2 C2 9FGA-3 C3 9FGA-4 C2 9FGB-1 E2 9FGB-2 D3 9FGB-3 D2 9FGB-4 D3 9FGC-1 F2 9FGC-2 E3 9FGC-3 E2 9FGC-4 E3 9FGD-1 F2 9FGD-2 F3 9FGD-3 F2 9FGD-4 F3 FFL2 E8 FFL3 A8 FFL4 B8

13

RES 2FNA

10p

100n

1
J

CHN
CLASS_NO

SETNAME

9
2 2008-11-21

FPGA WOW - LVDS IN/OUT

TV543 R2 LDIPNX
2008-10-10 3 SUPERS. DATE 2007-12-04 8
C

8204 000 8933


130 4 A3

NAME Maelegheer Ingrid CHECK

ROYAL PHILIPS ELECTRONICS N.V. 2007

10

11

12

13
18310_530_090303.eps 090303

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 105

SSB: FPGA WOW - Power & Control


1 A 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
1F00 E12 2FH0 B5 2FH1 B5 2FH2 A3 2FH3 A3 2FH4 A3 2FH5 A4 2FH6 E2 2FH7 E2 2FH8 E3 2FH9 E3 2FHA A3 2FHB C3 2FHC B3 2FHD B4 2FHE B4 2FHF B4 2FHG B4 2FHH B4 2FHJ B5 2FHK B5 2FHL B2 2FHM B2 2FHN C2 2FHP C3 2FHR C3 2FHS C3 2FHT B3 2FHV C3 2FHW D3 2FHZ D3 2FJ0 D3 2FJ1 D2 2FJ2 D2 2FJ3 F11 2FJ4 F11 2FJ5 F11 2FJ6 F11 2FJ7 D12 2FJ8 C2 2FJ9 C2 2FJA C3 2FJB C3 2FJC C3 2FJD F12 2FJJ B8 2FJK B7 2FJP B3 3FH0 H2 3FH1 H2 3FH2 H2 3FH3 H3 3FH6 H3 3FH7 H3 3FH8 D9 3FH9-1 D9 3FH9-2 D9 3FH9-3 E9 3FHB-1 E10 3FHB-2 E10 3FHB-3 E10 3FHB-4 E10 3FHG C9 3FHJ C12 3FHK C12 3FHL B11 3FHM B12 5FH0 A2 5FH1 B2 5FH2 C2 5FH3 D2 5FH4 E2 6FH0 I2 6FH1 I2 6FH2 I2 6FH3 I3 6FH6 I3 6FH7 I3 6FH8 B12 7FH0 B8 7FH2 C12 9FH0 D11 CFH0 B2 CFH1 D6 FFH0 A3 FFH1 B3 FFH2 B3 FFH3 C3 FFH4 D3 FFH5 E10 FFH6 E10 FFH7 E10 FFH8 E10 FFH9 E10 FFHA E3 FFHM B9 FFHN B9 FFHP B9 FFHR C9 FFHS C9 FFHT C11 IFH4 A7

20 A

10

11

12

13

FPGA WOW - POWER & CONTROL


B

A
5FH0 30R 4u7

FFH0 +1V2-PLL 2FHA 100n 2FH2 2FH3 2FH4 2FH5 100n 100n 100n

+3V3

A
+2V5in-FPGA RES 2FJJ +3V3

IFH4

2FJK

2FHL 330u 6.3V

3FHM

+1V2-PNX85XX

CFH0 2FHM 100u 4V

FFH1 +1V2-FPGA 2FHG 10n 2FHC 10n 2FHD 10n 2FHH 10n RES 2FHT 4u7 2FHE 10n 2FHK 10n 2FHF 10n 2FH0 10n 2FH1 2FHJ 10n 2FJP

100n

100n

4u7

10n

B
D
5FH1 +3V3 30R

VCC 2 Q

S FFH2 +3V3-FPGA 2FHN 100n 2FHR 100n 2FHP 100n 2FHV 100n 2FHS 2FHB 100n W HOLD VSS 4

6FH8

nCSO

10K

1 3 7

3FHL

FFHM

SML-310

16M FLASH

D C

5 6

FFHP ASDO FFHN DCLK

1K0

7FH0 M25P16

4u7

CONF-DONE FFHT FFHS

3FHK 100K RES 100K 3FHJ

7FH2 BC847BW

C
5FH2 +2V5 30R 100n 2FJC 100n 2FJA 100n 2FJB 2FJ8 4u7 2FJ9 100n FFH3 +2V5out-FPGA

3FHG 47R

FFHR DATA0 +2V5 +2V5

5FH3 +2V5 30R

FFH4 +2V5in-FPGA 1K0 3FH9-3 3FH9-1 100n 2FHW 100n 2FHZ RES 3FH8 100n 2FJ0 2FJ2 100n 4u7 2FJ1

1K0

+1V8-PNX85XX

CFH1

+1V8-PNX5100 TCK TDO 3FHB-1 1 8 100R 4 3FHB-4 5 100R 2 3FHB-2 7 100R FFH5 FFH6 FFH7

1K0

2FJ7

RES 10n

9FH0 RES

+2V5

+2V5

+2V5

1F00 1 2 3 4 5 6 7 8 9 10 FFH9 RES 100p 2FJ5 RES 100p 2FJ4 RES 100p RES 100p 2FJ6 RES 10n 2FJD 2FJ3 5-147279-2

G
5FH4 +2V5 2FH6 100n 2FH8 100n 2FH7 100n 2FH9 100n FFHA +2V5-PLL 30R

TMS

E
H

FOR DEBUG

TDI 3FH9-4

3FHB-3 100R

FFH8

FOR DEBUG
I

1K0

is prohibited without the written consent of the copyright

CON27

All rights reserved. Reproduction in whole or in parts

CON26

G
K

CON23

CON22

CON21
owner.

H
L

CON20 3FH0 3FH2 3FH3 3FH1 3FH6 3FH7 470R 470R 470R 470R 470R 470R

LTST-C190KGKT

LTST-C190KGKT

LTST-C190KGKT

LTST-C190KGKT

LTST-C190KGKT

LTST-C190KGKT

6FH3

6FH0

6FH1

6FH2

6FH6

6FH7

10

11

12

13

O
CHN
CLASS_NO

O
SETNAME
2 2008-11-21

FPGA WOW - POWER & CONTROL

P
2008-10-10 3 NAME Maelegheer Ingrid CHECK

TV543 R2 LDIPNX
SUPERS. DATE 2007-12-04 8
C

8204 000 8933


P
130 5 A2 ROYAL PHILIPS ELECTRONICS N.V. 2007

10

11

12

13

14

15

16

17

18

19

20
18310_531_090303.eps 090303

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 106

SSB: FPGA WOW - DDR

10

11

12

13

FPGA WOW - DDR A


100n 2FLP 2FL0 100n 2FL1 100n +2V5-DDR1 +2V5-DDR1 +2V5-DDR1 +2V5-DDR1

C
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

18

33

15

55

EDD1216AJTA-5B-E MM1-A0 MM1-A1 MM1-A2 MM1-A3 MM1-A4 MM1-A5 MM1-A6 MM1-A7 MM1-A8 MM1-A9 MM1-A10 MM1-A11 29 30 31 32 35 36 37 38 39 40 28 41 0 1 2 3 4 5 6 7 8 9 10 11 AP 0 BA 1 L DM U VREF CLK CLK CKE CS RAS CAS WE

61

7FL0 1

VDD

100n 2FLC

3FLN

560R

2FLA

1u0

1u0

NC

560R

2FLB

3FLL

2FL7

2FL9

100p

100p

DDR SDRAM 8Mx16


A

VDDQ

14 17 19 25 43 50 53 42 2 4 5 7 8 10 11 13 54 56 57 59 60 62 63 65 16 51 DQ1(0) DQ1(1) DQ1(2) DQ1(3) DQ1(4) DQ1(5) DQ1(6) DQ1(7) DQ1(8) DQ1(9) DQ1(10) DQ1(11) DQ1(12) DQ1(13) DQ1(14) DQ1(15) DQS10 DQS11 DQ1(0) DQ1(1) DQ1(2) DQ1(3) DQ1(4) DQ1(5) DQ1(6) DQ1(7) DQ1(8) DQ1(9) DQ1(10) DQ1(11) DQ1(12) DQ1(13) DQ1(14) DQ1(15) DQS10 DQS11 3FL0 3FL1 3FL2 3FL3 3FL4 3FL5 3FL6 3FL7 3FL8 3FL9 3FLA 3FLB 3FLC 3FLD 3FLE 3FLF 3FLG 3FLH 22R 22R 22R 22R 22R 22R 22R 22R 22R 22R 22R 22R 22R 22R 22R 22R 22R 22R

FFL1 VREF-DDR1

FFL0 VREF-FPGA1

MM1-A12 MM1-D0 MM1-D1 MM1-D2 MM1-D3 MM1-D4 MM1-D5 MM1-D6 MM1-D7 MM1-D8 MM1-D9 MM1-D10 MM1-D11 MM1-D12 MM1-D13 MM1-D14 MM1-D15 MM1-DQS0 MM1-DQS1

owner.

MM1-BA0 MM1-BA1

26 27 20 47 2FL6

C
VREF-DDR1 MM1-CLK220R 3FLJ 100n

49 46 45 44 24 23 22 21

22u 16V

330u 6.3V

2FLE

100n

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 L DQS U

5FL0 +2V5 2FLD 120R 5FL1 RES 120R

IFL1 +2V5-DDR1 100n 2FLM 2FLH 2FLN 100n 2FLK 100n 2FLL 2FLJ 100n 100n

MM1-CLK+

MM1-CKE MM1-CS0 MM1-RAS MM1-CAS MM1-WE

VSS 34 48 66 12 6

VSSQ

2FL0 A1 2FL1 A1 2FL2 B3 2FL3 B4 2FL4 B4 2FL5 B5 2FL6 C1 2FL7 B6 2FL9 B6 2FLA B8 2FLB B8 2FLC B8 2FLD C6 2FLE C6 2FLF D7 2FLH C7 2FLJ C8 2FLK C8 2FLL C8 2FLM C8 2FLN C9 2FLP A1 2FLR B4 2FLS B4 3FL0 B4 3FL1 B4 3FL2 C4 3FL3 C4 3FL4 C4 3FL5 C4 3FL6 C4 3FL7 C4 3FL8 C4 3FL9 C4 3FLA C4 3FLB C4 3FLC C4 3FLD C4 3FLE C4 3FLF C4 3FLG D4 3FLH D4 3FLJ D1 3FLK B6 3FLL B6 3FLM B9 3FLN B9 5FL0 C7 5FL1 C7 7FL0 B2 FFL0 B8 FFL1 B7 IFL1 C7

3FLM

560R

100n 2FL3

100n 2FL4

100n 2FLR

2FL2

100n 2FLS

100n 2FL5

560R

3FLK

10u

2FLF

100n

RES

58

64

52

E
H

E
H

1
I

9
I

CHN
CLASS_NO

SETNAME
2 2008-11-21

FPGA WOW - DDR

J
2008-10-10 3 NAME Maelegheer Ingrid CHECK

TV543 R2 LDIPNX
SUPERS. DATE 2007-12-04 8
C

8204 000 8933


130 6 A3

ROYAL PHILIPS ELECTRONICS N.V. 2007

10

11

12

13
18310_532_090303.eps 090303

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 107

SSB: FPGA WOW - I/O Banks


1 A 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 A

2F43 E7 2FN0 D9 2FN1 D9

2FN2 D9 2FN3 D9 2FN5 D12

2FN6 D13 2FN7 D13 3F74-2 B4

3F74-3 B2 3F74-4 B5 3FN1 A1

3FN2 B1 3FN3 B1 3FNF E7

3FNG E7 7FN0-1 A3 7FN0-10 F11

7FN0-2 A6 7FN0-3 A10 7FN0-4 A13

7FN0-5 C1 7FN0-6 C5 7FN0-7 C10

7FN0-8 C13 7FN0-9 E4 9FN0 D4

9FN1 D4 9FN4 E4 9FN6 E4

9FN7 E4 9FN8 D5 9FN9 D7

9FNA D7 9FNB D7 9FNC E7

9FND C9 FF18 A1 FF19 B1

FF48 B1 IFN0 A2 IFN1 A4

IFN2 B8 IFN3 B8 IFN4 B9

IFN5 B9 IFN6 B11 IFN7 B11

IFN8 B13 IFN9 B13 IFNA B15

IFNB B15 IFNC D13 IFND E11

IFNF D7 IFNG D5 IFNH D3

IFNJ D3 IFNK D4 IFNL D4

IFNM D5 IFNN D5

10

11

12

13

14

15

FPGA WOW - IO-BANKS


+1V2-PLL +2V5-PLL +1V2-PLL P4 +2V5-PLL 7FN0-3 EP3C40F324C7N N5

7FN0-1 EP3C40F324C7N

A
F2 IFN0 3FN1 1K0 FF18 nCE nCONFIG nSTATUS nCE nCONFIG DCLK nSTATUS TCK TDI TDO TMS F1 K6 H5 H4 G5 J1 J6 J5 J2 C2 F3 H6 H1

VCCD_PLL3

VCCA3

7FN0-2 EP3C40F324C7N

C
7FN0-4 EP3C40F324C7N

E4

F5

BANK1
CLK0|CLK_0P IO_B2|L1P IO_B1|L1N IO_C1|L3N CE IO_C3|L4P|RESET_ CONFIG IO_D3|L7P DCLK IO_D2|L8P STATUS IO_D1|L8N|DATA1|ASDO TCK IO_E2|L10P|FLASH_CE_|CSO_ TDI IO_E1|L10N TDO IO_G2|L20P TMS IO_G1|L20N IO_H2 IO_C2|VREFB1N0 IO_H3|DATA0 IO_F3|VREFB1N1 IO_H6|VREFB1N2 IO_H1|VREFB1N3 CLK1|CLK_0N GNDA3 E5 IFN1 B2 B1 C1 C3 D3 D2 3F74-2 D1 4 5 E2 47R E1 2 G2 G1 H2 H3 N2 N1 L6 M3 R1 R5 TXF1A+ TXF1ADATA0 TXF1B+ K2 K1 K5 L5 L2

VCCD_PLL1

VCCA1

BANK2
CLK2|CLK_1P CLK3|CLK_1N IO_L6|VREFB2N0 IO_M3|VREFB2N1 IO_R1|VREFB2N2 IO_R5|VREFB2N3 IO_K2|L26P IO_K1|L26N IO_K5|L28P IO_L5|L28N IO_L2|L32P GNDA1 P5 IO_L1|L32N IO_L4|L33P IO_L3|L33N IO_M2|L34P IO_M1|L34N IO_P2|L44P IO_P1|L44N IO_R2|L45P IO_T3|L52P IO_R3|L52N IO_M5 IO_R4 IO_T2|RUP1 IO_T1|RDN1 L1 L4 L3 M2 M1 P2 P1 R2 T3 R3 M5 R4 T2 T1 TXF1BTXF1C+ TXF1CTXF1CLK+ TXF1CLKTXF1D+ TXF1DTXF1E+ TXF1EU9 V9 P8 P7 T6 T4 IFN4 IFN5 TXF2A+ TXF2ATXF2B+ TXF2BU1 V1 P6 U3 V3 U4 V4 CLK15|CLK_6P CLK14|CLK_6N

BANK3
IO_U5|B18P IO_V5|B18N IO_R8|B21P IO_T8|B21N IO_P9|B23N IO_U6|B24P IO_V6|B24N IO_U7|B26P IO_V7|B26N IO_U8|B27P IO_V8|B27N IO_U2|PLL1_CLKOUTP IO_V2|PLL1_CLKOUTN U5 V5 R8 T8 P9 U6 V6 U7 V7 U8 V8 U2 V2 TXF2C+ TXF2CTX852CLK+ TX852CLKTXF2CLK+ TXF2CLKTXF2D+ TXF2DTXF2E+ TXF2EIFN6 IFN7 U10 V10 P13 U16 T11 V12 U11 V11 U12 U13 V13 P10 P11 CLK13|CLK_7P

A
BANK4
IO_U14|B34P IO_V14|B34N IO_U15|B35P IO_V15|B35N IO_R11|B36N IO_V16|B44N IO_U17|B47P IO_V17|B47N IO_R13|B48N IO_P12 IO_T13|RUP2 IO_T14|RDN2 IO_U18|PLL4_CLKOUTP IO_V18|PLL4_CLKOUTN U14 V14 U15 V15 R11 V16 U17 V17 R13 P12 T13 T14 U18 V18 TX852C+ TX852CTX852B+ TX852B-

3FN2 +3V3-FPGA +3V3-FPGA 10K FF48

3F74-3 3 47R 6

3FN3 10K FF19

3F74-4 7 47R

ASDO nCSO

IO_P8|VREFB3N0 IO_P7|VREFB3N1 IO_T6|VREFB3N2 IO_T4|VREFB3N3 IO_U1|B1P IO_V1|B1N IO_P6|B6P IO_U3|B16P IO_V3|B16N IO_U4|B17P IO_V4|B17N

CLK12|CLK_7N IO_P13|VREFB4N0 IO_U16|VREFB4N1 IO_T11|VREFB4N2 IO_V12|VREFB4N3 IO_U11|B28P IO_V11|B28N IO_U12|B29P IO_U13|B32P IO_V13|B32N IO_P10|B33P IO_P11|B33N

TX852A+ TX852A-

B
E

TX852E+ TX852ETX852D+ TX852DIFN8 IFN9

B
IFNA IFNB

IFN2 IFN3

C
+1V2-PLL +2V5-PLL +1V2-PLL 7FN0-5 EP3C40F324C7N N14 P15 +2V5-PLL CLK-OUT2-PNX5100 E15 7FN0-6 EP3C40F324C7N +3V3-FPGA IO_L16|R33P IO_M17|R33N IO_L14|R36P IO_L15|R36N IO_L13|R38P IO_M14|R38N IO_P17|R42P IO_P18|R42N IO_T17|R54N IO_N15|R55P IO_T18 IO_T16|RUP3 IO_R16|RDN3 L16 M17 L14 L15 L13 M14 P17 P18 T17 N15 T18 T16 R16 IFNH IFNJ TX851A+ TX851ATX851D+ TX851DTX851E+ TX851EIFNG 9FN0 RES CLK-OUT2-PNX5100 CLK-OUT-PNX5100 9FN1 CONF-DONE IFNK IFNL IFNM IFNN BACKLIGHT-OUT2 CON23 CON20 9FN8 F17 F18 K14 K13 J18 J17 J14 B17 H15 H18 J13 CLK4|CLK_2P F14 9FND RES 7FN0-7 EP3C40F324C7N

VCCD_PLL4

VCCA4

7FN0-8 EP3C40F324C7N

1n0

1n0

1n0

1n0

BANK5
TX851CLK+ TX851CLKN17 N18 L18 N16 R17 R18 K17 K18 L17 M18 CLK6|CLK_3P CLK7|CLK_3N IO_L18|VREFB5N0 IO_N16|VREFB5N1 IO_R17|VREFB5N2 IO_R18|VREFB5N3 IO_K17|R29P IO_K18|R29N IO_L17|R32P|DEV_CLR_ IO_M18|R32N|DEV_OE GNDA4 P14

VCCD_PLL2

VCCA2

BANK6
IFNF IO_B18|R4N|PADD20 IO_C17|R5P|PADD21 CLK5|CLK_2N IO_C18|R5N|PADD22 IO_G14|R7N|PADD23 CONF_DONE IO_H13|R8P|RDY IO_H14|R8N|AVD_ IO_D17|R12P|OE_ MSEL0 IO_D18|R12N|WE_ MSEL1 MSEL2 IO_H16|R23N IO_E17|R24P|CLKUSR MSEL3 IO_E18|R24N|CEO_ IO_B17|VREFB6N0 IO_G17|R27P|CRC_ERROR IO_H15|VREFB6N1 IO_G18|R27N|INIT_DONE IO_H18|VREFB6N2 IO_H17|R28P IO_J13|VREFB6N3 GNDA2 2F43 F15 B18 C17 C18 G14 H13 H14 D17 D18 H16 E17 E18 G17 G18 H17 CON27 SCL-AMBI-3V3 2FN0 B10 1n0 A10 A17 D12 C12 E11 D10 C10 B11 A11 B12 A12 B13 A13 CLK9|CLK_5P CLK8|CLK_5N IO_A17|VREFB7N0 IO_D12|VREFB7N1 IO_C12|VREFB7N2 IO_E11|VREFB7N3 9FN9 RES

BANK7
IO_B14|T36P|PADD6 IO_A14|T36N|PADD5 IO_B15|T37P|PADD4 IO_A15|T38N|PADD3 IO_B16|T41P|PADD2 IO_A16|T41N|PADD1 IO_E12|T45P|PADD0 IO_A18|T48P IO_D16|T49P IO_C16|T49N IO_E14|RUP4 IO_E13|RDN4 IO_D14|PLL2_CLKOUTP IO_C14|PLL2_CLKOUTN B14 A14 B15 A15 B16 A16 E12 A18 D16 C16 E14 E13 D14 C14 1n0 IFNC B9 1n0 A9 E9 C7 D7 E6 D5 B3 A3 E7 B4 A4 E8 CLK11|CLK_4P CLK10|CLK_4N IO_E9|VREFB8N0 IO_C7|VREFB8N1 IO_D7|VREFB8N2 IO_E6|VREFB8N3 MM1-D4 MM1-D3 MM1-RAS MM1-D5 MM1-D6 MM1-CAS MM1-D0 MM1-D7 MM1-WE MM1-BA0 MM1-BA1 IFND

BANK8
IO_C5|T11P|DATA5 IO_B5|T16P|DATA13 IO_A5|T16N|DATA14 IO_B6|T18P|DATA15 IO_A6|T18N|PADD19 IO_B7|T19P|DATA4 IO_A7|T19N|PADD18 IO_B8|T20P|DATA3 IO_A8|T20N|DATA2 IO_D9|T24P|PADD17 IO_C9|T24N|PADD16 IO_E10|T25P|PADD15 IO_A2|PLL3_CLKOUTP IO_A1|PLL3_CLKOUTN C5 B5 A5 B6 A6 B7 A7 B8 A8 D9 C9 E10 A2 A1 MM1-D9 MM1-A9 MM1-DQS1 MM1-A7 MM1-D10 MM1-D11 MM1-D12 MM1-A5 MM1-D13 MM1-DQS0 MM1-D14 MM1-A4 MM1-CLK+ MM1-CLK-

2FN2

2FN3

2FN6

TX851B+

TX851B+ TX851BTX851C+ TX851C-

MSEL0 MSEL1 MSEL2 MSEL3 9FN4 9FN6 9FN7

1n0

VREF-FPGA1 VREF-FPGA1 CON26 VREF-FPGA1 9FNA RES SDA-AMBI-3V3 VREF-FPGA1 CON22 9FNB RES BACKLIGHT-OUT MM1-A2 RES BACKLIGHT-CONTROL-FPGA-IN MM1-A3 9FNC 3FNF MM1-A0 SDA-SSB 3FNG 100R MM1-A1 SCL-SSB 100R CON21 MM1-A10 MM1-D1 MM1-D2 MM1-CS0

VREF-FPGA1 VREF-FPGA1 VREF-FPGA1 VREF-FPGA1 MM1-A8 MM1-A12 MM1-CKE MM1-A6 MM1-A11 MM1-D8 MM1-D15

2FN7

2FN1

2FN5

D
H

IO_D10|T27P|PADD14 IO_C10|T27N|PADD13 IO_B11|T29P|PADD12 IO_A11|T29N|PADD11 IO_B12|T31P|PADD10 IO_A12|T31N|PADD9 IO_B13|T35P|PADD8 IO_A13|T35N|PADD7

IO_D5|T3P|DATA12 IO_B3|T4P|DATA11 IO_A3|T4N|DATA10 IO_E7|T5N|DATA9 IO_B4|T6P|DATA8 IO_A4|T7N|DATA7 IO_E8|T8P|DATA6

7FN0-9 EP3C40F324C7N
is prohibited without the written consent of the copyright All rights reserved. Reproduction in whole or in parts

7FN0-10 EP3C40F324C7N

VCC

K
owner.

G
L

+1V2-FPGA +1V2-FPGA +1V2-FPGA +1V2-FPGA +1V2-FPGA +1V2-FPGA +1V2-FPGA +1V2-FPGA +1V2-FPGA +1V2-FPGA +1V2-FPGA +1V2-FPGA +1V2-FPGA +1V2-FPGA +1V2-FPGA +1V2-FPGA +1V2-FPGA +1V2-FPGA +1V2-FPGA +1V2-FPGA +1V2-FPGA +1V2-FPGA +1V2-FPGA +1V2-FPGA +1V2-FPGA +1V2-FPGA +1V2-FPGA +1V2-FPGA

F10 F12 F6 F8 G10 G11 G12 G13 G7 G8 H12 H7 J12 J7 K12 K7 L12 L7 M11 M12 M6 M7 M8 M9 N11 N13 N7 N9

VCCIO1

F4 G4 J4 K4 M4 N4 R6 R7 R9 R10 R12 R14 K15 M15 R15 F16 G15 J15 D11 D13 D15 D4 D6 D8

GND
+3V3-FPGA +3V3-FPGA +3V3-FPGA +2V5out-FPGA +2V5out-FPGA +2V5out-FPGA +2V5out-FPGA +2V5out-FPGA +2V5out-FPGA +2V5in-FPGA +2V5in-FPGA +2V5in-FPGA +2V5in-FPGA +2V5in-FPGA +2V5in-FPGA +3V3-FPGA +3V3-FPGA +3V3-FPGA +2V5-DDR1 +2V5-DDR1 +2V5-DDR1 +2V5-DDR1 +2V5-DDR1 +2V5-DDR1 C4 C6 C8 C11 C13 C15 E3 E16 F7 F9 F11 F13 G3 G6 G9 G16 H8 H9 H10 H11 J3 J8 J9 J10 J11 J16 K3 K8 K9 K10 K11 K16 L8 L9 L10 L11 M10 M13 M16 N3 N6 N8 N10 N12 P3 P16 T5 T7 T9 T10 T12 T15

VCCINT

VCCIO2

GND

GND

VCCIO3 VCCINT

GND

GND

VCCIO4 VCCINT VCCIO5

GND

GND

G
L

VCCINT VCCIO6

GND

GND

VCCINT

VCCIO7

VCCIO8

10

11

12

13

14

15

O
CHN
CLASS_NO

O
SETNAME
2 2008-11-21

FPGA WOW - IO-BANKS

P
2008-10-10 3 NAME Maelegheer Ingrid CHECK

TV543 R2 LDIPNX
SUPERS. DATE 2007-12-06 8
C

8204 000 8933


P
130 7 A2 ROYAL PHILIPS ELECTRONICS N.V. 2007

10

11

12

13

14

15

16

17

18

19

20
18310_533_090303.eps 090303

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 108

SSB: CI: PCMCIA Connector

1
1P00-A B1 1P00-B B5 2P15 A8 2P16 C8 2P40 A2 3P09 A2

2
3P10-1 A6 3P10-2 A6 3P10-4 A6 3P11 C7 3P12 A6 3P13-1 A6

3
3P13-2 A6 3P13-3 A6 3P20 D2

4
3P24 D6 3P25 E6 3P26-1 E6 3P26-2 E6 3P26-3 E6 3P26-4 E6

5
3P27-1 E6 3P27-2 E6 3P27-3 E6 3P27-4 E6 3P80-1 B9 3P80-2 B9

6
3P80-3 B9 3P80-4 B9 3P81 B9 3P82-1 D9 3P82-2 D9 3P82-3 D9

7
3P82-4 D9 3P83-3 D9 3P83-4 D9

8
3P84-1 E8 3P84-2 E8 3P84-3 E8 3P84-4 E8 3P85-1 E8 3P85-2 E8

9
3P85-3 E8 3P85-4 E8 3P86 E8 3P87 E8 3P88 E8 7P15 A8

10
7P16 C8 FP04 A2 FP05 D6 IP00 A6 IP01 A6 IP02 A6

11
IP03 A6 IP04 A6 IP05 A6 IP08 D2 IP09 C9 IP18 D2

12

13

5
+3V3 PCMCIA-VCC-VPP

6
IP00 IP01

10

CI : PCMCIA CONNECTOR
5

A
3P09 +5V +T 0R4 FP04 PCMCIA-VCC-VPP

4 10K 3P10-2 7 2 10K 8 3P10-1 1 10K RES 3P12

3P10-4

CA-INPACK CA-WAIT MOCLK_VS2

B
+3V3

IP02

IRQ-CA 2P15 100n

C
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

2P40 ROW_A 1P00-A GND1 1 D3 2 D4 3 D5 4 D6 5 D7 6 CE1 7 A10 8 OE 9 A11 10 A9 11 A8 12 A13 13 A14 14 WE|P 15 RDY|BSY 16 VCC1 17 VPP1 18 A16 19 A15 20 A12 21 A7 22 A6 23 A5 24 A4 25 A3 26 A2 27 A1 28 A0 29 D0 30 D1 31 D2 32 WP|IOIS16 33 GND2 34 69 70 22u

CABLE CARD INTERFACE


PCMCIA-D3 PCMCIA-D4 PCMCIA-D5 PCMCIA-D6 PCMCIA-D7 CA-CE1 PCMCIA-A10 CA-OE PCMCIA-A11 PCMCIA-A9 PCMCIA-A8 PCMCIA-A13 PCMCIA-A14 CA-WE IRQ-CA

PCMCIA-VCC-VPP CA-MIVAL CA-MICLK PCMCIA-A12 PCMCIA-A7 PCMCIA-A6 PCMCIA-A5 PCMCIA-A4 PCMCIA-A3 PCMCIA-A2 PCMCIA-A1 PCMCIA-A0 PCMCIA-D0 PCMCIA-D1 PCMCIA-D2 3P20 IP18 10K IP08

D
G

PCMCIA-VCC-VPP

IP03 10K CA-CD1 8 3P13-1 1 10K IP04 CA-CD2 6 3P13-3 3 10K IP05 3P13-2 CA-VS1 7 2 10K ROW_B 1P00-B GND3 35 CD1 CA-CD1 36 D11 MDO3 37 D12 MDO4 38 D13 MDO5 39 D14 MDO6 40 D15 MDO7 41 CE2 CA-CE2 42 VS1 CA-VS1 43 IORD CA-IORD 44 IOWR CA-IOWR 45 A17 CA-MISTRT 46 A18 CA-MDI0 47 A19 CA-MDI1 48 A20 CA-MDI2 49 A21 CA-MDI3 50 VCC2 51 PCMCIA-VCC-VPP VPP2 52 A22 CA-MDI4 53 A23 CA-MDI5 54 A24 CA-MDI6 55 A25 CA-MDI7 56 VS2 MOCLK_VS2 57 RESET CA-RST 58 WAIT CA-WAIT 59 INPACK CA-INPACK 60 REG CA-REG 61 BVD2|SPKR MOVAL 62 BVD1|STSCHG MOSTRT 63 D8 MDO0 64 D9 MDO1 65 D10 MDO2 66 CD2 CA-CD2 67 GND4 68 FP05 71 72

A
7P15 74LVC245A 1 19 2 2 3 4 5 6 7 8 9 4 3P80-4 47R 3 3P80-2 47R 1 3P81 47R CA-MDO3 3P80-3 47R 3P80-1 47R CA-MDO4 CA-MDO6 CA-MDO5 CA-MDO7

MDO3 MDO4 MDO6 MDO5 MDO7

18 17 16 15 14 13 12 11

20 3EN1 3EN2 G3

+3V3

owner.

10

E
2P16 100n

CA-RST

3P11 100K 3EN1 3EN2 G3 18 17 16 15 14 13 12 11 10 1 2

7P16 74LVC245A 1 19 IP09 2 3 4 5 6 7 8 9 4 3P82-4 47R 3 3P82-2 47R 1 3P83-4 47R 3 CA-MOCLK_VS2 3P82-3 47R 3P82-1 47R 3P83-3 47R CA-MDO0 CA-MDO2 CA-MDO1 CA-MOVAL CA-MOSTRT

20

MOCLK_VS2 MDO0 MDO2 MDO1 MOVAL MOSTRT

2 4

D
G

3P24 3P25 3 2 10K

MOSTRT MOVAL MDO0 MDO1 MDO2 MDO3 MDO4 MDO5 MDO6 MDO7 MOCLK_VS2 3P87 47R MDO3 MDO4 MDO5 MDO6 MDO7 MDO1 MDO2 MDO0 MOVAL MOSTRT

3P26-310K 10K 3P26-2 10K 3P26-1 10K 3P26-4 10K 3P27-4 10K 3P27-3 10K 3P27-2 10K 3P27-1 10K

RESERVED
5 8 3P84-4 47R 6 3P84-1 47R 7 3P88 47R 7 3P85-3 47R 5 3P85-1 47R 3P84-3 47R 3P84-2 47R 3P85-2 47R 3P85-4 47R 3P86 47R CA-MDO3 CA-MDO4 CA-MDO5 CA-MDO6 CA-MDO7 CA-MDO1 CA-MDO2 CA-MDO0 CA-MOVAL CA-MOSTRT

4 4 3 2 1

6 8

CA-MOCLK_VS2

1
1X06 EMC HOLE

2
1X05 REF EMC HOLE

6
CHN
CLASS_NO

7
SETNAME

8
UFD2K8

10
2 2008-11-21

J
2008-10-10 3 NAME Maelegheer Ingrid

DIGI i/O TV543 R2 LDIPNX


SUPERS. DATE 2007-10-18 8
C

8204 000 8934


130 1 A3

CHECK

ROYAL PHILIPS ELECTRONICS N.V. 2007

10

11

12

13
18310_534_090303.eps 090520

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 109

SSB: Audio In HDMI

10

11

12

13

2 AUDIO IN HDMI

A
+12V

BZX384-C

C
6P01
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

B
D

YKB11-3004 2 1P0A 1

FP02

3P05 1K0 V_NOM 1P9A RES 3P06

IP06 AUDIO-IN4-L

1P0A B2 1P0B D2 1P9A B3 1P9B D3 2P06 B2 2P07 B3 2P08 B4 2P09 D2 2P10 D3 2P11 D4 3P05 B3 3P06 B4 3P07 D3 3P08 D4 6P01 B3 6P02 D3 FP01 D2 FP02 B2 FP24 D2 IP06 B4 IP07 D4

RES 2P07

100n

100K

2P06

RES 2P08

100p

1n0

+12V
owner.

C
E
BZX384-C 6P02 2P10 100n

C
E

YKB11-3004 2

FP01 FP24 V_NOM 1P9B 2P09 1n0

3P07 1K0 RES 3P08

IP07 AUDIO-IN4-R

100K

RES 2P11

100p

1P0B 1

E
H

E
H

I
CHN
CLASS_NO

I
SETNAME
2 2008-11-21

UFD2K8
J
2008-10-10 3 SUPERS. DATE 2007-10-18 8
C

DIGI I/O TV543 R2 LDIPNX


NAME Maelegheer Ingrid CHECK

8204 000 8934


130 2 A3

ROYAL PHILIPS ELECTRONICS N.V. 2005

10

11

12

13
18310_535_090303.eps 090303

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 110

SSB: USB Connector

Personal Notes:

1P07 C4 1P10 C2 2P17 A1

2P24 B2 2P27 A1 2P30 A1

2P31 A1 3P16 A2 3P17 A2

3P18 A2 3P19 A3 3P21 A3

3P23 A4 3P55 A4 3P56 A4

3P59 A2 3P60 B2 3P62 B2

5P07 A2 9P21 C3 9P22 C3

FP27 C3 FP28 C3 FP29 C3

FP2A C3 FP45 B1 IP12 A2

IP13 C2 IP19 C2

1
C
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

2 USB CONNECTOR
+5V +5V 180R 180R 180R RES RES 3P16 RES 3P17 3P18

4
C

100R

100R 3P23

100R 3P55

100R

100R RES

3P19

3P21

3P56

A
D
220u 16V 330u 10V 2P17 220u 16V 2P31 2P27 2P30 22u 3P59 +T 0R4 IP12 5P07 220R
owner.

A
+3V3

3P60

56K

47u 6.3V

USB-OC

FP45

2P24

B
USB CONNECTOR

3P62

100K

1P07 USB20-DM USB20-DP FP27 FP28 FP29 FP2A 5 1P10 1 2 3 4 5 IP13 IP19 6 7 9P21 9P22 6 1 2 3 4

C
G

C
G

292303-4

502382-0570

1
H

I
CHN
CLASS_NO

I
SETNAME
2 2008-11-21

DIGI I/O UFD2K8


J
2008-10-10 3 SUPERS. DATE 2007-10-18 8
C

TV 543 R2 LDIPNX
NAME Maelegheer Ingrid CHECK

8204 000 8934


130 3 A4

ROYAL PHILIPS ELECTRONICS N.V. 2007

6
18310_536_090303.eps 090303

10000_012_090121.eps 090121

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 111

SSB: HDMI
1 A 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
1P02 E1 1P03 C1 1P04 A1 1P05 H1 2P03 C6 2P05 C10 2P28 H13 2P32 H13 2P33 I12 2P34 D12 2P35 D12 2P36 D10 2P37 D10 2P38 D9 2P39 D9 2P41 D9 2P42 D9 2P43 D12 2P44 C10 2P45 C11 2P46 B10 2P47 C10 2P48 A5 2P49 A6 2P50 D12 2P51 D12 2P52 D13 2P53 D13 2P54 D13 2P55 D13 2P56 F12 2P57 F12 2P58 G12 2P59 G12 3P14 F13 3P34 E14 3P36 F14 3P38 H6 3P43 E9 3P47 H14 3P53 H5 3P58 B4 3P61 B4 3P63 D4 3P64 D4 3P65 I4 3P66 I4 3P67 F3 3P68 G3 3P75 G5 3P76 E9 3P77 E9 5P08 C12 5P11 B10 5P12 C10 5P13 C10 5P14 C10 5P15 H13 6P03 G13 7P01 A6 7P02 D10 7P12 H5 7P32 G6 9P0J G7 9P33 E9 BP1A F2 BP1B F1 BP1C F2 BP1D F1 BP1E F2 BP1F F1 BP1G F2 BP1H F2 BP1J A2 BP1K A2 BP1L A2 BP1M A2 BP1N A2 BP1P A2 BP1R B2 BP1S B2 BP1T B1 BP1U E1 BP1V G1 BP1W I1 BP5A C2 BP5B C2 BP5C C2 BP5D C2 BP5E D2 BP5F D2 BP5G D2 BP5H D2 BP5J H2 BP5K H2 BP5L H2 BP5M H2 BP5N I2 BP5P I2 BP5R I2 BP5S I2 FP03 F14 FP06 F1 FP07 F1 FP08 G1 FP09 G1 FP0A G1 FP0C G1 FP0E D1 FP0F D1 FP0G D2 FP0H D2 FP0J E1 FP0P D1 FP0R I1

20
FP0S I1 FP0T I2 FP0U I2 FP0W I1 FP10 B1 FP11 B1 FP12 B1 FP13 B1 FP14 B2 FP15 B1 FP16 G1 FP17 I1 FP20 B11 FP21 E9 FP22 H12 FP23 I10 FP25 D8 FP26 D12 FP39 C12 FP40 C11 FP41 C10 FP42 A6 FP43 H12 FP44 F13 IP10 G12 IP11 H12 IP17 F13 IP26 H5 IP5U G6 IP5V G7 IP5Y G6 IP5Z H6 IP60 H13

2 HDMI
HDMI CONNECTOR 3

10

11

12

13

14

RES 7P01 LD1117DT18 3 ARX2+ ARX2ARX1+ ARX1ARX0+ ARX0ARXC+ ARXCPCEC-HDMI ARX-DDC-SCL ARX-DDC-SDA ARX-DDC-SCL ARX-DDC-SDA +3V3 +3V3 3P61 3P58 +3V3 2P48 100n IN OUT COM 2P49 10u 1 2 FP42 1V8-HDMI

1P04

BP1J BP1K BP1L BP1M BP1N BP1P BP1R BP1S

B D

2P46

FP14 20 23 22 25 24 26 FP13

AIN-5V ARX-HOTPLUG 47K

100n

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 FP10 21 BP1T

Remark for service: I2C Address = 0xCE Replacing the TDA 9996 Requires reprogramming
5P11 30R FP20

AIN-5V

47K

FP11 FP12 FP15

of its I2C address from 0xC0 to 0xCE

220u 16V

DC1R019WBER220

AIN-5V

2P03

5P12 2P44 100n +3V3 5P13 RES 30R

FP40

FP39 2P45

5P08 30R

+3V3

E C

1P03 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 FP0P 21 BP1U 23 22 25 24 26 DC1R019WBER220

BP5A BP5B BP5C BP5D BP5E BP5F BP5G BP5H

BRX2+ BRX2BRX1+ BRX1BRX0+ BRX0BRXC+ 2P42 100n 2P38 100n 3P63 2P41 100n 2P39 100n 2P37 100n BRXCPCEC-HDMI BRX-DDC-SCL BRX-DDC-SDA BIN-5V BRX-DDC-SCL BRX-DDC-SDA 3P64 +1V8-PNX85XX

5P14 2P05 30R 22u 6.3V 2P47

FP41 22u

BIN-5V 100n 2P50 100n 2P51 100n 2P52 100n 2P53 100n 2P35 100n 2P54 100n 2P55 2P34 100n REF-3V3

100n

HDMI CONNECTOR 2

1V8-HDMI

30R

2P43

47K

8 45 91

95

46

15 21 34 40 64 70 82 88

24 75

VDDO_1V8

VDDC_3V3

VDDC_1V8

VDDH_1V8

9P33 BIN-5V SCL-SSB 3P76 100R

51 52 50 49 FP21

IN XTAL OUT SCL I2C SDA 0 SEL 1 INT HP_CTRL MODE + + + + + + + + + + + + + + + + C D0 RXA D1 D2

VDDH_3V3

VDDO_3V3

VDDS_3V3

FP0J

55

FP0G FP0H 20

100n

2P36

100n

FP0E FP0F

D
FP26 4

47K

FP25

BRX-HOTPLUG

7P02 TDA9996

HE

E
HDMI CONNECTOR 1
1P02 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 FP1619 21 BP1V 23 22 25 24 26 BP1A BP1B BP1C BP1D BP1E BP1F BP1G BP1H FP06 FP07 CRX-DDC-SCL CRX-DDC-SDA FP08 FP09 FP0A 20 FP0C CIN-5V CRX-HOTPLUG 47K CRX-DDC-SCL CRX-DDC-SDA 3P68 CRX2+ CRX2CRX1+ CRX1CRX0+ CRX0CRXC+ 3P67 CRXCPCEC-HDMI CIN-5V

SDA-SSB +3V3

3P77 100R 3P43 1K0

53

OUT

IP17 74 2P56 10 12 11 9 2P57 29 31 30 28 2P58 59 61 60 58 2P59 77 79 78 76 IP10 44 54 57 27 25 IP11 FP22 2P28 100n 100n 100n 100n 100n

F
is prohibited without the written consent of the copyright All rights reserved. Reproduction in whole or in parts

3P14

REF-3V3 AIN-5V
ARX-DDC-SCL ARX-DDC-SDA

3P36

ARXC+ ARXCARX0+ ARX0ARX1+ ARX1ARX2+ ARX2BRXC+ BRXCBRX0+ BRX0BRX1+ BRX1BRX2+ BRX2CRXC+ CRXCCRX0+ CRX0CRX1+ CRX1CRX2+ CRX2DRXC+ DRXCDRX0+ DRX0DRX1+ DRX1DRX2+ DRX2-

14 13 17 16 20 19 23 22 33 32 36 35 39 38 42 41 63 62 66 65 69 68 72 71 81 80 84 83 87 86 90 89

DDC

CLK DAT PD

5 6 48 FP44

FP03

1K8

47

+ + D0 + D1 + D2 C

2 3 99 100 96 97 93 94

HDMIB-RXC+ HDMIB-RXCHDMIB-RX0+ HDMIB-RX0HDMIB-RX1+ HDMIB-RX1HDMIB-RX2+ HDMIB-RX2-

+5V

3P34

DDC-SCL DDC-SDA

R12K 5V CLK DAT HPD

12K 1%

RXA DDC C D0 RXB D1 D2

ARX-HOTPLUG BIN-5V BRX-DDC-SCL BRX-DDC-SDA BRX-HOTPLUG CIN-5V CRX-DDC-SCL CRX-DDC-SDA CRX-HOTPLUG DIN-5V DRX-DDC-SCL DRX-DDC-SDA DRX-HOTPLUG 6P03 BAT54 COL 2P32 100n

+5V

47K

5V CLK RXB DDC DAT HPD 5V CLK DAT HPD

1K8

G K
owner.

C D0 RXC D1 D2

RXC DDC

PCEC-HDMI CIN-5V WC-EEPROM-PNX5100

3P75 100R

IP5U

IP5Y 9P0J

IP5V CEC-HDMI

DC1R019WBER220

BC847BW 7P32 IP5Z 3P38

5V CLK RXD DDC DAT HPD CDEC DDC STBY CEC TEST NC VSS 1 7 18 26 37 43 56 67 73 85 92 98

BC847BW 7P12 WRITE-PROT

C D0 RXD D1 D2

22K

+3V3-STANDBY

L H

H
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 FP17 21

HDMI CONNECTOR SIDE


1P05 BP5J BP5K BP5L BP5M BP5N BP5P BP5R BP5S DRX2+ DRX2DRX1+ 3P53 DRX1DRX0+ DRX0DRXC+ DRXCPCEC-HDMI DRX-DDC-SCL DRX-DDC-SDA DIN-5V DRX-HOTPLUG DRX-DDC-SCL DRX-DDC-SDA 47K 22K DIN-5V IP26

H
PCEC-HDMI 5P15 30R IP60 3P47 4R7 +5V

FP43

FP23 2P33 100n

+5V-EDID

3P65

+3V3

I
N

FP0R FP0S FP0T FP0U 20 23 22 FP0W

3P66 DIN-5V 47K

BP1W

DC1R019JB1E400

1
O

9
1X07 EMC HOLE

10

11
CHN
CLASS_NO

12
SETNAME

13

14
O
2 2008-11-21

UFD2K8
P
2008-10-10 3 SUPERS. DATE 2007-10-18 8
C

DIGI IO TV543 R2 LDIPNX


NAME Maelegheer Ingrid CHECK

8204 000 8934


P
130 4 A2 ROYAL PHILIPS ELECTRONICS N.V. 2005

10

11

12

13

14

15

16

17

18

19

20
18310_537_090303.eps 090303

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 112

SSB: HDMI Switch

10

11

12
1M96 D1 1P06 A1 2P04 A5 2P12 A5 2P23 E6 2P60 B1 3P15 C5 3P22 B5 3P28 B5 3P29 B6 3P30 B5 3P31 B5 3P32 C6 3P33 C4 3P35 C3 5P06 A5 6P06 D6 7P07 B4 7P17 C5 9P19 A6 9P20 A6 9P29-3 D2 9P29-4 D2 9P30-1 E2 9P30-2 E2 9P30-3 E2 9P30-4 E2 9P31-1 E2 9P31-2 E2 9P31-3 E2 9P31-4 E2 9P32-1 D1 9P32-2 D1 9P32-4 D1 BP50 A1 BP51 A2 BP52 A1 BP53 A2 BP54 A1 BP55 A1 BP56 B2 BP57 B1 BP5Z B1 FP00 B1 FP0B A4 FP30 B1 FP31 B1 FP32 B1 FP33 B1 FP34 B1 FP35 B5 FP36 D1 FP37 D2 FP38 D2 IP14 A6 IP15 A6 IP16 B5 IP20 C4 IP23 C5 IP28 B4 IP68 C6

13

2 HDMI SWITCH

1P06

BP50 BP51 BP52 BP53 BP54 BP55

IP14 HDMIA-RX2+ HDMIA-RX2HDMIA-RX1+ HDMIA-RX1HDMIA-RX0+ HDMIA-RX0HDMIA-RXC+ HDMIA-RXCPCEC-HDMI ERX-DDC-SCL ERX-DDC-SDA 7P07 M24C02-WDW6 ERX-DDC-SCL ERX-DDC-SDA FP0B +5V-DDC 2P04 100n 5P06 120R 2P12 100n 9P20 9P19 IP15 DDCA-SCL DDCA-SDA

C
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

47K

100n FP32 20 23 22 25 24 26 FP33 FP34

EIN-5V ERX-HOTPLUG

EDID NVM HDMI 4


1 2 3 0 1 2

(256x8) EEPROM
ADR

IP16 WC SCL 7 6 5 3P31 22R

FP35

47K

EDID0

3P28

3P29

B
D

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 FP00 19 21 BP5Z

BP57

BP56 IP28 3P22 10K 8

FP30 FP31 2P60

3P30 22R WRITE-PROT IP23 3P32 10K IP68 HOT-PLUG-A

SDA 4

DC1R019WBER220

HDMI CONNECTOR 4
ERX-HOTPLUG
owner.

3P33 22R

IP20

3P15

10K

3P35

1K0

C
EIN-5V

7P17 BC847BW RES

1M96

FP36 5 7 9P32-4 9P32-2 4 2 FP37 5 6 ERX-HOTPLUG EIN-5V 9P29-4 9P29-3 4 3 ERX-DDC-SDA ERX-DDC-SCL 6P06 +5V-EDID BAT54 8 9P32-1 1 1 2 3 4 1 2 3 4 9P30-1 9P30-2 9P30-3 9P30-4 9P31-1 9P31-2 9P31-3 9P31-4 8 7 6 5 8 7 6 5 PCEC-HDMI HDMIA-RXCHDMIA-RXC+ HDMIA-RX0HDMIA-RX0+ HDMIA-RX1HDMIA-RX1+ HDMIA-RX2HDMIA-RX2+ 2P23 100n EIN-5V

E
H

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

FP38

+5V-DDC

23 22 25 24 27 26 29 28 31 30

FI-RE21S-HF-R1500

1
I

9
I

CHN
CLASS_NO

SETNAME
2 2008-11-21

UFD2K8
J
2008-10-10 3 SUPERS. DATE 2007-10-18 8
C

DIGI I/O TV543 R2 LDIPNX


NAME Maelegheer Ingrid CHECK

8204 000 8934


130 5 A3

ROYAL PHILIPS ELECTRONICS N.V. 2006

10

11

12

13
18310_538_090303.eps 090303

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 113

SSB: PNX8543: Flash


1 A 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 A

2
PNX 8543 : FLASH

10

11

12

13

A
C

B
D
+3V3-NAND 5P09 2P13 2P14 30R 7P10 NAND01GW3B2BN6F 100n 100n +3V3 +3V3-NAND IP29

1M97 C12 2P13 C6 2P14 C7 3P37 C1 3P39-1 C3 3P39-2 C3 3P39-3 C3 3P39-4 D3 3P40-1 D3 3P40-2 D3 3P40-3 D3 3P40-4 D3 3P42 E3 3P44 D3 3P48-1 E3 3P48-2 E3 3P48-3 F3 3P48-4 F3 3P57 C11 5P09 B1 7P10 C5 IP24 E5 IP27 D5 IP29 B5 IP30 E4

C
+3V3-NAND

3P37 10K

XIO-SEL-NAND

[FLASH] 1G
PCI-AD24 PCI-AD25 PCI-AD26 PCI-AD27 PCI-AD28 PCI-AD29 PCI-AD30 PCI-AD31 3P39-1 3P39-2 3P39-3 3P39-4 3P40-1 3P40-2 3P40-3 3P40-4 1 2 3 4 1 2 3 4 100R 8 7 100R 6 100R 5 100R 8 100R 7 100R 6 100R 5 100R NAND-AD(0) NAND-AD(1) NAND-AD(2) NAND-AD(3) NAND-AD(4) NAND-AD(5) NAND-AD(6) NAND-AD(7) NAND-AD(0) NAND-AD(1) NAND-AD(2) NAND-AD(3) NAND-AD(4) NAND-AD(5) NAND-AD(6) NAND-AD(7) 29 30 31 32 41 42 43 44 0 1 2 3 IO 4 5 6 7

VCC

NC

D
3P44 +3V3-NAND XIO-ACK

G
+3V3-NAND

2K2

3P42 10K

WP-NANDFLASH IP30

NAND-CLE NAND-ALE XIO-SEL-NAND IP27 NAND-REn NAND-WEn WP-NANDFLASH XIO-ACK IP24

16 17 9 8 18 19 7

CLE ALE CE RE WE WP R B

13

PCI-AD0 PCI-AD1 PCI-CBE1 PCI-CBE2

3P48-1 3P48-2 3P48-3 3P48-4

1 2 3 4 100R

8 7 6 5

100R 100R 100R

NAND-CLE NAND-ALE NAND-WEn NAND-REn

36

VSS

1 2 3 4 5 6 10 11 14 15 20 21 22 23 24 25 26 27 28 33 34 35 38 39 40 45 46 47 48

1M97 TSO-BIT-CLK TSO-BIT-VALID TSO-SYNC TSINO-DATA0 TSINO-DATA1 TSINO-DATA2 TSINO-DATA3 TSINO-DATA4 TSINO-DATA5 TSINO-DATA6 TSINO-DATA7 I2C-SCL I2C-SDA RESET-BOLT-ON 3P57 10K 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 FI-RE21S-VF-R1300

12

37

D
G

F
is prohibited without the written consent of the copyright All rights reserved. Reproduction in whole or in parts

F
J

G
K
owner.

G
K

I
N

I
N

1
O

10
CHN
CLASS_NO

11
SETNAME

12

13
O
2 2008-11-21

UFD 2K8
P
2008-10-10 3 SUPERS. DATE 2007-10-18 8
C

DIGI I/O TV543 R2 LDIPNX


NAME Maelegheer Ingrid CHECK

8204 000 8934


P
130 6 A2 ROYAL PHILIPS ELECTRONICS N.V. 2007

10

11

12

13

14

15

16

17

18

19

20
18310_539_090303.eps 090303

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 114

SSB: Ethernet
1 A 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 A

1
B

6
+3V3-ET-DIG

10

11

12

13

ETHERNET A

3N0L-4 22R

3N0N-3 33R

3 3N0L-3 6 22R

4 3N0N-4 5 33R FN06 FN05

+3V3-ET-ANA 1 3N0L-1 8 22R IN0P 3N0N-2 1 3N0N-1 8 7 2 33R 2N0R 100n 33R 7 3N0L-2 2 22R

FN15 FN07 +3V3-ET-ANA 2N0U 100n TPTDP TPTDM TPRDP TPRDM X1 X2 VREF COL CRS MDC MDIO RXCLK TXCLK RXOE TXE MCS MRD MWR EESEL 54

BN0A BN0B BN0C BN0D 2N0T 100n IP0H

1N00 1 2 3 4 5 6 7 8

FN08

7N04-1 DP83816AVNG

ETHERNET CONNECTOR

B
E

59

IAUXVDD PMEM CLKRUN PWRGOOD 3VAUX INTA PCICLK PAR IRDY TRDY PERR SERR FRAME GNT STOP IDSEL DEVSEL REQ RST REGE

PCIVDD

MacPhyter II 10/100 Mb/s

AUXVDD

13 14 53 8 3N0T-1 1 2 3N0T-2 100R 46 45 IN0V 17 18 40 28 29 5 4 6 31 2N0L 13 30 129 130 131 128 22p 22p NX5032GB 25M IN0M 3N0H 10K 3N0F 470R 3N0V 1M0 1N02 IN0T 2N0S 100n 100R

123 122 IRQ-PCI PCI-CLK-ETHERNET PCI-PAR PCI-IRDY 61 60 99 92 93 97 98 91 63 96 3N0G 100R 76 95 64 62 2N0M FN0C +3V3-ET-ANA 1u0 PCI-CBE0 PCI-CBE1 PCI-CBE2 PCI-CBE3 111 100 89 75 121 120 119 118 116 115 113 112 110 109 108 106 105 104 102 101 88 87 86 83 82 81 79 78 74 73 72 71 70 68 67 66 48

1840420-1

FN09 3 3N0T-3 6 3N0T-4 5 100R 100R

C
F

PCI-TRDY PCI-PERR PCI-SERR PCI-FRAME PCI-GNT-ETH PCI-STOP

D
3N0Y +3V3-ET-DIG 10K IP0J RESET-ETHERNET

2N0K

PCI-AD23 PCI-DEVSEL PCI-REQ-ETH RESET-ETHERNET

E
I

0 1 2 3 0

CMD/ BE CFGDIS

K
owner.

2N0Y

2N12

RESERVED

127 31 C1 VSS

2N10

2N11

2N0Z

G
L

PCI-AD0 PCI-AD1 PCI-AD2 PCI-AD3 PCI-AD4 PCI-AD5 PCI-AD6 PCI-AD7 PCI-AD8 PCI-AD9 PCI-AD10 PCI-AD11 PCI-AD12 PCI-AD13 PCI-AD14 PCI-AD15 PCI-AD16 PCI-AD17 PCI-AD18 PCI-AD19 PCI-AD20 PCI-AD21 PCI-AD22 PCI-AD23 PCI-AD24 PCI-AD25 PCI-AD26 PCI-AD27 PCI-AD28 PCI-AD29 PCI-AD30 PCI-AD31

EEDO MD<0:7> 7

132 133 134 135 138 139 140 141

IN0K

3N0W 1K0

E
RES

IN0W

3N0J 270R 6N00 BAS316 6N01 BAS316 IN10

FN0A

is prohibited without the written consent of the copyright

All rights reserved. Reproduction in whole or in parts

AD<0:31> DATA

LEDACT LED10LNK LED100LNK EEDI EECLK MA5 0 1 RXD 2 3 RXER RXDV 0 1 TXD 2 3 MA<0:15>

142 143 144 1 2 3 7 10 11 12 14 15 22 23 24 25

IN0Y

IN0Z

3N0K 220R

FN0B

1N00 A11 1N02 C8 2N0K D8 2N0L D8 2N0M D3 2N0N H4 2N0P G10 2N0Q G10 2N0R A9 2N0S C8 2N0T B10 2N0U B9 2N0V H10 2N0W H10 2N0Y G12 2N0Z G13 2N10 G12 2N11 G12 2N12 G12 2N13 G11 2N14 G12 2N15 G11 2N16 G11 2N17 G11 2N1C H3 3N0F C7 3N0G D3 3N0H C7 3N0J E8 3N0K F8 3N0L-1 A8 3N0L-2 A9 3N0L-3 A8 3N0L-4 A8 3N0N-1 A9 3N0N-2 A9 3N0N-3 A9 3N0N-4 A9 3N0T-1 B9 3N0T-2 B9 3N0T-3 C9 3N0T-4 C9 3N0V C8 3N0W E8 3N0Y D1 5N06 G10 5N07 H10 6N00 F8 6N01 F8 7N04-1 B3 7N04-2 H7 BN0A A10 BN0B B10 BN0C B10 BN0D B10 FN05 A10 FN06 A10 FN07 B10 FN08 B11 FN09 C11 FN0A E9 FN0B F9 FN0C D3 FN15 B10 IN0K E7 IN0L G10 IN0M C7 IN0N H3 IN0P A9 IN0T C8 IN0U H10 IN0V C8 IN0W E7 IN0Y F7 IN0Z F7 IN10 F8 IP0H B10 IP0J D1

80

94

39

47

56

21

27

107

117

33

58

137

69

5N06 +3V3 41 50 220R 2N0Q 2

IN0L +3V3-ET-DIG 100n 2N17 100n 2N16 100n 2N13 100n 2N15 100n 2N14 100n 4u7 6.3V 100n 2N0P 100n 100n 100n 100n

G
L

5N07 103 114 19 136 16 20 26 32 35 38 44 49 51 52 55 57 65 77 90 +3V3 IN0N 7N04-2 DP83816AVNG 34 36 37 42 43 NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 84 85 124 125 126 8 220R

IN0U +3V3-ET-ANA 2 4u7 2N0W 2N0V 100n

2N1C

2N0N

100n

H
M

10u 6.3V

H
M

10

11

12

13

O
CHN
CLASS_NO

O
SETNAME
2 2008-11-21

UFD 2K8
P
2008-10-10 3 SUPERS. DATE 2007-10-18 8
C

DIGI I/O TV543 R2 LDIPNX


NAME Maelegheer Ingrid CHECK

8204 000 8934


P
130 7 A2 ROYAL PHILIPS ELECTRONICS N.V. 2007

10

11

12

13

14

15

16

17

18

19

20
18310_540_090303.eps 090303

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 115

SSB: Buffering

10

11

12

13
2N30 D3 2N31 B5 2N32 D5 2N33 B3 2P18 E9 2P19 E9 2P20 D7 2P21 C8 2P22 C8 2P25 D8 2P26 E9 2P61 C7 2P62 C8 3N30 D1 3N31 B4 3N32 D4 3N33 E4 3N34 D2 3P46 C7 3P49 D6 3P50 D8 3P51 D8 3P52 E8 3P54 E8 5P10 C9 7N10 D2 7N11 B5 7N12 D5 7N13 B2 7P11 D9 7P13 D7 FP18 D7 FP19 D8 IN20 B4 IN21 D4 IN22 D2 IN30 D2 IN32 E4 IN34 B2 IN35 B2 IP31 D8 IP32 D8

1
A

2 BUFFERING

10

A
B
+3V3

+3V3

3N31

2N33

All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

IN34 CA-DATADIR IN35 CA-DATAEN PCMCIA-D2 PCMCIA-D1 PCMCIA-D3 PCMCIA-D4 PCMCIA-D5 PCMCIA-D6 PCMCIA-D7 PCMCIA-D0

7N13 74LVC245A 1 19 2 3 4 5 6 7 8 9

100n

20

10K

C B

B
2N31 7N11 74LVC245A 1 19 2 3 4 5 6 7 8 9 2 20 100n

3EN1 3EN2 G3 1 2 18 17 16 15 14 13 12 11 10 PCI-AD26 PCI-AD25 PCI-AD27 PCI-AD28 PCI-AD29 PCI-AD30 PCI-AD31 PCI-AD24

IN20

CA-ADDEN PCI-AD7 PCI-AD6 PCI-AD5 PCI-AD4 PCI-AD3 PCI-AD2 PCI-AD1 PCI-AD0

3EN1 3EN2 G3 1 18 17 16 15 14 13 12 11 10 PCMCIA-A7 PCMCIA-A6 PCMCIA-A5 PCMCIA-A4 PCMCIA-A3 PCMCIA-A2 PCMCIA-A1 PCMCIA-A0 2P62 2P21 2P22 2P61 +12V 220u 25V 220u 25V

+5V5-TUN

30R RES

3P46

2K2

owner.

IP31 1 10K 3P49 3

E
10K 3N34 3N30 10K

+3V3 +3V3 2N32 2N30 100n

7P11 PHD38N02LT

5P10

1u0

1u0

2P25 2P20 22n 7P13 TS2431 1 FP18 3P50 1K0

3N32

20

IN22

74LVC245A 7N10 3EN1 3EN2 G3

10K

D
F
CA-ADDEN CA-WAIT PCI-CBE1 PCI-CBE2 PCI-AD16 PCI-AD17 PCI-AD19 PCI-AD22 PCI-AD23

100n

220p 3P51 1K0 FP19

+5V-TUN

D
F

22u 16V 2P18

19 2 3 4 5 6 7 8 9

20

IN30

IN21 18 17 16 15 14 13 12 11 10 PCI-AD18 CA-WE CA-OE CA-CE2 CA-CE1 CA-REG CA-IORD CA-IOWR

2P26

2P19

1u0 RES

1 2

CA-ADDEN PCI-AD14 PCI-AD13 PCI-AD12 PCI-AD11 PCI-AD10 PCI-AD9 PCI-AD8 3N33 10K IN32

19 2 3 4 5 6 7 8 9

3EN1 3EN2 G3 1 2 18 17 16 15 14 13 12 11 10 PCMCIA-A14 PCMCIA-A13 PCMCIA-A12 PCMCIA-A11 PCMCIA-A10 PCMCIA-A9 PCMCIA-A8

2 A

3P52 10K RES

3P54

1K0

1u0 RES

7N12 74LVC245A 1

IP32

E
G

E
G

6
CHN
CLASS_NO

7
SETNAME

10

2008-11-21

UFD 2K8
J
2008-10-10 3 SUPERS. DATE 2007-10-18 8
C

DIGI I/O TV543 R2 LDIPNX


NAME Maelegheer Ingrid CHECK

8204 000 8934


130 8 A3

ROYAL PHILIPS ELECTRONICS N.V. 2007

10

11

12

13
18310_541_090303.eps 090303

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 116

SSB: Analogue Externals A


1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
1001 E11 1009 B12 1015 C12 1022 A7 1023 B7 1024 B7 1025 C7 1027 D6 1028 E6 1E00 A12 1E01 C14 1E02 C8 1E12 D12 1E13 E7 1E16 F7 1E18 F12 1E19 G12 1E22 H13 1E23 I11 1E24 I7 1E25 I11 1E26 H7 1E27 I7 1E31 B12 2E01 A11 2E04 C11 2E06 B11 2E10 B11 2E12 G12 2E13 G6 2E14 F12 2E15 D12 2E16 D5 2E17 E6 2E18 E12 2E19 F6 2E24 H11 2E29 A5 2E30 B5 2E31 C5 2E32 B5 2E33 E5 2E41 I6 2E44 I12 2E50 A7 2E51 A7 2E70 B7 2E73 I2 2E74 G2 2E75 D1 2E77 C2 2E82 C7 2E87 A13 2E88 A12 2E90 B12 2E91 C12 2EA4 A3 2EA5 A3 3E02 D6 3E06 D4 3E07 A11 3E11 A6 3E12 A11 3E14 C6 3E15 B11 3E16 D6 3E17 E5 3E18 B5 3E19 C11 3E21 B5 3E22 C11 3E24 A5 3E27 B11 3E28 D11 3E30 B11 3E31 D11 3E32 E11 3E34 C5 3E37 A11 3E38 F11 3E43 H12 3E44 H11 3E45 I10 3E51 E5 3E52 I5 3E54 G11 3E55 F5 3E59 I11 3E61 H6 3E62 I6 3E63 A6 3E64 B6 3E68 H12 3E69 H6 3E73 G5 3E99 C2 3EA7 A3 3EA8 A3 3EA9 A2 3EB0 B2 3EB6 H1 3EB7 H2 3EB8 I2 3EB9 I1 6E01 A12 6E02 E6 6E03 B12 6E07 B12 6E08 B6 6E09 C12 6E10 A6 6E12 B6 6E14 C6 6E22 E12 6E23 D11 6E24 D6

20
6E26 F12 6E28 G12 6E29 H12 6E30 I11 6E31 I6 6E32 I11 6E34 E6 6E35 F6 6E36 H7 6E37 I6 7E01-1 A2 7E01-2 B2 7E02 D2 7E04 I1 7E05 H1 7E09 H11 7E14 H5 7E15 C3 9E10 I3 9E12 C5 9E15 D5 9E16 E5 9E17 E5 9E18 F5 9E19 F5 9E20 G10 9E22 D10 9E23 D10 9E24 E10 9E25 F10 9E26 G10 9E27 G10 9E33 F2 FE60 A7 FE61 A7 FE62 B7 FE63 D7 FE64 D7 FE65 E7 FE66 E7 FE67 E7 FE68 C7 FE70 C13 FE71 C13 FE72 C13 FE73 D13 FE74 D13 FE75 D13 FE76 E7 FE77 F7 FE78 F7 FE79 F7 FE80 D13 FE81 E13 FE82 E13 FE83 F13 FE84 F13 FE85 F13 FEA0 A3 FEA1 B3 IE04 D1 IE05 D5 IE06 H6 IE09 H11 IE14 C5 IE16 E5 IE17 F5 IE18 D10 IE20 A5 IE21 C5 IE22 A11 IE23 C11 IE48 H11 IE51 H5 IE91 H1 IE92 H2 IE93 I2 IE94 I1 IE96 E2 IE97 D3 IE98 C2 IEC0 A3 IEC1 A2 IEC2 A3 IEC3 B2

1
A

10

11

12

13

14

ANALOGUE EXTERNALS A
AP-SCART-OUT-R 3EA7 IEC0 2EA4 AUDIO-CL-L
3E24 6E10 100K 2E29 100p

3E63
2E50

FE60 AP-SCART-OUT-R
1n0

3E37
2E87 CDS4C12GTA 12V 1n0

470R
CDS4C12GTA 12V 1022

470R
3E12 100K 2E01 6E01 1E00 100p

150R

1u0 16V FEA0 RES AP-SCART-OUT-L

7E01-1 6 3EA9 6K8 BC847BS(COL) IEC1 2 1

RES

RES

RES

AUDIO-IN2-R 3EA8 IEC2 2EA5 AUDIO-CL-R


3E18

IE20

3E11
2E51

FE61
1n0 CDS4C12GTA 12V

IE22 AV1-AUDIO-R

3E07
2E88 CDS4C12GTA 12V 1n0

1K0
6E08 100K 2E30 1023 100p

1K0
100K 3E27 2E06 6E03 1E31 100p

C
7E01-2 3 3EB0 6K8 IEC3 5 4 BC847BS(COL)

150R FEA1

1u0 16V AP-SCART-OUT-R

RES

RES

RES

RES

2E90

1n0

2E70

CDS4C12GTA 12V

1n0

470R
3E21 100K 2E32 6E12 100p 1024

D
A-PLOP AUDIO-IN2-L +5v

CDS4C12GTA 12V 1009

AP-SCART-OUT-L

3E64

FE62

AP-SCART-OUT-L

3E15 470R
3E30 2E10 100K 100p

6E07

RES

RES

RES

RES

IE23 AV1-AUDIO-L

3E19 1K0
CDS4C12GTA 12V 1015

SCART1 (AV1)
1E01 FE70 FE71 FE72 1 2 3 4 5
2E91 6E09 1n0

* EU

IE21

3E14
3E22 100K 2E82 2E04 CDS4C12GTA 12V

RES 2E31

RES 3E34

100K

6E14

2E77 8K2

3E99

100n

100p

1025

RES

100p

1n0

1K0

SCART2 (AV2)
1E02
1

RES

C
IE98 +5v 3 7E15 PDTC114EU REGIMBEAU_CVBS-SWITCH 1 IE97 AV3-PB IE14 9E12

FE68
CDS4C12GTA 12V 2E16 6E24 RES 3E02 100p 1027 75R

2 3 4 5
6E23 RES 3E28 75R

F
2E75 100n

3E06

10K

AV5-PB

9E15

AV1-B

9E22
CDS4C12GTA 12V

FE73 FE74
1E12 2E15 100p

6 7 8 9 10

D
IE04 14

7E02 74HC4053PW 6 +3V3 13 12 11 Y_CVBS-MON-OUT-SC IE96 AV2-STATUS IE05

16

MDX

VDD

* EU
3E16 8K2
3E17 2E33 6E02 330p 1028 3K3 CDS4C12GTA

6 FE63 FE64 7

AV4-PB

9E23

FE75

G4

* EU
8 AV1-STATUS 9 IE18 3E31 8K2
3E32 6E22 1001 3K3 CDS4C12GTA

G
15

12V

2E18

1 2 10

FE66

11 12

12V

10

330p

1 2 4X1 4X2

FE80

11 12 13 14 FE81 FE82 15 16 17

FE65

3 5 9 VSS VEE
8 7

13 AV3-Y CVBS-TER-OUT
2E17 RES 3E51

IE16 9E16
CDS4C12GTA 12V

14 FE67
1E13

15 16 17
6E26 RES 3E38 75R

AV5-Y

75R

9E17

6E34

100p

FE76

AV1-G

9E24
CDS4C12GTA 12V

18 FE83
1E18 2E14 100p

19 20 21

18

AV4-Y

9E25

FE84

9E33

FE77 FE78 IE17 AV3-PR 9E18


CDS4C12GTA 12V

19 20 21

F
is prohibited without the written consent of the copyright All rights reserved. Reproduction in whole or in parts

RES

FE85 MTJ-505H-01 NI LF

FE79
1E16

RES 3E55

2E19

AV5-PR

9E19

6E35

100p

75R

MTJ-505H-01 NI LF AV1-R 9E26


CDS4C12GTA 12V

6E28

RES 3E54

1E19

2E12

AV4-PR

75R

9E27

100p

G
K
owner.

RES AV1-BLK-BO +5V


2E74 100n 3E73 4K7

9E20 +3V3

+3V3
100n 16V

* EU
3E44 2E24 100n 4K7

3EB6 100R

IE91 AV2-BLK 7E05 BC847BW


3EB7

3 IE51 7E14 BC847BW 2 1 IE06 3E69


CDS4C12GTA 12V

2E13

IE92 CVBS-OUT-SC1
390R

IE48 AV1-BLK
3E61 6E36 1E26

3 IE09 7E09 BC847BW 2 1 3E68 10K


6E29 CDS4C12GTA

75R

10K

H
12V 3E43 1E22 75R

AV1-CVBS
6E32 1E25 12V RES 3E59 2E44

RES 3E62

2E41

6E37

2E73

I
N

3EB9 100R

IE94

RES

1E27

100n

100p

75R

100p

75R

+5V

CDS4C12GTA 12V

CDS4C12GTA

9E10

AV2-Y_CVBS

68R
390R 6E30

CDS4C12GTA

7E04 BC847BW
3EB8

IE93

3E52 68R
6E31 CDS4C12GTA 12V

CVBS-OUT-SC1

3E45

I
1E23 12V

2
1X04 EMC HOLE

1E24

10

11
CHN
CLASS_NO

12
SETNAME

13
ANA + SIDE I/O

14
2 2008-11-21

P
2008-10-10 3 NAME Maelegheer Ingrid CHECK

TV543 R2 LDIPNX
SUPERS. DATE 2008-01-18 4
C

8204 000 8930


P
130 1 A2 ROYAL PHILIPS ELECTRONICS N.V. 2005

10

11

12

13

14

15

16

17

18

19

20
18310_542_090303.eps 090303

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 117

SSB: Analogue Externals B


1 2

1
A

3 2

4
R-VGA

5
G-VGA

8 6
B-VGA

10

11

12

7
H-SYNC-VGA V-SYNC-VGA

13 10

14

15

16

11

12

17 13

18 14

19
1011 G12 1012 C4 1013 F3 1014 F11 1016 A4 1026 E11 1235 G3 1240 A5 1241 A6 1242 C5 1246 H3 1250 I3 1255 I3 1E03-1 I3 1E03-2 G3 1E03-3 H3 1E04-1 F11 1E04-2 E11 1E04-3 E3 1E05 A2 1E07 F14 1E10 I3 2E05 G8 2E07 G8 2E08 H11 2E11 A5 2E21 D8 2E22 G12 2E26 C10 2E27 F4 2E28 F9 2E34 F8 2E46 C5 2E49 E9 2E52 G8 2E64 C6 2E65 A6 2E67 H5 2E68 G5 2E71 I5 2E72 I5 2E76 I11 2E78 H14 2E79 I14 2E81 H12 2E92 I3 2E93 I3 2E95 F10 2E96 E10 2E99 C9 2EB1 H12 2EB3 H14 2EB4 A4 2ECF B3 3E01 B6 3E03 B7 3E04-1 G8 3E04-2 G8 3E04-3 H8 3E05 A4 3E10 F4 3E13 H9 3E20 H10 3E25 D9 3E29 E5 3E33 D10 3E35 C6 3E36 G4 3E42 B7 3E46 C5 3E47 C11 3E48 F10 3E50 F9 3E53 F10 3E56 F8 3E58 E8 3E60 E10 3E65 C12 3E70 B13 3E71 B13 3E72 C13 3E82 B7 3E89 C7 3E90 B8 3E92 H4 3E95 I5 3E96 I4 3E97 I4 3E98 I5 3EA1 H14 3EA2 H13 3EA3 H13 3EA5 I14 3EA6 I13 3EB1 I13 3EB2 I13 3EB4 I11 3EB5 I12 3ED3 H14 5E02 H12 5E05 B10 5E06 F12 6E04 C4 6E05 A7 6E06 I4 6E11 C6 6E13 C10 6E15 C11 6E16 C13 6E17 B14 6E18 A4 6E38 I4 6E40 F4 6E46 G13 6E47 E10 6E48 F10 6E51 H4 6E52 G4

20
6E53 A5 6E54 A3 7E03 H9 7E06-1 I13 7E06-2 I13 7E10-1 E9 7E10-2 F9 7E16 I11 7E18 B12 9E00 G5 9E01 H5 9E02 H5 9E04 F5 9E06 H9 9E07 I8 9E11 G5 9E21 I12 9E28 I8 9E29 C14 9E37 C14 FE13 B4 FE16 B6 FE19 B9 FE26 C10 FE38 C4 FE39 C12 FE40 E11 FE41 G14 FE42 G3 FE43 I3 FE48 G4 FE49 I3 FE50 I3 FE51 G4 FE52 A6 FE53 F10 FE54 E3 FE55 A5 FE58 A4 FE59 F13 FE69 D10 FEB2 C13 FEB3 D13 IE01 H10 IE02 H9 IE03 G5 IE07 I12 IE08 F5 IE10 B12 IE13 I9 IE15 F11 IE19 A2 IE24 G8 IE25 G8 IE26 G5 IE27 E5 IE29 I5 IE31 I5 IE32 C13 IE33 F9 IE34 F8 IE35 F9 IE38 I12 IE57 D8 IE60 I14 IE61 I14 IE62 E9 IE68 D9 IE70 H13 IE89 H13 IE90 H13

ANALOGUE EXTERNALS B
12V CDS4C12GTA 6E18
1226-02B-15S-FAE-02

CDS4C12GTA 12V

2E11

100p

2E65

RES 3E01

2ECF

100n

BAT54

75R

RES 3E03

VGA CONNECTOR

3E82

100R

B
D

1 9 2 10 3 11 4 12 5 13 6 14 7 15 8 17

FE58 IE19

FE55

6E54

+5V

1016

RES 3E05

1240

1241

75R

100p

16

6E05

12V CDS4C12GTA

2EB4

6E53

100p

1E05

FE52

75R

EDID NVM VGA


+5VDCOUT FE19 5E05 120R 7E18 M24C02-WDW6 IE10

B
BAS321 3E71 3E70 4K7 6E17 47K

FE13

3E90

4K7

FE16

BAS321 3E47

3E42 100R

12V CDS4C12GTA

12V CDS4C12GTA

1 2 3

(2568) EEPROM
0 1 2 ADR

2E99

2E26

100n

6E13

IE32 WC SCL 7 1 6 5

4K7

4u7

FEB2

9E29

WRITE-PROT

3E72 100R

6E04

2E46

6E11

2E64

1012

1242

3E46

3E35

3E89

47p

47p

4K7

4K7

4K7

SDA

9E37 RES

FE39

C
BAS321 6E16

CLK-SCL

3E65 100R

FE26

6E15

FE38

BAS321

FEB3 DATA-SDA

D
G
2E21 AUDIO-OUT-L 1u0 IE57 IE68

3E25 150R

3E33 470R

FE69

MSP-305H-BBB-732-03 NI 4

2E96

1n0

RES

2E49 100K

3E60

6E47

100p

A-PLOP

2 1 7E10-1 BC847BS(COL)

1026

3E58 6K8

IE62

CDS4C12GTA 12V V_NOM

3 1E04-2 WHITE FE40

RES

E
H
MSP-305H-BBB-732-03 NI 2 1E04-3 1 GREEN

RES

*AP
FE54 3E29 68R IE27 CVBS-MON-OUT-CINCH

12V CDS4C12GTA

RES 3E10

6E40

2E27

100p

75R

V_NOM

*EU
9E04

1013

IE08 AV4-Y AUDIO-OUT-R 1u0 2E34 IE34 3E50 150R 3 IE33 3E48 470R FE53 MSP-305H-BBB-732-03 NI 6

2E95

1n0

2E28 100K

3E53

6E48

A-PLOP

5 4 7E10-2 BC847BS(COL)

100p

RES

6K8
is prohibited without the written consent of the copyright

RES

1014

RES

CDS4C12GTA 12V V_NOM

3E56

IE35

5 1E04-1 RED

F
IE15 5E06 30R FE59 1E07 CON_JACK

All rights reserved. Reproduction in whole or in parts

2E22

6E46

1011

CDS4C12GTA 12V

MSP-305H-BBB-523-03 NI 4

FE48

IE26 AV4-PR

9E00

6E52

3E36 100p

2E68

RES 75R

1E03-2 3 RED

1235

G
K

*AP
9E11 AV1-Y_CVBS 2E52 10p

2E07

100n

12p

*EU

CDS4C12GTA 12V

2 1 YKB11-3004 FE41

FE42

+3V3

1 3E04-1 8

4K7

CDS4C12GTA 12V

owner.

MSP-305H-BBB-523-03 NI 2

FE51

*EU
9E02

IE03 AV4-PB SPDIF-OUT

2E05 100n

IE25

IE24 7 3E04-2 2

1E03-3 1 BLUE

3 3E04-3 6

75R

4K7

7E03 BC847BW

+5V 3E20 47R IE01 2E08 100n +12V 5E02 220R IE90

6E51

3E92 100p

1246

2E67

4K7

RES

IE02

180R

3E13

RES 3ED3

2EB1

3EA3

3EA2

3EA1

2E81

100K

100n

100n

H
*AP

27K RES 2EB3

33R

AV2-Y_CVBS +5V

IE89 4 BC847BPN(COL) 7E06-2 3

9E06

2E76

CDS4C12GTA 12V

MSP-305H-BBB-523-03 NI 6

FE49

3E96 1K0

IE29 AUDIO-IN3-L

100n

IE70 5 6 IE60 2

1K0

1u0

9E01

2E78 1u0

RES 100K

3E95

1E03-1 5 WHITE

6E38

2E71

1255

100p

2E92

RES

3 IE07 Y_CVBS-MON-OUT-SC IE13 9E28 7E16 BC847BW 2 1 3EB5 470R IE38

7E06-1 BC847BPN(COL) 1 3EB1 IE61 330R

1n0

2E79 1u0

3EB2

RES

3EB4

CDS4C12GTA

2E93

1n0

YKB11-3001V 2 1E10 1

AUDIO-IN3-R

560R

FE50

3E97 1K0

IE31

10K

22K

9E21

3EA6

3EA5

330R

I
RES 100K 6E06 3E98 2E72 1250 100p 12V
RES

*AP
CVBS-MON-OUT-CINCH 9E07

FE43

Y_CVBS-MON-OUT

10

11
CHN
CLASS_NO

12
SETNAME

13

14
2 2008-11-21

ANA + SIDE I/O


P
2008-10-10 3 SUPERS. DATE 2008-01-18 4
C

TV543 R2 LDIPNX
NAME Maelegheer Ingrid CHECK

8204 000 8930


P
130 2 A2 ROYAL PHILIPS ELECTRONICS N.V. 2005

10

11

12

13

14

15

16

17

18

19

20
18310_543_090303.eps 090303

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 118

SSB: Analogue Externals C

10

11

12

13
1000 F3 1002 E2 1003 D3 1004 C2 1005 B2 1006 B3 1007 A3 1010 F4 1E11-1 C1 1E11-2 C2 1E11-3 D2 1E14 B1 1E15 E2 1M36 B8 2E35 A3 2E36 B3 2E37 D3 2E39 F4 2E40 F5 2E42 C3 2E45 D5 2E53 A7 2E54 A7 2E55 B7 2E56 B8 2E57 D8 2E58 D8 2E80 D5 2E97 C4 2E98 D4 3E26-1 E5 3E26-2 F5 3E26-3 F5 3E26-4 F5 3E74 A4 3E75 B4 3E76 C4 3E77 D4 3E78 D4 3E79 F3 3E80 F4 3E81 C4 3EC0 B8 3EC1 A8 5E00 C8 5E01 D8 6E20 A3 6E21 C3 6E41 B3 6E43 D3 6E44 F4 6E45 F3 9E13 A8 9E14 A8 9E32 F2 9E34 F3 BE20 A3 BE21 B2 BE22 B2 BE23 C3 BE24 D2 BE25 D2 BE26 F3 BE27 F4 BE28 F2 FE17 D2 FE18 F2 FE20 B2 FE21 B2 FE22 C3 FE23 D3 FE24 F3 FE25 F5 FE56 A2 FE86 B7 FE87 B7 FE88 B7 FE89 B8 FE90 C8 FE91 D7 FE98 B8 IE58 C4 IE66 E5 IE67 F5 IE72 D5

1
A

ANALOGUE EXTERNALS C
CDS4C12GTA 6E20 V_NOM 12V 1007 2E35 RES 3E74 100p 75R

A
B
2 C Y/CVBS FE56

RESERVED
9E13 2E53 100p 9E14 2E54 100p 3EC1 2E55 100p 3EC0 2E56 100p 100R 100R FRONT-C FRONT-Y_CVBS AUDIO-IN5-L AUDIO-IN5-R

BE20

SVHS IN

4 5 3

2E36

100p

6E41

RES 3E75

1006

75R

12V

FE20 1 MDC-013V1-B BE22 FE21 BE21

CDS4C12GTA

FRONT-Y_CVBS FRONT-C AUDIO-IN5-L AUDIO-IN5-R AUDIO-HDPH-L-AP FE87 FE86 FE88

C
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

V_NOM

1E14

FE89

B
1M36 FE98 1 2 3 4 5 6 7 8 9 10 11 B11B-PH-K FE90 2E57 100p 5E00 30R

V_NOM

CVBS
2 1E11-1 1 YELLOW

1005

AUDIO-HDPH-R-AP

IE58

D
BE23 FE22 3E81 1K0 CDS4C12GTA 12V 100K 2E42 2E97 5 6 1E11-2 4 WHITE 3E76 1n0

TO SIDE I/O

C
V_NOM 6E21 1004

LEFT
owner.

RES

E
RIGHT
8 9 7 1E11-3 RED BE25 FE17 BE24

100p RES

5E01 FE91 100u 4V 2E58 FE23 CDS4C12GTA 12V 3E78 1K0 100u 4V 3E77 100K 2E37 2E98 100p 2E45 1n0 IE72 2E80 100p 30R

D
F

V_NOM

6E43

1003

RES

RES

E
V_NOM 1002 1E15 5 4 2

FOR ITV
RC-IN RC-OUT 1 BE26 FE18 9E34 FE24 IE66 3E26-1 33R LEFT FE25 2 3E26-2 7 IE67 8

HEADPHONE

CDS4C12GTA 12V 3E79

CDS4C12GTA 12V 3E80

1000 V_NOM

1010 V_NOM

9E32

1K0 2E39

6E45

6E44

1K0 2E40

1n0

1n0

3 7 BE28 8 1 MSJ-035-10A B AG PPO

RIGHT BE27

FOR ITV

33R 3E26-3 3 6 33R 4 3E26-4 5 33R

6
CHN
CLASS_NO

7
SETNAME

9
2 2008-11-21

ANA + SIDE I/O


J
2008-10-10 3 SUPERS. DATE 2008-01-18 4
C

TV543 R2 LDIPNX
NAME Maelegheer Ingrid CHECK

8204 000 8930


130 3 A3

ROYAL PHILIPS ELECTRONICS N.V. 2007

10

11

12

13
18310_544_090303.eps 090303

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 119

SSB: Analogue Externals D


1 A 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
1008 F5 1029 F5 1E06 F6 1E50 D6 1E51 E6 1HP0 I1 1R07 F1 1R08 H1 1R12 H9 2E03 I1 2E09 I2 2E20 I2 2E25 G2 2E38 G2 2E60 D3 2E61 D4 2E62 D2 2E63 D2 2EA1 C8 2EA2 C8 2EA3 C8 2EA6 D8 2EA9 B11 2EAA B11 2EAB E11 2EAC E9 2EAD E9 2EAE F9 2EAF G9 2EAK I10 2EAL I10 2EAM I11 2EAN I11 2EAP C8 2EAQ D8 2EB6 D12 2ECB I9 2ECC I9 2ECD I9 2ECE C12 2ECH A5 3E00 G3 3E08 C2 3E09 H2 3E23 H2 3E39 I5 3E40 C2 3E41 F2 3E57 H3 3E67 G2 3E83 H3 3E84 H3 3E85 I2 3E86 H3 3E87 H5 3E88 G14 3E91 F2 3E93 I2 3EAA D9 3EAB D9 3EAC D9 3EAT C12 3EAV C8 3EAY H10 3EAZ H10 3EB3 C12 3EC2 C9 3EC3 C9 3EC4 C9 3EC5 C9 3EC6 D8 3EC7 D8 3EC8 D9 3EC9 D12 3ECE H11 3ECF H10 3ECG H10 3ECH H10 3ECK A1 3ECL A2 3ECM B3 3ECN B1 3ECP B1 3ECQ-1 E8 3ECQ-2 F9 3ECQ-3 E9 3ECQ-4 E9 3ECS-1 G8 3ECS-2 G9 3ECS-3 F8 3ECS-4 F9 3ED1 D12 3ED2 C8 5E03 H1 5EA1 B10 6E19 C3 6E25 F3 6E27 F4 6E50 C3 7E17 D2 7E19-1 A3 7E19-2 A4 7E19-3 B5 7E19-4 B5 7E20 C3 7EA1 B10 7EA3 E11 9E03 D2 9E05 E1 9E08 C3 9E09 C4 9E30 H11

20
9E31 A6 9E35 C6 9E36 C6 9E40 F3 9E41 E3 9EA1 A11 9EA2 A11 9EA3 A11 9EA4 G11 9EA5 G11 9EA7 A11 BEB0 E5 BEB1 D5 BEB2 E5 BEB3 E5 BEB4 D10 BEB5 D10 BEB6 C10 BEB7 C10 BEB8 C10 BEB9 C10 FE10 G2 FE11 G1 FE12 F1 FE14 G2 FE15 G1 FE27 I2 FE28 I1 FE29 I2 FE30 G2 FE31 G2 FE32 G1 FE33 H1 FE34 H2 FE35 H2 FE36 H1 FE37 H1 FE44 E5 FE45 E5 FE47 C1 FE57 F5 FE92 D5 FE93 E5 FE94 E5 FE95 B1 FE96 F4 FE97 F4 FE99 C3 FEA5 H10 FEA6 H10 FEA7 H10 FEA8 H10 FEA9 H10 FEB0 H10 FEB1 H9 FEB4 H2 FEB5 I10 FEB6 I10 FEB7 I10 FEB8 I10 FEB9 D1 FEC0 E1 IE11 H1 IE12 H1 IE75 F1 IE76 F1 IE78 C12 IE79 A4 IE81 C2 IE82 E2 IE84 E2 IE95 C12 IE99 D12 IEA1 B10 IEA2 C10 IEA3 C10 IEA4 C10 IEA5 C10 IEA6 C10 IEA7 D10 IEA8 E11 IEB0 E10 IEB1 E10 IEB4 G10 IEB5 F10 IEC4 E9 IEC5 E9 IEC6 F9 IEC7 G9 IEC8 G12 IEC9 G12 IED0 H12 IED1 H11 IED2 H11

6 HOTEL TV
9E31 +3V3-STANDBY

10

11

12

13

14

ANALOGUE EXTERNAL D
B

RXD UART-SWITCH

3ECK 100R 3ECL 100R

7E19-1 74HC4066 1 13

14

IE79 2

2ECH 100n RXD-UP

AV1-B AV1-G AV1-R

9EA1 9EA2 9EA3 9EA7 +5V

AV1-PB AV1-Y AV1-PR AV1-Y_CVBS

1 1 X1 7

7E19-2 74HC4066 4 5

14

AV1-CVBS 1 3 RXD-MIPS

1 X1

UART-SWITCHn

3ECN 100R 3ECP 100R

FOR MHP BOLT-ON

5EA1

B
D

TXD

7E19-3 74HC4066 8 1 6 X1

14

30R

2EAA 10u 2EA9

1 7

TXD-UP

IEA1

UART-SWITCHn

+3V3-STANDBY 10K FE47 3E08 100R IE81 7E20 PDTC114EU 3E40 10K +3V3-STANDBY RES PMEG1020EA

12

1 X1 7

10

TXD-MIPS

UART-SWITCH

1 3EAV 3EC3 3EC4 3ED2 3EC2 3EC5 47K 47K 47K 47K 47K 47K BEB9 IEA2 IEA3 IEA4 BEB8 BEB7 2 3 4 10 9 8 7 BEB5

SWITCH IN1 IN3 S1A D1 S1B IN2 S2A D2 S2B S3A D3 S3B IN4 S4A D4 S4B NC GND VSS 6 5

SPDT

VDD

16

FE95

3ECM

7E19-4 74HC4066 11 1

14

7EA1 ADG734BRU

100n MHP-SWITCH 11 12 13 14 20 19 18 17 15 47K 3EAT 47K 3EB3 IE95 IE78 2ECE BO-CVBS 4u7 AV1-Y_CVBS AV1-Y

RES

RES 9E08 6E50 +3V3

6E19

9E09

RES

+3V3

BO-R AV1-R RXD-MIPS 9E35 RXD BO-B AV1-B TXD-MIPS 9E36 TXD BO-G

2EA1 2EA2 2EA3 2EAP 2EAQ 2EA6

4u7 4u7 4u7 4u7 4u7 4u7

DEBUG / RS232 INTERFACE

PMEG1020EA 7E17 ST3232C 2E62 100n 16

FE99

IEA5 BEB6 IEA6 IEA7

47K

47K

47K

47K

47K

47K

D
G
TXD-UP FEB9 9E03

3 4 5

VC1V+ C2+ C2-

6 2

3EAC

3EAA

3EAB

3EC6

3EC7

3EC8

C1+

RS232

VCC 2E60 100n 2E61 100n B4B-PH-SM4-TBT(LF) 14 7 12 9 FE44 FE45 BEB3 BEB0 5 4 FE92 FE93 BEB1 BEB2 FE94 6 5 1E50 1 2 3 4

AV1-G

47K 3EC9 47K 3ED1 IE99 2EB6 AV1-CVBS 4u7

2E63 100n

D
AV1-PB

LEVEL SHIFTED FOR


33K

BEB4

11 10 IE82 13 8

T1 IN T2 R1 IN R2

OUT

T1 T2 R1 R2

UP

AV1-PR

GND

TXD-MIPS RXD-MIPS

OUT

+3V3 4 3ECQ-4 5

1E51 1 2 3

DEBUG MIPS USE ONLY


BO-AUDIO-R 3 3ECQ-1 8 3ECQ-3 33K 1 33K 6

E
H
IE84 RXD-UP FEC0 9E05

15

IEA8 2EAC 1u0 IEB1 7EA3 74HC4053PW 2EAD 1u0 IEB0 6 2 16 2EAB 100n

IEC4

B3B-PH-SM4-TBT(LF) 9E41 AV1-AUDIO-R IE75 TXD IE76 RXD 3E91 100R 3E41 BZX384-C5V1 100R 6E25 6E27 FE97 1008 1029 BZX384-C5V1 FE57 9E40 FE96 2 3 1 1E06

IEC5

G4

MDX
14 AUDIO-IN1-R

VDD

3ECQ-2

13 12 11

1 2 4X1 4X2

33K

TO ITV BOLT - ON MODULE


is prohibited without the written consent of the copyright

SERVICE CONNECTOR
BO-AUDIO-L AV1-AUDIO-L 3 1

4 3ECS-4 5

F
1R07 1 2 3 4 5 6 7 8 9 FE12 FE11 FE10 FE14 FE32 FE31 3E67 100R FE15 10 11 2E38 2E25 100p 100p FE30 100R 3E00

UART

All rights reserved. Reproduction in whole or in parts

AV1-B AV1-G AV1-R AV1-BLK-BO AV1-AUDIO-L AV1-AUDIO-R


AV1-CVBS

3ECS-3 33K

33K

1 2 10

15

AUDIO-IN1-L

6 8

IEC6 IEC7

2EAE 2EAF

1u0 1u0

IEB5 IEB4

3 5 9 VEE VSS 7

7 3ECS-2 2

33K 3ECS-1

33K

MHP-SWITCH

MHP-SWITCH

3E88 10K

+3V3

G
K
owner.

AV1-AUDIO-R AV1-AUDIO-L

9EA4 9EA5

IEC8 IEC9

AUDIO-IN1-R AUDIO-IN1-L

1R08 1 2 3 4 5 6 7 8 9 10 B10P-PH-K-S

FE37 FE36 FE35 5E03 IE12 FE33 30R IE11 +3V3-STANDBY FEB4 FE34 3E23 100R 3E83 100R 100R 100R 3E86 3E57 3E84 100R 3E09

FOR MHP BOLT-ON


100R RXD-UP TXD-UP
SCL-BOLT-ON SDA-BOLT-ON RC-UP

1R12 1 2 3 4 5 6 7 8 9 10 11 12 13 14 FEA5 FEA6 FEA7 FEA8 FEB1 3ECE FEA9 FEB0 FEB5 FEB6 FEB7 FEB8 15 16 100p RES 2ECD RES 2EAM RES 2ECB 100p RES 2ECC 100p RES 2EAN 2EAK 1n0 2EAL 100p 22p 1n0 3EAY 3EAZ 1K0 1K0 68R IED1 IED2 BO-AUDIO-L BO-AUDIO-R BO-CVBS BO-R BO-G BO-B 3ECF 3ECG 3ECH 100R 100R 100R 9E30 BOLT-ON-IO RXD-UP TXD-UP AV1-BLK IED0SPDIF-IN1

BOLT-ON-IO
STANDBY

BOLT-ON-IO

3E87 10K +3V3

CVBS-TER-OUT 2E09 2E20 3E39 10K RES

2E03

100p

100p

100p

I
1HP0 FE29 FE27 SDA-SSB 5 FE28 100R 3E93

BM14B-SRSS-TBT

SCL 1
2

100R

3E85

SCL-SSB

SDA 3 4

1
O

10

11
CHN
CLASS_NO

12
SETNAME

13

14
O
2 2008-11-21

ANA + SIDE I/O


P
2008-10-10 3 SUPERS. DATE 2008-01-18 4
C

TV543 R2 LDIPNX
NAME Maelegheer Ingrid CHECK

8204 000 8930


P
130 4 A2 ROYAL PHILIPS ELECTRONICS N.V. 2007

10

11

12

13

14

15

16

17

18

19

20
18310_545_090303.eps 090303

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 120

SSB: Mini PCI Connector

10

11

12

13

2 MINI PCI CONNECTOR


5A00 +3V3 RES 2A00 330u 6.3V 2A01 30R

6
RES

IA28 +3V3-mPCI +5V 100n 2A03 100n 2A04 100n 2A05 100n 2A06 100n 2A08 2A02 100n 2A07 100n 2A09 100n 1u0 30R 2A50 2A51 100n 2A52 100n 1u0 5A01 FA37 +5V-mPCI

ROW_A 1A01-A 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 1734065-3

ROW_B 1A01-B 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 125

C
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

IRQB-mPCI

IA29 +3V3-mPCI 9A00 RES IRQ-PCI

+5V-mPCI IRQA-mPCI

IA27 9A01 IA26 RESET-mPCI RESET-mPCI 9A02 RESET-ETHERNET IRQ-PCI

B
D

PCI-CLK-MINI PCI-REQ-MINI +3V3-mPCI PCI-AD31 PCI-AD29 PCI-AD27 PCI-AD25 PCI-CBE3 PCI-AD23 PCI-AD21 PCI-AD19 PCI-AD17 PCI-CBE2 PCI-IRDY +3V3-mPCI PCI-CLKRUN PCI-SERR PCI-PERR PCI-CBE1 PCI-AD14 PCI-AD12 PCI-AD10 PCI-AD8 PCI-AD7 +3V3-mPCI PCI-AD5 PCI-AD3 +5V-mPCI PCI-AD1 PCI-CLKRUN 10K IA30 3A01

+3V3-mPCI PCI-GNT-MINI IA20 PME PCI-AD30 +3V3-mPCI PCI-AD28 PCI-AD26 PCI-AD24 IDSEL PCI-AD22 PCI-AD20 PCI-PAR PCI-AD18 PCI-AD16 PCI-FRAME PCI-TRDY PCI-STOP +3V3-mPCI PCI-DEVSEL PCI-AD15 PCI-AD13 PCI-AD11 PCI-AD9 PCI-CBE0 +3V3-mPCI PCI-AD12 PCI-AD6 PCI-AD4 PCI-AD2 PCI-AD0 IA21 PCI-AD13 PCI-AD11 IA22 IA23 3A04 100R RES 3A03 RES 100R 3A05 100R IDSEL PME 10K 3A02 +3V3-mPCI

1A01-A A1 1A01-B A6 2A00 A3 2A01 A3 2A02 A3 2A03 A3 2A04 A4 2A05 A4 2A06 A4 2A07 A4 2A08 A5 2A09 A5 2A50 A7 2A51 A7 2A52 A8 3A00 E9 3A01 C4 3A02 B9 3A03 D9 3A04 D9 3A05 D9 3A06 E9 5A00 A2 5A01 A7 9A00 B3 9A01 B7 9A02 B9 FA30 E1 FA31 E2 FA32 E1 FA33 E1 FA34 E6 FA35 E6 FA36 E6 FA37 A8 IA20 B9 IA21 D9 IA22 D9 IA23 D9 IA24 E9 IA25 E9 IA26 B7 IA27 B7 IA28 A3 IA29 B2 IA30 C4

owner.

IA24 M66EN FA34 FA35 M66EN

3A00 10K

FA30 FA31 FA32

E
H

E
FA36 MPCIACT MPCIACT IA25 3A06 10K +3V3-mPCI

FA33

1734065-3

4
1X09 REF EMC HOLE

5
CHN

7
SETNAME

CLASS_NO

2008-11-21

MINI PCI
J
2008-10-10 3 SUPERS. DATE 2007-10-16 2
C

TV543 R2 LDIPNX
NAME Maelegheer Ingrid CHECK

8204 000 8935


130 1 A3

ROYAL PHILIPS ELECTRONICS N.V. 2008

10

11

12

13
18310_546_090303.eps 090303

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 121

SSB: DDR Supply

10

11

12
1M01 E3 2A10 E3 2A11 E5 2A12 E5 2A13 B6 2A14 B6 2A15 C4 2A16 C4 2A19 A5 2A20 A4 2A21 B5 2A22 C1 2A23 E6 2A24 E6 2A25 A7 2A26 A7 2A27 B7 2A28 D7 2A29 D7 2A30 E7 2AC0 E1 3A07 C1 3A08 A3 3A09 A3 3A10 B3 3A11 A3 3A12 A4 3A13 A6 3A14 B5 3A15 B5 3A16 E5 3A17 B5 3A18 E6 3A19 D6 3A20 C3 3A21 C3 3A22 C4 3A23 C5 3A24 D4 3A25 D4 3A26 A1 3A27 A1 3AC0 E1 5AC1 E2 5AC2 E2 5AC4 E3 6A01 E7 7A00-1 A5 7A00-2 D5 7A01 A6 7A02 D7 7A03 D3 7A07 A1 FA01 A6 FA02 E6 FA03 E6 FA04 A1 FA06 C4 FAC0 E3 IA01 B3 IA02 A4 IA03 A5 IA04 B5 IA05 A6 IA06 B5 IA07 D4 IA08 D3 IA09 E5 IA10 C1 IA11 E5 IA12 E7

13
IA13 E6 IAC2 E3 IAC3 E3 IAC4 E1

1
DDR SUPPLY

6
+3V3F

1K0

+2V5-REF +12V RES 470R 3A08 3A26 3A27 2K2 2K2 3A12 +V-LM833 7A01 PHD38N02LT 2A25 IA03 1 100n 10K 2 4 2A19 3A11 2A20 3A13 22R 1n0 IA05 1 3 FA01 1u0 IA02 470R 3 1u0 2A26 7A00-1 LM833 8 2

A
7A07 TS2431

+2V5-REF 1 K FA04 3A09

C
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

2 2A21 IA01 3A10 1K0

330p

IA04 3A17

B
IA06

1K0

3A14 RES 22u 6.3V 1K0 1u0 3A15 2A14 1u0 22K 2A13 2A27

+2V5

D
3A07 +12V 10R
owner.

+12V

3A21

IA10 +V-LM833

4K7

RES

2A22

3A20

2A16

330p

4K7

100n

RES 3A23 1K0 1% RES

RES

RES 2A15 22n 3 1

RES FA06 3A22 1K0

NC

IA07 4 2K2 1% +3V3F RES +V-LM833 7A02 PHD38N02LT 2A28

REF

RES 3A24

3A25

22K

D
IA08

RES 7A03 TS431AILT

NC

D
1u0 2A29 7 3A19 FA02 1n0 22R IA13 IA12 SS24 6A01 1u0

5 6 RES 100n

7A00-2 LM833

2A10

2A12

2A11

330p

IA09 3A16 1K0

E
H
KEYBOARD 3AC0 10R 2AC0 100p

5AC1 IAC4 30R +3V3-STANDBY 5AC2 30R 30R

IAC2 FAC0 IAC3

1M01 1 2 3

E
3A18 FA03 22u 6.3V +1V8-PNX85XX 2A23 2A24 RES 2A30 1K0 1u0 1u0

5AC4

IA11

5
CHN
CLASS_NO

6
SETNAME

2008-11-21

MINI PCI
J
2008-10-10 3 SUPERS. DATE 2008-01-18 2
C

TV543 R2 LDIPNX
NAME Maelegheer Ingrid CHECK

8204 000 8935


130 2 A3

ROYAL PHILIPS ELECTRONICS N.V. 2008

10

11

12

13
18310_547_090303.eps 090303

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 122

SSB: Audio

10

11

12
1735 E9 1D38 E6 1D50 E9 1D51 F8 1D52 F9 1D53 F5 1D54 F6 2D01 E2 2D02 D2 2D05 A4 2D06 A5 2D07 A5 2D08 A7 2D09 C7 2D10 C7 2D11 C8 2D12 C8 2D13 F9 2D14 E9 2D15 C8 2D16 C4 2D17 C4 2D18 B8 2D19 A7 2D20 A5 2D21 D8 2D22 B8 2D23 C4 2D24 B4 2D25 F8 2D26 B8 2D27 D8 2D30 A5 2D31 A6 3D03 E2 3D06-1 D2 3D06-2 D2 3D06-3 D2 3D06-4 D2 3D09 A3 3D10-1 D8 3D10-2 D8 3D10-3 D7 3D10-4 D7 3D11-1 F7 3D11-2 F8 3D11-3 E8 3D11-4 E7 3D14-1 B8 3D14-2 B8 3D14-3 B8 3D14-4 B7 3D16 A4 3D17 C4 5D01 C7 5D02 C7 5D04 C9 5D05 C9 5D07 A6 5D08 A6 5D09 F8 7D03-1 A4 7D03-2 C2 7D10-1 B6 7D10-2 D3 CD10 D5 FD02 F9 FD05 E9 FD06 F9 FD07 D2 FD14 A5 ID05 C8 ID06 C8 ID07 C8 ID08 C8 ID09 C7

13
ID10 C7 ID11 A4 ID12 A4 ID16 C4 ID18 C5 ID19 B5 ID27 A6 ID28 B6 ID29 C5 ID30 C5 ID31 C6 ID32 C6 ID33 D2 ID36 B4 ID37 C4 ID38 D4

1
A

2 AUDIO

+AUDIO-POWER

4R7

3D09

7D03-1 BC847BS(COL)

+AUDIO-POWER FD14 GND-AUDIO 2D30 GND-AUDIO

2D06

A
B
ID11

220n

3D16 22K

A
25V 220u 25V 220u 220R 5D07 2D08 2D31 2D19 220n 220R 5D08
GND-AUDIO

2D05

ID12

10u 35V

220u 25V 2D20 220u 25V 2D07 220n

ID27 ID28

3D14-3 15K

3D14-2 15K

3D14-4 15K

3D14-1 220n

2D22 220n

C
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

2D26

15K

B
-AUDIO-R ID36 2D24 47n ID19 7D10-1 TPA3120D2PWP

B
19 20 10 12 1 3
2D18 16 15 22 21 ID31 2D09 220n VCLAMP BYPASS MUTE SD PGND AGND L R GND_HS ID09 ID32 2D10 220n ID10 5D02 22u 5D01 22u ID05 ID06 25V 220u 2D12 25V 220u ID08 2D11 25V 220u 2D15 25V 220u ID07

AVCC 6 ID16 +AUDIO-L 2D23 47n GND-AUDIO 2D16 2D17


owner.

R PVCC BSR R OUT L 5D05 220R 5D04 220R LEFT-SPEAKER RIGHT-SPEAKER

R IN L 0 GAIN 1

ID18

5 18 17

CLASS-D AUDIO AMP

C
A-STBY 3D17 7D03-2 BC847BS(COL) 3D06-4 FD07 5 100K 4 2 3D06-2 100K 3D06-1 100K 2D02 10u GND-AUDIO 7 5 AUDIO-MUTE A-STBY 3 1 2 4K7

BSL

ID29

1u0 1u0 ID37 ID30

11 7 4 2

E
LEFT-SPEAKER

23 24

13 14

25

8 9

ID38

3D10-4 15K

3D10-3 15K

3D10-2 15K

3D10-1 220n

2D21 220n

CD10

D
F
RIGHT-SPEAKER 6 3D06-3 3 100K

15K

4 8 ID33

2D27

GND-AUDIO GND-AUDIO 7D10-2 TPA3120D2PWP 26 27 28 29

40 39 38

GND-AUDIO

VIA VIA

VIA
VIA

VIA

GND-AUDIO

37 36 35 34

GND-AUDIO LEFT-SPEAKER GND-AUDIO

2D14

100R 2D01 10n GND-AUDIO

1D38 LEFT-SPEAKER GND-A RIGHT-SPEAKER 1 2 3 1735446-3 GND-AUDIO 1735 GND-AUDIO 5D09 220R FD05 FD06 1 2 3 4

2n2

V_NOM

3D11-4

3D11-3

1D50

3D03

1K5

1K5

30 31 32 33

V_NOM

FD02 GND-A

V_NOM

1D53

1D54

V_NOM

2D25

10n 1D51

GND-AUDIO

1735446-4

3D11-1

3D11-2

2D13

GND-AUDIO

1K5

1K5

V_NOM

RIGHT-SPEAKER

1D52

2n2

6
CHN
CLASS_NO

7
SETNAME

8
CLASS D

9
2 2008-11-21

J
2008-10-10 3 NAME Randal De Keyzer CHECK

TV543 R2 LDIPNX
SUPERS. DATE 2007-10-12 1
C

8204 000 8931


130 1 A3

ROYAL PHILIPS ELECTRONICS N.V. 2007

10

11

12

13
18310_548_090303.eps 090303

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 123

SSB: SRP List Explanation


Example
Net Name Diagram

Personal Notes:

1.1.

Introduction
SRP (Service Reference Protocol) is a software tool that creates a list with all references to signal lines. The list contains references to the signals within all schematics of a PWB. It replaces the text references currently printed next to the signal names in the schematics. These printed references are created manually and are therefore not guaranteed to be 100% correct. In addition, in the current crowded schematics there is often none or very little place for these references. Some of the PWB schematics will use SRP while others will still use the manual references. Either there will be an SRP reference list for a schematic, or there will be printed references in the schematic.

+12-15V AP1 (4x) +12-15V AP4 (4x) +12-15V AP5 (12x) +12-15V AP6 (4x) +12-15V AP7 (8x) +12V AP1 (4x) +12V_NF AP1 (2x) +12VAL AP1 (2x) +25VLP AP1 (4x) +25VLP AP2 (1x) +3V3-STANDBY AP5 (3x) +400V-F AP1 (2x) +400V-F AP2 (2x) +400V-F AP3 (2x) +5V2 AP1 (6x) +5V2 AP2 (1x) +5V2-NF AP1 (1x) +5V2-NF AP2 (1x) +5V-SW AP1 (6x) +5V-SW AP2 (1x) +8V6 AP1 (3x) +AUX AP1 (2x) +AUX AP2 (1x) +DC-F AP1 (2x) +DC-F AP3 (2x) +SUB-SPEAKER AP5 (1x) +SUB-SPEAKER AP6 (2x) -12-15V AP1 (4x) -12-15V AP4 (6x) -12-15V AP5 (14x) -12-15V AP6 (6x) -12-15V AP7 (8x) AL-OFF AP1 (2x) AUDIO-L AP4 (1x) AUDIO-L AP5 (1x) AUDIO-PROT AP5 (3x) AUDIO-R AP4 (1x) AUDIO-R AP5 (1x) AUDIO-SW AP5 (1x) AUDIO-SW AP7 (1x) BOOST AP1 (2x) CPROT AP4 (2x) CPROT AP5 (1x) CPROT-SW AP5 (1x) CPROT-SW AP6 (2x) -DC-F AP1 (2x) -DC-F AP3 (2x) DC-PROT AP1 (1x) DC-PROT AP5 (2x) DIM-CONTROL AP1 (2x) FEEDBACK+SW AP6 (2x) FEEDBACK-L AP4 (2x) FEEDBACK-R AP4 (2x) FEEDBACK-SW AP6 (2x) GND-AL AP1 (2x) GNDHA AP1 (40x) GNDHA AP2 (20x) GNDHA AP3 (2x) GNDHOT AP3 (2x) GND-L AP1 (2x) GND-L AP4 (4x) GND-L AP5 (34x) GND-LL AP4 (7x) GND-LL AP5 (1x) GND-LR AP4 (7x) GND-LR AP5 (1x) GND-LSW AP5 (1x) GND-LSW AP6 (15x) GND-S AP1 (11x) GND-SA AP4 (8x) GND-SA AP5 (2x) GND-SA AP6 (8x) GND-SA AP7 (6x) GNDscrew AP3 (2x) GNDscrew AP5 (2x) GND-SSB AP5 (3x) GND-SSP AP1 (51x) GND-SSP AP2 (15x) IN+SW AP6 (2x) IN-L AP4 (2x) IN-R AP4 (2x) IN-SW AP6 (2x) INV-MUTE AP4 (1x) INV-MUTE AP5 (1x) INV-MUTE AP6 (1x) LEFT-SPEAKER AP4 (1x) LEFT-SPEAKER AP5 (1x) MUTE AP4 (2x) MUTE AP5 (1x) MUTE AP6 (2x) ON-OFF AP1 (3x) OUT AP6 (1x) OUT AP7 (2x) OUTN AP6 (1x) OUTN AP7 (1x) POWER-GOOD AP1 (2x) POWER-OK-PLATFORM AP1 (2x) RIGHT-SPEAKER AP4 (1x) RIGHT-SPEAKER AP5 (1x) SOUND-ENABLE AP5 (3x) STANDBY AP1 (5x) STANDBY AP2 (1x) -SUB-SPEAKER AP5 (1x) -SUB-SPEAKER AP6 (2x) V-CLAMP AP1 (1x) V-CLAMP AP3 (2x)

1.2.

Non-SRP Schematics
There are several different signals available in a schematic:

1.2.1.

Power Supply Lines All power supply lines are available in the supply line overview (see chapter 6). In the schematics (see chapter 7) is not indicated where supplies are coming from or going to. It is however indicated if a supply is incoming (created elsewhere), or outgoing (created or adapted in the current schematic).
+5V +5V

Outgoing 1.2.2. Normal Signals

Incoming

For normal signals, a schematic reference (e.g. B14b) is placed next to the signals.
B14b signal_name

1.2.3.

Grounds For normal and special grounds (e.g. GNDHOT or GND3V3 etc.), nothing is indicated.

1.3.

SRP Schematics
SRP is a tool, which automatically creates a list with signal references, indicating on which schematic the signals are used. A reference is created for all signals indicated with an SRP symbol, these symbols are:
+5V +5V

Power supply line.

name

name

Stand alone signal or switching line (used as less as possible).


name

name

Signal line into a wire tree.


name name

Switching line into a wire tree.


name

Bi-directional line (e.g. SDA) into a wire tree.


name

Signal line into a wire tree, its direction depends on the circuit (e.g. ingoing for PDP, outgoing for LCD sets). Remarks: When there is a black dot on the "signal direction arrow" it is an SRP symbol, so there will be a reference to the signal name in the SRP list. All references to normal grounds (Ground symbols without additional text) are not listed in the reference list, this to keep it concise. Signals that are not used in multiple schematics, but only once or several times in the same schematic, are included in the SRP reference list, but only with one reference. Additional Tip: When using the PDF service manual file, you can very easily search for signal names and follow the signal over all the schematics. In Adobe PDF reader: Select the signal name you want to search for, with the "Select text" tool. Copy and paste the signal name in the "Search PDF" tool. Search for all occurrences of the signal name. Now you can quickly jump between the different occurrences and follow the signal over all schematics. It is advised to "zoom in" to e.g. 150% to see clearly, which text is selected. Then you can zoom out, to get an overview of the complete schematic. PS. It is recommended to use at least Adobe PDF (reader) version 6.x, due to better search possibilities in this version.
10000_031_090121.eps 090121

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 124

SSB: SRP List Part 1


Netname
B01B B01C B02B B06B B06C B07B B07H B08B B09B B01B B05H B01A B01B B01A B01C B02B B02B B06E B06G B06A B06E B06G B01C B04A B05C B05C B05C B05C B05C B05C B05C B05C B01A B02B B04A B04P B06A B06E B01A B01B B04P B05A B05C B06E B04G B04P B06E B07D B09B B06A B06E B06F B09B B06F B06G B06E B06G B06A B06E B06G B06E B06G B09B B01B B02A B01A B01B B02B B04A B04L B04M B04N B04P B05C B05E B05F B05G B05H B05I B06A B06B B06C B06E B07A B07C B07D B07F B07G B07H B08A B08B B08D B09A B02A B02B B02B B02B B07G B07G B01A B05H B09B B06E B06G B06A B09A B07F B04A B04B B04E B04F B04N B04P B05C B05C B05C B05C B01B B04A B04P B07D

Schematic
+12V +12V +12V +12V +12V +12V +12V +12V +12V +12VD +12VD +12VF +12VF +12VF1 +12VF2 +1V2 +1V2A +1V2-FPGA +1V2-FPGA +1V2M +1V2-PLL +1V2-PLL +1V2-PNX5100 +1V2-PNX5100 +1V2-PNX5100 +1V2-PNX5100-CLOCK +1V2-PNX5100-DDR-PLL1 +1V2-PNX5100-DLL +1V2-PNX5100-LVDS-PLL +1V2-PNX5100-TRI-PLL1 +1V2-PNX5100-TRI-PLL2 +1V2-PNX5100-TRI-PLL3 +1V2-PNX85XX +1V2-PNX85XX +1V2-PNX85XX +1V2-PNX85XX +1V2-PNX85XX +1V2-PNX85XX +1V2-STANDBY +1V2-STANDBY +1V2-STANDBY +1V8-PNX5100 +1V8-PNX5100 +1V8-PNX5100 +1V8-PNX85XX +1V8-PNX85XX +1V8-PNX85XX +1V8-PNX85XX +1V8-PNX85XX +2V5 +2V5 +2V5 +2V5 +2V5-DDR1 +2V5-DDR1 +2V5in-FPGA +2V5in-FPGA +2V5M +2V5out-FPGA +2V5out-FPGA +2V5-PLL +2V5-PLL +2V5-REF +33VTUN +33VTUN +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3A +3V3A +3V3D +3V3E +3V3-ET-ANA +3V3-ET-DIG +3V3F +3V3F +3V3F +3V3-FPGA +3V3-FPGA +3V3M +3V3-mPCI +3V3-NAND +3V3-PER +3V3-PER +3V3-PER +3V3-PER +3V3-PER +3V3-PER +3V3-PNX5100-CLOCK +3V3-PNX5100-DDR-PLL0 +3V3-PNX5100-LVDS-IN +3V3-PNX5100-LVDS-PLL +3V3-STANDBY +3V3-STANDBY +3V3-STANDBY +3V3-STANDBY

B08D B09B B01B B01C B04A B04L B06A B07C B07D B08A B08B B08D B09A B01C B07H B07E B07D B07E B09A B02A B02B B07H B02B B02A B04I B10 B01B B04I B04M B10 B05H B06D B05E B05H B05E B05H B09B B02A B07D B04I (1) B04L (1) B04I (1) B04L (1) B04L (1) B04M (1) B04L (1) B04M (1) B04I (1) B04L (1) B04I (1) B04L (1) B04I (1) B04L (3) B04I (1) B04L (3) B07D (4) B04A (2) B05D (1) B02B (2) B02A (2) B02B (1) B04M (1) B08A (1) B08B (2) B08A (3) B08A (3) B07D (2) B07D (2) B07D (2) B07D (2) B07D (2) B07D (2) B07D (2) B07D (2) B07D (3) B07D (3) B07D (2) B06E (1) B06G (1) B04M (1) B10 (2) B04I (1) B08A (1) B04I (1) B08A (1) B04M (1) B08C (1) B04M (1) B08C (1) B04L (1) B08D (2) B04L (1) B08D (2) B04L (1) B08A (1) B04L (1) B08A (1) B04L (1) B08B (1) B04L (1) B08B (1) B04L (1) B07B (1) B04L (1) B07B (1) B04L (1) B08C (2) B04L (1) B08C (2) B04A (2) B10 (1) B04I (1) B08B (1) B04I (1) B08B (1) B04I (1) B10 (1) B04I (7) B04M (2) B08A (1) B08D (3) B08A (1) B08D (3)

+3V3-STANDBY +3V3-STANDBY +5V +5V +5V +5V +5V +5V +5V +5V +5V +5V +5V +5V5-TUN +5V5-TUN +5V-DDC +5V-EDID +5V-EDID +5V-mPCI +5V-TUN +5V-TUN +5V-TUN +5V-TUN-CVBS +5V-TUN-PIN +AUDIO-L +AUDIO-L +AUDIO-POWER +AUDIO-POWER +AUDIO-POWER +AUDIO-POWER +VDISP +VDISP +VDISP1 +VDISP1 +VDISP2 +VDISP2 +V-LM833 +VTUN 1V8-HDMI ADAC(1) ADAC(1) ADAC(2) ADAC(2) ADAC(3) ADAC(3) ADAC(4) ADAC(4) ADAC(5) ADAC(5) ADAC(6) ADAC(6) ADAC(7) ADAC(7) ADAC(8) ADAC(8) AIN-5V ALE AMBI-VS ANTENNA-CTRL ANTENNA-SUPPLY ANTENNA-SUPPLY A-PLOP A-PLOP A-PLOP AP-SCART-OUT-L AP-SCART-OUT-R ARX0ARX0+ ARX1ARX1+ ARX2ARX2+ ARXCARXC+ ARX-DDC-SCL ARX-DDC-SDA ARX-HOTPLUG ASDO ASDO A-STBY A-STBY AUDIO-CL-L AUDIO-CL-L AUDIO-CL-R AUDIO-CL-R AUDIO-HDPH-L-AP AUDIO-HDPH-L-AP AUDIO-HDPH-R-AP AUDIO-HDPH-R-AP AUDIO-IN1-L AUDIO-IN1-L AUDIO-IN1-R AUDIO-IN1-R AUDIO-IN2-L AUDIO-IN2-L AUDIO-IN2-R AUDIO-IN2-R AUDIO-IN3-L AUDIO-IN3-L AUDIO-IN3-R AUDIO-IN3-R AUDIO-IN4-L AUDIO-IN4-L AUDIO-IN4-R AUDIO-IN4-R AUDIO-IN5-L AUDIO-IN5-L AUDIO-IN5-R AUDIO-IN5-R AUDIO-MUTE AUDIO-MUTE AUDIO-OUT-L AUDIO-OUT-L AUDIO-OUT-R AUDIO-OUT-R -AUDIO-R -AUDIO-R AUDIO-VDD AUDIO-VDD AV1-AUDIO-L AV1-AUDIO-L AV1-AUDIO-R AV1-AUDIO-R

B08A (1) B08D (3) B04A (1) B08A (1) B08D (1) B08A (1) B08D (1) B08A (1) B08D (3) B08A (1) B08D (3) B04K (1) B08D (2) B04K (1) B08D (2) B08A (1) B08D (3) B04A (1) B08A (1) B04K (1) B08D (2) B04K (1) B08B (1) B08D (2) B04A (1) B08A (1) B04A (1) B08A (1) B04K (1) B08A (1) B08B (1) B04K (1) B08A (1) B04K (1) B08A (1) B04K (1) B08A (1) B04K (1) B08A (1) B08B (1) B04K (1) B08A (1) B08B (1) B04K (2) B08A (1) B08B (1) B04K (1) B08A (1) B04K (1) B08A (1) B04K (2) B08A (1) B01B (1) B05H (1) B05H (1) B06A (1) B06G (1) B05H (3) B01B (1) B05E (1) B05H (1) B06G (1) B05H (1) B06G (1) B01B (1) B05H (1) B05H (2) B02A (3) B02A (3) B07D (4) B06A (2) B06A (2) B06A (2) B06A (2) B06A (2) B05D (1) B06A (1) B05D (1) B06A (1) B05D (1) B06A (1) B06A (2) B05D (1) B06A (1) B08D (2) B08D (2) B08D (2) B08D (2) B08D (2) B04A (2) B04N (1) B08D (3) B04A (2) B04N (1) B05H (3) B04E (2) B08D (2) B07D (2) B07D (2) B07D (2) B07D (2) B07D (2) B07D (2) B07D (2) B07D (2) B07D (3) B07D (3) B07D (2) B04K (1) B08B (1) B04N (1) B07H (3) B04N (1) B07A (2) B04N (1) B07A (2) B07A (1) B07H (1) B07A (1) B07H (1) B04N (1) B07H (1) B04N (1)

AV1-B AV1-B AV1-BLK AV1-BLK AV1-BLK AV1-BLK-BO AV1-BLK-BO AV1-CVBS AV1-CVBS AV1-G AV1-G AV1-PB AV1-PB AV1-PR AV1-PR AV1-R AV1-R AV1-STATUS AV1-STATUS AV1-Y AV1-Y AV1-Y_CVBS AV1-Y_CVBS AV1-Y_CVBS AV2-BLK AV2-BLK AV2-STATUS AV2-STATUS AV2-Y_CVBS AV2-Y_CVBS AV2-Y_CVBS AV3-PB AV3-PB AV3-PR AV3-PR AV3-Y AV3-Y AV4-PB AV4-PB AV4-PB AV4-PR AV4-PR AV4-PR AV4-Y AV4-Y AV4-Y AV5-PB AV5-PB AV5-PR AV5-PR AV5-Y AV5-Y BACKLIGHT-BOOST BACKLIGHT-BOOST BACKLIGHT-CONTROL-FPGA-IN BACKLIGHT-CONTROL-FPGA-IN BACKLIGHT-CONTROL-FPGA-IN BACKLIGHT-CTRL BACKLIGHT-OUT BACKLIGHT-OUT BACKLIGHT-OUT BACKLIGHT-OUT BACKLIGHT-OUT2 BACKLIGHT-OUT2 BACKLIGHT-PWM-ANA-DISP BACKLIGHT-PWM-ANA-DISP BACKLIGHT-PWM-ANA-SSB B-IF-_N-IFB-IF+_N-IF+ BIN-5V BL-CLK BL-CS BL-HS BL-MISO BL-MOSI BL-OSCLK BL-OSCLK BL-SCK BL-SCK BL-SD0 BL-SD0 BL-VS BL-WS BL-WS BO-AUDIO-L BO-AUDIO-R BO-B BO-CVBS BO-G BOLT-ON-IO BOLT-ON-IO BOLT-ON-IO BOLT-ON-TS-ENn BOLT-ON-TS-ENn BOOST-CTRL BOOTMODE BO-R BRX0BRX0+ BRX1BRX1+ BRX2BRX2+ BRXCBRXC+ BRX-DDC-SCL BRX-DDC-SDA BRX-HOTPLUG B-VGA B-VGA CA-ADDEN CA-ADDEN CA-CD1 CA-CD1 CA-CD2 CA-CD2 CA-CE1 CA-CE1 CA-CE2 CA-CE2 CA-DATADIR CA-DATADIR CA-DATAEN

B07H (1) B07A (2) B07A (1) B07H (1) B07A (1) B07H (1) B04N (1) B07A (1) B04N (1) B07A (1) B04N (1) B07A (1) B04N (1) B07A (1) B04N (1) B07A (1) B04N (1) B07A (1) B04N (1) B07A (1) B04N (1) B07A (1) B04N (1) B07A (2) B04N (1) B07A (2) B04N (1) B07A (2) B04N (1) B07A (2) B04N (1) B07A (2) B04N (1) B07A (2) B04N (1) B07A (2) B04N (1) B07A (2) B04N (1) B07A (1) B04N (1) B07A (1) B04N (1) B07A (1) B04N (2) B07A (2) B04N (1) B07A (2) B04N (1) B07A (2) B07A (1) B07H (1) B07A (1) B07H (1) B04N (1) B07A (2) B04N (1) B07A (2) B07A (2) B07H (1) B07A (1) B07H (1) B06A (3) B04A (2) B07D (1) B07D (4) B06G (2) B05F (1) B06A (1) B06G (1) B06E (1) B06G (1) B06E (1) B06G (1) B06E (1) B06G (1) B06E (1) B06G (1) B06E (1) B06G (1) B06E (1) B06G (1) B06E (1) B06G (1) B07D (2) B07D (2) B07D (2) B07D (2) B07D (2) B07D (2) B07D (2) B07D (2) B07D (3) B07D (3) B07D (2) B06A (4) B05H (2) B05H (2) B05H (2) B05H (3) B05E (1) B05H (1) B05E (1) B05H (1) B05E (1) B05H (1) B05E (1) B05H (2) B02B (1) B04K (1) B08B (2) B08A (2) B02B (1) B08A (1) B08D (1) B06E (1) B06G (1) B06E (1) B06G (1) B04H (1) B07E (1) B04H (1) B07E (1)

CA-DATAEN CA-INPACK CA-IORD CA-IORD CA-IOWR CA-IOWR CA-MDI0 CA-MDI0 CA-MDI1 CA-MDI1 CA-MDI2 CA-MDI2 CA-MDI3 CA-MDI3 CA-MDI4 CA-MDI4 CA-MDI5 CA-MDI5 CA-MDI6 CA-MDI6 CA-MDI7 CA-MDI7 CA-MDO0 CA-MDO0 CA-MDO1 CA-MDO1 CA-MDO2 CA-MDO2 CA-MDO3 CA-MDO3 CA-MDO4 CA-MDO4 CA-MDO5 CA-MDO5 CA-MDO6 CA-MDO6 CA-MDO7 CA-MDO7 CA-MICLK CA-MICLK CA-MISTRT CA-MISTRT CA-MIVAL CA-MIVAL CA-MOCLK_VS2 CA-MOCLK_VS2 CA-MOSTRT CA-MOSTRT CA-MOVAL CA-MOVAL CA-OE CA-OE CA-REG CA-REG CA-RST CA-RST CA-VS1 CA-VS1 CA-WAIT CA-WAIT CA-WE CA-WE CCLK CEC-HDMI CEC-HDMI CIN-5V CLK-OUT2-PNX5100 CLK-OUT-PNX5100 CLK-OUT-PNX5100 CLK-OUT-PNX5100 CON20 CON20 CON21 CON21 CON22 CON22 CON23 CON23 CON26 CON26 CON27 CON27 CONF-DONE CONF-DONE CRX0CRX0+ CRX1CRX1+ CRX2CRX2+ CRXCCRXC+ CRX-DDC-SCL CRX-DDC-SDA CRX-HOTPLUG CSO-B CTRL1-PNX5100 CTRL2-PNX5100 CTRL3-PNX5100 CTRL4-PNX5100 CTRL-DISP1 CTRL-DISP1 CTRL-DISP2 CTRL-DISP2 CTRL-DISP3 CTRL-DISP3 CTRL-DISP4 CTRL-DISP4 CVBS4 CVBS4 CVBS-MON-OUT-CINCH CVBS-OUT-SC1 CVBS-TER-OUT CVBS-TER-OUT CVBS-TER-OUT DATA0 DATA0 DCLK DCLK DDCA-SCL DDCA-SCL DDCA-SDA DDCA-SDA

B04H (1) B07D (1) B04H (1) B07D (1) B04G (3) B04G (3) B04G (3) B04G (3) B04G (3) B04G (3) B04G (3) B04G (3) B04G (3) B04G (3) B04G (3) B04G (3) B04G (3) B04G (3) B04G (3) B04G (2) B04G (3) B04G (3) B04G (4) B04G (4) B04G (3) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (2) B04G (3) B04G (3) B04G (2) B04G (3) B04G (3) B04A (3) B01B (1) B04A (1) B04A (3) B07D (4) B06A (2) B06F (2) B06F (2) B06F (2) B06F (2) B06F (2) B06F (2) B06F (2) B06F (2) B06F (2) B06F (2) B06F (2) B06F (2) B06F (2) B06F (2) B06F (2) B06F (2) B06F (2) B06F (2) B07D (2) B07D (2) B07D (2) B07D (2) B07D (2) B07D (2) B07D (2) B07D (2) B07D (3) B07D (3) B07D (2) B04A (2) B07E (4) B04A (2) B06B (1) B05F (1) B05F (1) B05F (1) B05F (1) B05F (1) B04E (2) B06B (1) B04E (2) B06B (1) B04E (2)

DDC-SCL DDC-SCL DDC-SDA DDC-SDA DDR2-A0 DDR2-A1 DDR2-A10 DDR2-A11 DDR2-A12 DDR2-A2 DDR2-A3 DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9 DDR2-BA0 DDR2-BA1 DDR2-BA2 DDR2-CAS DDR2-CKE DDR2-CLK_N DDR2-CLK_P DDR2-CS DDR2-D0 DDR2-D1 DDR2-D10 DDR2-D11 DDR2-D12 DDR2-D13 DDR2-D14 DDR2-D15 DDR2-D16 DDR2-D17 DDR2-D18 DDR2-D19 DDR2-D2 DDR2-D20 DDR2-D21 DDR2-D22 DDR2-D23 DDR2-D24 DDR2-D25 DDR2-D26 DDR2-D27 DDR2-D28 DDR2-D29 DDR2-D3 DDR2-D30 DDR2-D31 DDR2-D4 DDR2-D5 DDR2-D6 DDR2-D7 DDR2-D8 DDR2-D9 DDR2-DQM0 DDR2-DQM1 DDR2-DQM2 DDR2-DQM3 DDR2-DQS0_N DDR2-DQS0_P DDR2-DQS1_N DDR2-DQS1_P DDR2-DQS2_N DDR2-DQS2_P DDR2-DQS3_N DDR2-DQS3_P DDR2-ODT DDR2-RAS DDR2-VREF-CTRL DDR2-VREF-DDR DDR2-WE DETECT1 DETECT-12V DETECT-12V DETECT2 DIN-5V DONE DQ1(0) DQ1(1) DQ1(10) DQ1(11) DQ1(12) DQ1(13) DQ1(14) DQ1(15) DQ1(2) DQ1(3) DQ1(4) DQ1(5) DQ1(6) DQ1(7) DQ1(8) DQ1(9) DQS10 DQS11 DRX0DRX0+ DRX1DRX1+ DRX2DRX2+ DRXCDRXC+ DRX-DDC-SCL DRX-DDC-SDA DRX-HOTPLUG EA EIN-5V EJTAG-DETECT EJTAG-DETECT EJTAG-PNX5100-TCK EJTAG-PNX5100-TDI EJTAG-PNX5100-TDO EJTAG-PNX5100-TMS EJTAG-PNX5100-TRSTn EJTAG-TCK EJTAG-TCK EJTAG-TDI EJTAG-TDI EJTAG-TDO

B06B (1) B04E (2) B06B (1) B04E (2) B06B (1) B01B (1) B04A (2) B01A (1) B01B (1) B01C (1) B07E (3) B07E (3) B07E (3) B06C (2) B06C (2) B06C (2) B05H (1) B06C (1) B05H (1) B02B (1) B04N (3) B02B (1) B04N (3) B02B (1) B04N (3) B02B (1) B04N (3) B02B (1) B04N (3) B02B (1) B04N (3) B02B (1) B04N (3) B02B (1) B04N (3) B02B (1) B04N (3) B04N (4) B02B (1) B04N (3) B02B (1) B04N (3) B04K (1) B08C (2) B04K (1) B08C (2) B10 (2) B01B (1) B10 (16) B01A (15) B01C (15) B04K (1) B08B (1) B04H (1) B07E (2) B04H (1) B07E (2) B04H (1) B07E (2) B04H (1) B07E (2) B04H (1) B07E (2) B04H (1) B07E (2) B04H (1) B07E (2) B04H (1) B07E (2) B04H (1) B07D (1) B04H (1) B07D (1) B04H (1) B07D (1) B04H (1) B07D (1) B04H (1) B07D (1) B04H (1) B07D (1) B04H (1) B07D (1) B04H (1) B07D (1) B04H (1) B04H (1) B07E (1) B04K (1) B08B (1) B04N (1) B07F (1) B04N (1) B07F (1) B09A (2) B02A (1) B02B (1) B02A (1) B02B (1) B02A (2) B02B (1) B04K (1) B02B (1) B04K (1) B09A (1) B09A (1) B04E (2) B04N (1) B07A (2) B04E (2) B07G (1) B09A (2) B01B (1) B04A (2) B09B (1) B04A (3) B01B (1) B04A (1) B05E (1) B05H (2) B01B (2) B04A (2) B01B (2)

EJTAG-TDO EJTAG-TMS EJTAG-TMS EJTAG-TRSTN EJTAG-TRSTN ENABLE-3V3 ENABLE-3V3 ENABLE-3V3-5V ENABLE-3V3-5V ENABLE-3V3-5V ERX-DDC-SCL ERX-DDC-SDA ERX-HOTPLUG FAN1-DRV FAN1-OUT FAN2-DRV FAN-CTRL-1 FAN-CTRL-1 FAN-CTRL-2 FE-CLK FE-CLK FE-DATA0 FE-DATA0 FE-DATA1 FE-DATA1 FE-DATA2 FE-DATA2 FE-DATA3 FE-DATA3 FE-DATA4 FE-DATA4 FE-DATA5 FE-DATA5 FE-DATA6 FE-DATA6 FE-DATA7 FE-DATA7 FE-ERR FE-SOP FE-SOP FE-VALID FE-VALID FRONT-C FRONT-C FRONT-Y_CVBS FRONT-Y_CVBS GND-A GND-AUDIO GND-AUDIO GND-SIG GND-SIG1 G-VGA G-VGA HDMIA-RX0HDMIA-RX0HDMIA-RX0+ HDMIA-RX0+ HDMIA-RX1HDMIA-RX1HDMIA-RX1+ HDMIA-RX1+ HDMIA-RX2HDMIA-RX2HDMIA-RX2+ HDMIA-RX2+ HDMIA-RXCHDMIA-RXCHDMIA-RXC+ HDMIA-RXC+ HDMIB-RX0HDMIB-RX0HDMIB-RX0+ HDMIB-RX0+ HDMIB-RX1HDMIB-RX1HDMIB-RX1+ HDMIB-RX1+ HDMIB-RX2HDMIB-RX2HDMIB-RX2+ HDMIB-RX2+ HDMIB-RXCHDMIB-RXCHDMIB-RXC+ HDMIB-RXC+ HOT-PLUG HOT-PLUG-A HOT-PLUG-A H-SYNC-VGA H-SYNC-VGA I2C-SCL I2C-SCL I2C-SDA I2C-SDA IDSEL IFIFIF+ IF+ IF-AGC IF-AGC IF-N IF-P IF-P IRQA-mPCI IRQB-mPCI IRQ-CA IRQ-CA IRQ-CA IRQ-PCI IRQ-PCI IRQ-PCI KEYBOARD KEYBOARD KEYBOARD LAMP-ON LAMP-ON-OUT LAMP-ON-OUT LAMP-ON-OUT LCD-PWR-ON LED1 LED1 LED2

B04A (2) B10 (3) B01B (2) B04A (1) B09A (2) B07A (4) B07A (4) B07A (4) B07A (4) B07A (4) B07A (4) B07A (4) B07A (4) B04A (2) B08D (3) B06A (3) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1) B06F (1) B06G (1)

LED2 LEFT-SPEAKER LIGHT-SENSOR LIGHT-SENSOR M66EN MDO0 MDO1 MDO2 MDO3 MDO4 MDO5 MDO6 MDO7 MHP-SWITCH MHP-SWITCH MISO MM1-A0 MM1-A0 MM1-A1 MM1-A1 MM1-A10 MM1-A10 MM1-A11 MM1-A11 MM1-A12 MM1-A12 MM1-A2 MM1-A2 MM1-A3 MM1-A3 MM1-A4 MM1-A4 MM1-A5 MM1-A5 MM1-A6 MM1-A6 MM1-A7 MM1-A7 MM1-A8 MM1-A8 MM1-A9 MM1-A9 MM1-BA0 MM1-BA0 MM1-BA1 MM1-BA1 MM1-CAS MM1-CAS MM1-CKE MM1-CKE MM1-CLKMM1-CLKMM1-CLK+ MM1-CLK+ MM1-CS0 MM1-CS0 MM1-D0 MM1-D0 MM1-D1 MM1-D1 MM1-D10 MM1-D10 MM1-D11 MM1-D11 MM1-D12 MM1-D12 MM1-D13 MM1-D13 MM1-D14 MM1-D14 MM1-D15 MM1-D15 MM1-D2 MM1-D2 MM1-D3 MM1-D3 MM1-D4 MM1-D4 MM1-D5 MM1-D5 MM1-D6 MM1-D6 MM1-D7 MM1-D7 MM1-D8 MM1-D8 MM1-D9 MM1-D9 MM1-DQS0 MM1-DQS0 MM1-DQS1 MM1-DQS1 MM1-RAS MM1-RAS

3104 313 6343.2

18310_700_090309.eps 090309

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 125

SSB: SRP List Part 2


Netname
B06F (1) B06G (1) B07A (4) B06A (3) B07A (4) B07A (4) B09A (2) B06G (1) B06G (1) B06G (1) B06G (1) B07F (2) B07F (2) B07F (2) B07F (2) B07F (2) B07F (2) B07F (2) B07F (2) B07F (2) B07F (2) B07F (2) B07F (2) B06G (2) B06G (2) B06E (1) B06G (1) B06G (2) B07D (6) B07E (2) B04F (1) B05G (1) B07F (1) B07G (1) B07H (1) B09A (1) B04F (1) B05G (1) B07F (1) B07G (1) B07H (2) B09A (1) B04F (1) B05G (1) B07G (1) B07H (1) B09A (1) B04F (1) B05G (1) B07G (1) B07H (1) B09A (2) B04F (1) B05G (1) B07G (1) B07H (1) B09A (2) B04F (1) B05G (1) B07G (1) B07H (1) B09A (2) B04F (1) B05G (1) B07G (1) B07H (1) B09A (1) B04F (1) B05G (1) B07G (1) B09A (1) B04F (1) B05G (1) B07G (1) B07H (1) B09A (1) B04F (1) B05G (1) B07G (1) B07H (1) B09A (1) B04F (1) B05G (1) B07G (1) B07H (1) B09A (1) B04F (1) B05G (1) B07G (1) B07H (1) B09A (1) B04F (1) B05G (1) B07G (1) B07H (1) B09A (1) B04F (1) B05G (1) B07G (1) B09A (1) B04F (1) B05G (1) B07G (1) B09A (1) B04F (1) B05G (1) B07G (1) B07H (1) B09A (1) B04F (1) B05G (1) B07G (2) B07H (1) B09A (1) B04F (2) B05G (1) B07F (1) B07G (1) B07H (1) B09A (1) B04F (1)

Schematic
MM1-WE MM1-WE MOCLK_VS2 MOSI MOSTRT MOVAL MPCIACT MSEL0 MSEL1 MSEL2 MSEL3 NAND-AD(0) NAND-AD(1) NAND-AD(2) NAND-AD(3) NAND-AD(4) NAND-AD(5) NAND-AD(6) NAND-AD(7) NAND-ALE NAND-CLE NAND-REn NAND-WEn nCE nCONFIG nCSO nCSO nSTATUS PCEC-HDMI PCEC-HDMI PCI-AD0 PCI-AD0 PCI-AD0 PCI-AD0 PCI-AD0 PCI-AD0 PCI-AD1 PCI-AD1 PCI-AD1 PCI-AD1 PCI-AD1 PCI-AD1 PCI-AD10 PCI-AD10 PCI-AD10 PCI-AD10 PCI-AD10 PCI-AD11 PCI-AD11 PCI-AD11 PCI-AD11 PCI-AD11 PCI-AD12 PCI-AD12 PCI-AD12 PCI-AD12 PCI-AD12 PCI-AD13 PCI-AD13 PCI-AD13 PCI-AD13 PCI-AD13 PCI-AD14 PCI-AD14 PCI-AD14 PCI-AD14 PCI-AD14 PCI-AD15 PCI-AD15 PCI-AD15 PCI-AD15 PCI-AD16 PCI-AD16 PCI-AD16 PCI-AD16 PCI-AD16 PCI-AD17 PCI-AD17 PCI-AD17 PCI-AD17 PCI-AD17 PCI-AD18 PCI-AD18 PCI-AD18 PCI-AD18 PCI-AD18 PCI-AD19 PCI-AD19 PCI-AD19 PCI-AD19 PCI-AD19 PCI-AD2 PCI-AD2 PCI-AD2 PCI-AD2 PCI-AD2 PCI-AD20 PCI-AD20 PCI-AD20 PCI-AD20 PCI-AD21 PCI-AD21 PCI-AD21 PCI-AD21 PCI-AD22 PCI-AD22 PCI-AD22 PCI-AD22 PCI-AD22 PCI-AD23 PCI-AD23 PCI-AD23 PCI-AD23 PCI-AD23 PCI-AD24 PCI-AD24 PCI-AD24 PCI-AD24 PCI-AD24 PCI-AD24 PCI-AD25

B05G (2) B07F (1) B07G (1) B07H (1) B09A (1) B04F (1) B05G (1) B07F (1) B07G (1) B07H (1) B09A (1) B04F (1) B05G (1) B07F (1) B07G (1) B07H (1) B09A (1) B04F (1) B05G (1) B07F (1) B07G (1) B07H (1) B09A (1) B04F (1) B05G (1) B07F (1) B07G (1) B07H (1) B09A (1) B04F (1) B05G (1) B07G (1) B07H (1) B09A (1) B04F (1) B05G (1) B07F (1) B07G (1) B07H (1) B09A (1) B04F (1) B05G (1) B07F (1) B07G (1) B07H (1) B09A (1) B04F (1) B05G (1) B07G (1) B07H (1) B09A (1) B04F (1) B05G (1) B07G (1) B07H (1) B09A (1) B04F (1) B05G (1) B07G (1) B07H (1) B09A (1) B04F (1) B05G (1) B07G (1) B07H (1) B09A (1) B04F (1) B05G (1) B07G (1) B07H (1) B09A (1) B04F (1) B05G (1) B07G (1) B07H (1) B09A (1) B04F (1) B05G (1) B07G (1) B09A (1) B04F (1) B05G (1) B07F (1) B07G (1) B07H (1) B09A (1) B04F (1) B05G (1) B07F (1) B07G (1) B07H (1) B09A (1) B04F (1) B05G (1) B07G (1) B09A (1) B04F (2) B07G (1) B04F (2) B09A (1) B04E (1) B04F (3) B04F (2) B05G (1) B04F (3) B09A (2) B04F (2) B05G (1) B07G (1) B09A (1) B04F (2) B05G (1) B07G (1) B09A (1) B04F (2) B04F (2) B04F (1) B07G (1) B04F (1) B09A (1) B04F (2) B05G (1) B07G (1)

PCI-AD25 PCI-AD25 PCI-AD25 PCI-AD25 PCI-AD25 PCI-AD26 PCI-AD26 PCI-AD26 PCI-AD26 PCI-AD26 PCI-AD26 PCI-AD27 PCI-AD27 PCI-AD27 PCI-AD27 PCI-AD27 PCI-AD27 PCI-AD28 PCI-AD28 PCI-AD28 PCI-AD28 PCI-AD28 PCI-AD28 PCI-AD29 PCI-AD29 PCI-AD29 PCI-AD29 PCI-AD29 PCI-AD29 PCI-AD3 PCI-AD3 PCI-AD3 PCI-AD3 PCI-AD3 PCI-AD30 PCI-AD30 PCI-AD30 PCI-AD30 PCI-AD30 PCI-AD30 PCI-AD31 PCI-AD31 PCI-AD31 PCI-AD31 PCI-AD31 PCI-AD31 PCI-AD4 PCI-AD4 PCI-AD4 PCI-AD4 PCI-AD4 PCI-AD5 PCI-AD5 PCI-AD5 PCI-AD5 PCI-AD5 PCI-AD6 PCI-AD6 PCI-AD6 PCI-AD6 PCI-AD6 PCI-AD7 PCI-AD7 PCI-AD7 PCI-AD7 PCI-AD7 PCI-AD8 PCI-AD8 PCI-AD8 PCI-AD8 PCI-AD8 PCI-AD9 PCI-AD9 PCI-AD9 PCI-AD9 PCI-AD9 PCI-CBE0 PCI-CBE0 PCI-CBE0 PCI-CBE0 PCI-CBE1 PCI-CBE1 PCI-CBE1 PCI-CBE1 PCI-CBE1 PCI-CBE1 PCI-CBE2 PCI-CBE2 PCI-CBE2 PCI-CBE2 PCI-CBE2 PCI-CBE2 PCI-CBE3 PCI-CBE3 PCI-CBE3 PCI-CBE3 PCI-CLK-ETHERNET PCI-CLK-ETHERNET PCI-CLK-MINI PCI-CLK-MINI PCI-CLK-OUT PCI-CLK-OUT PCI-CLK-PNX5100 PCI-CLK-PNX5100 PCI-CLK-PNX8535 PCI-CLKRUN PCI-DEVSEL PCI-DEVSEL PCI-DEVSEL PCI-DEVSEL PCI-FRAME PCI-FRAME PCI-FRAME PCI-FRAME PCI-GNT PCI-GNT-B PCI-GNT-ETH PCI-GNT-ETH PCI-GNT-MINI PCI-GNT-MINI PCI-IRDY PCI-IRDY PCI-IRDY

B09A (1) B04F (1) B05G (1) B07G (1) B09A (1) B04F (2) B05G (1) B07G (1) B09A (1) B04F (2) B04F (2) B04F (1) B07G (1) B04F (1) B09A (1) B04F (2) B05G (1) B07G (1) B09A (1) B04F (2) B05G (1) B07G (1) B09A (1) B04F (2) B05G (1) B07G (1) B09A (1) B07A (1) B07H (1) B07A (1) B07H (1) B07A (1) B07H (1) B07A (1) B07H (1) B07A (1) B07H (1) B07A (1) B07H (1) B07A (1) B07H (1) B07A (1) B07H (1) B07A (1) B07H (1) B07A (1) B07H (1) B07A (1) B07H (1) B07A (1) B07H (1) B07A (1) B07H (1) B07A (1) B07H (1) B07A (1) B07H (1) B07A (1) B07H (1) B07A (1) B07H (1) B07A (1) B07H (1) B07A (1) B07H (1) B07A (1) B07H (1) B07A (1) B07H (1) B07A (1) B07H (1) B07A (1) B07H (1) B07A (5) B02A (2) B02B (1) B02A (1) B02B (1) B09A (2) B05A (3) B05A (3) B05A (3) B05A (3) B05A (3) B05A (3) B05A (3) B05A (3) B05A (3) B05A (3) B05A (3) B05A (3) B05A (3) B05A (3) B05A (3) B05A (3) B05A (3) B05A (3) B05A (3) B05A (3) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2)

PCI-IRDY PCI-PAR PCI-PAR PCI-PAR PCI-PAR PCI-PERR PCI-PERR PCI-PERR PCI-PERR PCI-REQ PCI-REQ-B PCI-REQ-ETH PCI-REQ-ETH PCI-REQ-MINI PCI-REQ-MINI PCI-SERR PCI-SERR PCI-SERR PCI-SERR PCI-STOP PCI-STOP PCI-STOP PCI-STOP PCI-TRDY PCI-TRDY PCI-TRDY PCI-TRDY PCMCIA-A0 PCMCIA-A0 PCMCIA-A1 PCMCIA-A1 PCMCIA-A10 PCMCIA-A10 PCMCIA-A11 PCMCIA-A11 PCMCIA-A12 PCMCIA-A12 PCMCIA-A13 PCMCIA-A13 PCMCIA-A14 PCMCIA-A14 PCMCIA-A2 PCMCIA-A2 PCMCIA-A3 PCMCIA-A3 PCMCIA-A4 PCMCIA-A4 PCMCIA-A5 PCMCIA-A5 PCMCIA-A6 PCMCIA-A6 PCMCIA-A7 PCMCIA-A7 PCMCIA-A8 PCMCIA-A8 PCMCIA-A9 PCMCIA-A9 PCMCIA-D0 PCMCIA-D0 PCMCIA-D1 PCMCIA-D1 PCMCIA-D2 PCMCIA-D2 PCMCIA-D3 PCMCIA-D3 PCMCIA-D4 PCMCIA-D4 PCMCIA-D5 PCMCIA-D5 PCMCIA-D6 PCMCIA-D6 PCMCIA-D7 PCMCIA-D7 PCMCIA-VCC-VPP PDN PDN PDP PDP PME PNX5100-DDR2-A0 PNX5100-DDR2-A1 PNX5100-DDR2-A10 PNX5100-DDR2-A11 PNX5100-DDR2-A12 PNX5100-DDR2-A2 PNX5100-DDR2-A3 PNX5100-DDR2-A4 PNX5100-DDR2-A5 PNX5100-DDR2-A6 PNX5100-DDR2-A7 PNX5100-DDR2-A8 PNX5100-DDR2-A9 PNX5100-DDR2-BA0 PNX5100-DDR2-BA1 PNX5100-DDR2-CAS PNX5100-DDR2-CKE PNX5100-DDR2-CLK_N PNX5100-DDR2-CLK_P PNX5100-DDR2-CS PNX5100-DDR2-D0 PNX5100-DDR2-D1 PNX5100-DDR2-D10 PNX5100-DDR2-D11 PNX5100-DDR2-D12 PNX5100-DDR2-D13 PNX5100-DDR2-D14 PNX5100-DDR2-D15 PNX5100-DDR2-D16 PNX5100-DDR2-D17 PNX5100-DDR2-D18 PNX5100-DDR2-D19 PNX5100-DDR2-D2 PNX5100-DDR2-D20 PNX5100-DDR2-D21 PNX5100-DDR2-D22 PNX5100-DDR2-D23 PNX5100-DDR2-D24 PNX5100-DDR2-D25 PNX5100-DDR2-D26 PNX5100-DDR2-D27 PNX5100-DDR2-D28 PNX5100-DDR2-D29 PNX5100-DDR2-D3

B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (2) B05A (3) B05A (3) B05A (2) B05A (3) B05A (3) B05F (1) B05I (1) B01B (1) B04A (2) B06A (2) B04A (2) B01B (1) B04A (2) B04A (1) B08C (1) B04A (1) B08C (1) B04A (4) B08D (1) B07D (2) B04A (2) B08A (1) B04A (2) B04M (2) B04N (1) B07F (1) B04A (2) B07G (2) B09A (1) B09A (2) B04A (3) B04A (2) B05F (1) B04A (2) B02B (1) B04A (2) B04B (1) B04E (1) B02A (4) B02B (1) B10 (3) B04H (1) B04P (2) B04K (1) B08B (1) B05B (1) B06D (3) B05B (1) B06D (3) B05B (1) B06D (3) B05B (1) B06D (3) B05B (1) B06D (3) B05B (1) B06D (3) B05B (1) B06D (3) B05B (1) B06D (3) B05B (1) B06D (3) B05B (1) B06D (3) B05B (1) B06D (3) B05B (1) B06D (3) B05B (1) B06D (3) B05B (1) B06D (3) B05B (1) B06D (3) B05B (1) B06D (3) B05B (1) B06D (3) B05B (1) B06D (3) B05B (1) B06D (3) B05B (1) B06D (3) B05B (1) B06D (3) B05B (1) B06D (3) B05B (1) B06D (3) B05B (1) B06D (3) B08D (3) B04E (2) B08D (3) B04E (2) B06B (1) B04A (2) B08D (4) B04E (2) B04E (3) B04E (2)

PNX5100-DDR2-D30 PNX5100-DDR2-D31 PNX5100-DDR2-D4 PNX5100-DDR2-D5 PNX5100-DDR2-D6 PNX5100-DDR2-D7 PNX5100-DDR2-D8 PNX5100-DDR2-D9 PNX5100-DDR2-DQM0 PNX5100-DDR2-DQM1 PNX5100-DDR2-DQM2 PNX5100-DDR2-DQM3 PNX5100-DDR2-DQS0_N PNX5100-DDR2-DQS0_P PNX5100-DDR2-DQS1_N PNX5100-DDR2-DQS1_P PNX5100-DDR2-DQS2_N PNX5100-DDR2-DQS2_P PNX5100-DDR2-DQS3_N PNX5100-DDR2-DQS3_P PNX5100-DDR2-ODT PNX5100-DDR2-RAS PNX5100-DDR2-VREF-CTRL PNX5100-DDR2-VREF-DDR PNX5100-DDR2-WE PNX5100-RST-OUT PNX5100-RST-OUT POWER-OK POWER-OK PROG-B PSEN RC RC RC-IN RC-IN RC-OUT RC-OUT RC-UP RC-UP REF-3V3 REGIMBEAU_CVBS-SWITCH REGIMBEAU_CVBS-SWITCH RESET-AUDIO RESET-AUDIO RESET-BOLT-ON RESET-BOLT-ON RESET-ETHERNET RESET-ETHERNET RESET-ETHERNET RESET-mPCI RESET-NVM RESET-PNX5100 RESET-PNX5100 RESET-STBY RESET-SYSTEM RESET-SYSTEM RESET-SYSTEM RESET-SYSTEM RF-AGC RF-AGC RIGHT-SPEAKER RREF-PNX85XX RREF-PNX85XX R-VGA R-VGA RX51001ARX51001ARX51001A+ RX51001A+ RX51001BRX51001BRX51001B+ RX51001B+ RX51001CRX51001CRX51001C+ RX51001C+ RX51001CLKRX51001CLKRX51001CLK+ RX51001CLK+ RX51001DRX51001DRX51001D+ RX51001D+ RX51001ERX51001ERX51001E+ RX51001E+ RX51002ARX51002ARX51002A+ RX51002A+ RX51002BRX51002BRX51002B+ RX51002B+ RX51002CRX51002CRX51002C+ RX51002C+ RX51002CLKRX51002CLKRX51002CLK+ RX51002CLK+ RX51002DRX51002DRX51002D+ RX51002D+ RX51002ERX51002ERX51002E+ RX51002E+ RXD RXD-MIPS RXD-MIPS RXD-MIPS2 RXD-MIPS2 RXD-UP RXD-UP SCL1 SCL2 SCL3

B05F (1) B06A (1) B06G (1) B04N (1) B06A (3) B08D (1) B05E (2) B06A (3) B06D (1) B01B (1) B04E (2) B06A (5) B06C (2) B06A (2) B06A (2) B02B (2) B04E (2) B05F (2) B06A (1) B06G (1) B07D (1) B08D (1) B04A (3) B04E (3) B04E (2) B04E (3) B04E (2) B05F (1) B06A (1) B06G (1) B04N (1) B06A (3) B08D (1) B05E (2) B06A (3) B06D (1) B01B (1) B04E (2) B06A (5) B06C (2) B06A (2) B06A (2) B02B (2) B04E (2) B05F (2) B06A (1) B06G (1) B07D (1) B08D (1) B04A (3) B04E (3) B04A (2) B04B (1) B04P (2) B04L (1) B08D (1) B04L (1) B08B (1) B04A (2) B04A (2) B04A (2) B04B (1) B04A (3) B04A (2) B04A (3) B01B (1) B04A (2) B08D (1) B04A (2) B06C (2) B06C (2) B06C (2) B06C (2) B06E (1) B06G (1) B06E (1) B06G (1) B06E (1) B06G (1) B06E (1) B06G (1) B04N (2) B07F (1) B04N (2) B07F (1) B04N (2) B07F (1) B04N (2) B07F (1) B04N (2) B07F (1) B04N (2) B07F (1) B04N (2) B07F (1) B04N (2) B07F (1) B04N (2) B07F (1) B04N (2) B04N (2) B07F (1) B04N (2) B07F (1) B02A (5) B02A (5) B02A (4) B02A (5) B02A (6) B02A (5) B02A (5) B02A (5) B02A (5) B02A (5) B02A (6) B02A (2) B02B (2) B02A (2) B02B (2) B05E (3) B05E (3) B05E (3) B05E (3)

SCL-AMBI-3V3 SCL-AMBI-3V3 SCL-AMBI-3V3 SCL-BOLT-ON SCL-BOLT-ON SCL-BOLT-ON SCL-DISP SCL-DISP SCL-DISP SCL-SET SCL-SET SCL-SET SCL-SET SCL-SET0 SCL-SET1 SCL-SSB SCL-SSB SCL-SSB SCL-SSB SCL-SSB SCL-SSB SCL-SSB SCL-UP-MIPS SCL-UP-MIPS SDA1 SDA2 SDA3 SDA-AMBI-3V3 SDA-AMBI-3V3 SDA-AMBI-3V3 SDA-BOLT-ON SDA-BOLT-ON SDA-BOLT-ON SDA-DISP SDA-DISP SDA-DISP SDA-SET SDA-SET SDA-SET SDA-SET SDA-SET0 SDA-SET1 SDA-SSB SDA-SSB SDA-SSB SDA-SSB SDA-SSB SDA-SSB SDA-SSB SDA-UP-MIPS SDA-UP-MIPS SDM SDM SENSE+1V2-PNX85XX SPDIF-IN1 SPDIF-IN1 SPDIF-OUT SPDIF-OUT SPI-CLK SPI-CSB SPI-PROG SPI-PROG SPI-SDI SPI-SDO SPI-WP STANDBY STANDBY STANDBY SUPPLY-FAULT TACHO1 TACHO1-INV TACHO2 TACHO2-INV TCK TCK TDI TDI TDO TDO TMS TMS TSINO-DATA0 TSINO-DATA0 TSINO-DATA1 TSINO-DATA1 TSINO-DATA2 TSINO-DATA2 TSINO-DATA3 TSINO-DATA3 TSINO-DATA4 TSINO-DATA4 TSINO-DATA5 TSINO-DATA5 TSINO-DATA6 TSINO-DATA6 TSINO-DATA7 TSINO-DATA7 TSO-BIT-CLK TSO-BIT-CLK TSO-BIT-ERR TSO-BIT-VALID TSO-BIT-VALID TSO-SYNC TSO-SYNC TUN-P1 TUN-P10 TUN-P11 TUN-P2 TUN-P3 TUN-P4 TUN-P5 TUN-P6 TUN-P7 TUN-P8 TUN-P9 TUN-SCL TUN-SCL TUN-SDA TUN-SDA TX1ATX1A+ TX1BTX1B+

B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B05E (3) B04O (1) B06D (1) B06G (1) B04O (1) B06D (1) B06G (1) B04O (1) B06D (1) B06G (1) B04O (1) B06D (1) B06G (2) B04O (1) B06D (1) B06G (1) B04O (1) B06D (1) B06G (1) B04O (1) B06D (1) B06G (1) B04O (1) B06D (1) B06G (1) B04O (1) B06D (1) B06G (1) B04O (1) B06D (1) B06G (1) B04O (1) B06D (1) B06G (1) B04O (1) B06D (1) B06G (1) B04O (1) B06D (1) B06G (1) B04O (1) B06D (1) B06G (1) B04O (1) B06D (1) B06G (1) B04O (1) B06D (1) B06G (1) B04O (1) B06D (1) B06G (1) B04O (1) B06D (1) B06G (1) B04O (1) B06D (1) B06G (1) B04O (1) B06D (1) B06G (1) B04O (1) B06D (1) B06G (1) B04O (1) B06D (1) B06G (1) B04O (1) B06D (1) B06G (1) B04O (1) B06D (1) B06G (1) B05E (1) B06A (1) B05E (1) B06A (1) B08D (3) B05E (1) B06A (1)

TX1CTX1C+ TX1CLKTX1CLK+ TX1DTX1D+ TX1ETX1E+ TX2ATX2A+ TX2BTX2B+ TX2CTX2C+ TX2CLKTX2CLK+ TX2DTX2D+ TX2ETX2E+ TX3ATX3A+ TX3BTX3B+ TX3CTX3C+ TX3CLKTX3CLK+ TX3DTX3D+ TX3ETX3E+ TX4ATX4A+ TX4BTX4B+ TX4CTX4C+ TX4CLKTX4CLK+ TX4DTX4D+ TX4ETX4E+ TX851ATX851ATX851ATX851A+ TX851A+ TX851A+ TX851BTX851BTX851BTX851B+ TX851B+ TX851B+ TX851CTX851CTX851CTX851C+ TX851C+ TX851C+ TX851CLKTX851CLKTX851CLKTX851CLK+ TX851CLK+ TX851CLK+ TX851DTX851DTX851DTX851D+ TX851D+ TX851D+ TX851ETX851ETX851ETX851E+ TX851E+ TX851E+ TX852ATX852ATX852ATX852A+ TX852A+ TX852A+ TX852BTX852BTX852BTX852B+ TX852B+ TX852B+ TX852CTX852CTX852CTX852C+ TX852C+ TX852C+ TX852CLKTX852CLKTX852CLKTX852CLK+ TX852CLK+ TX852CLK+ TX852DTX852DTX852DTX852D+ TX852D+ TX852D+ TX852ETX852ETX852ETX852E+ TX852E+ TX852E+ TXCLKTXCLKTXCLK+ TXCLK+ TXD TXDATTXDAT-

B05E (1) B06A (1) B04E (2) B08D (3) B04E (2) B06B (1) B04A (2) B08D (4) B06D (1) B06G (1) B06D (1) B06G (1) B06D (1) B06G (1) B06D (1) B06G (1) B06D (1) B06G (1) B06D (1) B06G (1) B06D (1) B06G (1) B06D (1) B06G (1) B06D (1) B06G (1) B06D (1) B06G (1) B06D (1) B06G (1) B06D (1) B06G (1) B06D (1) B06G (1) B06D (1) B06G (1) B06D (1) B06G (1) B06D (1) B06G (1) B06D (1) B06G (1) B06D (1) B06G (1) B06D (1) B06G (1) B06D (1) B06G (1) B06D (1) B06G (1) B06D (1) B06G (1) B06D (1) B06G (1) B06D (1) B06G (1) B04A (2) B08D (2) B08D (2) B04E (2) B07C (1) B04E (2) B07C (1) B04E (1) B07C (1) B04P (2) B04L (4) B04P (2) B04L (1) B04P (2) B04O (1) B04P (1) B06F (2) B06F (1) B06G (16) B01A (1) B01B (1) B04K (1) B08B (1) B04E (1) B05F (2) B07D (1) B04A (2) B07F (2) B07D (1) B07E (1) B08B (1) B04F (1) B07F (2) B04F (1) B07F (2) B04K (1) B08B (1) B08A (1) B08B (1)

TXDAT+ TXDAT+ TXD-MIPS TXD-MIPS TXD-MIPS2 TXD-MIPS2 TXD-UP TXD-UP TXF1ATXF1ATXF1A+ TXF1A+ TXF1BTXF1BTXF1B+ TXF1B+ TXF1CTXF1CTXF1C+ TXF1C+ TXF1CLKTXF1CLKTXF1CLK+ TXF1CLK+ TXF1DTXF1DTXF1D+ TXF1D+ TXF1ETXF1ETXF1E+ TXF1E+ TXF2ATXF2ATXF2A+ TXF2A+ TXF2BTXF2BTXF2B+ TXF2B+ TXF2CTXF2CTXF2C+ TXF2C+ TXF2CLKTXF2CLKTXF2CLK+ TXF2CLK+ TXF2DTXF2DTXF2D+ TXF2D+ TXF2ETXF2ETXF2E+ TXF2E+ UART-SWITCH UART-SWITCH UART-SWITCHn USB20-DM USB20-DM USB20-DP USB20-DP USB-OC USB-OC VDDA-ADC VDDA-AUDIO VDDA-AUDIO VDDA-DAC VDDA-DAC VDDA-LVDS VDDA-LVDS VREF-DDR1 VREF-FPGA1 VREF-FPGA1 VSW VSW V-SYNC-VGA V-SYNC-VGA WC-EEPROM-PNX5100 WC-EEPROM-PNX5100 WC-EEPROM-PNX5100 WP-NANDFLASH WP-NANDFLASH WRITE-PROT WRITE-PROT WRITE-PROT XIO-ACK XIO-ACK XIO-SEL-NAND XIO-SEL-NAND Y_CVBS-MON-OUT Y_CVBS-MON-OUT Y_CVBS-MON-OUT-SC Y_CVBS-MON-OUT-SC

3104 313 6343.2

18310_701_090309.eps 090309

2009-May-29

1D51

1D53

1D54

1D52 1D50 5U19 5U18

3D06

2D02

3P81 3P80

1M97
7P15
2U8D 2U8C
2D13

1M96
2D11
5D04 5D05
3D11
2D14

1735
1D38

1X08

5D01

2P15

2D19
5U05 6U09
2U8A 2U8E

2U00

3P83 3P82

3P57

1X07
7P16
3P87

2U90

2U21

2D15
2D06 2D10 2D09

2D31
7U0H
2D07

5U31

5U30

2U31 3U55 2U30 3U56 2U23 3U57 2U22 3U58 3U65 3U64 2U53 3U66 2U52 3U67 2U51

1X06
7U0D

5U09

2U01

Layout Small Signal Board (Top Side)

31043136343.2
2D17

2D18
2D08
2D16
BP5Z 2D23 2D24

2D30
2U8G 2U8H 2U8K 2U8M

1M99

2D05

5U08

BP1U

BP1V BP1T BP5B

2U15

9P31

5U04 5U01

BP5C BP5E

9P30

BP1B BP5H

1P00
2D12 5D02 2D20
2U0Z
9P29 IN0T IN0V IN0N 2N1C
BP1N BP1F BP5F BP1R

5U03
2U32 2U36

2P58

1P02
BP1M BP56

1P03

1P04

1P06

2P60 3P35

BP1A BP1E BP5D BP1S BP1D BP1L BP1H BP1P BP1C BP53 BP57 BP1K BP5G BP1G BP54 BP1J

2U11

2U14 2U0Y

2U10
5U33 5U32

9P19 3P22 3P31 3P30 5P06 3P29 IN0K 3P289P20


2N0M

2U06

2U35

2U19

BP55

1M95

7N04

BP5A BP51

IP16

2P12
BP52

7U08 7U02
3P40

CU70

CU71

2P49 5P13
3N0Y

5P14

5U02 7U05 7U06


2P13 2P14

1U03 1U01

7P07

2P05
IP0J 3P15 3P32
BN0B 2N13

7P17

2P47
BP50 BN0A

2U34

5U21

3P44 5P09 3P37

2U33

5U20

IP68

2U1B

9P33 3P77 3P76 2P28


BN0C

3P63 3P642P57 3P48


BN0D

2U0W

5U06

5U17

2P31
BP1W 3N0G

7P10
2P62 2P61

2U0F
3P39
2U0K 3U0K 3U74

2U41

5U07 2U0J
3U90

2U8F

3P42

5U00
3U89 3U61 3U60 3U76 2U0R 3U86 3U85 3U62 3U63

5U10
3U4A 3U88 2U40 2U26 2U25 3U81 2U42

2P17
2P56

7U40
3U84 3U82 3U83

3U80

3U3V

5U11
3U91

7U0M

6U40
3U1J

7U0N
3U46

2U43

5U12
3U92 3U97 2U44

7P02
3P36 3P34 3P21

7U10

7U41

2U24 2U49

3U3W

3U96 3U41 9U08

9U06 3U94

1N00
3P18

5U13

1P9B

1P9A

BP5K

1M20
3U95 2U45

3P16 2P26

Circuit Diagrams and PWB Layouts

1E14
5HRL
2HSP 2HSN 3HS8 3HS9 2HT8 3HS0 3HSJ 2HTR 2HTP 2HRZ 9H13 2H81 3HSH 2HS2 2H80 2HS3 2HS1 2H88 3H82 2H83 3HRR 3HRV 2HS7 2HSM 3HS2 2HSK 3HRU 2H85 2HSJ 2H89 3H84 2H84 3H47 3HSD 2HTF 3H83 2H86 2HTE 3HSA 2HTC 2HTB 2H91 2H97 2H96 2H99 3H29 3H91 3H93 3H90 2H98 3H85 3H98 2H90 2H92 3H88 3H97 2HS9 2HS8 2H82 3HRP 3HRZ 2HSF

1E15
3E12 2E50 2E01 2EA5 2E88 3E37
3EA8

1P05
2P27
2P59
BP5S

1P0B 1P0A
BP5N

7U50
2U47 2U48 3U4B

7U11
9U07

3U93 3U98 2U46

5U14 5U15 5U16


2U2C

2P03

BP5R BP5P BP5M BP5L

BP5J

2P24
3P59
3HB7

3P62 3P60

5P07
9P21
2H09

5AC1
3AC0 2AC0

5AC2 3HWV
3HF5 9HK0

1M01

9P22 3T12 3T10 2T14 3T11 2T28


2H08

1X05
9T15 3HFE 3HFD

6T11 6T10

2T11 2T12
9T27 9T29 2T37

2T10 5T11
9T13 9H08
3HB4

3HWN 3HWR

5AC4

1P07
9T40 9H07
3HB5

9T30 2T25 5T10 9T23 2T22 3H92


3HB3 3HB2 3HB1 TH07 TH12 TH10 TH16 TH14 TH06 TH08 TH01 TH04 TH02 TH03 3HB6 TH05 TH11 TH09 TH15 TH13 3HRS 2HS4 3HSF 2HTL 3HT4 3HSQ 2HTV 3HSN 3HS4 2HSU 2HTU 3HS3 2HSR 2HUC 2HSB 2HSA 2HU0 3HSU 2HTZ 3HSV 3HST 2HSS 2HUB 3HRT 3HT3

2H44

7H05

7H04

3T16 9T41 2T26 3T15 2T36 3T14 2T29 3T13


3H73

9T20 9T12 9T25 3T22 2T23 2T27 2T39 9T10 9H06

9T16

9T18

2T35

3E75

6E41
5HRG
3HSM

9E13

2E36

1006

1P10
3HSR 3H34 3HRY 2HSD 2HSC

7HG1

1007 9T11 9T21 2E35


2HSE 3HRW

6E20
5HR3
3H80

3E74 9E14
3H79 3H96

9T24 5HRC 5HR0 5HR2 5H82 5H80

1A01

3H95

2H87

1X09 7H00

3H81

5H81 5HR5

3HS1 3HSE

3H87

1005
2HTG 3H72 2HTD 3HSB 9H05 2H94 2H95 3H40

7HD0
5HRA 5HR9 5H85

3H12 3HF3 3H25 3H64 3H99 3HPN 2H93

7H03
3H24

3H22

1T25
7HF2
3H58 3H89

5H86

5H87

6HF0

3T62
2HF0 9H28

1T21 1T01 1T11


IH95
2HF1

3T60

7T51

3T64 2T62 3T70 3T75 3T71 IH94 3T65

1HF0

Q549.6E LA

3T63 2T60

2T63

5T55

3T76 3T77 3T95 3T72

1004

7T52 2T61
3T79
2H06 3H36 3H00

7HG0
3H05 3H04 3H68 3H67

9T63 3T78

1H11
IH93

2CBL 2CH1 3CHB BCG0 3CH8 3CH9 3CHF 3CA9

2CBM 3CAA

7T53

1E11
2E37 3T73 3T56 3T74

7CH0

6E43

3HP1

3HP0

2HR0

2HR4

2HR6

2HR2

2HR1

2HR3

2HRA

BCG2

9CH0

3HP5 3HT8
2HR8 2HM8

2HM3

2HRB 2HR9

BCG3

1X03

2T65
6E06
1250

3CAC

3CHG

2CBN 2CBK 2HVD BCG1 2HRE 2CBP 2H25 3CAB 3CHA

3HMV

9H11

9H12

2HR5

2HR7

2HN1

2HMY

7CH1

2HM1

2HRC 2HRJ

2HM2

2HRF

2HRK

1C00

2HRH
2HRG

2HRD

3HR8 3HRC 3HRJ


2HMP

3HR0 3HR3

3CAD

8002

2HVE

2H26

1003

2CBR

3H71

7H01

3HMC

3HMZ 2HM5

3H18
3HV3

2HYC 2HM4

2C45
2H02
3HMD 2HVA 2HMJ 2HVB 2HMT

10.

2CG2

3E77 2E98 3E78 3E76 2E42


3EC0

3HME

7HM1
9H27 9H25 9H26

7HV0
2HVC

2C03
3HMU

3CAE

2CBS

7HM2
3HMB 3HML 3HMA

2FHL

3CFL 3CFK

6CG2

6E21
3E81
3EC1

1HV9
6FH1 6FH2 6FH3 6FH7

5FH0 2FHA 6FH6 6FH0 2F43


3FG1 3FG2 3FG3 3FG4 3FG5

3FG6

2E97 3E80 1010

1G51

2E45
2E93 3E97 3E98 2E72

6E44
2E40 3E26

1E10
3E53 3E48 2E34 2E28 3E50 2E95 1014

2FLD
2FLE 3FG9 2FLP 3FLG 3FG8

5FL1 5FL0

3FL1 3FL2 3FL3 3FL4 3FL5 3FL6 3FL7

3FL0

2FL2

2E39 3E79

2FL1 2FLF

3FGE

6E45
1000 9E34 9E32
9EA5 3EA9 3EB0

6E03 6E01
1E00 3E11 1023 2E70 1024 3E64 3E34 2E31 3E14 2E32 3E21 2E30 3E18 2EA4 1E31 2E87 1022 2E51

6E10
3E63 2E29 3E24

2FLH

3FGA

6E08

EN 126

2E80
2E06 3E07 3E27 2E91

3C41 3FGB

CC60

2009-May-29
6E09 7E01
2E04 3E22 3E19 2E10 3E15 3E30 1009
3EA7

3C19

3FGC

3FE6

1002 3ECS 2EAF

3C18

6E12

3FE3

3C16

3FFC

3FE0

7FN0

7C00

1F10

2EAE

6E07
2E90

6E48
2E71 3E95 3E96

7FL0
3FLC 3FLD 3FLA 3FLB 3FLE 3FLH

3C17 3C15

3FFW

3FFA

2E38 3E67 2E25 3E00 1015

6E14
2E82 1027 1025 9E23 9E22

3C14

3FFT

6E23
2E15 3E28

3C36

2F74

3FFP

3FF9

3FLF

3FL9 3FL8

6E22
1E12
9EA4

9E12 3E02 2E169E15

3C35

3FFL

3C33

6E47

1F51

7EA3
3E31 1001 1028 3E16 3E17 2E33 3E32 2E18 3E06
2EAB

6E02

1255

2E96

6E38 6E24 2E92


9E17 9E16 2E17

3FLJ 2FL6 2FL7 3FLL


3FLK

2E49 3E25 2E21

1E07

1E02

1E03

1E04

2E54 9E25 2E53 3E39 1E18

3FFH

3FF7 3FF6

3C34

3FFE 3FFB

3C29 3C24

3E33 3E60

6E26
9E24 2E14 3E38 3E86

3FF4

3FF8 3FF5

2E24 3E88 9E20 3E44


9EA3

3FH8

3E87 3E57

1E13

3E51

7F51
1235 1026

6F82 6F83 6F84 6F85

2FNA

3CD0

7E10

6E34 6E52
9E19 9E18 9E119E00

9F07 1011 9E31


2ECH

3F69 2F60 3F68

3F73 3F71
2FJD

2FJ4 3F72 2F61 2FJ5

3FH5

3FH9

2E68 3E36

2E55 3E43

3FHB

2FN9

3FH4

IF32

IF33

7F54

7F56

3E13

3C95

2E22

6E29
3E61 3E68 1E19 3E54 2E03 5E03 1E22 3E23 9E269E27 2E12

6E28 6E36

6E46 6E35
1E16 3E55 2E19 1E26 2E08 5E06 3E20 2E52 2E273E10

2F57
3ECK 3ECL

IF35

2F54

7E09

2FJ3

5F02
IF34 3E04 9E06 2E05

2E20 2E09 3E09

1E01 1R07 1R08

1M36
2E56
3EC4 3EC2 3EC3 3EC5

7E20
3ECN

3E58 9E04 3E29 3E56

2EAP

2EA3 2EA2 2EA1

7E03

3E69

1013

7E19
2E07 2E67 3E92

3ECP

3E40 3E08
3ECM

5E00
9EA1

3F06

2F01

3C11

3C32

3C31

3C12

3C13

3C09

3C05

3C08

3C28

3C25

3C30

1G50

6E30

5E01

3E73 2E13 1246

7E14

6E40

1F02
2F53 2F55
1E24

2F02 2F09

1F00 2F10
6E51
3F57
3EB7 3EB6

7F55 7F52

2E57 2E58

7F01
3E45 9E10 3F56 3F51 1E27 3E62 2E41 2E74 3E52
3EB8

3F02

3C06

3C27

6E32
2E44 3E59 1E25

1E23

2FJ7

2F35 2F34

7F00
6F51 6E37 6E31 7E05

3F00 3F59 3E41 9E35


9FH0

3C07

3C26

7EA1
2EA9

1E50 1E51
6E25
9E02 9E01
2EB4

5F03
2F51 2F52 3E72 3E90 3E82 3E05 3E01 2E46 3E46 2E73
3EB9

3C42

3E93

2F50 6E18 7E04


3E03 2E65 2E11 3E89 3E42 9E37 9E29

2FJ6

2CBY

9F12

3CA3 3C03

6E13 6E04 6E05 6E17 6E53


1241 1240

3CA2

2ECE

3E65 3E71

IF39

3ED1 3EC9 3EB3 3EAT

3F11 IF36

9F04

2F49

1F29

7C01

7C02

IF38

2EAA

1X02

9F14 9F16 2F00

9F15 9F11 9F10 9F13 3F24 9F09

2EAL

2ECD

2EAN

3ED3 2ECC 2ECB 3ECG 3ECH 2EB3 3EAZ 2EAM 3ECE

1HP0 1X04 1R12


2EB6 3E85 9E33 5EA1 9E30
3ECF 2EAK 3EAY

6E15

6E16

6E11
1016

2E64 3E35

7E18
3E70 3E47 2E26 5E05 2E99 1029 1008 3F30 2F41 2F42 3F31 3F29 2F40

7F08

1F01
2F28 3F20 3F21 2F29 2F06 3F17 2F07 3F18 3F19 2F08

9CG9

IF37

9F05 3F793F80
2FND 2FNE 9FA2 9FA1

6F13
3F40 9F18 5FC9 5FC8 5FC7 5FC6 5FC5 1FA0 1FA1 9F20 9F19 9F17 3F37 2F47 3F39 3F38 2F46 3F36 3F01

8006

1E05
1012 1242

8005 8008 8007

1E06

1X01

18570_550_090514.eps 090514

1F53

2F48

1R20

1M59 1M71

1F05

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 127

Layout Small Signal Board (Bottom Side)


2CA5 2CA4 2CAH 2CAG 2CA9 2CA8 2CH5 2CH6 FCJ4 2CA7 2CA6 9CA5 2CH7 ICA2 3CG6 FCJ5 2CBZ 9C32 9C31 FCBR 2CAP FCAP FCA1 2CA0 FCAB 2CA3 2CAR FCAN FCAJ FCAF FCAC FCA8 FCA5 FCA2 FCAM FCAH FCAE FCAA FCA7 FCA0 3CG7 FCBM FC17 3CGZ 3CH0 3CH1 FC10 9CA4 9C11 9C10 2CH4 FC08 9CA3 9CA2 ICA1 IAC3 IAC2

9CA0
2CG8 2CG7 2CG6 2CG5 2CAW 2CBC 2CAY 2CBB 2CBA 2CAV 2CBF 2CAZ 2CB3 2CB2 2CB1 2CB9 2CB8 2CB7 2CB6 2CB5 2CB4 2CB0 FCBN 2CAT 2CBE 2CBD FCAW 2CAS

9CA1
ICAE FCAT 2CBJ 3CA5 FC12 3CA4 FC19

IAC4

FAC0

2CAM

2CAD

2CAN

2CAC

2CAE

2CAB

2CAK

3CH3

ICGN

2CAA

2CAF

2CAJ

7CG5
FCG6 3CGT 3CGS

FCA3

2CA2

3CG9

3CG8

2CBH

FCBK FCBJ FCB7 FCBG FCBD FCBA FCB4

FCAV

2CA1

FCBP

3CGR 9CG4

2CBG

FC13 FCB1 FCAY FC15 FCAS

FU36 FU38

FU35

FU34

FU33 IU51

FU31

FU30

FU32

FU12

FU11

FU10

FU21

FU1D

FU22

FU1C

FU20

FU23

FU1B

FU1A

FU26

FU25

FU24

FU15

FU18

FU17

FU16

FU14

2U37

FU13

FU19

FCAR ICGK 3CGV

7CG8
FCA4

ICGY FCBH FCBF FCBC FCB9 FCB6 FCB3 FCB0 BCG6 IU53

ICGH 3CGP 2CGC

7CG6
3CH5

ICGM 3CH4

IU52 3U59 3U37 IU48 IU49 IU20

2CGB

2A25

9CG7

7CG4
9CG8 ICH1 3CGN

FCAK

FCAG

FCAD

FCA9

FCA6

FCG5

FCBE

FCBB

FCB8

FCB5

FCB2

FCAZ FC16

2A26

3U35 FU1H IU21

ICGP

FCG4

3CGG

7CG1

9CG0

ICH2 ICH3 3CGH 3CGJ

ICG8 FCG2 3CGF

6CG0

3CG5

2U2A

5CG3

FU0E

6U0C

ICG1 ICG6

FC14

7A01

3CG0 7CG2

ICG2

9CG1

2CGD

ICGR

FCG3

5CG2
FCG1

IU1T IU50 IU3B 3U42 FU8B IU39

3C44

3C43

3CHD

3CHC

2CG4

3CHE

2CH0

2C38

ICG7

ICG4

2C43

2C02

3A20 3A21

IC03

ICG9 ICG5

ICGW

3CH7

IA07

3U23

FCJ0

1C02
3CG1

2CG1

ICGA

FCG8

ICH5

7A02

BCG5

IU3C IU35

FCG7 FCG0

3A07

7A03

3U12

2U80

3CGA

ICG3

ICGV 3C38 3C37 IC02 2C36 3C04 2C04 2C34

2CG0

3A18

7A00

2U12

2U62

7U0P

IU43

2C33

ICH9

IU0K

ICGZ

3U15

2C91

ICH7

3U13

2A22

3U16

FA03

IU07 IU42 FU40 IU40 IU12 IU55

2U0H

IU63

3U19 3U18 IU08

3U33

IU25

3U21

2U20

IU1B

7U01
2U04 IU10 2U03 3U04 2U66 IU29

7C03

2CG3

ICH6

IU0N

IU0P

IU1P

IU38

IU33

2U38

IU09

IU01

3U01

IA10

IA08

IU58

2U54

5CG1

3A16

FA02

3A25 3A24 3A23

IU1E IU3T IU41

IU19

3U22

2U02

3C39

IC01

3CH2

1C01

7CG0

5CG0

IU34

2U61

FU04

IU60

6U0B
2U27

FU90 IU2Z 2U8R 2U8Q 3U3N 3U2H

6U00

IU00 FU8D

3U28

ICH8

IA09

3A22

3U00

IU2Y 3U2F FU0D 3U3G 3U3F 2U8Y 3U26 3U27

3U0J

6U02

IC90 2C92

5C70 3A19
IA13

2U50 FU06

3U1M

3U40

3U47

IA12

2C44

ICHB 2C75 ICA9 2C76 3CA7

2A27

IC85 ICAA 2C83 3CA6 3C50 2C81 3CD3 3C51 IC54

5A01

3A15 3A14

2A14 2A13

3U06

CU25

2C35

2A20

3A12

2C39

3A26 3A27

3CD2

2A23

2A24

3CD1

CU77

IC81

3A17 2A19

2C86

2C55

2C64

2C74

2C73

IA01

FA04

2U57

3U17

2C70
5C61
FCD0

3U32

2U18

2A21

FA37

IA06

3A13
IA04

IA05

2U55

IU56 3U1D 2U63 2U59 3U24 3U30 2U60

IU45 IU61 FU1F 2U64 FU0B 3U1V IU31 2U0S IU1R 3U09 2U0D 3U0G 3U0F IU30 IU62 3U25 2U65 2U0B 3U0A

2U39 IU11

2U29
FU1G

3U3A

2U05

5C65

6A01

IA03

2A10 IA02 3A11 3A08 3A09

3A10

2U58

IU2C

2C32

3U20

IU47

FU0A

2U56

IU57

FU87

IU13 FU00

3U14

FCD4

7U09
3U31 3U75

2U8U

IC86

2C00
2C66 2C67

2C97

3U3J

FCD3 FCD1

3U2G

5C66

2C96

FCD2

IU0S

FU8C

2U2B
3U44 3U45 IU0U FU85

3U11 IU15

2C62
5C62
3CD7 2C72 IC82

IU06

IU82

IU2A

IU2V 2U8V

2C84

2C59

2C60
5C64
2C82 IC84

3CD8 3CD9 3CDA

IU54

6U01
IU03 IU14

3C02

IU1D

2U0T 2U07
2U0V 2U0U

IU0T FU0C

FU39

3C21

2C01

FC06 IC04

2C71 IC50 ICD8

2C63
5C63

IC83 IA25

3A06
IA24

2A03 3A00
FA34

IA20

2C57

2C87

3A02

3C01

3C20

3C00

2C94

FU08

2A09 2A02 3A04 3A03 3A05 2A04 2A01


IA28

3C10

2C95

7CJ0

3CJ0 6CJ0

2C69

2C61

2C68 2C78
FA35

2C85

IA29 IA21

3CJ1

IA22

5A00

5C67
2C88 IC87

5C60

2A51

IA27

2C42

2C18

2C17

2C16

5C68

2C89

2C77

IA23

2A00

3D09

FA36

FA33 IA30

ID33 ID11

5D07

2A08

9A00

3U03

3U02

IU32

2U08

IU04

3U10

7A07

2A50

3U08

3U2D

3U2C

2U8T

2A30

3U3Y

2U28

IU44

FU05

3U3Z

FA01

2U17 2U16

7U03

6U03

IU36 IU2D

FU07 IU59

IU37

2U83

2U81 2U09
FU80 2U13

IU2T

3U07

IU28

2A29 2A28

2A112A12

IA11

FA06

2A16 2A15

3U43

7U0Q
IU85 3U05 IU02

2U67 IU16

IU05

5C69

3CFN

2C30

2C58 2C90

2C65 IC89

IC88 2C79

FCD6 3CF1 IC51

2C41

9A02

IC80

7CD0

FA31

2A05

3A01 2A06

7D03

2A07

IA26

ID12

3P55

FD14

2C13

2C14

2C15

3CDB

9CD0

2C80 2CD0 2CD1

FA32

FA30

3C22 2C40

2A52
FH11 FCD9

FC05

2C19
ICHA

2C29
ICH4 9FN8 FFL4 9FNB FFL3 FF11

3C40

1CD0

3C23

FCD8

3CDC 3CDD

FC07

2C56

IP29

FH12

3P17

IHWF IHM6

5FG1

IF00 FF00

5FG2

CFH1
FFL2

FF03

FF01

FF21 IF21

2HHA

3F41
FF22

2F77 2F75 2F76 2F78 2F79

2F16

3F03
9FNC

IF16

FF04

3HJ4 3HJ3
3HGU

2HGC 3HKN 3HKM 2HG3 3HGV 3HGS 2HGD 3HGP 2HGE 2HG9 3HGY 3HH9 2HG8 2HGF 3HHA 2HG6 3HH1 3HH4 3HH6 2HG7 2HGU 3HGZ 3HH8 3HHP 3HHM 3HHT 3HHR 3HHH 2HGT 2HGJ 2HGN 3HHF 3HHD 2HGZ 3HHC 2HGH 2HGY

2HG2

2F64 2F65

2F68 2F69

7F06

2F72 2F85

9FGB

3HJ0

2HH3 2HH0 3HHE 3HHB 3HHG FD02 2HGW IP24

2F21 9F03 9F08 9F06 2F04 3F12


FF05 IF18

IF15

IF17

9FGC 2F80 2F81 2F82 2F83 2F84 9FGD 9FG6 9FG7 9FG5

3HGT 3HGR 3HGW

2HG4

9F00 3F07 9F01 3F08 9F02 3F10 2F03 3F09

2F62 2F63

2F66 2F67

2F70 2F71

2HGV

FH06

2HH1

FF08

2HG1

FF02

2FN8

3HHJ 2HGK 2HGM 2D01 ID27 2HGR 3HHK FD05 ID38 IP30 3HHW 3HHN 3HHY 3HHV 3HHZ IP27 ID16 3D03 FP37 FP38 IP14 FP35 3HRM 3HRN

5F04

2F17

2F30

IF12

2F14 2F32

IF19 IF09

3HH3 3HH2

2HGA

2HG5

IF02

2F73

2HGP

3HHS

FF17

2F31
2F26
3FAB

3F13
IF13

9FG8

9FG9

9FGA

2HGB

2F13 2F36

2HGS ID37

7D10

3F22 3F23

3F27

2F33

3F26 2F24
FF10

FF54 3HH0 2HG0

3HHU

3D17

3HH5

7F05
2F22 3F25

ID09

IF08

2FA6 FFA7 3FA5

9F21

IF07 9FN9 IFA9 9FNA

IFA8

9FG4 5FH4

2HHM

3HH7

ID18

2HH2
ID36 ID19 FN0B ID30 CD10

ID31

3FA6 IF01 FFA9 2FA7

2D25 ID32

IFNB IFNA FFHA 2FHW IFNJ

FF30

FF06

6N00

IFN5 2FH3 IFN2

2FH4

5F06

5F05

FF07

5FH2

FF13

5FH3

3N0J

2FJA
2FH8

IFN8

2FJP
IFN9

9FG2

FN0A

6N01

2F20 2F15

3F15

FFH3

3F82 3F83 3F84 3F85 2F37 2F25


FF14

IFN6 IFN4 IFN3

3F28

3N0K

2FJ2

9FG3
IHMG

IHWM

2FJB

2FHZ

2FJC

2FJ0
2FH7 FFH4

2HHN
2HHP

3P56

9F22 2F27

3FAA

IFN7

2HHK
2HGG

ID29

IN10

5D09
ID10 FD06

ID28

FF12

FFA8

3FN2

3FHG

FF20 FF09

FFHM 3FN3

FF48

2FHK 2FHJ 2FHB 2FH0 2FH1

2FHF

FFH1 2FHP 2HF5 2HF6

2N0P

2FJK

2N10

IF14

2FHG

FFHR

2HH4

1F50

IF29

3F16

3FHL

2F39 3F14 2F23

2FJ9
FF19 2FHS

2FHD

2FHC

2FHE IFNH

2F38 2F12

2FJ8
3FN1

FF18

2FJ1 2FHM
3FNG 3FNF 9FND

2HHB
IHG0 FH07

2HVZ
3HPH 3HPK 3HJY 3HPM 3HPJ FH04 3HPS 3HPD 3HPF 3HPT

IN0Z

2N11

2N0Y

3N0W

2N0Z IN0W

5N06
IN0Y ID08 FD07

2F19 2F11

2FH6

2FHV

2FHT

1F03

9HW1

2FN2

2FN0

IFND

IN20

3N30

9HW2 IHK2 IHFB 2HZE 3HWP

2N12

IFNM

9FN7

FF49

7F07

2FHH

IFN0 2FH9 2FH2

2FH5 IFNG

IFNK 9FN1 IFNL 9FN0 9FN4

2N0K IN0L 3N0V 2N0L 3N31 2N31 3N0F

2FLL

2FLJ

CFH0

7FH0
2FJJ
FFHS

2FN6

2F18

2FN5

2FN7

2FLK

2FN1

2FN3

2FLM

3HJ1 3HJ2

3HJ5
IHF7 3HP8

FH05

3H49

3FH7

3HPG

3FH2

3FH0

3FH1

2FL5

3HF2 3HFR 9H17 3HFM 3HFN 3HFP 3H75 IHF5 3HFH 3HF4 3HFG IHF0 2HVK 2H24 2HH5 IHY4 2H28 2H20 2HZM 3HPL 2H16 3HF9 3HPR 3HPP IH30 9HF6 9HF7

3F74

FFH5 FFH8

5FH1
FFHN 2FLA

FFH0

9HF4

FFC2

FFHP

2FLB

5HVB

2H29

IHY3

3HPE

2N0Q

IFN1

2FHN

3FH3

3HPC

3HPU

2F05

IFNC

3HFK

IFNN

IHSK

3H50

3HPV

IFNF

3FH6

7HF1
2H04 IH52 3H77 3H76 2H05 IH51 IH55

2FLN

2HF7

2N0N

9HG3

FFC3

7N11
2N14 2N15 FN0C 2N0W

IN30

1N02

9FN6

2D27 2D22 2D26


ID06

5HG0

2HVW

2HZD

2HZB

2HH6

2HH9

FFC4

2HY9

IH05 2HVM

9H19

3FLM IFC1 FFH7

IHSN

2N16

3H94

2FL0
FFH2 2FLR 2FHR 2FLS

5HY5

2HZL 2H18 2HVV 2H35

3D14

IHF4

3HEU

FFL0

3FLN

9H18

2HU6

FFH6

2HVU

2HY8

2H27

9HF5

3D10
ID07 ID05 FP36 FP00 IP09

2H34

IHK4

5HVD
2HZK 2H38 IHK3 2HVL

FFC5 FFH9

2HZC

2HU4

IH54 2H41 3HAG IHSY 3HAH

2H33

2FLC

IHS7

3HES

2N17

2D21

2N0V
3N0H

2HU2 IHF3 IN0U 2H19 IHF2 IHF1

5N07
IN21 2N32

5HVC
2HU3 3HP9

2FL4

IH13

2FL3

2H40 2H39

2HZG

2HZF

IF60

FH50

2H22 IHPG

IN0M

9H21

IHM1

3H38

2HP4

2HPB

IHN4

3H45 FH03 3H33 2HZH 3HP2 FHPE 3H09 IH28

IH10 IHYP

2N33

5HVF 5HVG
2HVR 2HVP

IHYH

2HV8

2H14

3H37

IHK1

9H20

7N13

IN22

IH11

3N32

FHV4

5HV6

7HP0
2HYD IH22

2H15

IN35

2HPA

FF52 FF50 FFL1

5HVE

2HVY

2HVN IHSL

IHY8

IHSM

3HK0

FHV5

5HV9

2FL9

2HV6

2HY2

2HV9

IHNG IHNK

IHNJ IH47 IHNF

5HV7

5HV8

IH23 IH53

IF57 FF40

5HRZ
IHSV

2HP6 2HUA

IN34

IHN0

IHSW

2HV7

2HV2

2N0R

5HP2

CH53

IHYN

7N12
3N0N 3N0L
FN15 3N34 3N33

5HY4
2HP7

2HVF

2HY3

IHYA 3HWK

2HV3
2H23 IHY1 2HP5 2HU1 2HY6 IHY5 2HYB IHYF 3H62

IN0P FN07

IHW0

IHN8 IHNH FF41 IF58 3HMY 3HMW

5HV4

3H74 IH24

IH48

5HV1 5HV0
IHY9

IHY0 9HW0 IHYM 2H37 2H13 2HVH

5HY3

7HM4

3H63

5HV3

2HYE

7HM3
FF51 FF42 IF59 IF50 IF55 IF61

IP0H FN09

IHSZ IHND 2HRT IH25 IHN3 2HRM

2HZY

2HRY

5HVH

2HY4 2HU9

2HYA

2F59 3F70

2H21

FF53 IF54

FF43

7F57 2F56

IF68 IF69

IHWJ IHW8 IHM0 IFL1 3HMF IHWL

IHY6

2HVS

5HY2
2HVT

5HY6
IHFA 2H30

2HV5

IHY2

2HRW

5H50 2H51
2HV0 IHYC 2H50

5HVA
2HU7

FHK1

2HYF

2H31

IF51

2HUK

3F50

FF23

3F53 3F58

IF56

7HVA

3F52 3F55 IF67 3F54

2HMG

2HVG IHWE IHW9 IHRH

2HV1

IF20 FFHH FFHJ

IH31

IHF9

IHY7 IHV3 IHSB FP0B IP28 9H53 9H55 IHS3 IP15 3HSK IHRK 9H52 9H54 2N30

3HV4

IHS0 IHVA IHWA IHSA IHRJ IHW4 IHF8 3H11 3HFY FHR6 2HV4 2H52

7F53

6HM0

IE81 FF24 FE19 FE95 BEB0 FE94 FE47

IF53

3H35

FE57

FE45

IF52

IHM2

FF44

3F61 3F62

2HRP
3HPW IHS1 IHV1 2HRU IHRY 3H65 3H66

IHSU

IF63

FFHL

3FHM

6FH8

3HM1

IHW7

6E54

3FHK FFHC 3FHJ

9H50

3F64 9F51 9F50 3F63

3H26

3H20

3H46

3H60

3H48

3H14

IE32 2ECF

2HUP

2HTK

2HS0

2HT5

2HT6

2HTH

2HT1

2HT7

3H02

3H03

FFHF IFC0 9HM0

2HSW

3HT9

IF64

3HRK

FE44 FE99

FHM3 IHNE IHRV IHRZ IH06 IHNB

3H51

IHM4

7HM6

2E63 2E62

6E50
2E61 9E08
IE76

IF65

7F50
6F50 3F60
FFHK

3HM0

IF62

7FH2

IHNA 2HMZ

3H10

FFHG

3H23

3H30

FF31

IFH4

IHM5

2HMW

3HMM

IHF6

IHS8 9H51

IHSC

IHSD

IHSG

IHRM

FHC3 IHW6 FHR5 IHVE

3HSW

FFHT

IHW1

3HS6

3F66

2HRV

2H32

3F67

IHMW

2HRS IHRL

7N10

2HVJ

FP31

IHSH

BEB3

IHV6

IE10

7HM5

FF25

7E17

IHSE 2HKL IHS2

9F52
IF66 FFHB FFHE

FH01 2H07 2H00

IHW2 3H19 3H13 3H16 3H15

3H42

3H17

2HUN

2HSY

2HSV

2HU5

2HST

2HU8

3HS5

2HA4

2H01

IE79

IH29

IHM7 IHRW

2E60

FE97

9E09
FE93

FF15 IFC5

FFHD FHM2 FHM1 IHMV

IH81 3H56 IHWN IHWH IH87 IH85 IH37 3H08 3H31 3H54 3H69 IHWG IHWB FHR1 IHW5 IHR0 IHPF IHR4

FHV3

2HA5

2HA3

3HS7

6E19

3H39

2F58 3F65

IHM8

IP23

IP20

FP30

IH49

3P33

FP33

IHRD IHR6 IHRF

IH12 IHR1

FP34

FF16 IHN6 FHR3

IHRT

2P04

FP32

IE75 IE84 FE40

BEB2 FE92 FHM0

IHRU IHWC

3H28

IH32 IH15 3H07 3H06 IH03

3H21

9E41

3E91 9E36
FE96

IE82

IH41

IH40

IHSS

IHST IHSR IHS5 IHS6

FEB2

6E27
FE41

9E05
FE59 FEC0 IE24 BEB1

FE27 IH02 3HPB

3H27 IH43 IH46 IH00 IHR5 IH45 IH80

2H10

2H43
IH50

IHRE

IHRC

3HPA

3HP6

3HP4

3HP3

3H70

FH00

7H02

7P13
FP18

3H57

9E03 9E40

IE15

IHR8 3H32 3H01 IH42 IHS4

IH44 IH92

IHR3

IE19

FE26

IE62

IE25

IE02 IE57 FE53 IE27 IE08 IE35 FE69 IE34

IH39 3H55 IH38 IH34 3H41

2P23

IP31

3P49

IHRB

IH61

7H06
IH60

2P20 3P51 3P50 3P52


IP32

2H12 IH33

FH08 IH01

3P54 2P25 2P19


FP19

FP11

IH14

IH07

6H10

5P10 2P18

FP15

3P23

3P86

FEB3

3P46

7P11
2P22 2P21

FP16

IE01

6P06

9P32

IH27

2HZV

2HRN

2H17

2N0S

FN05

FN06

2HY7

5HV5

5HRW 5HY7

2HP8

2H36

2HY5

5HYB

2N0T

IHSP

2N0U

3N0T

IN32

FN08

FP13

5D08

9A01

3D16

7H14

7H16

FE54 FHC1 FHC6 IHW3 FHD0

IH36

IH35

5HV2

2H42

IE68

2H11

7H11
7H93
3H43 IH18

FP12

IE33

IH17

3P85 2P16 3P11

3P84

9H14 2HD0 3H52 FHC2 FE42 FE16 IHPD IHC1 9H15 3HD4 IHWD IHD0

IH16

IH20 IH26

3H53

3HC2

2H03
IH04

FHD1 3H44 IH09 IH08 FHD2

FHC7

3H86

3H78
IH91

IH19

3P47

IH21

6HW2

FE58

7HC3
2HC0 FH09

IP60

FP03

IHC2

7HC4
IT86

FP44

FE55

5P08

2P45

3P61 3P58

FP10

FE51 IT03

2P33
FP0G FP43

7P12 3P53

FP39

FP14

2P55

5P11

5P15
FP0H

FP0E FP0J FP0F

FP25

FE48 FE43

2P42

2P35 2P34

IP26

2P37
FP23

FP0P

FP45 FE52

2P502P39 2P38

2T64
FE50

2P52 2P54

IP10

2P51

6P03

FE13 IE26 IE03

2T85

FE38

IE29

IE14 IE31

IT15

FE49

3T94 3T93 3T92


IT95 IT59

7T54
IT88

2P36

IP11

2P43 2P44

FP26

5P12

FP40

3T51

3T82

3T81

3T80

IT58

7T55

IE94 IE04 IE93 FE39 IE17 IT65

2T68

2T79

3T67

IT94 IT63

9T64 9T62 2T67


FT55 FT24

IT09 FP20 FP41

3P67

FP22

2P32

IT93

2P41 3P142P46 2P53

FP08 FP21

FP06

3P43
FP09 FP0A FP07

FP0C

3T57

IT84 IT62

FT50

FE67 FE79 FE77 FE66 FE60

IE16

9T70 3T59
FT25

IP17 IT04

3P68

IT66

3T61
FT52 IT10

FE63

FE62

FT20

IT67 8001 IT68

2T77

FT51

IT91

IT89

FT54

3T91 3T88
IT98 IT79

3T83 3T69 3T87 2T83

2T78 2T69

6T50

3T84

3T90 3T89
IT90

6T51

FT21

2T51

7T50
FT57 IT55 IT57

FT53

5T53

3T66

8000

3T58

9T71

2T66 2T80 2T76 2T75


IT51

IT14

FT17 FT58

IT13 FP42

3T86

2T24

7T56

3T68

IT0D

IT85 FE76 FE65 FE64 FE68 FE61

IT60

2T55 2T56

2T57 2T58

IT53

2T74

2P08 3P06

FE78

5T52

IE06 IE51 IE05 IE21

IE20

5T51
FT59 FT56

2T70 2T71 2T72

IT08 IP06

3P05 2P06

IT50

2T84
IEC3 IEC1

5T54
AT51

2T52 2T73 2T53 2T59


IT76

IT12

IT69

2T50

3T54

IT61

6P01
2P07
FP02

3T17
FT18 IEC2 FE80 IT22

3T52

9T31

5T50
2T16 3T50
IT25

IT56 9T33 2T19 3T53 3T55 2T20

7P01

2T81 2T82 2T54

1T50

3P20

3P24

3P19

3P09

2P40

FEA0

5T12
IT16

9T34 9T45

3P25

3P12

IP18

IP04

AT50

3P26

IP00

3P10

IP01

IP08

IP02

3P13

IP05

3P27
FP05

IP03

IE91

IE92

FEA1

2T18
FEB4 FE85 IEC0 IT24

9T32

IT36

7T10

2P48

FE83 FE81 FE74 FE72 FE70 IT21

IT34

FP04

3T19
IT23

IT20

2T13

2T21 3T98 3T18

FP24

2P11 3P08

IP07

3P07 2P09

2T15 2T17

IT26 IT05

IT19

6P02
2P10
FP01

IT28 IT11 FT22

FT23

IED0

FT62 FE73 IT80

FEB1

FEB9 FE15 FE14 FE12

FE71 FT61 IT96 IT81 FT63

IT30

FE34

2E76 2E75 2E77


FEA8 FEA5

3E99

FE37 IE98

FE36 FE35

FE33 FE82 FE75 IE18 FE31

FE10 IT97 IE22 IE97 IT83 FT60 IT70

7E02

FE84 IE78

FE30

FEA6

7E15

IEA8

FE11 IEC6 BE26

3E84
BEB9 IE95 IE12

IE09

3E83
IEC9 IE11 IEC8 IEB5

IT32

9T22

AT11

IP19

7E16

IE07 3EB5

FEA7

IT75 IE23 IT17

3EC6 3ED2

9EA7 3EAC BEB8 IEA3 IE48 IEB4

9T14

AT10 IP13

2EAC

9E21

IE13 FEA9 3EB4 3EB1 3EA2

9E28
FEB0

2EA6
9EA2 FEB5 IEA7

IEA2

IEB1 IED1

IEC7 BE27 IE66 IP12

BEB4 3EAB IEC4

3EA1 3EA5

2E81

3EA6

FEB7 IE99

IEA6

9E07 2E79 2E78


IE60

3ECQ

IEA5 3EAV 3EC7 IEA4

BEB6

IE96 IEA1

2EAQ

FE24

FE25

3EC8

2EAD

IEB0 FE18 BE28 IE67 FP28

FEB6 3EAA BEB7 FEB8

FP29

IE90

IEC5

BE23 IE72 FE22 BE24 FE23 FE17 IE58 BE25

5E02

2EB1

3EA3

3EB2

7E06

BE22

BE20

9P0J

BEB5 IE38 FE90

BE21

IE61

2P30

IT77

9T43 9T44

IT73

FP27

3P38
IP5U FP2A

IP5Z

IP5V

FE32

FE91

FE89

FE88

FE86

FE87

IED2

IE89

IE70 FE28

FE20

FE98

FE29

3P65 3P66

FP0W

FP17

FP0S FP0U

FP0R

3P75

FE21

FE56

FP0T

7P32

IP5Y

31043136343.2
2009-May-29

18570_551_090514.eps 090520

3P88

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 128

Temperature Sensor

10

11

12

13

2 TEMP SENSOR

A
D
+3V3 3153 2102 100n 4u7 2101 1K0

B
6111

I102 SML-310 RES 8 3104 3105 7104 LM75ADP I103 3 1 I101 SDA-TEMP1 9113 +3V3 2110 100n SCL-TEMP1 2 OS SDA GND SCL 1K0 RES 9112 1K0

B
+VS 7 6 5 I104 I105 I106 RES 9110 9111 3106 1K0 1 2 3 4 5 1X00 EMC HOLE

E
1T02 1 2 3 4 F109 3123 SCL-TEMP1 F110 100R 3124 100R 10p 2123 10p 5 6 F111 2116 SDA-TEMP1

I100

A0 A1 A2

1T02 C2 1X00 B7 2101 B5 2102 B5 2110 C3 2116 C2 2123 C3 3104 B6 3105 B6 3106 C6 3123 C3 3124 C3 3153 B4 6111 B4 7104 B5 9110 C6 9111 C6 9112 B6 9113 C3 F109 C2 F110 C3 F111 C2 I100 C5 I101 C5 I102 B5 I103 B5 I104 B6 I105 C6 I106 C6

I
CHN
CLASS_NO

I
SETNAME
1 2007-11-26 2008-02-08 2008-04-08

SPB
J
2007-11-26 2008-02-08 2008-04-08 NAME Luc Buffel CHECK 1 2 3 SUPERS. DATE 1
C

TEMP SENSOR 2K8

3104 313 6276


130 1

A3

ROYAL PHILIPS ELECTRONICS N.V. 2007

10

11

12

13
18570_501_090525.eps 090525

2009-May-29

Circuit Diagrams and PWB Layouts

Q549.6E LA

10.

EN 129

Layout Temperature Sensor

Personal Notes:

3153 3104

9110

9111

3105

6111

3106 9112 2102

I101

I100 F109 F110

7104
I104 I105

1T02
I103 I106 I102

3124 3123 2101

2110 9113
F111

2123 2116

31043136276.3

18570_501_090422.eps 090326

10000_012_090121.eps 090121

2009-May-29

Circuit Diagrams and PWB Layouts


Wi-Fi Antenna

Q549.6E LA

10.

EN 130

Layout Wi-Fi Antenna

A
1000

C
All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright

1
D

1000 B1

A
owner.

E
3104 313 6328.2
18310_557_090309 090309
1000 U.FL-R-SMT-1(10) 3 2 1 HOT

B
F

B
F

1
H

I
CHN ******** SETNAME ********
1 08-07-07 08-10-20 **-**-** **-**-** **-**-** A4

CLASS_NO ******

WIFI antenna
* 2 3 SUPERS. DATE ****-**-** 1
C

**-**-** 08-07-07 08-10-20

3104 303 5212


130 1

* * *

NAME Maelegheer Ingrid CHECK

ROYAL PHILIPS ELECTRONICS N.V. 2008

6
18310_640_090306.eps 090306

2009-May-29