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ISSN: 22503676
Volume - 2, Special Issue - 1, 6 9
DESIGNING AND IMPLEMENTATION OF SECURED OFDM COMMUNICATION ON A MULTI-CORE SOFTWARE-DEFINED RADIO PLATFORM
T.Sravanthi1, K.Naga Prakash2
2
P.G. Scholar , Dept.of E.C.M, K.L.University, Andhra Pradesh, India, sravanthi.sacet@gmail.com Assoc.Professor, Dept.of E.C.M, K.L.University, Andhra Pradesh, India, prakashkaratapu@gmail.com
Abstract
This paper presents a development of software defined radio by using accessing technique of OFDM for efficient channel utilization. This software defined radio is less common with previous hardware defined radio and more common with the embedded technology using of OFDM is very advantageous because it is a multi carrier modulation technique and its selects the subcarriers so they are orthogonal to one another over the symbol duration, thereby avoiding the need to have non overlapping subcarrier channels to eliminate intercarrier interference. Here the software radio is implemented using the digital signal processor with low power to develop the software defined radios for different types of standards and also using different operational modes. For simple purpose we are using only operational modes of BPSK and QPSK. Here the operational modes of this OFDM is discussed .here we studied two programming methods ,straight line method and loop methods ,and in straight line method it takes a fewer clock cycles when compare to loop methods but its larger program memory when compare to loop. Where as in loop method its takes less program memory n requires large no of clock cycles. So both methods having their pros and cons. So in order to avoid this we have an idea of proposed new assembly programming approach i.e.by combing the both straight line method and loop method. This method employ radix-2 decimation-in time fast fourier transform algorithms. So that its gives a better performance rather than using the single approach.
Index
Terms:
OFDM(Orthogonal
Frequency
Division
Multiplexing),
BPSK(Binary
Phase
Shift
Keying),
1. INTRODUCTION
Two major problems associated with data communications over terrestrial wireless channels are inter symbol interference and fading caused by multipath propagation. In multi user applications such as personal mobile communications, otheruser interference could also limit the system performance and capacity. In this paper, an interference tolerant wideband multiple access scheme is discussed based on the Orthogonal Frequency Division Multiplexing (OFDM). The scheme is designed as such, the amount of other-user interference and inter symbol interference are reduced. This is achieved using both a cyclic prefix and a cyclic suffix in the transmit data frames and noting that the Fourier codewords used in OFDM have a zero cross correlation on all cyclic shifts.
T.SRAVANTHI* et al. [IJESAT] INTERNATIONAL JOURNAL OF ENGINEERING SCIENCE & ADVANCED TECHNOLOGY
ISSN: 22503676
Volume - 2, Special Issue - 1, 6 9
Flexibility is the key feature of the SDR implementation. SDR being a reconfigurable architecture has low power consumption. Lead time of SDR is also short. Lead time is the time taken between the initial stage of the system and appearance of results.
The signal transmitted from the transmitter section of SDR is in the form of digital pulses. In high frequency transmission, as the time period of the signal varies inversely with the frequency, the width of the pulse is chosen to be small. ISI is the common problem in high speed communication. ISI occurs at the receive Baseband OFDM Transmitter. The OFDM transmitter can be implemented by using a regular IFFT, but without dividing the outputs by N as follows:
-(1) Where is the predefined data symbol from bit stream Figure.2 QPSK Signal Constellations with gray Coding
and , n=0, 1 N-1, represents the corresponding orthogonal frequencies of the N sub-carriers. Fig. 1 shows a simplified OFDM transmitter block diagram. Note that the S/P is the serial-to-parallel converter and P/S is the parallel-to-serial converter. All baseband operations inside the dashed box are software-based processing modules on the given hardware platform as depicted in Fig. 1. After P/S, the digital signal stream is then passed through the digital-toanalog (D/A) converter, frequency up converted with a carrier, and transmitted wirelessly.
T.SRAVANTHI* et al. [IJESAT] INTERNATIONAL JOURNAL OF ENGINEERING SCIENCE & ADVANCED TECHNOLOGY
ISSN: 22503676
Volume - 2, Special Issue - 1, 6 9
the shift registers. Each bit in the shift register is shifted right. The bits that are shifted right are stored in register.
(2) Where Note that is the AWGN and the OFDM symbol period is T where T = NTs. The detected bit is obtained after the demodulation. Again all baseband operations inside the dashed box are software-based processing modules as depicted in Fig4.
Figure 5 The FFT operation for IFFT Figure 4 Block diagram of simplified OFDM receiver
5. CONCLUSION
4.1. Serial-Parallel Converter
The bits from the convolution coder is accepted serially by the serial to parallel converter and converted into parallel bits. Four bit control code is used. According to control code, each bit is assigned serially to temp data. All the bits in the temp data are grouped together to parallel data. Thus the basic concepts of SDR architecture and OFDM have been studied and the various sections that are needed to reduce ISI are analyzed. The OFDM system is carried out in digital domain and can be easily implemented in SDR. It is demonstrated by a software reconfigurable OFDM system using a programmable fixed-point DSP. Both the interoperability and adaptability among BPSK and QPSK operational modes of the OFDM systems is discussed. Similarly, software defined antennas can also be implemented by using this approach. Adaptive modulation can be applied to this system which minimizes the antenna sizes, while still being
T.SRAVANTHI* et al. [IJESAT] INTERNATIONAL JOURNAL OF ENGINEERING SCIENCE & ADVANCED TECHNOLOGY able to provide high data rate. The software modulation and demodulation modules of a DSP-based architecture can be updated or reconfigured to meet these design requirements as discussed in this paper & also presented a partial pipelined/cached-FFT processor for the OFDMA system.
ISSN: 22503676
Volume - 2, Special Issue - 1, 6 9
REFERENCES
[1] Hen-Geul Yeh, Paul Ingerson, Software-Defined Radio for OFDM Transceivers, Proc. Systems.Conf. 4th Annual IEEE, Apr. 2010, pp. 261-266. [2] Chao-Ming Chen, Chien-Chang Hung, and Yuan-Hao Huang,An Energy-Efficient Partial FFT Processor for the OFDMA Communication System , IEEE Trans. Circuits ans Systems , vol. 57, no. 2, Feb. 2010, pp. 136 140. [3] SDR forum, www.sdrforum.org. [4] Rivet et al., A disruptive architecture dedicated to software-defined radio, IEEE Trans. Circuits Syst II: Express Briefs, vol. 55, no. 4, April 2008, pp. 344-348. [5] H. Jiang, H. Luo, J. Tian, W. Song, Design of an efficient FFT Processor for OFDM systems, IEEE Trans. Consumer Electronics, vol. 51, no. 4, Nov. 2005, pp. 1099 1103. [6] B. M. Baas, A low-power high-performance 1024-point FFT processor, IEEE J. Solid-State Circuits, vol. 34, no. 3, pp. 380387, Mar. 1999. [7] T. H. Yu, C. Z. Zhan, Y. J. Cho, C. L. Yu, and A. Y. Wu, Efficient fast Fourier transform processor design for DVB-H
th
K. Naga Prakash received B.E degree in Electronics and Communication Engineering from Nagarjuna University . He received the M.Tech degree in Computer applications from VT University, India in 2001. He worked as Assistant professor in Visvodaya Institute of Technology and Science, Kavali, for 3 years and in LBR College of Engineering for 4 years. He worked as Associate Professor in HITECH College of Engineering, Hyderabad for 3 years and in KL University since Dec 2009. Presently he is pursuing Ph. D under JNT University in the area of Signal Processing.
system, in Proc. 18 VLSI/CAD Symp., Aug. 2007, pp. 65 68. [8] W. H. Chang and T. Nguyen, An OFDM-specified lossless FFT architecture, IEEE Trans. Circuits Syst II: Express Briefs, vol. 53, no. 6, pp. 1235-1243, June 2006
BIOGRAPHIES
T Sravanthi received B.Tech degree in Electronics and Communication Engineering from JNTU, Kakinada University in 2010. Presently she is pursuing M.Tech in E.C.M. Department from KL University since July 2010.