Lebanese International University Bekaa CamPus

Final Bxam: Logic Design (CENG300)

Fall 20L0
Prof. Ahmad Muhieddine

Duration: 2 hours

Answer All Questions" Calculators are allowed. Your handwriting gg.! be clear and readable. write your solutions ONLY on this exam booklet and show all work. Scratch papers are not allowed. Make sure all exam pages are included.

NO QUESTIONS IF IN DOUBT, STATE YOUR ASSUMPTIONS AND SOLVE

StudentName:
Student ID#
:

Question Number

Weight
20
15

Student Grade

i
2 J

10

4
5

20
10

25

Total 100

Page

I ofl0

Question

Gir.r th. f"llowing

a)

Boolean functions F together with the don't care condition function d: F(A,B,C,D) : !m(2,3,4,6,8,9,I2,I 4) d(A,B,C,D) lm(7, i0,13) (10 points). Simplify using amap, then implement with NAND gates only

l:

(20 points)

CD

t\.? s.:\A'[.'.*rt

;*'^

g-{l-FtJ $-.'c;

tr (4,6.c.b)

Fe-

+ AC + gb +AD

.-r,'F,, M AN\

_q:.Lr--:tt

Page 2

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(b) Implement using 4-1 MUX and some external logic gates

(10 points).

I
0 t

Select

e 5

? Itrpurr
3

T)
4

to t n'lll-jt

?*+'V*- +*.^\\ T*VIL

/r4,
p
I

b&,'b fr G-*k {L
I
e
\
\

k t*^e'r['-" L-"e fo #of,'- Lt'

5'l
5o

fi-=

zv-.t-

oq

h*X

1e
\.: \\

O
\

a
a

e
\

\ o \

f,=D (f" x=..f

T=T
f
oGtr X ="c:

rytEtl^x

\1
c-"
C)

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I
\

4
1

l
\ \\ \\ \\ \\

CJ O\

c,

ryl 4 fi-x
zrl-g f fi^

(3
I

x
()

a\
@a

I
X
I

bl lc: \1

=-

o\r X=c)

Page 3 of10

Ouestion

A s.qrential circuit has two D-latches, one input X, described by the following equations: r ._

2:

and

-.(l5Points) two outputs Y and Z.'I'he circutt ts

Da=

(a) Drawthe logic circuit (5 points).

x@A, Ds=A, YAax, 2=(x+'\B

Dn:x@S

(b) Derive the state table (5 points).

o,-Vs
N*o.b
fu=gh
I

fncr-l t}.i<-

f,f/f
X
C)

5h"'k
B =Dg
c?

os
OO O\

o
\

c)
\

o
o

o
\

t?

o
O
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o
\ \

o
CI

o
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0
O
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t

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d)

Page 4 of10

(c) Derive the state diagram (5 points).

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Question 3: For the following sequential circuit: (a) Write the inPut and outPut equations. (b) Derive the state table.

(10 points)

I
b)

ry.*'rIl^o-{w*

Da= c f Y + kc.y\z
7"*'"L)"^
l

flrt4

$= x@YG)Z
tfe{v efut"z
c)

5U-F. GbL
?ce:"^L 91*lr<
I

4yhr

0w
a
I I

f2

C}

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&
c3

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C)

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c)

cl
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a
t I

o
(} \

Page 6 of10

Qo Points) Question 4: circuit that produces three outputs: majority, minority, and It tr *q"tr.d to design a combinational
equal.

Majority output is equal to 1 if the input variables have more 1's than 0's. The output is 0 otherwise. Minority output is equal to 1 if the input variables have less 1's than 0's. The output is 0 otherwise. Equal o.rtp.riir.quuito 1 if the input variables have equal 1's and 0's. The output is 0 otherwise.
(a) Design a 4-bitcircuit for input majority, minority, and equal functions. (b) Implement the circuit with one decoder and External OR gates. .J , *4-f\

1.,b8-.

r"- T-fk

A,g,c, )
g*$'o''
\

o'Wb'

l(*-j*"tl 5
-

T fl r-'*..-'h;
k

t**"(

eJ

e-.J
C}

C)

C,

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o
L)

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t

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I

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O

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lo

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1

x = A S',b+ -+
()

gCD F ABD

Ac-b

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at)

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11

z*

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Page 7

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Question

(")

(10 Points) The inputs for a negative edge triggered JK flip-flop are shown below. Assume that Q is initially zero, determine the Q output relative to the clock, and state in each case the state (5 points) change, Set, Reset, or

5:

Q.{o

Complement)

Clock

Jrl

I t'l ' I ',! | ,*l I I

r-----------

r----T---l

{_'

;Li

ll

(b)

flip-flop are shown below. Assume that Q is relative to the clock, and state in each case the state initially zero, determine the Q output (5 points) (No change,'S@ or Complement)
The inputs for a negative edge triggered T

CLK

r] a

{1 = n:

Page

I ofl0

Question

6:
has two

(25 Points)

A r.q*ntial circuit

flip-flops A and B, two inputs X and Y.

The state diagram is

shown below" (a) Is the circuit a Mealy or a Moore? Justiff. (b) Derive the state table. (c) Design and implement the circuit using T flip-flops'

(5 points) (5 points) (15 points) U]

I

00,

i]l

,1

,/

./

tto

:r'

01.

rl

tf

..1 1l

\___

g"l'<- 7;)A
ffr<?etl iJ*E

L*"+

t'er.

S&<-t-+-

T,Ld".'6

XT
c)

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t,
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o

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1

Page 9 of10

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Page I0 of10