Internal Use Only

website:http://biz.LGservice.com

PLASMA TV SERVICE MANUAL

CHASSIS : PA81A

MODEL : 50PG60UD

50PG60UD-AA

CAUTION
BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

CONTENTS

CONTENTS .............................................................................................. 2 SAFETY PRECAUTIONS ..........................................................................3 SPECIFICATION ........................................................................................4 ADJUSTMENT INSTRUCTION .................................................................6 TROUBLE SHOOTING ............................................................................11 BLOCK DIAGRAM...................................................................................19 EXPLODED VIEW .................................................................................. 24 SVC. SHEET ............................................................................................... PRINTED CIRCUIT DIAGRAM ....................................................................

Copyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes

-2-

LGE Internal Use Only

SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Replacement Parts List. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.

General Guidance
An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks. It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation. If any fuse (or Fusible Resistor) in this monitor is blown, replace it with the specified. When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1W), keep the resistor 10mm away from PCB. Keep wires away from high voltage or high temperature parts. Due to high vacuum and large surface area of picture tube, extreme care should be used in handling the Picture Tube. Do not lift the Picture tube by it's Neck.

Leakage Current Hot Check (See below Figure) Plug the AC cord directly into the AC outlet. Do not use a line Isolation Transformer during this check. Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to 0.5mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.

Leakage Current Hot Check circuit

AC Volt-meter

Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1M and 5.2M. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.

To Instrument's exposed METALLIC PARTS

0.15uF

Good Earth Ground such as WATER PIPE, CONDUIT etc.

1.5 Kohm/10W

Copyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes

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LGE Internal Use Only

SPECIFICATIONS
NOTE : Specifications and others are subject to change without notice for improvement.
V

Application Range
This spec is applied to the 50 PLASMA TV used PA81A Chassis. Chassis PA81A Model Name 50PG60UD-AA Market Australia Brand LG Remark

Specification
Each part is tested as below without special appointment. 1) Temperature : 255C (779F), CST : 405 2) Relative Humidity: 6510% 3) Power Voltage: Standard Input voltage (100-240V~, 50/60Hz) * Standard Voltage of each product is marked by models. 4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with SBOM. 5) The receiver must be operated for about 20 minutes prior to the adjustment.

Test Method
1) Performance : LGE TV test method followed. 2) Demanded other specification Safety : CB specification EMC : CISPR 13 specification Model 50PG60UD-AA Market Australia Safety : IEC/EN60065 EMI : CISPR 13 Class B Appliance Remark

General Specification ( 50 WXGA )

No 1 2 3 Item Display Screen Device Aspect Ratio PDP Module Specification 50 Wide Color Display Module 16:9 PDP50G1, RGB Closed(Well) Type, Glass Filter(38%) Pixel Format : 1365horiz. By 768 ver. 4 Operating Environment 1)Temp. : 0~40deg LGE SPEC. Remark

Plasma Display Panel

2)Humidity : 20~80% 5 Storage Environment 3)Temp. : -20~60deg

4)Humidity : 10~90% 6 Input Voltage 100-240V~, 50/60Hz Maker : LG

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LGE Internal Use Only

Module Specification2
No 1 2 Market Broadcasting system Item Australia 1) PAL-BG 2) DVB T 3 Receiving system Analog : Upper Heterodyne Digital : COFDM 4 5 6 7 8 Video Input (2EA) S-Video Input (1EA) Component Input (2EA) RGB Input HDMI Input(4EA) PAL, NTSC PAL, NTSC Y/Cb/Cr, Y/Pb/Pr RGB-PC HDMI-PC HDMI-DTV 9 10 11 Audio Input (6EA) SPDIF Out(1EA) USB RGB/DVI Audio, Component, AV SPDIF Out X-Studio(JPEG,MP3), Upgrade(USB1.3) Side Analog(D-Sub 15Pin) HDMI1/DVI,HDMI2,HDMI3,HDMI4(Side) Rear AV 1EA, Side AV 1EA Side AV Specification Remark

Copyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes

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LGE Internal Use Only

ADJUSTMENT INSTRUCTION
1. Application Object
These instructions are applied all of the 50 PLASMA TV, PA81A Chassis. * Using power on button off the control R/C, power on TV.

4. Auto-control adjustment process

V V

2. Note
(1) Because this is not a hot chassis, it is not necessary to use an isolation transformer. However, the use of isolation transformer will help protect test instrument. (2) Adjustment must be done in the correct order. (3) The adjustment must be performed in the circumstance of 255C of temperature and 6510% of relative humidity if there is no specific designation. (4) The input voltage of the receiver must keep 100-240V~, 50/60Hz. (5) The receiver must be operated for about 15 minutes prior to the adjustment. After RGB Full white HEAT-RUN Mode, the receiver must be operated prior to adjustment. O Enter into HEAT-RUN MODE 1) Press the POWER ON KEY on R/C for adjustment. 2) OSD display and screen display PATTERN MODE. - Select 3. Test Pattern by using D/E(CH+/-) and press ENTER(V) - Select White by using (F/GVOL+/-) and press ENTER(V)
O

All adjustment process is executed one time through RS-232C. Command send -> ADC Calibration -> Model name download -> EDID download.
Item Ready ADC ADC CMD1 CMD2 Data 0 a a a d d d 0 1 9 0 0 9 Remark Ready ADC start

NO 1 2 3

Confirmation 4 ADC Mode Out 5 Download Mode In 6 EDID Download 7 Check EDID Status 8 Define model name 9 Adjustment Confirmation 10 Download Mode Out a e 9 0 a e 9 9 a e 5 1~7 Model define index(Data0) are listed at next table. EDID data existence check in SET assembly a e 2 0~4,9 All=0 ; HDMI1,2,3,4=1,2,3,4 ; RGB=9 a e 1 0~4,9 a e 0 0 Transmitting adjustment mode In instruction, operate adjustment command. All=0 ; HDMI1,2,3,4=1,2,3,4 ; RGB=9 a d 9 0

* Set is activated HEAT-RUN without signal generator in this mode. * Single color pattern(RED/BLUE/GREEN) of HEAT-RUN mode uses to check PANEL. * Using power on button off the control R/C, power on TV. All adjustment process is executed one time through RS-232C. Do not connect extrenal input calbe.

Adjsutment process protocol(RS-232C) CMD2 e 5 Data 0 2 Remark 50PG60UD-AA

CMD1 a

3. S/W auto download using the USB Memory stick

* Using power on button of the control R/C, power on TV. USB file(EPK) version must be bigger than downloaded version of main B/D. (1) Insert the USB memory sick the PCB ASSEMBLY. (2) Using power on button of the control R/C, power on TV. (3) S/W download process is executed automatically.

5. Manual model name download

(1) Press ADJ KEY on R/C for model name D/L. (2) Select 0.Model Option and press ENTER(V). (3) Select model name by using D / E (CH+/-)and press ENTER(V). Model Name 50PG60UD-AA Model Option Value 36030130

Copyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes

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LGE Internal Use Only

6. Manual ADC Adjustment

RF Input NO SIGNAL or White noise
V

(3) HDMI 2

AV / Component / RGB input NO SIGNAL

Adjustment is done using internal ADC, so input signal is not necessary. Do not connect external input cable.

6-1. Required Equipment

(1) Press ADJ KEY on R/C and enter EZ ADJUST. (2) Select 1.EDID D/L by using D / E (CH+/-) and press ENTER(V). (3) Select Start by using F/G(VOL+/-) and press ENTER(V). (4) ADC Adjustment is executed automatically.

(4) HDMI 3

7. EDID Download
7-1. Required Equipment
*Do not connect HDMI and RGB cable. (1) Press ADJ KEY on R/C and enter EZ ADJUST. (2) Select 5.EDID D/L by using D / E (CH+/-) and press ENTER(V). (3) Select Start and press ENTER(V). (4) EDID download is executed automatically. (5) Press EXIT key on R/C.

7-2. EDID DATA

(1) RGB EDID

(5) HDMI 4

(2) HDMI 1

1.[1]-Product ID Model Name 50PG60UD 50085 50086 Product ID Product ID Hex EDID table C3A5 C3A6 A5C3 A6C3 Product ID Analog(RGB) Digital(HDMI) 4EA HDMI

Copyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes

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LGE Internal Use Only

Each PCB assembly must be checked by check JIG set. (Because power PCB Assembly damages to PDP Module, especially be careful)

* Press the POWER ON KEY on R/C before Model name download. Befor adjusting White-balance, the AV ADC should be done. If ADC status were NG, Need to ADC adjustment.

8. POWER PCB Assy Voltage Adjustments (Va, Vs Voltage adjustments)

8-1. Test Equipment : D.M.M. 1EA 8-2.Connection Diagram for Measuring
: refer to Fig.1

9. Adjustment of White Balance

9-1. Required Equipment
(1) Color Analyzer : CA-1000, CA-100+(CH.10) CA-210(CH.10). * Please adjust CA-100+/CA-210 by CS-1000 before measuring. -> You should use Channel 10 which is Matrix compensated(White, Red, Green, Blue revised) by CS1000 and adjust in accordance with balance adjustment coordinate.
W

8-3. Adjustment Method

(1) Va Adjustment
1) After receiving 100% Full White Pattern, HEAT RUN. 2) Connect + terminal of D.M.M to Va pin of P811, connect - terminal to GND pin of P811. 3) After turning VR901, voltage of D.M.M adjustment as same as Va voltage which on label of panel right/top. (Deviation; 0.5V)

Color temperature standards according to CSM and Module. CSM Cool Normal Warm PLASMA 11000K 9300K 6500K Remark

(2) Vs Adjustment
1) Input signal : RF noise signal. 2) Connect + terminal of D.M.M to Vs pin of P811, connect terminal to GND pin of P811. 3) After turning VR951, voltage of D.M.M adjustment as same as Va voltage which on label of panel right/top. (Deviation; 0.5V)
W

Change target luminance and range of the Auto adjustment W/B equipment. Target luminance Range 65 20

White balance adjustment coordinate and color temperature. Cool X y uv Medium X y uv CS-1000 0.276 0.283 0.000 CS-1000 0.285 0.293 0.000 CS-1000 0.313 0.329 0.003 CA-100+(CH.10) CA-210(CH.10) 0.2760.002 0.2830.002 0.000 0.2760.002 0.2830.002 0.000

CA-100+(CH.10) CA-210(CH.10) 0.2850.002 0.2930.002 0.000 0.2850.002 0.2930.002 0.000

(Fig.1) Connection diagram of power adjustment for measuring

Warm X y uv

CA-100+(CH.10) CA-210(CH.10) 0.3130.002 0.3290.002 0.003 0.3130.002 0.3290.002 0.003

* PC(for communication through RS-232C) -> UART Baud rate : 115200 bps

(Fig.2) 50 Full HD Power PCB Assy Voltage adjustment

Copyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes

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LGE Internal Use Only

9-2. Connection Picture of the Measuring Instrument(On Automatic control)

(1) Inside PATTERN is used when W/B is controlled. Connect to auto controller or push control R/C IN-START -> Enter the mode of White-Balance, the pattern will come out.

10. Adjustment of White Balance

(1) Press ADJ KEY on R/C and enter EZ ADJUST. Select 3. Test Pattern by using D/E(CH+/-) and press ENTER(V) Select White by using F/G(VOL+/-) and press ENTER(V) and heat run over 15minutes. (2) Zero Calibrate CA-100+/CA-210, and when controlling, stick the sensor to the center of PDP module. (3) Press ADJ KEY on R/C and enter EZ ADJUST. Select 2. White Balance and press G(VOL +). Set test-pattern on and display inside pattern. (5) Control is carried out on three color temperatures, COOL, MEDIUM,WARM. (Control is carried out thress times) <Temperature : COOL> - R-Cut / G-Cut / B-Cut is set to 64 - Control R-Gain and G-Gain. - Each Gain is limited to 192. <Temperature : MEDIUM> - R-Cut / G-Cut / B-Cut is set to 64 - Control R-Gain and G-Gain. - Each Gain is limited to 192. <Temperature : WARM> - R-Cut / G-Cut / B-Cut is set to 64 - Control G-Gain and B-Gain. - Each Gain is limited to 192.

Full White Pattern

CA-210

Color ANALYZER TYPE : CA-210

RS-232C Communication

(Fig.3) Auto AV(CVBS) Color Balance Test Pattern

9-3. Auto-control interface and directions

(1) Adjust in the place where the influx of light like floodlight around is blocked.(illumination is less than 10ux) (2) Measure and adjust after sticking the Color Analyzer(CA100+, CA210) to the side of the module. (3) Aging time - After ajing start, keep the power on(no suspension of power supply) and heat-run over 15minutes. - keep white pattern using inside pattern.
V

Auto adjustment Map(RS-232C)

RS-232C COMMAND [CMD ID DATA] Cool Med Ja Jb Jc Warm js je jf 00 00 00 Min CENTER (DEFAULT) Cool 192 192 192 64 64 64 Med 192 192 192 64 64 64 Warm 192 192 192 64 64 64 255 255 255 128 128 128 MAX

11. Input the Shipping Option Data

1) Push the IN-START key in a Adjust Remocon. 2) Input the Option Number that was specified in the BOM, into the Shipping area. 3) The work is finished, Push V Key.

R Gain G Gain B Gain R Cut G Cut B Cut

jg jh ji

12. Set Information (Serial No& Model name)

12-1. Check the serial number & Model Name
(1) Push the menu button in DTV mode. (2) Select the SETUP -> Diagnostics -> To set. (3) Check the information.

Copyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes

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LGE Internal Use Only

13. SET factoring condition

(1) This adjustment is setting factory shipment mode. (2) Push the IN-STOP key of adjustment remote controller before the factory shipment.
No 1 Input Mode 2 Volume Level 3 Mute 4 Aspect Ratio 5 SET ID 6 Picture PSM Color Temp. Advanced Cinema Item Condition Antenna 10 Off 16:9 1 Vivid Medium Off Remark

Black level Auto 7 Sound SSM AVL Balance TV Speaker 8 Time Auto Clock Manual Clock Off Timer / On Timer Sleep Timer / Auto Off 9 Option SIMPLINK Key Lock ISM Method Power Saving 10 Channel Memory Analog Digital On Off Normal Level 0 Standard Off 0 On On -Off

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LGE Internal Use Only

TROUBLE SHOOTING GUIDE

1. Power Board
1-1. The whole flowchart which it follows in voltage output state

Start check

Doesn't the screen whole come out?

Yes

Is it identical with Power Off condition? Yes

No

Is the Interface signal operated?

Yes 2. Check the Interface signal condition.

No

1. Check the Power Off condition.

Doesn't the low pressure output come out?

Yes

Doesn't the St-by 5V signal come out? Yes

No

Doesn't the 5V Monitor signal come out? Yes 4. Check the 5V Monitor signal circuit.

No

Doesn't the VSC signal RL-ON come out? Yes 5. Check the VSC RL-ON signal. No

No

3. Check the St-by 5V signal circuit.

Doesn't the high tension output come out?

Yes

Doesn't the VSC signal Vs-ON come out? Yes

No

Doesn't the Vs, Va voltage output come out? Yes 8. Check the Vs, Va voltage output circuit.

Doesn't the VSC low pressure output come out? Yes 6. Check the VSC low pressure output

No

7. Check the VSC Vs-ON signal

Does high tension output voltage Drop occur? No

Yes

When the Y, Z B/D Module input connector is remove, does Power Board hightension output voltage Drop occur? Yes 9. Check the Power Board Output high tension circuit

No

When the Y B/D Module input connector is removed, does output voltage drop occur? Yes 10. Check the Z B/D Module output circuit

No

When the Z B/D Module input connector is removed, does output voltage Drop occurs? Yes 11. Check the Y B/D Module output circuit

Manufacture enterprise meaning of a passage

Copyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes

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LGE Internal Use Only

2. No Power
(1) Symptom
1) Doesnt minute discharge at module. 2) Non does not come in into the front LED.

(2) Check following

No A Power cord is plugged with TV set? Yes No Connect the AC-INLET Plug the power cord.

Is the AC-INLET connected with the power board? Yes

Is the Fuse(F101,F801) on Power Board normal? Yes

No Replace the Fuses.

Is the Power Board with VSC Board though Cable connected? Yes

No Connect the Cable.

Measure output voltages(16V,12V,5V) on the power board. If the measured values is not normal, replace power board.

Copyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes

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LGE Internal Use Only

3. Protect Mode
(1) Symptom
1) After once shining, it does not discharge minutely from module. 2) The Rely falls.(The sound is audible click) 3) It is converted with the color where the front LED is red from green.

(2) Check following

Is the Power Board normal ? Yes Is the each connector normal? Yes Is the Y-Board normal? Yes Is the Z-Board normal? Yes Is the X- Board normal? Yes Is the Ctrl Board normal? Yes Is the VSC Board normal? Yes Is the COF of X, Y, Z normal ? No After crisis COF of each board, check the normality operates. If in case normality operates, correspondence COF Fail is replace the module. No Is the output voltage normal after remove P1001 of VSC Board? Yes After remove P1001 normal operation: Replace VSC Board No Is the output voltage normal after remove P163 connector of Ctrl-B/D? Yes Replace the Ctrl-Board. No Is the output voltage normal after remove P242 connector of X-B/D? Yes After remove P211 output voltage normality: Replace Right X-B/D After remove P23 output voltage normality: Replace Left X-B/D No Is the Fuse (FS1) on Z-B/D normal? (In case of open is replace) Yes Is the output voltage normal after remove P3 connector of ZB/D? Yes Replace Z-Board. No Is the Fuse(FS201) on Y-B/D normal?(In case of open is replace) Yes Is the output voltage normal after remove P209 connector of Y-B/D? Yes Replace Y-Board. No After connecting well each connector, the normality it operates? Yes Replace the connector. No Is output the normality Low/High voltage except Stand-by 5V? No Replace Power Board.

Copyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes

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LGE Internal Use Only

4. No Raster
(1) Symptom
1) No OSD and image occur at screen. 2) It maintains the condition where the front LED is green.

(2) Check following

Does minute discharge At Module? No Is the VAVS on? NO Is output the normality Low/High voltage except stand-by 5V? NO Replace the Power board

YES

Yes

Check the PDP Module

Is the LVDC cable normal?

No

Reconnect the LVDS cable in P501

Yes

Is the IC700(FLI106X0H) Output normal?

No Replace the VSC.

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LGE Internal Use Only

5. In case of occurring strange screen into specific mode

5-1. In case the OSD does not displayed
(1) Symptom
1) LED is green. 2) The minute discharged continuously becomes Accomplished from module.

(2) Check following

No Yes Replace the LVDS cable.

Is the LVDS cable normal ?

Is the LVDS cable connected? No

Yes

Connect the LVDS cabel with the VSC board.

Is the VSC Board normal?

No

Is the IC100(FLI106X0H) normal? No

Yes Replace the VSC B/D

Yes

Replace the IC100(FLI106X0H)

Is the Ctrl Board of Module normal?

No Replace the Ctrl B/D.

Copyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes

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LGE Internal Use Only

5-2. In case of doest display the screen into specific mode

(1) Symptom
1) The screen does not become the display from specific input mode (RF, AV, Component, RGB, DVI).

(2) Check following

1) Check the all input mode should become normality display.

(3) In case of becomes unusual display from RF mode

Is the Tuner normal? No Is the RF cable connected with TV Set? No Yes Connect the RF cable. Replace the Tuner. Yes Is the Input voltage, IIC Communication and CVBS output normal? No

Block A Is the IC100(FLI106X0H) normal? No Is the IIC communication waveform between the tuner and IC100 normal? No Replace the IC100(FLI106X0H).

(4) In the case of becomes unusual display from side S-video/AV mod
Is the Video input of the AV (JK105, JK106) normal? No Check the input source

Same as Block A

Copyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes

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LGE Internal Use Only

(5) In the case of becomes unusual display from Component, RGB mode
Is the R,G,B input and H,V Sync of the JK104 normal? Yes Same as Block A No Check the input source

(6) In the case of becomes unusual display from HDMI mode

Is the HDMI(IC201) normal? Yes Same as Block A No Is the TMDS waveform between the IC and HDMI jacks normal? No Replace the IC201.

(7) In the case of becomes unusual display from component mode

Is the Video input of component jack normal? Yes Same as Block A No Check the input source

Copyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes

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LGE Internal Use Only

6. In case of no sound
(1) Symptom
1) LED is Green. 2) Screen display but sound is not output.

(2) Check following

All input(mode) is no sound? No Yes Yes Is the speakers turned on(OSD menu)? YES No No Set on the speakers on menu.

Only HDMI is No Sound? No

Download the EDID data

Is the speaker Cable connect?

Connect the Speaker Cable.

Yes Only RF is no sound?

Check the Tuners IN/OUTPUT

Yes

No Is the IC602 normal? YES No Is the IC601 normal? YES

Replace the IC602 (MSP4458)

Replace the IC601 (NTP-3000A)

Replace the VSC Board

Copyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes

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LGE Internal Use Only

TS[0], CLK, SY, VAL (Serial)

LVDS TMDS ODD[10 bit] WXGA Panel

AV1 DDR2 Data[16:31] CVBS, Y/C Host Address[0:24]

Tuner (TDFV-G135D1) TU301

CVBS, SIF DDR2 Data[0:15] DDR2 Address[0:12] CVBS, Y/C

DDR2 SDRAM (64MByte) Qimonda IC701 DDR2 SDRAM (64MByte) Qimonda IC701

Module I2C

Copyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes

L,R

AV2 (Side)

L,R

MSP IC602
SW_LR TV,AV DTV

I2S

Host Data[0:15]

BLOCK DIAGRAM

- 19 FLI10306
I2S DTV/MNT OUT
NLASB3157 IC502

NOR Flash (32MB) SPANSION IC404

Digital amp (NTP3000A) IC601

LPF

Monitor out Y Pb Pr, L/R Y Pb Pr, L/R

SPDIF

SPDIF_OUT

COMP1

USB I2C

COMP2 RGB
TX/RX

EEPROM 24LC512 IC907

RGB
TX TX

RX TX

MAX3232CDR IC101

RS-232C

NLASB3157 IC1013

HDMI1, HDMI2, HDMI3

TMDS[0:7] TMDS[0:7]

TMDS351PAG IC201

I2C

LGE Internal Use Only

HDMI4

MICOM WT61P8 IC802

AT24C16AN IC801

BlockDiagram (Reset)
[VXI_D14]

FE_RESET

TUNER

FLI10306
[VXO_D5]

Copyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
SW_RESET
NTP3000 MSP4458G

SYS RESET
[RESET_N] Tic S/W

- 20 EJTAG RESET
[EJ_RST_N]

KIA7029AF Power On Reset IC803

MICOM Reset
[GPIOE6]

[NRST]

MICOM

RESET

S29GL256N10TFI020 NOR Flash IC404

LGE Internal Use Only

PNX8537 Platform
[Master I2C 1]

I2C Control
SDA2_3.3V,SCL2_3.3V
Module X4 : 0x72

EDID AT24C02BN MICOM 0x50 [Slave I2C 1] NTP3000 0x54

Copyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes TMDS 351PAG IC202

EDID AT24C02BN

FLI10306

EDID AT24C02BN

TUNER Digital R:0x1E W:0x1F

- 21 [Slave I2C 2] [Master I2C 0]

SDA1_5V, SCL1_5V

EDID AT24C02BN

TUNER Analog R : 0x87 W : 0x86

[Slave I2C 0]

NVRAM 24LC512 W : 0xA6 R : 0xA7

EDID AT24C02BN

[DSDA1,DSCL1]

MICOM
EDID AT24C02BN

LGE Internal Use Only

Power Voltage BlockDiagram

+5V-TUNER

Copyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
KA7809 (IC1005)

12V

KIA78R05F (IC1011)

Tuner

5V
KIA78R33F 1A (IC1012) Tuner +3.3V
3.3V_ON

+3.3V-TUNER

HDMI S/W, CI buffer, Flash Memory, NTP3000A, Chaplin(AUD_VREFP ) +1.8V Tuner, NTP3000A

- 22 AZ1117H-1.8TRE (IC1004) +3.3V_STBY RS-232 Driver, Sub Micom , +5V

FET Power S/W (Q1003)

AZ1117H-3.3 (IC1003)

HDMI S/W, OPTIC Jack, NVRAM, USB

RL_ON/PWR_ON/OFF

16V
P_+16V

NTP3000A

LGE Internal Use Only

BlockDiagram
KIA78R33F 1A (IC1001)
3. V_ON

5V

+3.3V-DOUGLAS

Copyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
PQ018EZ02ZPH 0.23$ (IC1000) +1.8V_DOUGLAS_DDR
1.8V_DOUGLAS EN

SC4519STRT 600Khz,3A,0.41$ (IC1002) +1.26V_DOUGLAS

1.26V_DOUGLAS EN

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LGE Internal Use Only

EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.

305 300

301 120 306 304 200

121

307

209 571 310 303 208 560 302 570 202 201 203 204 207 250 205 580

206 240 280 290 230 231

591

520

590

400 910

900

901

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LGE Internal Use Only

RGB_+5 V
TP214 1
A1

P_+5 V
TP214 2
A2 KDS18 4 D144

IC100 FLI10610H-AA
M3 M4 M1 R1 R2 T3 T4 T1 T2
6A 7A
TP213 7 TP213 8

R132 7

D115

R117 2 220 K

6.8K

COMPONENT1
JP8 8

R117 9 3.9K COMP1_RI N

IC102 AT24C02BN-10SU-1. 8
R1214 10K R1215 10K
1 8

TP210 2

R620 R621

D117

D12 2

D12 6

3E

[RD]O_SP RING

R116 9 220 K

R132 8 6.8K

COMP1_LI N

D128

R117 8 3.9K
D113

11.RGB Input
JK104 KCN-DS-1-008 9

D12 7 5 SD0

C15 0 0.1uF R118 1

AUD_IN_L1 AUD_IN_R1 AUD_IN_L2 AUD_IN_R2 AUD_IN_L3 AUD_IN_R3 AUD_IN_L4 AUD_IN_R4 AUD_IN_L5 AUD_IN_R5

AUD_OUT1_L AUD_OUT1_R AUD_OUT2_L AUD_OUT2_R AUD_OUT_HP_ L AUD_OUT_HP_ R AUDO_SPDIF_OU T AUDO_I2SA_BC LK

0 0

SW_LOU T SW_ROU T

R L Pr Pb

JP8 9

4E [RD]CONTACT 2E [RD]1P_CAN2

OP T

100 R117 7
4 5

D_SUB_SC L D_SUB_SD A

M2
COMP1_LI N COMP1_RI N COMP2_LI N COMP2_RI N PC_AUDIO_ L C61 0.47u 1 F C61 0.47u 2 F C61 0.47u 3 F C61 0.47u 4 F C61 0.47u 5 F C61 0.47u 6 F

PC Sound
JK601
PEJ024-0 1 3 E_SP RING T_TERMINAL1 B_TERMINAL1 R_SP RING T_SP RING B_TERMINAL2 T_TERMINAL2 SHIELD_PLATE R630 3.9K

D129

D130

1.RE D
TP161 1

100

N5 M5 N3 N4 N1 N2 AC1 AB5 L6

JP9 0

5D [WH]C_LUG_L 2D [WH]1P_CAN 5C [RD]C_LUG_L 2C 5B 2B 3A [RD]1P_CAN1 [BL]C_LUG_L [BL]1P_CAN [GN]O_SPRIN G

2.GR N
6

3.BLU
COMP1_P r

R115 5 0
11

R133 3 22 C10 8 4.7pF

VGA_R D_SUB_SD A VGA_G C10 6 4.7pF R113 8 1K

IC103

1 7 2 8 3 9 4 10

AUDIO_MASTER_CL K

D12 4

TP161 3

D13 7 30 V

4A [GN]CONTACT 2A [GN]1P_CA N

READY

RGB_LINK LOW : CONNECTE D DS_H S

74HC14 D
1 2 3 14 13 12 11 10 9 8

15

PPJ209-0 2

R1123 0

C112 0.1uF 16 V R133 4 22 C10 7 4.7pF

TP210 3

C619 47pF 50V READY

AUD_MCLK0 AUD_MCLK1 SIF_R TN

AUDO_I2SA_ WCLK AUDO_I2SA_DAT0

MS_WCLK_AMP MS_DAT_AMP

6B 8

AC4 AD2 AE2 AC3 AD3 AE1 R3 R4 R5

C696 47pF 50V

R62 4 220 K

16

AUD_MONO_INFor CHAPLI N

R117 1 75

JK103

GND
D12 3

COMP1_ Y READY C10 3 4.7pF

H_SYNC_P C VGA_B DS_H S

C13 2 12p F

4 5 6 7

DS_V S

+3.3V
R115 0 10 K

MS_BCL K
V_SYNC_P C

AC2 AB3 AA4 AA5

AUDO_I2SB_DAT1 For DOUG LAS AUDO_I2SB_DAT2 AUDO_I2SB_BCL K AUDO_I2SB_ WCLK

AUDIN_I2S_BCLK AUDIN_I2S_WCLK AUDIN_I2S_DAT AUDIN_SPD IF_IN

TP161 4

MS_WCL K +3.3V
MLB-201209-0120P-N 2 L601

R115 9 1K
D13 8 30 V

R117 4 1K

MS_DAT

COMP1_LIN K

HIGH : C ONNECTE D

TP211 6

C116 0.1uF 16 V

R118 1K 0

C13 3 12p F

DS_V S

C14 8 0.1uF

TP2115

D_SUB_SC L R115 7 75 R115 8 75 R116 3 75 R116 6 4.7K R117 5 4.7K

L3
C60 1 47u F 16 V C60 2 0.1uF 16 V C60 3 10u F 16 V C60 4 0.1uF 16 V C60 5 10u F 16 V

AUDO_MUTE AUD_VREFP AUD_VCM AUD_VREFN LS_OUT_ L LS_OUT_ R LS_OU W T_S

L5
C60 6 0.1uF 16 V

GND
TP161 8

L4

SIDE CVBS & S_VIDE O

COMP2_RI N

R135 3

COMPONENT2
D10 7 R136 9 220 K
JP8 2

R136 4 3.9K
6.8K

R698 6.8K

COMP1_P b

4.RESERVE D 5.GN D 6.R_GN D 7.G_GN C 8.B_GN D 9.+5 DC V 10.SYNC_GN D 11.RESERVE D 12.SD A 13.HSYN C 14.VSYN C 15.SCL

R117 0 75

D12 5

JP9 1

SPDIF_OU T

4 5

TP161 2

+3.3V
R114 9 10 K
13

2 JP9 JP9 3

READY R115 6 0

+5V

PC_AUDIO_ R

AB4 AC5

D601 CDS3C30GT H READY

C697 47pF 50V

R62 3 220 K
R631 3.9K

R116 8 75

RGB_+5 V

14

R60 1 22

MS_BCLK_AMP

7B

R697 6.8K

12

R133 5 22

AD1

R60 6 220

PC_AUDIO_ R

PC_AUDIO_ L

D602 CDS3C30GT H READY

ROM DOWNLOAD FOR PD P

+3.3V JK105
R1152 10K

TP161 6

SCART 2 B u f f er MNT/DTV OUT

HIGH : C ONNECTE D

DTV/MNT_LOUT Q60 7 2SC305 2 R66 8 2K RT1P14 1C-T112 Q61 0 DTV/MNT_ROUT 3 R66 9

TP212 8

P_+12 V

R137 1 3.9K
R136 7 6.8K R135 7 220 K D110

COMP2_LI N PC_SER_DAT A

PPJ218-0 1 4A 5A 2A [YL]O_SPRING [YL]CONTAC T [YL]U_CAN [WH]C_LUG

3E

[RD]O_SP RING

1 2 C66 0 0.1uF

MUTE_LINE_MNTOUT

R L Pr Pb

JP8 3

4E [RD]CONTACT 2E [RD]1P_CAN2

R1160 1K C119 0 . 1 uF 16V R130 6 0

R1309 R130 4 READ Y 220K D139 30V

SIDE_CVBS_LIN K

JP8 4

5D [WH]C_LUG_L 2D [WH]1P_CAN 5C [RD]C_LUG_L 2C 5B 2B 3A [RD]1P_CAN1 [BL]C_LUG_L [BL]1P_CAN [GN]O_SPRIN G

TP205 8

3B

6.8K

S W_ROU T S W_LOUT

R136 8 75

COMP2_P r PC_SER_CL K
TP205 9

SIDE_R IN SIDE_LIN

2B 4C 5C 2C

[WH]U_C AN [RD]O_SPR ING

D131

D114

D12 0

SIDE_LIN

SPDIF OPTIC JAC K OPTIO N +5V +5V

DTV/MNT_LOUT_SC 2 R67 2 1K SPDIF_OU T JK602 JST1223-00 1
1

Q60 8 2SC305 2

2K

R60 7 0 READY R64 8 1K C64 4 6800p F B C Q60 2 2SC305 2 E R65 2 4.7K R65 8 470 K

SIDE_RI N
C160 100p F READY

AV1_RIN AV1_LI N

D10 8

JP8 5

R130 7 0

C161 100p F READY

R66 3 2.2K

C68 2 25 V 10u F DTV/MNT_LOUT

R131 0

D132

220 K

JP8 JP8 7 6

[RD]U_CAN

R130 3 READ Y

[RD]CONTACT

6.8K

GND

F i b er O p t i c

R136 5 75

COMP2_P b
READY
JK106 PSJ0 18-01

ZD60 1

D111

0.47u F

0.47u F

0.47u F

0.47u F

0.47u F

0.47u F

TP206 0

4A [GN]CONTACT 2A [GN]1P_CA N

0.1uF
3

C65 7

VCC

R60 8 0 READY DTV/MNT_ROUT_SC 2 R65 0 1K C64 8 6800p F B C Q60 4 2SC305 2 E R65 4 4.7K R66 2 470 K

1 2

GND_TE R

VINPUT

C64 2 0.01u F

TP211 7

PPJ209-0 2

R135 5 75

JK101

GND
D112

+3.3V
R136 3 10 K

COMP2_ Y READY C10 2 4.7pF

3 4 5 6 7 8 VCC

C_LUG_L1 C_LUG_S 2 C_LUG_L2

R1308

+8V_MS P

TP211 8

R1122 0

C_LUG_S 1

C69 3 0.01u F

C69 4 3.3uF

C62 0

C62 9

C69 0

C62 7

C62 1

TP206 1

C62 6

L602 M LB-201209-0120 P-N2

C68 0 3.3uF 50 V

FIX_PO LE

R66 4 2.2K

C68 3 25 V 10u F DTV/MNT_ROUT

READY

SIDE_CI N
D135 75

R136 6 1K
D10 9 30 V

COMP2_LIN K

+3.3 V_S TBY

+3.3V_S TBY

NC1 COM1

C67 6 0.1uF

D133

SC1_IN_ R

SC2_IN_ R

SC3_IN_ R

SC4_IN_ R

R1312

SC1_IN_ L

SC2_IN_ L

SC3_IN_ L

MONO_IN

AGNDC

AVSS

ASG 3

16

AV 1, MORNITOR OU T
JK902 PPJ150-0 9

C68 6 0.1uF

1 : Data carrier detec t 2 : RX 3 : TX 4 : DTR(Data terminal read y 5 : GND 6 : DSR(Data set ready ) 7 : RT S ( Req uest t o sen d) 8 : CTS(Clear to send ) 9 : RI ( R i ng i n di c a to r)
TP208 TP208 3 2

C14 3 0.1uF

V+

15

GND

10 9

COM2
D134

R1110 0 +3.3V 4.7K R1111

SIDE_S_S W

NC2

ASG 2

ASG 1

RS-232C Inpu t

C1+

11

NO2

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

C1-

14

DOUT1

12 SHIELD

33

AHVSS

C14 5 0.1uF

TP212 2

VREFTO P

NO1

SC4_IN_ L

C12 3 0.1uF 16 V

C14 1 0.1uF

75

IC101 MAX3232CD R

SIDE_YIN/SIDE_VIN

L611 M LB-201209-0120 P-N2

HIGH : C ONNECTE D

+5V

C62 4 100u F 16 V

C62 8 10u F 16 V

C68 5 10u F 16 V

PWM AMP

C2+

13

RIN1

LOW : Y/C
R62 8 62 K R62 7 1.5K C61 0
C617 C623 2pF 2pF 50V 50V X601 18.432MH z

AVSUP
C61 8 4.7uF 10 V

C14 4 0.1uF C14 2 0.1uF

C2-

12

ROUT1

R118 6 100 CHAPLIN_R X R118 7 100 CHAPLIN_TX R118 8 100

ANA_IN1+ ANA_IN?
C62 2 56p F R61 7 0
READY

49 50 51 52 53 54 55 56 57 58 59 60

CAPL_ M 32 AHVSUP 31 CAPL_ A

ANA_IN2+ TESTE N XTAL_I N XTAL_OUT TP

P10 1 KCN-DS-1-008 8

V-

11

DIN1

R116 4 100

56p F Q61 1
2SC3875 S

TP212 7

DOUT2

10

DIN2

C69 2 0.01u F

SIF
R62 5 24 K
DEBUG_R X UCOM_R X +3.3V_S TBY READY R134 7 0 1/16 W 5%

IC602 MSP4458G-C 4

30 SC1_OUT_ L 29 SC1_OUT_ R 28 VREF1 27 SC2_OUT_ L 26 SC2_OUT_ R 25 24 23 NC4 NC3

C66 22000p 3 F P_+16 V

2A 3A 4A 2B 3B 2C 3C 4C 2D 3D 4D 2E 3E 2F 3F 4F

[RD]1P_CAN 1
JP7 5

RIN2 6 2

R116 5 100
R132 5 100 READY R132 4 100

ROUT2

R1359

[RD]O_SPRING 1
D10 2

R136 0 0

R118 9 100 R132 2 100 PC_COMMAN D

R62 6 470

AUD_CL_OU T
TP215 7

DTV/MNT_LOUT_SC 2 DTV/MNT_ROU T_SC 2

C67 R68 5 7 C63 4 330u 3 .3 F 0.1uF 25 V C67 8 0.01u F C63 7 22000p F
PGND1A_ 2 PGND1A_ 1 PVDD1A_ 2 PVDD1A_ 1 PGND1B_ 2 PGND1B_ 1 PVDD1B_ 2 PVDD1B_ 1 OUT1A_ 2 OUT1A_ 1 OUT1B_ 2

R63 5 5 .6
C671 390pF 50V C631 390pF 50V

2S 1S

L609 DA-8580 EAP3831900 1 2F 1F C65 8 0.47u F

L603 C65 6 0.01u F R67 4 3 .3 R67 7 3 .3 C67 3 0.01u F

4

C63 9 0.1uF

R64 2 4.7K

220K

6.8K

R135 1

READY

AV1_RIN C12 1 100pF READY

3

NC5 NC6

C67 0 0.1uF

C63 5 0.1uF

READ Y

[RD]CONTACT1 [WH]1P_CAN1

8 4

D_CTR_ I/O_1 D_CTR_ I/O_0

4 R118 100

NC2 22 DACM_L 21 DACM_R 20 VREF2 19 DACA_L 18 DACA_R 17

DVSS 11 I2S_DA_IN2/3 12 NC1 13 14 10 15 16 1 2 6 7 4 5 3 8 9
SW_RESE T

R67 1 5 .6

C63 8 0.1uF

R68 6 4.7K

PIN34 : L SP EAK ER

L606
3

JP7 6

9 5

R1361

R135 4

D10 1

220K

6.8K

AV1_LI N C12 0 100pF READY +3.3V

R114 7 10 K

R134 6 10 K

[WH]0_SPRING 1 [Y L]1P_CAN1 [YL]O_SPRING1

JP7 8

VDR1B

BST1 B

R135 2 0

10

5 R118 100 P10 4 SMW250-0 3 1 2 3

R67 0 100 1000p F C66 5

OUT1B_ 1

ADR_SE L 61 STANDBYQ 62 NC7 63

IC1013 NLASB3157DFT2 G

C66 9 1uF

64
+3.3V_S TBY
B1

READ Y

56

55

54

53

52

51 50

1
49 48 47 46 45 44 43

JP7 7

I2S_CL4

I2S_DA_IN1

I2S_CL3

I2S_C L

I2S_W S

I2S_ WS4

I2S_ WS3

I2C_C L

READY

I2C_DA

I2S_DA_OUT 4

READY

READY

220 I2S_DA_OU T

DVSUP

READY

RESET Q

D116

D119

D118

R8113 10K

AV1_CVBS
R1362

D12 1

UART_SE L

SELEC T
VCC

AUDIO_MASTER_CL K
L607 MLB-201209-0120P-N 2 L608 MLB-201209-0120P-N 2

5 C64 1uF
+3.3V

BST1 A VDR1A /RESE T AD VSS_IO CLK_I CLK_O VDD_IO DGNDP LL AGNDP LL LFM A VDDPLL DVDDPLL NC_1

1 2 3 4 5 6 7 8 9 10 11 12 13 14
TP219 5 DVSS 15 18 19 20 21 22 24 25 26 17 27 16 23 28

42 41 40 39 38 IC601 37 36 EAN4158400 1 35 34 33 NTP3000 A 32 31 30 29

NC_2 VDR2A BST2 A

DEBUG_T X
100

2 C66 6 1uF C64 22000p F

L604
6602T25009 C

PIN12 : R SPEAKE R
JK603

[YL]CONTACT 1
D10 6

R114 3 1K C16 3 0.1uF 16 V

GND

+1.8V
M LB-201209-0120 P-N2

READY

75

D14 0 30 V

AV1_CVBS_LINK

C16 7 0.1uF 16 V

+1.8V
TP219 8
TP212 4

B0

UCOM_T X

L1019

100

100

220

[RD]O_SPRING 2
D14 1

L106 3.3u H C16 5 1000p F C110 F 1000p READY

470K R1137

HIGH : C ONNECTE D
DTV/MNT_ROUT

R61 5

220

[RD]1P_CAN 2
JP7 9

C67 C63 7 2 100 pF 1000p F 2 R64 C65 6 3.3K 0.1uF

R60 3

R61 4

R61 2

R60 9

[RD]CONTACT2 [WH]1P_CAN2
JP8 0

P_+12 V

0.01u F

0.01u F

100 pF

BST2 B

WC K

BC K

SD A

SC L

PWM_3B/PWM_HP 2

[WH]0_SPRING 2
D14 2

27 K R133 9

C63 6

750

750

JP8 1

750

[Y L]1P_CAN2 [YL]O_SPRING2

C68 7

C62 5

2 C16 F 1000p

C10 9 1000p F READY

470K R1136

DTV/MNT_LOUT C Q10 6 2SC305 2 E

10K R1128 330 R133 7

R134 3 330

C60 8 470p F

L105 3.3u H

R134 2

47 E 2SA1504 S Q10 3 B R133 6 330 C

C60 9 4.7uF 10 V

+1.8V

PWM_3A/PWM_HP 1

PROTEC T

SDA TA

VDR2B

100

PGND2B_ 1

FAULT

DVDD

SCL1_5 V SDA1_5 V SW_RESET

R61 1

PGND2A_ 2 PGND2A_ 1 OUT2A_ 2 OUT2A_ 1 PVDD2A_ 2 PVDD2A_ 1 PVDD2B_ 2 PVDD2B_ 1 OUT2B_ 2 OUT2B_ 1 PGND2B_ 2

R64 4 5 .6
C651 390pF 50V C664 390pF 50V

L605 DA-8580 EAP3831900 1 2S 2F 1S 1F

C66 6 0.47u F

C64 1 0.1uF

R64 1 4.7K

C66 7 0.01u F R64 0 3 .3 R63 6 3 .3 C67 2 0.01u F L610

TP216 0

TP215 9

TP215 8

R68 8 5 .6 P_+16 V

C65 0 0.1uF

R67 3 4.7K

R60 4

C67 4 10u F 6.3V

C66 8 0.1uF

C66 1 10u F 6.3V

C64 0 0.1uF

27 K R133 8

16V 10uF C111

R1119 75

C Q10 8 2SC305 2 R134 5 470 E

C65 C68 3 9 0.1uF 10u F MS_DAT_AMP MS_WCLK_AMP MS_BCLK_AMP SDA2_3.3 V SCL2_3.3 V R68 0 R67 8 R67 9 5 R64 3 R64 220 220 220 100 100
C691 33pF READY C688 33pF READY

3 C63 1uF

9 C64 C63 9 0 C67 0.1uF 0.1uF 330u F V V 50 50 25 V C65 4 22000p F

R134 4 B 82

DTV/MNT_VOUT
R61 0 R60 2 R61 6

D14 3

1K R134 0

[YL]CONTACT 2

330 R134 1

R134 9 0

C118 220uF 16 V

TP218 1

TP218 2

R68 9 0

AUDIO_MUTE

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PRO TECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PRO TECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

MS_BC LK MS_ WCLK MS_DAT

E x t e r n a l J a ck

AUDI O

SIDE HDMI
D2+_HDMI2 D2-_ HDMI2 D1+_HDMI2 D1-_ HDMI2 D0+_HDMI2 D0-_ HDMI2 CK+_HDMI2 CK-_HDMI2 DDC_SCL_ 2 DDC_SDA_ 2
+5 V
+3.3V_DOUGLA S

5V_HDMI_3

5V_HDMI_4
+3.3V
JACK_GN D 20 C213 0 . 1 uF 16V 19 18 HP D R +5V_POWE GND DDC/CEC_ SD A SC L NC CE C CLKCLK_SHIELD CLK+ DATA0 DATA0_SHIELD DATA0 + DATA1 DATA1_SHIELD DATA1 + DATA2 DATA2_SHIELD DATA2 + TP209 7 C220 0 . 1 uF 16V

22 19 18 17 16 15 14

A2 KDS18 4 D207

TP209 6 C203 0 . 1 uF R20 2 16V

TP219 2

IC100 FLI10610H-AA

+1.8V_DOUGLAS_DD R

A1

1K
C TP218 4 TP218 5

HP_D ET_S /W_3

TP219 1 TP219 0

R23 2 1K

R299 1

HP_D ET_S /W_4

C901 0 0.1uF

D24 E23 C25 C24 B25 B24

LBADC_33 LBADC_GND

UART0_RX D UART0_TXD UART1_RX D

A19 B19 A20

TP206 9

DEBUG_R X DEBUG_T X CHAPLIN_R X

0 0

C904 2 10uF 6.3V

C904 7 0 . 1 uF 16V

C905 5 0 . 1 uF 16V

C906 2 0 . 1 uF 16V

C906 8 0 . 1 uF 16V

C907 2 0 . 1 uF 16V

C907 7 0 . 1 uF 16V

C908 2 0 . 1 uF 16V

C908 7 0 . 1 uF 16V

+1.26V_DOUGLA S
L11 L12 L17

IC100 FLI10610H-AA
D26 D28 E24 E26 E28 G24 G26 G27 J 24 J 26 J 28 L13 L14 L15 L16 L24 L26 L28 M13 M14 M15 M16 N11 N12 N13 N14 N15 N16 N17 N18 N19 N27 N28 P11 P12 P13 P14 P15 P16 P17 P18 P19 P26 R11 R12 R13 R14 R15 R16 R17 R18 R19 T11 T12 T13 T14 T15 T16 T17 T18 T19 T24 T26 U11 U12 U13 U14 U15 U16 U17 U18 U19 V14 V15 V16 V17 V29 W14 W15 W16 W17 W24 W26 W28 AA24 AA26 AA27 AC24 AC26 AC28 AE24 AE26 AE28 D4 E5 F6 F5 E3 F1 G5 G3 H5 J5 K5 K3 M6 N6 L2 P1 P2 P3 P4 P5 U1 E21 A2 C5 C6 C7 C8 C9 C10 D7 D8 AD21 AD22 AE23 AG27 B22 C22 AD20 AJ19 AF19 AC6 AD7 AG4 C916 6 0 . 1 uF R977 510 R978 10

0.1uF

C21 0 0.1uF

C20 6 0.1uF

C21 2 0.1uF

C20 7 0.1uF

C20 4 0.1uF

C20 9 0.1uF

C20 8 0.1uF

0.1uF

R28 22 6 R28 22 7

C20 5

CVDD12_ 1 CVDD12_ 2 CVDD12_ 3 CVDD12_ 4 CVDD12_ 5 CVDD12_ 6 CVDD12_ 7 CVDD12_ 8 CVDD12_ 9 CVDD12_1 0 CVDD12_1 1 CVDD12_1 2 CVDD12_1 3 CVDD12_1 4 CVDD12_1 5 CVDD12_1 6 CVDD12_1 7 CVDD12_1 8 CVDD12_1 9 CVDD12_2 0 IOVDD33_1 IOVDD33_2 IOVDD33_3 IOVDD33_4 IOVDD33_5 IOVDD33_6 IOVDD33_7 IOVDD33_8 IOVDD33_9 IOVDD33_1 0 IOVDD33_1 1 IOVDD33_1 2 IOVDD33_1 3 IOVDD33_1 4 IOVDD33_1 5 IOVDD33_1 6 IOVDD33_1 7 IOVDD33_1 8 IOVDD33_1 9 IOVDD33_2 0 ADC_VDD12_ 1 ADC_VDD12_ 2 ADC_VDD12_ 3 ADC_VDDA33_ 1 ADC_VDDA33_ 2 ADC_VDDA33_ 3 ADC_VDDA33_ 4 ADC_VDDA33_ 5 AUD_AVDD12_ 1 AUD_AVDD12_ 2 C4P

CVSS _1 CVSS _2 CVSS _3 CVSS _4 CVSS _5 CVSS _6 CVSS _7 CVSS _8 CVSS _9 CVSS_1 0 CVSS_1 1 CVSS_1 2 CVSS_1 3 CVSS_1 4 CVSS_1 5 CVSS_1 6 CVSS_1 7 CVSS_1 8 CVSS_1 9 CVSS_2 0 CVSS_2 1 CVSS_2 2 CVSS_2 3 CVSS_2 4 CVSS_2 5 CVSS_2 6 CVSS_2 7 CVSS_2 8 CVSS_2 9 CVSS_3 0 CVSS_3 1 CVSS_3 2 CVSS_3 3 CVSS_3 4 CVSS_3 5 CVSS_3 6 CVSS_3 7 CVSS_3 8 CVSS_3 9 CVSS_4 0 CVSS_4 1 CVSS_4 2 CVSS_4 3 CVSS_4 4 CVSS_4 5 CVSS_4 6 CVSS_4 7 CVSS_4 8 CVSS_4 9 CVSS_5 0 CVSS_5 1 CVSS_5 2 CVSS_5 3 CVSS_5 4 CVSS_5 5 CVSS_5 6 CVSS_5 7 CVSS_5 8 CVSS_5 9 CVSS_6 0 CVSS_6 1 CVSS_6 2 CVSS_6 3 CVSS_6 4 CVSS_6 5 CVSS_6 6 CVSS_6 7 CVSS_6 8 CVSS_6 9 CVSS_7 0 CVSS_7 1 CVSS_7 2 CVSS_7 3 CVSS_7 4 CVSS_7 5 CVSS_7 6 CVSS_7 7 CVSS_7 8 CVSS_7 9 CVSS_8 0 CVSS_8 1 CVSS_8 2 CVSS_8 3 CVSS_8 4 CVSS_8 5 CVSS_8 6 CVSS_8 7 CVSS_8 8 CVSS_8 9 CVSS_9 0 CVSS_9 1 CVSS_9 2 CVSS_9 3 ADC_GND12_ 1 ADC_GND12_ 2 ADC_GND12_ 3 ADC_GNDA_ 1 ADC_GNDA_ 2 ADC_GNDA_ 3 ADC_GNDA_ 4 ADC_GNDA_ 5 ADC_GNDA_ 6 ADC_GNDA_ 7 ADC_GNDA_ 8 For DOUGLAS A4P

DDC_SDA_ 3 DDC_SCL_ 3
CEC_R EMOTE

17 16 15 14

C21 1

R23 0 22 R22 9 22

DDC_SDA_ 4 DDC_SCL_ 4

AR90 1 1K 1/16 W

+1.8V_DOUGLAS_DD R

L18 L19 M11 M12 M17 M18 M19 V11 V12 V13 V18 V19 W11 W12 W13 C915 4 10uF 6.3V C915 7 0 . 1 uF 16V C915 5 0 . 1 uF 16V C915 6 0 . 1 uF 16V

LBADC_IN1 LBADC_IN2 LBADC_IN3 LBADC_IN4 LBADC_IN5 LBADC_IN6 LBADC_RETUR N

UART1_TXD UART1_RT S UART1_CT S

B20 C20 C19

R94 4
AR90 2 4.7K 1/16 W

+3.3 V_S TBY

RESE T

CHAPLIN_TX
C904 5 10uF 6.3V
P90 4 12505WS-08A0 0

+3.3 V_S TBY C919 9 0.1uF 16 V

R94 5

VCC_8

GND_ 7

VCC_7

VDD

A23

A24

A22

A21

B24

B23

B22

12 11

B21

CK-_HDMI3 CK+_HDMI3 D0-_ HDMI3 D0+_HDMI3 D1-_ HDMI3 D1+_HDMI3 D2-_ HDMI3 D2+_HDMI3 DDC_SDA_ 3 DDC_SCL_ 3 CK-_HDMI3 CK+_HDMI3 D0-_ HDMI3 D0+_HDMI3 D1-_ HDMI3 D1+_HDMI3 D2-_ HDMI3 D2+_HDMI3
SDA3 SCL3 GND_ 1 B31 A31 VCC_ 1 B32 A32 GND_ 2 B33 A33 VCC_ 2 B34 A34 GND_ 3 VSADJ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

12 11 48 47 46 45 44 A14 B14 VCC_ 6 A13 B13 GND_ 6 A12 B12 VCC_ 5 A11 B11 SCL1 SDA1 HPD 1 E Q S2

TXCLK_BUFTXCLK_BUF+ TX0_BUF TX0_BUF + TX1_BUF TX1_BUF + TX2_BUF TX2_BUF +

+5 V +3.3V
R996 3.3K R997 3.3K

R998 1K R999 1K

A25 A24 F22

TP207 TP207 TP207 TP207 TP207 4 3 2 1 0

13

SDA2

HPD 3

HPD 2

SCL2

13

C905 0 0 . 1 uF 16V

C906 4 0 . 1 uF 16V

C907 0 0 . 1 uF 16V

C907 4 0 . 1 uF 16V

C907 9 0 . 1 uF 16V

C908 4 0 . 1 uF 16V

56

54

63

61

59

57

53

64

62

60

58

55

52

51 50

49

10 9 8 7 6 5 4 3 2 1 20 21

TRS T TDI TDO TMS

B26 B27 A27 A28 B28 A29

R95 4 1K

D2+_HDMI1 D2-_ HDMI1 D1+_HDMI1 D1-_ HDMI1 D0+_HDMI1 D0-_ HDMI1 CK+_HDMI1 CK-_HDMI1 DDC_SCL_ 1 DDC_SDA_ 1 0 R26 8 HDMI_SW_E Q

10 9 8 7 6 5 4 3 2 1

R95 7 22 1/10 W 5%

+1.26V_DOUGLA +1.26V_ADC_DOUGLA S S

5% 1/10 W R95 1 4.7K

41 40 39 38 37 36 35 34 33

E20 F20
7 100R92 8 100R92

EJ_DINT 2WIRE_M0_S CL 2WIRE_M0_SD A USB_FLA G 2WIRE_S0_SD A 2WIRE_S0_SC L USBPHY_PAD P 2WIRE_S1_SD USBPHY_PAD A M 2WIRE_S1_SC L USBPHY_VRE S 2WIRE_S2_SD A 2WIRE_S2_SC L IRDATA USB_PWRE N

B29

1/10 W 5%

IC201 TMDS351P G A

43 42

AR903 100 1/16W

D21 D20

2WIRE_M1_SD A 2WIRE_M1_S CL

TCK EJ_RST_N

R913 0

R995 4.7K R994 4.7K

SDA2_3.3 V SCL2_3.3 V SCL1_5 V SDA1_5 V

+3.3V_IO_DOUGLA S

W18 W19 F12 F13 F14 F15 F16 F18 F19 AD8

8 9

C902 0 33p F 50 V
+1.26V_DOUGLAS_ D +1.26V_DOUGLA S

C29 C28 AJ20 AH20

D_SUB_SD A D_SUB_SC L

B12 A12 D12 C12 E11 D11

US B20OC1 USB20-PWE 1 USB20-1-D P

R96 0 100
READ Y

R914 0 C902 7 10uF 6.3V C903 1 0 . 1 uF 16V C903 5 0 . 1 uF 16V C903 9 0 . 1 uF 16V C904 4 0 . 1 uF 16V C904 9 0 . 1 uF 16V C905 6 0 . 1 uF 16V C906 3 0 . 1 uF 16V C906 9 0 . 1 uF 16V C907 3 0 . 1 uF 16V C907 8 0 . 1 uF 16V

AD10 AD11 AD12 AD14 AD16 AD17 AD18 U6 V6 Y6

17

19

21

24

25

26

27

28

29

31

18

22

23

30

32

20

R201 4.7K

DC1R019NB H JK204

R96 3 100

GND
SDA_HDMI_S W SCL_HDMI_S W DDC_SDA_ 4 DDC_SCL_ 4

VCC_3

VCC_4

SCL_SINK

GND_ 4

GND_ 5

HPD_SIN K

SDA_SIN K

F QJ41193-FEE2-7 JK201

AG20
R95 6 6.2K 1% C901 9 0.1uF 16 V

READ Y

Z3

Z4

Z2

Y4

Y3

Y2

Y1

Z1

S1

AR904 100 1/16W

US B20-1-D M

GND

2 0 R26 9 0 R25

HDMI_SEL2 HDMI_SEL1 +3.3V

TP219 3

+3.3V_DOUGLA S

+3.3 V_IO_DOUGLAS

C21

R981 4.7K 1/10W 5%

R8114 0

R26 1 4.7K

R26 4 4.7K

A13
SDA_HDMI_S W SCL_HDMI_S W

L910 M LB-201209-0120 P-N2

C902 6 10uF 6.3V

C902 9 0 . 1 uF 16V

C903 2 0 . 1 uF 16V

C903 6 0 . 1 uF 16V

C904 0 0 . 1 uF 16V

C904 6 0 . 1 uF 16V

C905 3 0 . 1 uF 16V

C906 0 0 . 1 uF 16V

C906 6 0 . 1 uF 16V

C907 1 0 . 1 uF 16V

C907 5 0 . 1 uF 16V

C904 3 10uF 6.3V

C904 8 0 . 1 uF 16V

C905 8 0 . 1 uF 16V

AA6

+1.26V_ADC_DOUGLA S

AB6 A1 B2

B13 C13 D13

PWM3 PWM2 PWM1 PWM0 PPW R RESET_ N PBIAS DFSYN C E13 A21 B21
L921 M LB-201209-0120 P-N2 C908 5 10uF 6.3V C909 0 0 . 1 uF 16V C909 6 0 . 1 uF 16V C910 3 0 . 1 uF 16V C9114 0 . 1 uF 16V C913 6 0 . 1 uF 16V

+3.3V_ADC_DOUGLA S
+1.26V_DOUGLAS_ D +1.26V_HDMI_DOUGLA S

C3 E4 F4 G4 H4

TX2_SW + TX2_SW -

TX1_SW + TX1_SW -

TX0_SW + TX0_SW -

5V_HDMI_1

TXCLK_SW+ TXCLK_SW-

TP209 4

TP219 4

R8115 0

D23
RESE T

+1.26V_AUD_DOUGLA S +3.3V_AUD_DOUGLA S

K4 P6 R6

HDMI_4EA_PG6 0 22 19 18 HDMI_4EA_PG6 0 17 16 15 HDMI_4EA_PG6 0 14 13 12 11 10 9 8 7 6 5 CEC_R EMOTE C201 0 . 1 uF 16V

R20 1K 3
TP218 TP218 7 6

5V_HDMI_3 P_+5 V
TP209 1

A2

A1

HP_D ET_S /W_1

HDMI_4EA_PG6 0

IC202 AT24C02BN-10SU-1. 8 A0 1 2 3 4 8 7 6 5 VCC WP S CL SD A

+3.3V_DOUGLA S

+3.3V_HDMI_DOUGLAS

L1 T6 T5 U5

C21 6 0.1uF

KDS18 4 D20 3
L922 M LB-201209-0120 P-N2 C909 5 10uF 6.3V C910 1 0 . 1 uF 16V C9112 0 . 1 uF 16V C912 2 0 . 1 uF 16V

For DOUGLAS AUD_AVDD33_ 2 AUD_AVDD33_ 3 AUD_AVDD33_ 4 AUD_AVDD33_ 5 AUD_AVDD33_ 6 AUD_HP_AVDD33 DDRPLL_AVDD12 DDR_VDD_ 1 DDR_VDD_ 2 DDR_VDD_ 3 DDR_VDD_ 4 DDR_VDD_ 5 DDR_VDD_ 6 DDR_VDD_ 7 DDR_VDD_ 8 DDR_VDD_ 9 DDR_VDD_1 0 DDR_VDD_1 1 DDR_VDD_1 2 DDR_VDD_1 3 DDR_VDD_1 4 DDR_VDD_1 5 DDR_VDD_1 6 DDR_VDD_1 7 DDR_VDD_1 8 DDR_VDD_1 9 DDR_VDD_2 0 DDR_VDD_2 1 DDR_VDD_2 2 DDR_VDD_2 3 DDR_VDD_2 4 DDR_VDD_2 5 DDR_VDD_2 6 DDR_VDD_2 7 DDR_VDD_2 8 DDR_VDD_2 9 DDR_VDD_3 0 DDR_VDD_3 1 DDRPLL_AVDD33 DDR_VDDI_1 DDR_VDDI_2 DDR_VRF_ 0 DDR_VRF_ 1 DDR_VRF_ 2 DLL_VAA 0 DLL_VAA 1 HDMI_VDDA33_ 1 HDMI_VDDA33_ 2 HDMI_VDDA33_ 3 HDMI_VDDA33_ 4 HDMI_VDDA33_ 5 HDMI_VDD12_1 HDMI_VDD12_2 HDMI_VDD12_3 HDMI_VDD12_4 LVTX_VDD33_1 LVTX_VDD33_2 LVTX_VDD33_3 LVTX_PLL_VDD33 OTP_VDD3 3 RPLL_AVDD33 RPLL_AVDD12 USB_ AVDD12 USB_AVDD33_ 1 USB_AVDD33_ 2 USB_AVDD33_ 3 VDAC_VDD12 VDAC_ AVDD 33_ 1 VDAC_ AVDD 33_ 2 VDAC_ AVDD 33_ 3

R28 22 5 R28 22 4

U4 U3

DDC_SDA_ 1 DDC_SCL_ 1

A1 A2

R23 7 0 R24 1 18 K R24 5 18 K

+1.26 V_DDRP LL
+1.26V_DOUGLAS_+1.26V_AUD_DOUGLA D S

U2 D22

CK-_HDMI1 CK+_HDMI1 D0-_ HDMI1 D0+_HDMI1 D1-_ HDMI1 D1+_HDMI1 D2-_ HDMI1

+3.3V_S TBY
TP210 4

DDC_SCL_ 3 GND
+5 V +5 V
L926 M LB-201209-0120 P-N2 C9113 10uF 6.3V C912 3 0 . 1 uF 16V C913 4 0 . 1 uF 16V

+1.8V_DOUGLAS_DD R

D25 D27 D29 F25 F27 F29 H24 H27 H29

DDC_SDA_ 3

IC907
R96 9 47 K READY
HDMI_4EA_PG6 0
HDMI_4EA_PG6 0

R21 6 56 K 5V_HDMI_1 P_+5 V

TP209 0

R96 7 47 K R97 0 47 K A0 A1 A2

24LC51 2 1 2 3 4 8 7 6 5 VCC WP SC L SD A C915 3 0.1uF R96 8 22 R97 1 22

L923 M LB-201209-0120 P-N2 C910 4 10uF 6.3V C9118 0 . 1 uF 16V C912 8 0 . 1 uF 16V C913 8 0 . 1 uF 16V +3.3V_DOUGLA +3.3V_ADC_DOUGLA S S

K25 K27 K29 M25 M29 N24 P28 R25 U25 V27

MMBD301LT1G D20 2 30 V

A1

A2

4 3 2 1 20 21

R23 3 47 K

IC203 AT24C02BN-10SU-1. 8 A0 1 2 3 4 8 7 6 5 VCC WP S CL SD A R23 8 0

READY

R21 7 0

4 KDS18 D20 4
HDMI_4EA_PG6 0

SCL1_5 V SDA1_5 V

D2+_HDMI1

R21 8 0 READY CEC_ 0

HDMI_4EA_PG6 0

R98 2 4.7K

VSS

A1 A2 GND

+3.3V_DOUGLA +3.3 S V_AUD_DOUGLAS

Y25 Y27 Y29 AB24

HDMI_4EA_PG6 0

2 R24 K 18

R24 6 18 K

CEC_REMOT E

READY

F QJ41193-FEE2-7 JK202
HDMI_4EA_PG6 0

D20 1

SB D BSS8 3 Q20 1 G

DDC_SCL_ 1 DDC_SDA_ 1

L924 M LB-201209-0120 P-N2

C910 9 10uF 6.3V

C9119 0 . 1 uF 16V

C913 0 0 . 1 uF 16V

AB27 AB29 AD25 AD27 AD29

GND

+1.26V_DOUGLAS_ D

+1.26V_DDRPL L

AF25 AF27 AF29

+3.3V_DOUGLA S

C21 7 0.1uF
HDMI_4EA_PG6 0
L919 M LB-201209-0120 P-N2

E22 C905 4 0 . 1 uF 16V C906 1 0 . 1 uF 16V

+3.3V_DOUGLAS_VDD I

F23 AD23 G25

5V_HDMI_2 P_+5 V
TP209 2

A1

A2

IC204 AT24C02BN-10SU-1. 8 5V_HDMI_2 A0 A1

TP209 5 22 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 20 21 D2+_HDMI2 D1+_HDMI2 D2-_HDMI2 D0+_HDMI2 D1-_HDMI2 CK+_HDMI2 D0-_HDMI2 CEC_R EMOTE CK-_HDMI2 C202 0 . 1 uF 16V

KDS18 4 D20 5

+3.3V_OTP
10K R909

DDR2_VRE F
+3.3V_DOUGLA +3.3V_LVTX_DOUGLAS S +3.3V_ LVTX_PLL_DOUG LAS

R24 AA25

C900 3 0.1uF

R90 4 22 AV1_CVBS

1 2 3 4

8 7 6 5

VCC WP S CL SD A R23 9 0

TP208 6

R907 0 C903 0 0 . 1 uF 16V C903 3 0 . 1 uF 16V

R908 0 C903 7 0 . 1 uF 16V C905 1 0 . 1 uF 16V

+3.3V_DOUGLAS_VA A +3.3V_HDMI_DOUGLA S

M28 V24 C4 D5 D6 E6 E7

3 R24 K 18

A2 R20 1K 4
HP_DET_S/W_ 2

R24 7 18 K DDC_SCL_ 2

SW90 1 TMUE312GA B 1 2 3 5 4

AUD_AVSS12_ 1 AUD_AVSS12_ 2 For DOUGLAS B4P AUD_AVSS33_ 2 AUD_AVSS33_ 3 AUD_AVSS33_ 4 AUD_AVSS33_ 5 AUD_AVSS33_ 6 AUD_HP_AVSS33 DDRP LL_AGND HDMI_GNDA_1 HDMI_GNDA_2 HDMI_GNDA_3 HDMI_GNDA_4 HDMI_GNDA_5 HDMI_GNDA_6 HDMI_GNDA_7 HDMI_GNDA_8 HDMI_GNDA_9 LVTX_VSS_1 LVTX_VSS_2 LVTX_VSS_3 LVTX_VSS_4 RPLL_AGND_ 1 RPLL_AGND_ 2 US B_GND_1 US B_GND_2 US B_GND_3 VDAC_VSS1 2 VDAC_AVSS33_ 1 VDAC_AVSS33_ 2

RESE T

C900 4 0.1uF

R90 3 22

SIDE_CI N

GND

TP218 8 TP218 9

+3.3V_DOUGLA S

+1.26V_HDMI_DOUGLA S
+1.26V_DOUGLAS_ D D10 E8 E9

DDC_SDA_ 2
+5 V
DDC_ SDA_2 DDC_SCL_ 2
C912 1 0 . 1 uF 16V C913 1 0 . 1 uF 16V C907 6 33uF 10V C908 1 0 . 1 uF 16V

R28 22 3 R28 22 8

E10

+3.3V_LVTX_DOUGLAS
AE21 AE22 AF24 AG26 R962 READY 0 A26 B23 C23 AE20 AF20 AG19 AH19 AD6 C900 2 10uF 6.3V C919 7 0 . 1 uF 16V C919 8 0 . 1 uF 16V

C21 8 0.1uF

5V_HDMI_4 P_+5 V
C901 6 0.1uF
TP209 3

+3.3V +3.3V_LVTX_PLL_DOUGLAS C901 7 47u F 16 V READY R98 4 4.7K

+3.3V_DOUGLA S +3.3V_DOUGLA S +3.3V_DOUGLAS_VDD I N e a r b y p i n F23 N e a r b y p i n A D 2 3

A1

A2

HDMI 5V Detectio n
5V_HDMI_3
R21 2 10 K HDMI3_5V_DE T R21 3 33 K R22 0 33 K 5V_HDMI_2 R21 9 10 K HDMI2_5V_DE T

IC205 AT24C02BN-10SU-1. 8 A0 A1 A2 GND 1 2 3 4 8 7 6 5 VCC WP S CL SD A R24 0 0

IC901 TPS2042BDRG 4
OC 1

KDS18 4 D20 6
R95 0 10 K

GND

USB 2.0 Jac k

L908 120-oh m R96 1 0 C902 5 100uF 16 V
5 4 USB DOWN STREA M

+3.3V_DOUGLA S
C915 9 330u F 6.3V C905 2 0 . 1 uF 16V C905 9 0 . 1 uF 16V C916 2 0 . 1 uF 16V C916 0 0 . 1 uF 16V C916 1 0 . 1 uF 16V L928 M LB-201209-0120 P-N2 C916 4 10uF 6.3V C916 5 0 . 1 uF 16V C916 3 10uF 6.3V C919 6 0 . 1 uF 16V C914 4 10uF 6.3V READY

+1.26 V_DDRP LL +1.26V_DOUGLAS_ D

IN

OUT1

R8118 0 R8119 0

R24 4 18 K

R24 8 18 K DDC_SCL_ 4 DDC_SDA_ 4

USB20-PWE 1

EN1

OUT2

+3.3V_DOUGLA +3.3V_DAC_DOUGLA S S

+3.3V_DOUGLA S
+3.3V_DOUGLA S R901 0 +3.3 V_DOUGLAS_VA A

JK901 KJA-UB-4-000 4

R93 6 0

EN2

OC 2

+1.26V_DOUGLA S

US B20OC1
2

L912 M LB-201209-0120 P-N2

C902 8 10uF 6.3V

C903 4 0 . 1 uF 16V

C903 8 0 . 1 uF 16V

1/10W 5%

+3.3V_DAC_DOUGLA S C915 2 AE6 0.1uF

AF5 AF6

CDS3C30GT H

CDS3C30GT H

F QJ41193-FEE2-7 JK203

GND

C915 8 0 . 1 uF 16V

1/10W 5% Q902 2N3904 S

C B E

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPOR TANT FOR PRO TECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

HDMI

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PRO TECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

R966 1K

R21 4 10 K HDMI_4EA_PG6 0 HDMI1_5V_DE T R21 5 33 K HDMI_4EA_PG6 0

TP210 R23 0 1 10 K

GND HDMI4_5V_DE T

C21 9 0.1uF

USB POWER ENABL USB20-1-DM E LOW ACTIV E USB20-1-D P

D90 1 30 V

TP208 5

5V_HDMI_1

5V_HDMI_4

+3.3V_OT P

Q901 RTR030P0 2

+3.3V_DOUGLA S

R22 2 33 K

D90 2 30 V

R964 390

R965 47K

C910 7 0 . 1 uF 16V

+1.8V_DOUGLAS_DD R

POWER/US B

Copyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes

LGE Internal Use Only

IC100 FLI10610H-AA
CPL_DDR2_D[0 ] CPL_DDR2_D[1 ] CPL_DDR2_D[2 ] CPL_DDR2_D[3 ] CPL_DDR2_D[4 ] CPL_DDR2_D[5 ] CPL_DDR2_D[6 ] CPL_DDR2_D[7 ] CPL_DDR2_D[8 ] CPL_DDR2_D[9 ] CPL_DDR2_D[10] CPL_DDR2_D[11] CPL_DDR2_D[12] CPL_DDR2_D[13] CPL_DDR2_D[14] JP9 4 CPL_DDR2_D[15] CPL_DDR2_D[16] F24 M24 J 25 K26 M26 E25 L25 F26 E29 L29 H28 J 29 L27 E27 K28 F28 Y24 AF28 AC25 AD26 AF26 W25 AE25 Y26 W29 AE29 AB28 AC29 AE27 W27 AD28 Y28 H25 H26 G28 G29 AB25 AB26 AA28 AA29 P27 U29 R26 U26 P25 T28 R27 V28 R29 T29 V25 R28 V26 CPL_DDR2_A[0 ] CPL_DDR2_A[1 ] CPL_DDR2_A[2 ]

CPL_DDR2_D[0-31 ]

DDR_D 0 DDR_D 1 DDR_D 2 DDR_D 3 DDR_D 4 DDR_D 5 DDR_D 6 DDR_D 7 DDR_D 8 DDR_D 9 DDR_D1 0 DDR_D1 1 DDR_D1 2 DDR_D1 3 DDR_D1 4 DDR_D1 5 DDR_D1 6 DDR_D1 7 DDR_D1 8 DDR_D1 9 DDR_D2 0 DDR_D2 1 DDR_D2 2 DDR_D2 3 DDR_D2 4 DDR_D2 5 DDR_D2 6 DDR_D2 7 DDR_D2 8 DDR_D2 9 DDR_D3 0 DDR_D3 1

DDR_A0 DDR_A1 DDR_A2 DDR_A3 DDR_A4 DDR_A5 DDR_A6 DDR_A7 DDR_A8 DDR_A9 DDR_A1 0 DDR_A1 1 DDR_A1 2

CPL_DDR2_A[3 ] CPL_DDR2_A[5 ] CPL_DDR2_A[7 ] CPL_DDR2_A[9 ] CPL_DDR2_A[11 ]

CPL_DDR2_A[4 ] CPL_DDR2_A[6 ] CPL_DDR2_A[8 ]

CPL_DDR2_DQS2_ N CPL_DDR2_DQS2_ P CPL_DDR2_A[0-12 ] CPL_DDR2_DM[0-3 ] CPL_DDR2_DM[2 ] CPL_DDR2_DM[3 ] CPL_DDR2_DM[0 ] CPL_DDR2_DM[1 ] CPL_DDR2_D[22 ] CPL_DDR2_D[17 ] CPL_DDR2_D[20 ] CPL_DDR2_D[18 ] CPL_DDR2_D[19 ]

R77 10 8 R77 10 9 R78 10 0 R78 10 1

P100 1 SMW200-22 C
CPL_DDR2_D[0-31 ]

DDR2_D[18 ] DDR2_D[19 ]

DDR2_DQS2_ N DDR2_DQS2_ P

CPL_DDR2_ 10] A[ CPL_DDR2_ 12] A[

R78 10 2 R78 10 3 R78 10 4 R78 10 5

DDR2_D[22 ] DDR2_D[17 ] DDR2_D[20 ]

DDR2_DM[2 ] DDR2_DM[3 ] DDR2_DM[0 ] DDR2_DM[1 ]

DDR_DM 0 DDR_DM 1 DDR_DM 2 DDR_DM 3

K24 J 27 AD24 AC27

CPL_DDR2_DM[0 ] CPL_DDR2_DM[1 ] CPL_DDR2_DM[2 ] CPL_DDR2_DM[3 ]

JP9 5

1 3 5 7 9 11 13 15 17 19 21

2 4 6 8 10 12 14
JP10 3

L1003 MLB-201209-0120P-N 2 C106 3 0.1uF 50 V READY C106 1 47u F 25 V C107 2 0.1uF 50 V P_+16 V

CPL_DDR2_D[17] CPL_DDR2_D[18] CPL_DDR2_D[19] CPL_DDR2_D[20] CPL_DDR2_D[21] CPL_DDR2_D[22] CPL_DDR2_D[23] CPL_DDR2_D[24]

CPL_DDR2_DM[0-3 ]

+1.8V_DOUGLAS_DD R

CPL_DDR2_D[21 ] CPL_DDR2_D[16 ] CPL_DDR2_D[23 ]

R78 10 6 R78 10 7 R78 10 8

DDR2_DM[0-3 ]

DDR2_D[21 ] DDR2_D[16 ] DDR2_D[23 ]

JP9 6

L1016 MLB-201209-0120P-N 2 C106 4 0.1uF 16 V READY C106 6 100 uF 16 V C106 7 0.1uF 16 V

DDR_BA1 DDR_CAS_ N DDR_RAS_ N DDR_CS_ N DDR_WE_ N DDR_C K DDR_CK_ N DDR_CK E

R771 680

DDR_BA0

T27 P24 N26 N25 T25 P29 N29 U27 M27

1%

U28

CPL_DDR2_BA 0 CPL_DDR2_BA 1 CPL_DDR2_CAS_ N CPL_DDR2_RAS_ N CPL_DDR2_CS_ N CPL_DDR2_WE_ N CPL_DDR2_C K CPL_DDR2_CK_ N CPL_DDR2_CK E R77 2 R70 9 294
1%

P_+12 V
IC1000

CPL_DDR2_D[25] CPL_DDR2_D[26] CPL_DDR2_D[27] CPL_DDR2_D[28]

DDR2_VRE F
C755 0 . 1 uF 50V C754 0 . 1 uF 50V R770 680 1%

CPL_DDR2_DQS3_ N CPL_DDR2_DQS3_ P CPL_DDR2_D[26 ] CPL_DDR2_D[27 ]

TP206 6

JP9 7

P_+5 V
A1[RD] A2[GN]

R70 10 6 R70 10 3 R70 10 1 R70 10 2

DDR2_D[26 ] DDR2_D[27 ]

DDR2_DQS3_ N DDR2_DQS3_ P

JP9 8

R100 2 0

C107 3 220u F L1017 16 MLB-201209-0120P-N V 2

4.7K 3 R812

P_+5V_COR E 1.8V_DOUGLAS_E N
CTL 1

BA18DD0 WHFP

+1.8V_DOUGLAS_DD R
5 NC

CPL_DDR2_D[29] CPL_DDR2_D[30] CPL_DDR2_D[31]

AR71 6 10 1/16 W CPL_DDR2_D[30 ] CPL_DDR2_D[25 ] CPL_DDR2_D[28 ] AR70 7 10 1/16 W CPL_DDR2_D[29 ] CPL_DDR2_D[24 ] CPL_DDR2_D[31 ] DDR2_D[29 ] DDR2_D[24 ] DDR2_D[31 ] DDR2_D[30 ] DDR2_D[25 ] DDR2_D[28 ]

SAM233 3 LD2

TP218 3

C107 0 0.1uF 16 V

C101 3 4.7uF 10 V READY

C106 2 0.1uF 16 V READY

R103 9 0

L1018 MLB-201209-0120P-N 2 P_+5V_COR E C107 1 0.1uF 16 V READY C101 0 4.7uF 10 V READY C106 5 220u F 16 V C106 0 0.1uF 16 V

VCC

2 3

VOUT

5V_MNT ERROR_OU T C106 8 0.1uF 16 V

C101 9 0.1uF READY 16 V

JP9 9

16 18 20 22

C100 5 0.1uF 16 V P_+12 V +8V_MS P

IC1005 KIA7808AF

DDR_DQS1_ N DDR_DQS 2 DDR_DQS2_ N DDR_DQS 3 DDR_DQS3_ N

DDR_CA L

U24

GN D

JP10 2

0 JP10 JP10 1

RL_ON/PWR_ONOF F

R103 8 0 C100 7 4 . 7 uF 6.3V READ Y C102 7 10pF M5V_ON 50V C101 2 47uF 16V R103 7 0

C107 4 0.1uF 16 V
C100 8 4 . 7 uF 6.3V

R104 0 0 READ Y C102 8 10pF 50V

C101 8 10pF 50V

AC_DE T V VS_ON A C108 9 0.1uF 16 V

IC101 1 KIA7805AF
O I 1 2 C 3 O

TP208 9

R104 1 0

READ Y

10 K

12V Li ne

C108 0 C108 7 10u F 0.1uF 6.3V 16 V

CPL_DDR2_DQS0_ P CPL_DDR2_DQS0_ N CPL_DDR2_DQS1_ P CPL_DDR2_DQS1_ N CPL_DDR2_DQS2_ P CPL_DDR2_DQS2_ N CPL_DDR2_DQS3_ P CPL_DDR2_DQS3_ N

DDR_DQS 0 DDR_DQS0_ N DDR_DQS 1 DDR_OD T

DDR2_OD T

1 2 C

+5V_TUNE R C103 7 0.1uF 16 V C101 7 4.7uF 10 V READY

C104 1 100u F 16V

CPL_DDR2_D[5 ] CPL_DDR2_D[0 ] CPL_DDR2_D[7 ]

R78 9 10 R79 10 0 R79 1 10

DDR2_D[5 ] DDR2_D[0 ] DDR2_D[7 ]

C103 0 0.1uF 16 V

C106 9 V 16 0.1uF

C100 4 0.22u F 16 V

L1008 22uH READ Y

L1005 MLB-201209-0120P-N 2

O ver cu r r en t p r ot e c t io n c an be o per a t ed
P_+5 V C109 1 0.1uF 50 V 1uF C109 2
S

P_+5V_COR E IC100 2 MP2305D S

BS SS

C101 C102 1 4 10u F 10u F 6.3V 6.3V READY C108 8 0.1uF 16 V

CPL_DDR2_DQS0_ N CPL_DDR2_DQS0_ P +1.26V_DOUGLAS_ D

C102 6 220u F 16V

CPL_DDR2_D[2 ]

R79 2 R79 3 R79 4

10 10 10

DDR2_D[2 ]

DDR2_DQS0_ N DDR2_DQS0_ P

R79 10 5 DDR2_ODT_ T CPL_DDR2_D[3 ] CPL_DDR2_D[6 ] CPL_DDR2_D[1 ] CPL_DDR2_D[4 ] R77 7 R79 6 R79 7 R79 8 R79 9 10 DDR2_OD T 10 10 10 10 DDR2_D[3 ] DDR2_D[6 ] DDR2_D[1 ] DDR2_D[4 ]

1% 1/10W

3.3K R100 5

L1004 MLB-201209-0120P-N 2 +5 V C109 0 0.1uF 16 V C109 3 4.7uF 10 V READY C109 4 100u F 16 V

D

A C

AC

C100 1 0 . 1 uF 16V

D100 1 KDS22 6

C109 7 0 . 1 uF 16V

IN

EN

RTR030P02 Q1003

S W

R101 4

47 K R101 6 47 K C 2SC305 2 E

C100 2 4.7uF 10 V

COM P

GN D

FB 1% 10K R1006

DDR2_A[0-12 ] C101 5 560p F 50 V R100 4 6.8K R100 3 1K 1% C102 0 0.015uF 50 V

DDR2_VRE F IC701 C75 10u 2 F 6.3V HYB18T512160AF-3S C75 0.1uF 3 16 V C70 0.1uF 2 VREF
J2 G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9

DDR2_D[0-31 ]

F C75 10u 1 6.3V DDR2_VRE F C75 0.1uF 0 16 V

IC703 HYB18T512160 AF-3S

J2 G8 G2 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15

R101 5 B 4.7K Q100 4

RL_ON/PWR_ONOF F

1.26V_DOUGLAS_E N
GND2

DDR2_A[0 ] DDR2_A[1 ] DDR2_A[2 ] DDR2_A[3 ] DDR2_A[4 ] DDR2_A[5 ] DDR2_A[6 ] DDR2_A[7 ] DDR2_A[8 ] DDR2_A[9 ] DDR2_A[10 ] DDR2_A[11] DDR2_A[12 ] DDR2_BA 0 DDR2_BA 1

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12

M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2

DDR2_D[0 ] DDR2_D[1 ] DDR2_D[2 ] DDR2_D[3 ] DDR2_D[4 ] DDR2_D[5 ] DDR2_D[6 ] DDR2_D[7 ] DDR2_D[8 ] DDR2_D[9 ] DDR2_D[10 ] DDR2_D[11 ] DDR2_D[12 ] DDR2_D[13 ] DDR2_D[14 ] DDR2_D[15 ]

DDR2_A[0-12 ]

C72 2 0.1uF DDR2_A[0 ] DDR2_A[1 ] DDR2_A[2 ] DDR2_A[3 ] DDR2_A[4 ] DDR2_A[5 ] DDR2_A[6 ] DDR2_A[7 ] DDR2_A[8 ] DDR2_A[9 ] DDR2_A[10 ] DDR2_A[11] DDR2_A[12 ] DDR2_BA 0 DDR2_BA 1

VREF

A10/AP A11 A12

+1.8V_DOUGLAS_DD R

DDR2_D[16 ] DDR2_D[17 ] DDR2_D[18 ] DDR2_D[19 ] DDR2_D[20 ] DDR2_D[21 ] DDR2_D[22 ] DDR2_D[23 ] DDR2_D[24 ] DDR2_D[25 ] DDR2_D[26 ] DDR2_D[27 ] DDR2_D[28 ] DDR2_D[29 ] DDR2_D[30 ] DDR2_D[31 ] +1.8V_DOUGLAS_DD R 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF

CPL_DDR2_D[13 ] CPL_DDR2_D[8 ] CPL_DDR2_D[15 ] CPL_DDR2_DQS1_ N

AR71 0 10 1/16 W

DDR2_D[13 ] DDR2_D[8 ] DDR2_D[15 ]

R71 10 0 CPL_DDR2_DQS1_ P CPL_DDR2_D[10 ] CPL_DDR2_D[11 ] R70 10 5 R70 10 4 R70 10 7 AR71 1 10 1/16 W CPL_DDR2_D[14 ] CPL_DDR2_D[9 ] CPL_DDR2_D[12 ] CPL_DDR2_A[0-12 ] AR70 8 10 1/16 W CPL_DDR2_A[10 ] DDR2_A[10 ] CPL_DDR2_A[3 ] DDR2_A[3 ] CPL_DDR2_A[7 ] DDR2_A[7 ] CPL_DDR2_A[12 ] DDR2_A[12 ] AR70 6 10 1/16 W DDR2_D[14 ] DDR2_D[9 ] DDR2_D[12 ]

DDR2_DQS1_ N DDR2_D[10 ] DDR2_D[11 ] DDR2_DQS1_ P

1 . 8 V R eg ul a to r f or TU N ER
S t a n d b y Vo l t a g e
6

BA0 BA1

L2 L3 A1 E1 J9 M9 R1 VDD5

BA0 BA1

L2 L3 A1 E1 J9 M9 R1 VDD5 VDD4 VDD3 VDD2 VDD1

C71 0.1uF 7

C70 0.1uF 3

C70 0.1uF 4

C70 0.1uF 5

C70 0.1uF 6

C70 0.1uF 7

C70 0.1uF 8

C70 0.1uF 9

C71 0.1uF 0

C71 0.1uF 1

C71 0.1uF 2

C71 0.1uF 3

C71 0.1uF 4

C71 0.1uF 5

C71 0.1uF 6

L o c a t e c l o s e t o t h e T U NR E
GND2

P_+5V_COR E
1 VI N

IC100 1 KIA78R33 F
2 VC VOUT 3 NC 4 GND1 5

C72 6

C72 7

C72 8

C72 9

C73 0

C73 1

C73 2

C73 3

C73 4

C73 5

C73 6

C73 7

C72 4

P_+5 V

DDR2_CK E DDR2_ODT_ T DDR2_CS_ N DDR2_RAS_ N DDR2_CAS_ N DDR2_WE_ N +3.3V_DOUGLA S

R812 2 1K

CKE

K2

VDD1

DDR2_CK E DDR2_ODT_ T DDR2_CS_ N DDR2_RAS_ N DDR2_CAS_ N DDR2_WE_ N DDR2_DQS2_ P DDR2_DQS3_ P DDR2_DM[2 ] DDR2_DM[3 ]

CKE

K2

S t a n d b y Vo l t a g e
R103 3 0

OD T CS RAS CAS WE

K9 L8 K7 L7 K3 A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 VDDQ10 VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1

OD T CS RAS CAS WE

K9 L8 K7 L7 K3 A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 VDDQ10 VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1

C72 5

C73 8

DDR2_C K DDR2_CK_ N

R71 1 200

VDD4 VDD3 VDD2

C K C K

J8 K8

1 C72 0 C72 330u 1uF F 6.3V 6.3V

DDR2_C K DDR2_CK_ N

R71 200 2

C K C K

J8 K8

C74 1 330u F 6.3V

C74 2 1uF 6.3V

DDR2_D[0-31 ]

IC100 3 AZ1117H-3.3
INPUT 3 2 1 ADJ/GND

IC101 2 KIA78R33 F P_+5 V

VI N 1 VC 2 VOUT 3 NC 4 GND1 5

L1012 MLB-201209-0120P-N 2 C108 1 100u F 16 V 2 C108 0.1uF 16 V

C109 6 0 . 1 uF 16V

CPL_DDR2_A[2 ] CPL_DDR2_A[9 ] CPL_DDR2_A[5 ] CPL_DDR2_BA 1

DDR2_A[2 ] DDR2_A[9 ] DDR2_A[5 ] DDR2_BA 1

C100 3 0.1uF 16 V

OUTPU T

DDR2_DM[0-3 ]
A1[RD]

DDR2_DQS0_ P DDR2_DQS1_ P DDR2_DM[0 ] DDR2_DM[1 ] DDR2_DQS0_ N DDR2_DQS1_ N

LDQS UDQ S

F7 B7

LDQS UDQ S

F7 B7

L1007 MLB-201209-0120P-N 2 6 C190 C100 8 F 0 . 1 uF 10u 16V 6.3V C101 4 0.1uF 16 V +3.3V_S TBY

R102 3 0

A2[GN]

C108 3 0.1uF 16 V

AR71 7 10 1/16 W CPL_DDR2_WE_ N CPL_DDR2_BA 0 CPL_DDR2_CK E CPL_DDR2_A[1 ] DDR2_A[1 ] DDR2_WE_ N DDR2_BA 0 DDR2_CK E

C108 4 10u F 6.3V

LDM UDM

F3 B3

LDM UDM

F3 B3

C102 9 0.1uF 16 V

+3.3V_TUNE R C105 1 0.1uF 16 V C100 9 10u F 6.3V

3.3V_O N

SAM233 3 LD1

R102 0 2

LDQS UDQ S

E8 A8

A3 E3 J3 N1 P9

VSS 5 VSS 4 VSS 3 VSS 2 VSS 1

DDR2_DQS2_ N DDR2_DQS3_ N

LDQS UDQ S

E8 A8

A3 E3 J3 N1 P9

VSS 5 VSS 4 VSS 3 VSS 2 VSS 1

NC4 NC5 NC6

L1 R3 R7

NC4 NC5 NC6

L1 R3 R7

CPL_DDR2_CK_ N CPL_DDR2_C K

3.3V_O N

R71 10 6 R71 10 5 R71 10 4 CPL_DDR2_A[0 ] R71 10 3 CPL_DDR2_A[4 ] AR70 4 10 1/16 W

DDR2_A[0 ] DDR2_A[4 ]

DDR2_CK_ N DDR2_C K

L1014 MLB-201209-0120P-N 2 IC100 4 AZ1117H-1.8TRE1(EH13A )

INPUT 3 2 OUTPU T 1 ADJ/GND

C105 8 0.1uF 16 V

+3.3V C105 7 100u F 16 V

NC1 NC2 NC3

A2 E2 R8

B2 B8 A7 D2 D8 E7 F2 F8 H2

VSSQ1 0 VSSQ 9 VSSQ 8 VSSQ 7 VSSQ 6 VSSQ 5 VSSQ 4 VSSQ 3 VSSQ 2 VSSQ 1

NC1 NC2 NC3

A2 E2 R8

B2 B8 A7 D2 D8 E7 F2 F8 H2

VSSQ1 0 VSSQ 9 VSSQ 8 VSSQ 7 VSSQ 6 VSSQ 5 VSSQ 4 VSSQ 3 VSSQ 2 VSSQ 1

CPL_DDR2_A[8 ] CPL_DDR2_CAS_ N

DDR2_A[8 ] DDR2_A[11] DDR2_A[6 ] DDR2_CAS_ N

VSSD L

J7

VSSD L

J7

CPL_DDR2_A[11 ] CPL_DDR2_A[6 ]

+1.8V_DOUGLAS_DD R +1.8V C102 1 0.1uF 16 V C101 6 10u F 6.3V READY C102 2 100u F 16 V
VDDL J1

+1.8V_DOUGLAS_DD R
VDDL J1

DDR2_A[0-12 ] CPL_DDR2_CS_ N CPL_DDR2_RAS_ N R72 4 R72 5 10 10 DDR2_CS_ N DDR2_RAS_ N

C109 5 0 . 1 uF 16V

H8

H8

C70 1 0.1uF

C72 3 0.1uF

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PRO TECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

POWE R
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PRO TECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

DDR2

H/W VERSION OPTION(AJ11, AD9 )

TUNER/FLAS H

H/W OP TION(AD13, AH13)

WXGA : R426,R427(00 )

XGA : R426,R425(01 )

: R 4 2 4 , R 4 2 7 ( 1) 0 R422 4.7K FHD

FR C

: R 4 2 4 , R 4 2 5 ( 11 )

+3.3V

R42 1 10 K

HOST_AC K R42 3 10 K

HOST_D[0-7 ]

R426 4.7K WXGA_XGA

R424 4.7K FHD_FR C

A V1_CVBS_LINK COMP2_LIN K

HOST_A[0 ] HOST_A[1 ] HOST_A[2 ] HOST_A[3 ] HOST_A[4 ] HOST_A[5 ] HOST_A[6 ] HOST_A[7 ]

HOST_READ Y

R401 4.7K READ Y

R430 4.7K

HOST_D[0-7 ]

+3.3V

R425 4.7K XGA_FR C

R427 4.7K WXGA_FH D

P80 3

HOST_D[7 ]

HOST_D[6 ]

HOST_D[5 ]

HOST_D[4 ]

HOST_D[3 ]

HOST_D[2 ]

HOST_D[1 ]

HOST_D[0 ]

HOST_AC K

HOS T_WE HOS T_OE

HOST_D[0]

HOST_D[1]

HOST_D[2]

HOST_D[3]

HOST_D[4]

HOST_D[5]

HOST_D[6]

HOST_D[7]

LED_G

LED_R

TP162 3

TP162 4

VCC_2

NC_2 8

NC_2 7

NC_2 6

NC_2 5

NC_2 4

NC_2 3

NC_2 2

NC_2 1

NC_2 0

NC_1 9

NC_1 8

NC_1 7

VSS_ 2

NC_1 6

AG14

AG12

AG11

AG10

AG15

AG13

AH14

AH12

AH11

AD13

AH10

AH15

AE14

AF10

AH13

AE13

AE11

AE10

AE12

AF14

AF12

AF11

AF13

AJ10

AJ14

AJ12

AJ15

AJ11

AJ13

I / O7

I / O6

I / O5

I / O4

I / O3

I / O2

I / O1

I / O0

R50 22 4 COMP2_ Y COMP1_ Y VGA_B R50 22 5 R51 22 3 R50 56 7

C50 0.1uF 2 C50 0.1uF 3 C51 0.1uF 1 C50 0.1uF 5

E2 G2 J2 D2 B1

AG7

AG8

AG3

AG6

AH9

AG9

AH8

AD9

AH5

AE7

AE8

AE9

AE5

AF9

AF7

AF8

AF4

AJ8

AJ9

AJ4

PR E

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

HOST_A1 4

HOST_A1 5

HOST_A1 6

HOST_A1 7

HOST_A1 8

HOST_A1 9

HOST_A2 0

HOST_A2 1

HOST_A2 2

HOST_A2 3

HOST_D1 0

HOST_D1 1

HOST_D1 2

HOST_D1 3

HOST_D1 4

HOST_D1 5

HOST_A2 4

HOST_A 7

HOST_A 8

HOST_D 8

HOST_D 9

HOST_A 9

POD_HOST_A1 0

POD_HOST_A1 1

POD_HOST_A1 2

POD_IORD_HOST_A 6

POD_HOST_A1 3

POD_HOST_D 0

POD_HOST_D 1

POD_HOST_D 2

POD_HOST_D 3

POD_HOST_A 0

POD_HOST_A 1

POD_HOST_A 2

POD_HOST_D 4

POD_HOST_D 5

POD_HOST_D 6

POD_HOST_D 7

POD_HOST_A 3

A3P
A4P

LVTX_ODD_CH1N_DISP2 1
For CHAPLIN

RX1RX1+ RX2RX2+ RXCLKRXCLK+

TP204 8

HOST_DEV_CS2_ N

HOST_DEV_CS1_ N

HOST_DEV_CS0_ N

HOST_AC K

PODREG_HOST_A 4

POD_IOWR_HOST_A 5

POD_OE_HOST_R D

HOST_BOOT_CS_ N

HOS T_RE ADY

TP213 2

POD_ WE_HOS T_WR

IC410 HY27US08121B-TPC B

R806 1 47 K

LVTX_ODD_CH2P_DISP1 8 B1P B2P B3P

B4P

AJ27 AH26 AJ26 AH25 AJ25 AH24 AJ24 AG29 AG28

4 6 8 10 12 14 16 18
+3.3V
TP207 8

3 5
TP205 1

POD _BVD1_ MOS TRT

POD_READY_IRQ_ N

GND LED_R GND LED_G GND SPK_ R

C833 100p F 50V

C80 3 4.7uF 10 V L806 HB-1S2012-121J T

C831 100p F 50V C832 470p F 50V

POD_BVD2_MOV L A

POD_ VS2_MCLK O

POD_A14_MCLK O

POD_D15_MDO 7

POD_D14_MDO 6

POD_D13_MDO 5

POD_D12_MDO 4

POD_D11_MDO 3

POD_D10_MDO 2

POD_D ETE CT_N

POD _D9_ MDO1

POD _D8_ MDO0

CDI0_ERRO R

POD_WAIT_ N

CDI0_VALI D

POD_A9_DR X

POD_A8_CR X

POD_A7_QT X

POD_A4_CT X

POD_A6_ ETX

POD_A5_IT X

CDI0_SYN C

POD_RESE T

POD_DIR_ N

COMP2_P b COMP1_P b

R509 22

C50 0.1uF 7 C50 0.1uF 8 C50 0.1uF 6 C51 0.1uF 0

D1 G1 J1 F2 C1

LVTX_ODD_CLKN_DISP1 7 LVTX_ODD_CLKP_DISP1 6 LVTX_ODD_CH3N_DISP1 5

For CHAPLIN

LED_R

POD_CD_ 1

POD_CD_ 2

POD_CE_ 1

POD_CE_ 2

CDI0_CLK

18

19

20

21

22

23

10

11

12

13

14

15

16

OOB_DR X

CDI0_D0

OOB_CR X

OOB_CT X

17

24

GPIOE0/PWM 0

GPIOE1/PWM 1

GPIOE2/PWM 2

GPIOE3/PWM 3

GPIOD0/HIN1

R/B

VSS_ 1

WP

NC_1 1

NC_1 2

NC_1 3

NC_1 4

NC_1 0

NC_1 5

RE

NC_1

NC_2

NC_4

NC_3

NC_5

NC_6

CE

NC_7

NC_8

NC_9

CLE

NAND FLASH READ Y

VCC_1

ALE

WE

R50 22 8 VGA_G R51 56 2

LVTX_ODD_CH3P_DISP1 4 G_GR For DOUGLAS A BN C1P C2P C3P LVTX_ODD_CH4N_DISP 3 LVTX_ODD_CH4P_DISP 2 LVTX_ODD_CH5N_DISPC LK LVTX_ODD_CH5P_DISPD E
For CHAPLIN

RX3+ RX4RX4+ RX0+ RX1+ SDA2_3.3 V

G 100 R58 9 SCL2_3.3 V

12 11

AJ6

AJ7

AJ5

+3.3V

Y5

Y4

Y1

Y2

Y3

V3

V5

AF3

AF2

AE3

AF1

V4

AE4

W1

W2

W3

W6

W5

AB1

AG2

AG1

AH6

AH7

AA1

AB2

AA2

AA3

AD4

AD5

W4

V2

V1

R58 8 100

9 11 13 15 17 19
TP204 9

HB-1S2012-121J T L804

C41 8 C41 7 0.1uF 0.1uF

TP204 0

TP204 1

TP204 2

TP204 3

TP204 4

TP204 5

TP204 6

TP204 7

RX013

NRS T

C826 470p F 50V

LED_G

C81 4 0.1uF 16 V

C81 3 0.1uF 16 V

C81 5 OP T

GPIOE5/P0 7

RX3-

10

GPIOD1/HIN2

GPIOE6/VIN2

GPIOE7/VIN1

R51 22 0

I 1

3 O

GP IOE4/LPWM/P06

C80 L801 7 0.1uF 50 V

C830 10pF 50V READ Y

IC803 KIA7029AF

1/16 W

AN

LVTX_ODD_CH2N_DISP1 9

STBY_5 V

MLB-201209-0120P-N 2

LCD ONLY : PANEL_CTL

IC100 FLI10610H-AA

B_GR For DOUGLAS A LVTX_ODD_CH1P_DISP2 0

AJ28 AH27

GND

C829 HB-1S2012-121J T 10pF 50V READ Y

C80 9 5pF READY

KEY1

R806 3 10 K

P_+5V

LCD ONL : MOVING_LED_PW Y M

KEY1

L805

R803 1 100

A2P

LVTX_ODD_CH0P_DISP2 2

AJ29 AH28

RX0+

GND

TP213 1

C828 10pF 50V READ Y

C80 8 5pF READY

+3.3 V_S TBY

R805 0 10 K

LCD ONL : SOFT_TOUCH_BUZZ_CTR Y L

C2

A1P

LVTX_ODD_CH0N_DISP2 3

AH29

1 P50 HD 2 SMW200-40 C
RX0-

GND KEY2

L802 KEY2 HB-1S2012-121J T P_+5 V

RESE T

C827 10pF 50V READ Y

C81 0 680pF

DISP_E N

TP213 0

IR

V VS_ON A

PANNEL WAFER

IR

L803 HB-1S2012-121J T

AUDIO_MUTE

HOST_READ Y

HOST_CS0_ N

IC100 FLI10610H-AA

R402 4.7K READ Y

R429 4.7K

TP212 9

12505WS-12A0 0

FLASH_W P

C Q40 1 KRC103 S

FE_TS_DA A_V T AL FE_TS_DA A_CL T K FE_TS_DA A_SY T N FE_TS_DATA[0]

36

35

44

42

40

43

41

39

38

TP210 6

COMP1_P r E VGA_R

+3.3V

+3.3V

R50 22 3 R51 56 7

C50 0.1uF 1 C51 0.1uF 5

K1 H2 D3

C4 P

+3.3V

7 C81 C81 2 F 18p 18p F V 50 V 50

LVTX_EVN_CH0N_DISP1 3 R_GR For DOUGLAS A CN SV1P SV2P SV3P SV4P SVN AHS_AC S AV S VOUT2 SCAR T_F B LVTX_EVN_CH0P_DISP1 2 LVTX_EVN_CH1N_DISP1 1 LVTX_EVN_CH1P_DISP1 0 LVTX_EVN_CH2N_DISP 9 LVTX_EVN_CH2P_DISP 8 LVTX_EVN_CLKN_DISP7 LVTX_EVN_CLKP_DISP 6 LVTX_EVN_CH3N_DISP 5 LVTX_EVN_CH3P_DISP 4 LVTX_EVN_CH4N_DISP 1 LVTX_EVN_CH4P_DISP 0 LVTX_EVN_CH5N_DISPV S LVTX_EVN_CH5P_DISPH S

AH23 AJ23 AF23 AG23 AH22 AJ22 AF22 AG22 AH21 AJ21 AF21 AG21 AG25 AG24

37

34

R515 22

C513

0 . 1 uF

H1

TP214 0 TP213 9

R802 9 10 K

R805 2 10 K

CH1E + CH2E CH2E + CKECKE+ CH3E CH3E + CH4E CH4E +

RX3+ RX4+

RX3P_+5 V RX4R808 2 10 K
TP205 0

X802 24MHz

HOST_CS0_ N

HOST_A[2 ]

HOST_A[1 ]

FLASH_W P

HOST_READ Y

HOST_W E

HOST_O E

TU_MAIN

R52 22 0

C51 0.1uF 8

R593 1K

1K R592

+5V_TUNE R

BOOSTE R

V_SYNC_P C

H6 J4 G6

CH1E + CH2E + CKE+ CH3E + CH4E +

30 32 34 36 38 40

29 31 33 35
TP207 7

CH1E CH2E CKECH3E CH4E -

15

16

17

19

20

21

GPIOC7/P17/IRQ 12 1 GPIOC6/P16/IRQ 13 0

14

L303 MLB-201209-0120P-N 2

GPIOC5/P15 /TXD1

GPIOC4/P14/RXD 1

B Q30 8 E 2SC305 2

GPIOC3/AD 3

GPIOC2/AD 2

GPIOC1/AD 1

18

R367 10K

DSDA1

DSCL1

C18 B18 D18 E19

100 R529 10K FHD

VXI_CLK VXI_DE VXI _VS VXI _HS VXI_D 0 VXI_D 1 VXI_D 2 VXI_D 3 VXI_D 4 VXI_D 5 VXI_D 6 VXI_D 7 VXI_D 8 VXI_D 9 VXI_D10 VXI_D11 VXI_D12 VXI_D13 VXI_D14 VXI_D15 VXI_D16 VXI_D17 VXI_D18 VXI_D19 VXI_D20 VXI_D21 VXI_D22 VXI_D23

VXO_CLK VXO_DE VXO_VS VXO_HS VXO_D0 VXO_D1 VXO_D2 VXO_D3 VXO_D4 VXO_D5 VXO_D6 VXO_D7 VXO_D8 VXO_D9 VXO_D10 VXO_D11 VXO_D12 VXO_D13 VXO_D14 VXO_D15

AE19 AG18 AF18 AF15 AH16 AJ16 AE15 AE16 AF16 AG16 AH17 AJ17 AE17 AF17 AG17 AH18 AJ18 AD15 AE18

HDMI4_5V_DE T

+3.3 V_S TBY RGB_LINK COMP1_LIN K SIDE_CVBS_LIN K MODULE_SER_CL K MODULE_SER_DA A T SW_RESE T HDMI_SW_E Q C81 9 0.1uF 16 V R805 1 22 BOOSTE R R805 3 22
VCC 8 1 A0

D_SUB_SD 22 0 A R803

TXCLK_SWTXCLK_SW+ TX0_SW TX0_SW + TX1_SW TX1_SW + TX2_SW TX2_SW +

C52 0.1uF 3

READY R808 0 10 K

A10 B10 A9 B9 A8 B8 A7 B7 B11 C11 A11

Q30 7 2SA1504 S

R366 2.2K

ARXCM ARXCP ARX0M ARX0P ARX1M ARX1P ARX2M ARX2P HDMI_A_HPD HDMI_B_HP D HDMI_CEC BRXCM BRXCP BRX0M BRX0P BRX1M BRX1P BRX2M BRX2P REXT

VDAC_COMP VDAC_BU_N VDAC_RV_N VDAC_GY_YC_ N VDAC_RS ET VDAC_BU_P_ 1 VDAC_BU_P_ 2 VDAC_GY_YC_ P

AG5 AH1 AH2 AH3 AH4 AJ1 AJ2 AJ3

D_SUB_SC22 2 LR807

37 39

+3.3 V_S TBY

GPIOA5/DSDA 2

A18

AD19

GPIOC0/AD 0

22

IC100 FLI10610H-AA

R808 7 0 READY

R805 5 15 K

+5V_TUNE R

C30 7 C30 8 C30 9 100 pF 0.1uF 220 uF 50 V 16 V 16 V

C17 D17 F17 A16 B16 C16 D16 D19 E16 A15 B15
FE_RESE T

R807 5 47 K

C32 2 0.1uF

TP208 8

R804 1 3.3K

R804 9 3.3K

SMW200-26 C

READY

SD A

GN D

10 K R806 5

P_+5 V

R805 7 22

C30 6 0.1uF 16 V

TU_MAIN

D15 E15 A14 B14 C14

C80 1 24p F

TP217 5

C31 9 270p F

A6
SIF TXCLK_BUFTXCLK_BUF+ TX0_BUF TX0_BUF + TX1_BUF GND

READ Y

B6 A5 B5 A4 B4 A3 B3
TP211 4

REF_CL K XTAL_I N CLKOUT OBUFC_CL K

A22 A23 E12 F21

X801 19.66080H z

+3.3V_DOUGLA S

TP217 4

HDMI2_5V_DE T HDMI1_5V_DE T HDMI3_5V_DE T HP_D ET_S /W_2 HP_D ET_S /W_4

D14 E14 E17 E18

C31 7 4.7uF 10 V

Q30 1 2SA1504 S

TP217 3

R302 0

TX1_BUF + TX2_BUF TX2_BUF + +3.3V_HDMI_DOUGLA S R52 3

1

NC_1 C27 C26 NC_2 TESTMODE 0 TESTMODE 1

For CHAPLI N For DOUG LAS

F7 F8 F9 F10 F11 K6

82 R347

C31 3 0.1uF 16 V

NC_3 NC_4 NC_5 SIF_IN

NC_ 6

2SA1504 S Q30 4

+5 V

+5 V

C31 2 0.01u F

R52 6 249 1%

D9

Boot Strap Setting (NOR FLASH Boot, 16bit, Internal OSC )

TP217 TP217 6 7

HIGH:Writable

HOST_A[0 ]

HOST_A[1 ]

HOST_A[2 ]

HOST_A[3 ]

HOST_A[4 ]

HOST_A[5 ]

HOST_A[6 ]

HOST_A[7 ]

R371 0

R551 75 1%

R552 75 1%

+5 V 10 K R59 1 IC502 NLASB3157DFT2 G B1 GND B0 1 2 3 6 5 4 SELEC T +5 V VCC A

R41 READY K 5 10

R41 READY K 8 10

DTV/MNT_SWITCH

+3.3V

TP217 2

+3.3V_TUNE R

8 0 9 TP216 TP216 TP216 TP216 TP216 TP217 5 7 6

C55 0 0.1uF 50 V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PRO TECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

R41 3 10 K

R41 4 10 K

R41 6 10 K

R41 7 10 K

R41 9 10 K

TP217 1

R42 0 10 K

C80 2 24p F

UART_SE L

5V_MNT

M5V_ON

AC_DE T

READ Y

GPIO, Sub-Micom

C305 100p F 50V

READ Y

DTV/MNT_VOUT

C32 6 +1.8V 0.1uF 16 V

READY R40 6 10 K

R41 READY K 2 10

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PRO TECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

FE_SD A

FE_SC L

HOST_A[0 ]

HOST_A[1 ]

HOST_A[2 ]

HOST_A[3 ]

READ Y

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PRO TECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

R40 5 10 K

R40 7 10 K

R40 8 10 K

R40 9 10 K

R41 0 10 K

C32 5 0.1uF 16 V

READ Y

R41 1 10 K

LVDS,AFE

HOST_A[4 ]

HOST_A[5 ]

HOST_A[6 ]

TP216 4

100

R33 4

TP216 TP216 TP216 1 2 3

Copyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes

SDA2_3.3 V

SCL2_3.3 V

R33 5

100

HOST_A[7 ]

KEY2

KEY1

R345 4. 7K

R346 470

R301 330

R374 270

1%

SCL1_5 V

SDA1_5 V

FE_RESE T

FE_SC L

FE_SD A

FE_TS_DATA_VAL

FE_TS_DATA_SY N

FE_TS_DATA[0]

FE_TS_DATA_CL K

5% 1/10W

READ Y

0 R431

R34 2 47

R34 3 47

R810 1 33

R810 0 33

R809 9 33

R810 9 33

TP214 7

TP214 3

TP214 4

TP215 6

TP214 8

TP214 6

TP214 5

TP214 9

TP215 5

TP215 4

TP215 1

TP215 0

TP215 2

TP215 3

TP210 5

TP210 8

10 K R46 4

TP210 7

R47 10 0 K

TP206 2

TP208 7

R44 5 10 K

R42 8 10 K

TP211 TP211 9 TP211 TP210 TP211 0 3 2 1 R365 10 C A2 KDS18 4 D301

R51 22 4 COMP2_P r

C51 0.1uF 2

E1

+3.3 V_S TBY RX1RX2RXCLKC82 5 10u F 6.3V

+3.3 V_S TBY +3.3V_S TBY

R805 8 10K R809 4 10K READ Y

CH0E CH0E + CH1E -

RX2+ RXCLK+

+3.3 V_S TBY

TP213 6

C81 8 VDD33V 0.1uF 16 V

1 2 3 5 6 7 8 9 10 11

33 32 31 30 29 28 27 26 25 24 23

GPIOD2 /P10 /AD4 GPIOD3 /P11/AD5 GPIOD4 /P12 /AD6 GPIOD5 /P13 /AD7 GPIOD6/TXD 2 GPIOD7/RXD 2 GP IOA0/PWM4/P00 GP IOA1/PWM5/P01
R805 GP IOA2/PWM6/P024 100 3.3V_O N RL_ON/PWR_ONOF F UCOM_T X UCOM_R X HDMI_SEL1 HDMI_SEL2 1.8V_DOUGLAS_E N 1.26V_DOUGLAS_E N

GND

20 22 24 26 28

OSC O OS CI GPIOB6/SSD A GPIOB5/SSC L GPI OB4/P05 GPI OB3/P04

R804 0 4.7K

R51 22 9 SIDE_YIN/SIDE_VI N

C51 0.1uF 7

F3 H3 J3 K2 J6

21 23 25 27

IC802 4 WT61 8-R P N440W T

R809 3 10K READ Y

PC_SER_DA A T 0 MODULE_SER_DA A T 0 CH0E + R54 3

ROM_D L

R53 8 R54 4
ROM_D L R587 HD R527 FHD

0 PC_SER_CL K 0
100 0 R590 10K HD

TP213 5 READ Y C804 0 . 1 uF 16V

SDA2_3.3 V SCL2_3.3 V

R807 1 22 R804 4 22

R53 7

R52 56 2

C52 0.1uF 0

MODULE_SER_CL K DISP_E N CH0E -

GPIO TB D
IR CEC_ 0 R806 9 100

GPIOB2/IR GPIOB1/IRQ3/CE C GPIOB0/IRQ2

H_SYNC_P C

GP IOA3/PWM7/P03 GPIOA4/DSCL 2

R809 2 100

MUTE_LINE_MNTOUT

R528 FHD

DISP_E N

A17 B17

IC801 AT24C16AN-10SI-2. 7

R55 5 1.8K 1%

R807 0 6.8K R809 5 6.8K

WP

A1

+3.3 V_S TBY R807 3 10 K R806 8 10 K

TDFV -G135D1 TU301

A1

SC L

A2

SIDE_S_S W DTV/MNT_SWITCH

A NT[ 5V ] BB[ CTR] T P[ V T ] +B [ 5V ] RF_AGC AUDIO SCL _T A I F_1 GND_2 S A_T D GND_1 A I F_2 VIDEO NC_2 NC_1 NC_3 3. 3V 1. 8V S NC Y S A D SI F SCL RST VAL ERR MCL D4 D2 D3 D6 D1 D5 D0 D7

HP_D ET_S /W_3 HP_D ET_S /W_1

SHI EL D

1 2 16 12 10 11 20 17 18 13 19 21 14 15 26 30 31 28 29 25 32 33 34 22 27 23 24 35

C15

LGE Internal Use Only

PRINTED CIRCUIT BOARD

MAIN(TOP) MAIN(BOTTOM)

Control B/D(TOP)

PREAMP B/D(TOP)

Control B/D(BOTTOM)

PREAMP B/D(BOTTOM)

Copyright2008 LG Electronics. Inc. All right reserved. Only for training and service purposes

LGE Internal Use Only

P/NO : MFL41834605

Apr., 2008 Printed in Korea