Beruflich Dokumente
Kultur Dokumente
Ovidiu Vermesan1, Knut H. Riisns2, Laurent Le-Pailleur3, Jon B. Nysther2, Mark Bauge3, Helge Rustad1, Sigmund Clausen2, Lars-Cyril Blystad1, Hanne Grindvoll1, Rune Pedersen2, Robert Pezzani3, David Kaire3
1SINTEF,
Outline
Introduction Hybrid Sensor Architecture Principle of Operation Experimental Results Summary
2003 IEEE
Fingerprint Sensors
Conventional fingerprint systems
Optical image sensors
2003 IEEE
Plastic Cover
2003 IEEE
Gold Wire
PCB
Connector
Bump
Bump
Bump
Finger Movement Low Noise Phase Sensitive Amplifier Activation Cell Analog Processor
ADC
R Stimulation Electrode Layer Electrically Isolating Material Layer Metal Layer Current/Voltage Selectable Frequency, Amplitude, Phase
Activation Electrode
C FS C EI
Host Processor
PSACL
Stimulation Generator
Reference Frequency, Amplitude, Phase Control
2003 IEEE
Bumps
Flip-chipCMOS ASIC
2003 IEEE International Solid-State Circuits Conference 2003 IEEE
2003 IEEE
Principle of Operation
Finger valleys
Finger ridges
Stimulation Electrode
Sensor
Cell
2003 IEEE
MUXIN N
MUXIN N
MUXIN N
Analog Module
Digital Module
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Module Topside
Module Backside
2003 IEEE
2003 IEEE
Algorithm After
2003 IEEE
Experimental Results
Working sensor and IC on 1st trial Prototype Design
Proven functionality authentification and pointer Proven ergonomy
2003 IEEE
ST SmartFinger
Yes Yes Yes 500
Fingerprint image Yes Yes Navigation function No No Pointer function No No Image resolution (dpi) 508/500 500 Technology 0.5m CMOS 0.25m CMOS 3M 2 Sensing area (mm ) 143.36(11.2x12.8) 21.76 (12.8x1.7) 2 Substrate area (mm ) 60.2 (4.3x14) 2 Silicon area (mm ) 225 (15x15) 29.9 (2.3x13) Measurement method DC capacitive DC capacitive Array (224x256) Array Sweep (32x256) Power Supply 2.5V 3.3/5V
0.8m CMOS 0.25m CMOS 5M 5.6 (0.4x14) 3.25 (0.25x13) 239.4 (9x26.6) 105 (7x15) 29,41 (1.7x17.3) 18 (4x4.5) Thermal AC capacitive Array Sweep Linear Sweep (8x280) (1x256) 3/5.5V 2.5V Analog 1.5V Digital
2003 IEEE
Summary
The first:
Module that integrates three functions: fingerprint, navigation and pointer detection. Hybrid solution (linear AC-capacitive fingerprint silicon sensor substrate, CMOS ASIC and flip-chip)
2003 IEEE
Summary
New:
Evolving biometric system
Separate sensor and ASIC optimisation paths
Design methodology and architecture Circuit concepts for the pyramidal multiplexing of the channels into a common analog bus
2003 IEEE
Summary
Performance
The CMOS ASIC silicon area is 60% of the smallest current designs. Hybrid technology optimised for low cost Highest level of integration published Targeted for secured mobile devices
2003 IEEE