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A Capacitive Hybrid Flip-Chip ASIC and Sensor for Fingerprint, Navigation and Pointer Detection

Ovidiu Vermesan1, Knut H. Riisns2, Laurent Le-Pailleur3, Jon B. Nysther2, Mark Bauge3, Helge Rustad1, Sigmund Clausen2, Lars-Cyril Blystad1, Hanne Grindvoll1, Rune Pedersen2, Robert Pezzani3, David Kaire3
1SINTEF,

Norway 2IDEX, Norway 3ST Microelectronics, France


2003 IEEE International Solid-State Circuits Conference 2003 IEEE

Outline
Introduction Hybrid Sensor Architecture Principle of Operation Experimental Results Summary

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Fingerprint Sensors
Conventional fingerprint systems
Optical image sensors

Direct-contact fingerprint sensors


Pressure, electro-optical, thermal

Capacitive fingerprint sensors


Matrix/linear CMOS DC and AC-capacitive

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Solid State Fingerprint Sensors


CMOS DC-capacitive CMOS AC-capacitive Thermal Electro-optical CMOS optical Polysilicon thin film transistors Polyresistive microbeams
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Hybrid Sensor Concept


Hybrid technology
Silicon sensor substrate Flip-chip process CMOS ASIC
Silicon Substrate Flip-chip CMOS ASIC Motherboard

Plastic Cover

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Hybrid Sensor Concept


Hybrid measurement method
Linear scanner detection AC-capacitive measurement Analog and digital processing

Three in one functionality


Fingerprint capture Navigation function (xy movement) Pointer function (mouse function)
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Hybrid Sensor Operation


Finger Asic Sensor
Metal Poly Poly Poly Dielectric

2. Capacitive modulated carrier


Bump

Gold Wire

1. Inject 100kHz carrier

3. Recover envelope 4. Send pixels

PCB

Software 6a. Authentication 6b. Navigation/Pointer 5. Motherboard Pixels Processing


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Connector

Bump

Bump

Bump

Hybrid Sensor Architecture


Finger
C

Finger Movement Low Noise Phase Sensitive Amplifier Activation Cell Analog Processor
ADC

R Stimulation Electrode Layer Electrically Isolating Material Layer Metal Layer Current/Voltage Selectable Frequency, Amplitude, Phase

Activation Electrode

Calibration Memory Digital Core I2C SPI Interface

C FS C EI

Host Processor

Sensor Cell Image C IN Speed Pointer Navigation

PSACL

Stimulation Generator
Reference Frequency, Amplitude, Phase Control

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Principle of Hybrid Sensor


Hybrid technology
Silicon sensor substrate Flip-chip CMOS ASIC
Silicon Substrate Sensors
Image Speed Pointer Navigation

Sensor pads with vias

Bumps

Flip-chipCMOS ASIC
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Sensor Substrate Process


Low cost passive silicon substrate Micro-vias technology Flip-chip process

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Principle of Operation

SmartFinger Sweep finger over the sensor

Finger valleys

Finger ridges

Stimulation Electrode

Silicon Substrate Bumps

Sensor

Cell

Pads with vias Flip-chip CMOS ASIC

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New Pyramidal PS Multiplexing


Stimulation Electrode Stimulation Generator MUXIN N Analog Front Control Module Sample Finger valleys Sensor Cells (MN): Image Speed Finger ridges Pointer Navigation

MUXIN N

MUXIN N PSA N MUXOUT ADC

MUXIN N

MUXIN N

Analog Module

B bits Digital Output

Digital Module

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Hybrid Module Micrograph

Module Topside

Module Backside

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Fingerprint Image Capture


Software algorithms
Image adapted to each finger Image reconstruction to suppress skew error Calibration to correct process/gain/offset

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Fingerprint Image Results


Reconstruction algorithm
Sweeping speed range 0-56.6 (1.8-14.4) cm/s Sweeping angle tolerance 20

Algorithm Before After Before

Algorithm After
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Industrial Prototype Module


Module performance
Sensor size (external area): 105 mm2 Sensing area: 3.25 mm2 ASIC size: 18 mm2 Image resolution: 500dpi Supply: analog 2.5V, digital 1.5V ESD resistance: >15kV Temperature range: -20 to 70 C
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Experimental Results
Working sensor and IC on 1st trial Prototype Design
Proven functionality authentification and pointer Proven ergonomy

Valid industrial concept

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Solid State Fingerprint Sensors


NTT Fujitsu MBF300 Atmel FingerChipTM
Yes No Yes 500

ST SmartFinger
Yes Yes Yes 500

Fingerprint image Yes Yes Navigation function No No Pointer function No No Image resolution (dpi) 508/500 500 Technology 0.5m CMOS 0.25m CMOS 3M 2 Sensing area (mm ) 143.36(11.2x12.8) 21.76 (12.8x1.7) 2 Substrate area (mm ) 60.2 (4.3x14) 2 Silicon area (mm ) 225 (15x15) 29.9 (2.3x13) Measurement method DC capacitive DC capacitive Array (224x256) Array Sweep (32x256) Power Supply 2.5V 3.3/5V

0.8m CMOS 0.25m CMOS 5M 5.6 (0.4x14) 3.25 (0.25x13) 239.4 (9x26.6) 105 (7x15) 29,41 (1.7x17.3) 18 (4x4.5) Thermal AC capacitive Array Sweep Linear Sweep (8x280) (1x256) 3/5.5V 2.5V Analog 1.5V Digital

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Summary
The first:
Module that integrates three functions: fingerprint, navigation and pointer detection. Hybrid solution (linear AC-capacitive fingerprint silicon sensor substrate, CMOS ASIC and flip-chip)

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Summary
New:
Evolving biometric system
Separate sensor and ASIC optimisation paths

Design methodology and architecture Circuit concepts for the pyramidal multiplexing of the channels into a common analog bus

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Summary
Performance
The CMOS ASIC silicon area is 60% of the smallest current designs. Hybrid technology optimised for low cost Highest level of integration published Targeted for secured mobile devices

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