SYNOPSIS DISTORTION ANALYSIS OF CMOS CIRCUITS

M.Tech(VLSI Technology) Department of Electronics, North Maharashtra University

Name Suman Kumar Choudhary Roll No. 04 ABSTRACT :

Date - 21/07/2011 Signature -

For many analog integrated circuits the performance with respect to their non linear behaviour is often expressed in terms of parameters that are measured in terms of frequency domain. When a sinusoidal signal or a combination of sinusoids is applied to a circuit, the output spectrum does not only contain signals with same frequency of the input signals, in addition, the output spectrum contains small components usually unwanted at frequencies other than the input signal frequencies. These unwanted signals are termed as Harmonic distortion or non linear distortion. This project reviews different techniques used to analyse distortion in analog integrated circuits. It concentrates on numerical technique as well as analytical techniques such as Volterra series, Harmonic injection method, and Non-linearity Modeling. This analytical model will be verify through simulations. Lastly stress is put forward to reduce the distortion in different cmos circuits. INTRODUCTION : In general, distortion is one of the most important undesired effects that appear in analog circuits due to non-linearities, which have many sources in integrated circuits. In analog RF front-ends non-linearity becomes a very important issue, since the amplitude of the received signal may vary over a wide range depending on the distance between the transmitter and receiver. If the circuit exhibits non-linearities, this will generate higher order components called harmonics. Let us first define Distortion. Distortion actually refers to the distortion of a voltage or current waveform as it is displayed versus time, i.e., as seen on a oscilloscope. Any difference between the shape of the output waveform versus time and the input waveform, except for a scaling factor, is called distortion. e.g. Flattening of a sinusoidal waveform, Injection of a spike on a sinusoidal waveform.

There are several kinds of distortion occur, which are classified in two categories- (A) Distortion in Electronic signals and (B) Distortion in Transistor circuits. (A) Distortion in Electronic signals :- There are mainly four types of distortion in Electronic signals. (i) Amplitude distortion : Amplitude distortion is distortion occurring in a system, subsystem, or device when the output amplitude is not a linear function of the input amplitude under specified conditions. (ii) Harmonic distortion : Harmonic distortion adds overtones that are whole number multiples of a sound wave's frequencies. Non-linearities that give rise to amplitude distortion in audio systems are most often measured in terms of the harmonics (overtones) added to a pure sinewave fed to the system. (iii) Frequency response distortion : Non-flat frequency response is a form of distortion that occurs when different frequencies are amplified by different amounts, caused by filters. (iv) Phase distortion : This form of distortion mostly occurs due to the reactive component, such as capacitive reactance or inductive reactance. Here, all the components of the input signal are not amplified with the same phase shift, hence causing some parts of the output signal to be out of phase with the rest of the output. (B) Distortion in Transistor circuits : - These are mainly two types : (i) Linear and Non-linear Distortion: Linear distortion is caused by the application of a linear circuit, with a non-constant amplitude or phase characteristic. e.g. The application of a high-pass filter to a square waveform. Non-linear distortion is caused by a non-linear transfer characteristic. e.g. The application of a sinusoidal waveform to the exponential characteristic of a bipolar transistor causes a sharpening of one top and flattening of the other one. This corresponds to the generation of a number of harmonic frequencies of the input sinusoidal waveform. (ii) Hard and Weak Distortion: When the non-linear transfer characteristic has a gradual change of slope, then the quasi-sinusoidal waveform at the output is still continuous. e.g.- class B amplifier. Part of the sinusoidal waveform is then simply cut off, leaving two sharp corners. These corners generate a large number of high-frequency harmonics. They are sources of hard distortion. In the case of weak distortion, the harmonics gradually disappear when the signal amplitude becomes smaller. They are never zero, however, they can easily be calculated from a Taylor series expansion around the quiescent or operating point.

Distortion has been analysed using different techniques such as Volterra series, harmonic injection method, and Non-Linearity Modeling. The Volterra series is the most popular symbolic method to analyse distortion. It combines the theory of convolution and Taylor series expansion to express non-linear systems with memory. In this technique, breaking the non-linear system down into an infinite parallel sub-systems: a linear sub-system, a second order sub-system, a third order sub-system to an infinite order subsystem, depending on the accuracy one needs. In the harmonic injection method, the basic idea is that, the output of a non-linear system excited by a single tone can be calculated by a linear system excited by the fundamental frequency and all its harmonics with different amplitudes. The main goal of this project is to analyse the distortion in CMOS circuits and develop a technique to reduce this distortion.
Multiplier Theory

The function of a binary unsigned multiplier, like its decimal counterpart, consists of a multiplicand (X), a multiplier (Y), and a product (P). The result is the product of the multiplier and the multiplicand (P = X * Y). Figure 1 shows the complete multiplication of two four-bit numbers producing an eight-bit product. As in decimal multiplication, the least significant digit of the multiplier combines with each digit of the multiplicand, forming a partial product (Y0X3, Y0X2, Y0X1, Y0X0). Three other partial products are similarly formed. To arrive at the final result, all four of the partial products are added (P7, P6P0). Note that the most significant bit of the product (P7) is required, due to a possible carry from the other bits.
Conventional Multiplier Algorithm

The conventional approach to implementing a multiplier in digital logic is to AND individual multiplier and multiplicand bits to generate the partial products (PP1, PP2, PP3, PP4). For a four-bit multiplier, this would consist of 16 dual-input AND gates and three adders, as shown in Figure 2. The simplest method to sum the partial products is to have all three adders to be eight bits. Not all of the partial products generate eight bits, so smaller adders could be used. However, tracking which partial sums can be dropped and which need to propagate as carries to the next stage becomes complex and time-consuming, especially with larger bit widths. More important, the conventional multiplier implementation is resource intensive and does not produce optimal performance. Fortunately, another approach is possible.
L-Booth Algorithm Implementation

The L-Booth algorithm employs an alternative technique based on multiplexers, which are an ideal fit for the Actel architecture. For the four-bit implementation, the multipliers two least significant bits are handled separately from the two most significant bits. Effectively, the multiplexer replaces the first stage of partial sum generation.

Figure 3 illustrates the mathematics that explains the L-Booth algorithm. The two least significant multiplier bits (Y1, Y0) are handled separately from the two most significant bits (Y3, Y2). In both cases, the four possible combinations of the multiplier bits are covered with the multiplexer, resulting in the partial products PPA and PPB. Specifically for multiplexer A, the four combinations are zero (the trivial case), X (when Y1=0 and Y0=1), X shifted left or 2X (when Y1=1 and Y0=0), and 3X (when Y1=Y0=1). The multiplexers are eight bits deep to accommodate all eight possible inputs for the adders. To obtain the final product, the two partial sums are added with an eight-bit adder. High-speed adders are used in this implementation since shortest delay from input to output is the primary design constraint. Figure 4 shows the implementation of the L-Booth multiplier. The complete schematic for the fout-bit L-Booth multiplier is shown in Figure 5. Note the use of the five-bit adder to generate the required 3X input for the multiplexers. The name of the schematic is LBMULT4 , indicating that it uses the L-Booth algorithm. Application Note

AC108

REQUIRED TOOLS : Mentor Graphics/Pspice/Matlab

REFERENCES : [1] P.Wambacq and W.Sansen, Distortion Analysis of Analog Integrated Circuits. Norwell, MA: Kluwer, 1998. [2] Willy Sansen, Fellow, IEEE, Distortion in Elementary Transistor Circuits, IEEE Transactions on circuits and systemsII: analog and digital signal processing, vol. 46, no. 3, march 1999 [3] E.Chong The Volterra series and the direct method of distortion analysis, ECE1352 Term paper, Univ. of Toronto, 2001. [4] J.Mahattanakul and C. Bunyakate, Harmonic injection method: a novel method for harmonic distortion analysis, The IEEE International Symposium on , Vol. 2 , pp. 85 -88, ISCAS 2001. [5] Fan, X.; Chan, P.K., Analysis and Design of Low-Distortion CMOS Source Followers, Circuits and Systems I: Regular Papers, IEEE Transactions on Aug. 2005.

SCHEDULE FOR PROJECT:SR.NO 01 02 03 05 06 07 08 SUBJECT Literature survey Study of topic &Problem Formulation DURATION 20 July-20th Aug 2011 21th Aug- 30th Sept 2011
th

Learning of tools to be used 1st Sept-30th Oct 2011 Presentation of proposed work 1st Nov -15th Nov 2011 Implementation of project, Synthesis and Simulation on tool 1stJan2012-30th Mar2012 Testing and evaluation of final results Completion of project 31stMar2012- 10th Apr2012 20th Apr 2012

** During 15th Nov2011-1st Jan2012 :-Presentation of research paper in national or international conferences.