What is a Transmission Gate (Analog Switch)?

Jun 10, 2008 Abstract: This application note describes the purpose and basic operation of a transmission gate. The article explains how a transmission gate can be used to quickly isolate multiple signals with a minimal investment in board area and with a negligible degradation in the characteristics of those critical signals. The DS3690 is the example device.

Basic Operation
A transmission gate, or analog switch, is defined as an electronic element that will selectively block or pass a signal level from the input to the output. This solid-state switch is comprised of a pMOS transistor and nMOS transistor. The control gates are biased in a complementary manner so that both transistors are either on or off. When the voltage on node A is a Logic 1, the complementary Logic 0 is applied to node active-low A, allowing both transistors to conduct and pass the signal at IN to OUT. When the voltage on node active-low A is a Logic 0, the complementary Logic 1 is applied to node A, turning both transistors off and forcing a high-impedance condition on both the IN and OUT nodes. This high-impedance condition represents the third "state" (high, low, or high-Z) that the DS3690 channel may reflect downstream. The schematic diagram (Figure 1) includes the arbitrary labels for IN and OUT, as the circuit will operate in an identical manner if those labels were reversed. This design provides true bidirectional connectivity without degradation of the input signal.

Figure 1. Schematic representation of a transmission gate. The common circuit symbol for a transmission gate depicts the bidirectional nature of the circuit's operation (Figure 2).

Figure 2. Circuit symbol.

What Are Transmission Gates Used for?

Transmission gates are typically used as building blocks for logic circuitry, such as a D Latch or D Flip-Flop. As a standalone circuit, a transmission gate can isolate a component or components from live signals during hot insertion or removal. In a security application, they can selectively block critical signals or data from being transmitted without proper hardware-controlled authorization. The connection scheme in Figure 3 is designed to isolate the I/O bus between the microprocessor and the memory component, in case the memory is removed. The SRAM is physically mounted on a removable memory card; the DS3690 transmission gate is used to isolate the various signals routed through the connector.

Figure 3. Typical DS3690 application circuit. The ground connection from the SRAM is fed back through the connector to pull down the DS3690 Chip Enable (activelow CE) pin. This action enables the transmission gate when the memory card is installed.

What Is So Unique About the DS3690?

High Number of Independent Channels Reduces Component Count
The DS3690, with 26 independent channels, has the highest bus width available on the market today. Most commercially available transmission gates are configured to accommodate 2, 4, or 8 discrete signals. Using the Figure 3 example, this SRAM requires 25 discrete signals to be isolated when the card is removed. Using conventional 8-bit transmission gates, the designer would have to place four separate components to isolate this SRAM, significantly increasing the final component count and dedicated PC-board area.

Small Package Saves Board Space

The DS3690 is packaged in a 5mm x 11mm TQFN, requiring a mere 55mm of PC-board area for this entire bus-isolation effort. If the designer had selected 8-bit transmission gates, the most aggressive packaging available is an SSOP that occupies 51.5mm each. Given a minimal allowance for signal routing, the four 8-bit components would occupy well over 200mm to accomplish the same function as a single DS3690.

Efficient Signal Routing for Better Performance

The additional board area required for multiple 8-bit components also complicates the PC-board layout effort: dissimilar trace lengths can result in dissimilar signal skew on critical timing events. Additionally, the four 8-bit components selected may not have identical propagation delays, further aggravating the operational margin of the final system. The DS3690's 26 paralleldata channels (Figure 4) result in no more than 1ns of channel-to-channel deskew. Using the TQFN package, all signals can be conveniently routed in the physical direction of the bus. Finally, for convenience and application flexibility, the designer decides the assignment of a signal to one of the DS3690's 26 channels.

Figure 4. Suggested signal routing.

Added Security for Applications

In certain security-based applications, the leadless TQFN package adds another layer of physical security from external probing, since there are no exposed pins available to contact.

Conclusion
The DS3690 transmission gate can be used to quickly isolate multiple signals with a minimal investment in board area and with a negligible degradation in the characteristics of those critical signals.

Special-output gates
It is sometimes desirable to have a logic gate that provides both inverted and non-inverted outputs. For example, a single-input gate that is both a buffer and an inverter, with a separate output terminal for each function. Or, a two-input gate that provides both the AND and the NAND functions in a single circuit. Such gates do exist and they are referred to as complementary output gates. The general symbology for such a gate is the basic gate figure with a bar and two output lines protruding from it. An array of complementary gate symbols is shown in the following illustration:

Complementary gates are especially useful in "crowded" circuits where there may not be enough physical room to mount the additional integrated circuit chips necessary to provide both inverted and noninverted outputs using standard gates and additional inverters. They are also useful in applications where a complementary output is necessary from a gate, but the addition of an inverter would introduce an unwanted time lag in the inverted output relative to the noninverted output. The internal circuitry of complemented gates is such that both inverted and noninverted outputs change state at almost exactly the same time:

Another type of special gate output is called tristate, because it has the ability to provide three different output modes: current sinking ("low" logic level), current sourcing ("high"), and floating ("high-Z," or high-impedance). Tristate outputs are usually found as an optional feature on buffer gates. Such gates require an extra input terminal to control the "high-Z" mode, and this input is usually called the enable.

With the enable input held "high" (1), the buffer acts like an ordinary buffer with a totem pole output stage: it is capable of both sourcing and sinking current. However, the output terminal floats (goes into "high-Z" mode) if ever the enable input is grounded ("low"), regardless of the data signal's logic level. In other words, making the enable input terminal "low" (0) effectively disconnects the gate from whatever its output is wired to so that it can no longer have any effect. Tristate buffers are marked in schematic diagrams by a triangle character within the gate symbol like this:

Tristate buffers are also made with inverted enable inputs. Such a gate acts normal when the enable input is "low" (0) and goes into high-Z output mode when the enable input is "high" (1):

One special type of gate known as the bilateral switch uses gate-controlled MOSFET transistors acting as on/off switches to switch electrical signals, analog or digital. The "on" resistance of such a switch is in the range of several hundred ohms, the "off" resistance being in the range of several hundredmega-ohms. Bilateral switches appear in schematics as SPST (Single-Pole, Single-Throw) switches inside of rectangular boxes, with a control terminal on one of the box's long sides:

A bilateral switch might be best envisioned as a solid-state (semiconductor) version of an electromechanical relay: a signal-actuated switch contact that may be used to conduct virtually any type of electric signal. Of course, being solid-state, the bilateral switch has none of the undesirable characteristics of electromechanical relays, such as contact "bouncing," arcing, slow speed, or susceptibility to mechanical vibration. Conversely, though, they are rather limited in their current-carrying ability. Additionally, the signal conducted by the "contact" must not exceed the power supply "rail" voltages powering thebilateral switch circuit. Four bilateral switches are packaged inside the popular model "4066" integrated circuit:

REVIEW: Complementary gates provide both inverted and noninverted output signals, in such a way that neither one is delayed with respect to the other. Tristate gates provide three different output states: high, low, and floating (High-Z). Such gates are commanded into their high-impedance output modes by a separate input terminal called the enable. Bilateral switches are MOSFET circuits providing on/off switching for a variety of electrical signal types (analog and digital), controlled by logic level voltage signals. In essence, they are solid-state relays with very low current-handling ability.