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3. 4.

- ANALYSIS OF A MULTIPLEXER INTEGRATED INTO 4 WAYS : 74153 The integrated circuit 74153 contains two multiplexers with 4 ways at entries of selection A and B communes. Each multiplexer has an entry of validation G(STROBE). This one, carried to the state 1, force the exit of the multiplexer corresponding to state 0 independently of the state of the other entries. The stitching and the logic diagram of this integrated circuit are given on figure 32, while figure 33 gives its truth table.

3. 5. - USE OF A MULTIPLEXER LIKE GENERATOR OF FUNCTION In addition to the commutation of several logical signals, the multiplexer can be used to replace a network. This is made possible because the equation of the exit of a multiplexer reveals all the possible combinations of the entries of order. Let us take the example of a multiplexer with 16 ways (E0 with E15), therefore with 4 entries of order (A, B, C and D). The exit S with for the equation : S= E0 + A E1 + ... D C B A E15

Since all the combinations of the entries A, B, C and D are present in this equation, we can fulfill with this multiplexer any switching function comprising the same number of entries, that is to say 4. The method is as follows : The entries of ordering of the multiplexer become the entries of the network which one wants to carry out. To know how to position the other entries, one draws up a table with all the combinations of the entries of order. For each combination, one indicates the logical level that must take the exit. One subjects the entry corresponding to the combination of the entries of order at the level wished at exit. The example which follows will clarify the procedure. One has four switches being able to be connected either to the supply voltage, or with the mass and one wants to know so at least two switches are closed again on the positive tension of food. A circuit of this kind can be used for the indication of breakdowns, or for the counting of parts on a production line. If integrated logical doors are used, one obtains the circuit represented on figure 34.

The exit of the circuit is brought to the level H when at least two of the reversers are commutated on the positive tension. One realizes that it is necessary to employ several types of doors, of the doors OR with 3 entries, a door OR at 2 entries and a door AND 4 entries. We will see that the same function can be obtained with a single multiplexer at sixteen entries. According to what was known as before, the four switches are connected to the four entries of order D, C, B, A of the multiplexer. To determine how to connect the sixteen inputs, it is enough to follow the described procedure and to build a table with sixteen lines like that of figure 35.

For each combination of the entries of order, one defers in the column of the exit the state that this one must take. In the table of figure 35, the lines represented in red characters correspond if at least two of the entries of order are on the level H and for which the exit must thus be with the level H. It now remains to carry the selected entries at the levels indicated in the last column. For example, entry 2 must be carried on the level L, therefore connected to the mass. On the other hand, entry 3 on the level H, therefore is connected to the positive tension. The circuit which results from it is deferred on figure 36.

The advantage of the multiplexer compared to the network of doors is obvious: only one integrated circuit replaces the totality of the network of doors. This one indeed requires at least three integrated circuits : for AND and two for OR. In general, it is more economic to use complex integrated circuits like the multiplexer into the place of traditional doors (NAND, NOR, AND, OR) to provide the function of a combinative network. Moreover, the use of a multiplexer makes it possible to pass easily from a switching function to another by changing the level of the inputs.

4. - DEMULTIPLEXERS In this chapter, we will examine the demultiplexers which are circuits whose function is opposite among that of the multiplexers. Indeed, they have only one input and several exits or ways. Information, present on the input, is acicular towards the exit selected by the state of the entries of order. The not selected exits position with state 1.

Let us examine simplest of the demultiplexers, that with 2 ways. 4. 1. - THE TWO-TRACK DEMULTIPLEXER The diagram symbolic system and the mechanical equivalent of a demultiplexer with 2 ways are presented at figure 37.

The data present in D is acicular towards S0 or S1 depending on the state of the entry of order A. In general for A = 0, the S0 exit is selected and for A = 1 it is the S1 exit ; the exit not selected being with state 1. The combinative circuit which fulfills the function of the demultiplexer with 2 ways must thus correspond to the truth table of figure 38.

From this table, one deduces immediately that S0 = A + D. To find the equation simplest of S1, let us draw the picture of Karnaugh (figure 39).

The two groupings

and D give us the following equation of S1 : S1 = +D

If we wish to carry out the combinative circuit with doors NAND, it is necessary to transform the expressions A + D and + D using the theorem of Morgan :

The expressions

and

lead us to the logic diagram of figure 40.

One does not find a demultiplexer with 2 ways integrated. If one has the integrated circuit 7400, one can carry out the circuit of figure 40. Otherwise, it is necessary to turn to the demultiplexer integrated into 4 ways : the 74LS139. 4. 2. - ANALYSIS OF A DEMULTIPLEXER INTEGRATED A FOUR WAYS : THE 74LS139

The integrated circuit 74LS139 contains two demultiplexers with 4 ways. Each one of them has 2 entries of selection A and B, an input G and 4 exits (Y0 with Y3). The stitching and the logic diagram of this circuit are given on figure 41, while figure 42 gives its truth table.

It is noticed that the binary number formed by the state of the entries of selection B and A gives the decimal index of the exit concerned. For example, when BA = 10 (that is to say 2 into decimal), the exit concerned is Y2.

4. 3. - USE OF A DECODER OUT OF DEMULTIPLEXER We know that the majority of the decoders have their active exits at state 0 and their entry of active validation to state 0.

Let us carry the entry of validation to state 0 : the decoder is validated, and the exit selected by the entries of the decoder passes to state 0. We can say that the data 0 presents on the entry of validation is transferred on the selected exit. Now let us carry the entry of validation to state 1 : the decoder is invalid and all its exits pass to state 1, in particular the exit selected by the entries of the decoder. In the same way, we can say that the data 1 presents on the entry of validation is transferred on the selected exit. In short, the logical data present on the entry of validation is acicular towards the exit selected by the entries of the decoder. Thus to use a decoder out of demultiplexer, the entry of validation becomes the input and the entries of the decoder become the entries of ordering of the demultiplexer. Figure 43 illustrates how one passes from a decoder to a demultiplexer.

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