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TDA7384A

4 x 35W QUAD BRIDGE CAR RADIO AMPLIFIER

HIGH OUTPUT POWER CAPABILITY: 4 x 40W/4 MAX. 4 x 35W/4 EIAJ 4 x 25W/4 @ 14.4V, 1KHz, 10% 4 x 22W/4 @ 13.2V, 1KHz, 10% LOW DISTORTION LOW OUTPUT NOISE ST-BY FUNCTION MUTE FUNCTION AUTOMUTE AT MIN. SUPPLY VOLTAGE DETECTION LOW EXTERNAL COMPONENT COUNT: INTERNALLY FIXED GAIN (26dB) NO EXTERNAL COMPENSATION NO BOOTSTRAP CAPACITORS PROTECTIONS: OUTPUT SHORT CIRCUIT TO GND, TO VS, ACROSS THE LOAD VERY INDUCTIVE LOADS OVERRATING CHIP TEMPERATURE WITH SOFT THERMAL LIMITER LOAD DUMP VOLTAGE BLOCK AND APPLICATION DIAGRAM
Vcc1 Vcc2

FLEXIWATT25 ORDERING NUMBER: TDA7384A

FORTUITOUS OPEN GND REVERSED BATTERY ESD DESCRIPTION The TDA7384A is a new technology class AB Audio Power Amplifier in Flexiwatt 25 package designed for high end car radio applications. Thanks to the fully complementary PNP/NPN output configuration the TDA7384A allows a rail to rail output voltage swing with no need of bootstrap capacitors. The extremely reduced components count allows very compact sets.

470F ST-BY N.C. OUT1+ IN1 0.1F OUT1PW-GND OUT2+ IN2 0.1F OUT2PW-GND OUT3+ IN3 0.1F OUT3PW-GND OUT4+ IN4 0.1F AC-GND 0.47F SVR 47F
D99AU1018

100nF

MUTE

OUT4PW-GND TAB S-GND

October 1999

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TDA7384A

ABSOLUTE MAXIMUM RATINGS


Symbol VCC VCC (DC) VCC (pk) IO Operating Supply Voltage DC Supply Voltage Peak Supply Voltage (t = 50ms) Output Peak Current: Repetitive (Duty Cycle 10% at f = 10Hz) Non Repetitive (t = 100s) Power dissipation, (Tcase = 70C) Junction Temperature Storage Temperature Parameter Value 18 28 50 4.5 5.5 80 150 55 to 150 Unit V V V A A W C C

Ptot Tj Tstg

PIN CONNECTION (Top view)

25

V CC

AC-GND

P-GND3

V CC

P-GND2

P-GND1

P-GND4

S-GND

OUT3-

OUT2-

OUT1-

OUT2+

OUT1+

OUT3+

THERMAL DATA
Symbol Rth j-case Parameter Thermal Resistance Junction to Case Max. Value 1 Unit C/W

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OUT4+

D94AU159A

OUT4-

ST-BY

MUTE

HSD

SVR

TAB

IN1

IN2

IN4

IN3

TDA7384A
ELECTRICAL CHARACTERISTICS (VS = 14.4V; f = 1KHz; Rg = 600; RL = 4; Tamb = 25C; Refer to the test and application diagram, unless otherwise specified.)
Symbol Iq1 VOS dVOS Gv dGv Po Parameter Quiescent Current Output Offset Voltage During mute ON/OFF output offset voltage Voltage Gain Channel Gain Unbalance Output Power VS = 13.2V; THD = 10% VS = 13.2V; THD = 0.8% VS = 14,4V; THD = 10% VS = 13.7V VS = 14.4V Po = 4W A Weighted Bw = 20Hz to 20KHz f = 100Hz; Vr = 1Vrms PO = 0.5W f = 1KHz PO = 4W f = 10KHz PO = 4W VSt-By = 1.5V VSt-By = 1.5V to 3.5V (Amp: ON) (Amp: OFF) POref = 4W (Amp: Play) (Amp: Mute) (Amp: Mute) Att 80dB; POref = 4W (Amp: Play) Att < 0.1dB; PO = 0.5W VMUTE = 1.5V (Sourced Current) 5 80 3.5 1.5 6.5 7.6 11 8.5 20 90 3.5 1.5 50 100 70 60 50 20 15 24 32 38 22 17 26 35 40 0.04 50 70 65 200 100 70 60 100 10 0.15 70 100 25 26 RL = Play Mode Test Condition Min. 120 Typ. 190 Max. 350 80 80 27 1 Unit mA mV mV dB dB W W W W W % V V dB KHz K dB dB A A V V dB V V V V A

Po EIAJ Po max. THD eNo SVR fch Ri CT ISB Ipin4 VSB out VSB in AM VM out VM in VAM in

EIAJ Output Power (*) Output Power (*) Distortion Output Noise Supply Voltage Rejection High Cut-Off Frequency Input Impedance Cross Talk St-By Current Consumption St-by pin Current St-By Out Threshold Voltage St-By in Threshold Voltage Mute Attenuation Mute Out Threshold Voltage Mute In Threshold Voltage VS Automute Threshold

Ipin22

Muting Pin Current

(*) Saturated square wave output.

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TDA7384A
Figure 1: Standard Test and Application Circuit

C8 0.1F

C7 2200F Vcc1-2 Vcc3-4 6 20 9 8 OUT1

R1 ST-BY 10K R2 MUTE 47K C1 IN1 0.1F IN2 C2 0.1F IN3 C3 0.1F IN4 C4 0.1F S-GND 14 13 16 C5 0.47F SVR C6 47F 10 15 12 11 C10 1F C9 1F 22 4

5 2 3 OUT2

17 18 19 OUT3

21 24 23 25 HSD 1 TAB
D95AU335B

OUT4

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TDA7384A
Figure 2: P.C.B. and component layout of the figure 1 (1:1 scale) COMPONENTS & TOP COPPER LAYER

BOTTOM COPPER LAYER

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TDA7384A
Figure 4: Quiescent Output Voltage vs. Supply Voltage

Figure 3: Quiescent Current vs. Supply Voltage

Figure 5: Output Power vs. Supply Voltage

Figure 6: Distortion vs. Output Power

Figure 7: Distortion vs. Frequency

Figure 8: Supply Voltage Rejection vs. Frequency.

VS =14.4V RL = 4 PO = 1W

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TDA7384A
Figure 9: Output Noise vs. Source Resistance

Figure 10: Power Dissipation & Efficiency vs. Output Power

APPLICATION HINTS (ref. to the circuit of fig. 1) SVR Besides its contribution to the ripple rejection, the SVR capacitor governs the turn ON/OFF time sequence and, consequently, plays an essential role in the pop optimization during ON/OFF transients. To conveniently serve both needs, ITS MINIMUM RECOMMENDED VALUE IS 10F. INPUT STAGE The TDA7384AS inputs are ground-compatible and can stand very high input signals ( 8Vpk) without any performances degradation. If the standard value for the input capacitors (0.1F) is adopted, the low frequency cut-off will amount to 16 Hz. STAND-BY AND MUTING STAND-BY and MUTING facilities are both

CMOS-COMPATIBLE. If unused, a straight connection to Vs of their respective pins would be admissible. Conventional/low-power transistors can be employed to drive muting and stand-by pins in absence of true CMOS ports or microprocessors. R-C cells have always to be used in order to smooth down the transitions for preventing any audible transient noises. Since a DC current of about 10 uA normally flows out of pin 22, the maximum allowable muting-series resistance (R2) is 70K, which is sufficiently high to permit a muting capacitor reasonably small (about 1F). If R2 is higher than recommended, the involved risk will be that the voltage at pin 22 may rise to above the 1.5 V threshold voltage and the device will consequently fail to turn OFF when the mute line is brought down. About the stand-by, the time constant to be assigned in order to obtain a virtually pop-free transition has to be slower than 2.5V/ms.

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TDA7384A
DIM. A B C D E F (1) G G1 H (2) H1 H2 H3 L (2) L1 L2 (2) L3 L4 L5 M M1 N O R R1 R2 R3 R4 V V1 V2 V3 MIN. 4.45 1.80 0.75 0.37 0.80 23.75 28.90 mm TYP. 4.50 1.90 1.40 0.90 0.39 1.00 24.00 29.23 17.00 12.80 0.80 22.47 18.97 15.70 7.85 5 3.5 4.00 4.00 2.20 2 1.70 0.5 0.3 1.25 0.50 MAX. 4.65 2.00 1.05 0.42 0.57 1.20 24.25 29.30 MIN. 0.175 0.070 0.029 0.014 0.031 0.935 1.138 inch TYP. 0.177 0.074 0.055 0.035 0.015 0.040 0.945 1.150 0.669 0.503 0.031 0.884 0.747 0.618 0.309 0.197 0.138 0.157 0.157 0.086 0.079 0.067 0.02 0.12 0.049 0.019 MAX. 0.183 0.079 0.041 0.016 0.022 0.047 0.955 1.153

OUTLINE AND MECHANICAL DATA

22.07 18.57 15.50 7.70 3.70 3.60

22.87 19.37 15.90 7.95 4.30 4.40

0.869 0.731 0.610 0.303 0.145 0.142

0.904 0.762 0.626 0.313 0.169 0.173

5 (Typ.) 3 (Typ.) 20 (Typ.) 45 (Typ.)

Flexiwatt25

(1): dam-bar protusion not included (2): molding protusion included

V3 H3
O

H H1 H2 R3 R4 V1 A

L4

L2

R2 R L L1

L3

V1

V2 D R1 R1 E G V G1 F M B M1

R2 L5

R1

V
FLEX25ME

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TDA7384A

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 1999 STMicroelectronics Printed in Italy All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com

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