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Prof.

Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-1
Noise Analysis and Modeling
Circuit noise
1. interference noise
2. inherent noise
Interference noise
result from interaction between circuit and outside world or
between different parts of circuit itself.
examples :
(i) power supply noise on ground wires.
(ii) electromagnetic interference between wires.
can be reduced by careful circuit wiring or layout
Inherent noise
refers to random noise signals that can be reduced but
never eliminated since this noise is due to fundamental
properties of circuits.
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-2
Noise Analysis and Modeling (Cont.)
examples :
thermal noise and flicker noise
only moderately affected by circuit wiring or layout, such
as using multiple contact to change resistance value of a
transistor. However, inherent noise can be significantly
reduced through proper circuit design, such as changing
the circuit structure or increasing bias current.
Only inherent noise will be discussed in the following
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-3
Time-Domain Analysis
Assumption : All noise signals have a mean value of zero.
This assumption is valid in most physical systems.
Root mean square(rms) voltage value is defined as
rms current is defined as
Typically, a longer T gives a more accurate rms
measurement
Normalized noise power, p
diss
V
n
(t) is applied to a 1 resistor
or P
diss
=
2 / 1 T
0
2
n n(rms)
dt] (t) V
T
1
[ V
}
=
O
2
n(rms)
2
n(rms)
diss
V
1
V
P = =
2
n(rms)
2
n(rms)
I 1 I =
2 / 1 T
0
2
n n(rms)
dt] (t) I
T
1
[ I
}
=
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-4
Time-Domain Analysis (Cont.)
Signal-to noise ratio(SNR), dB
SNR=10
Example : normalized signal power =
normalized noise power =
dBm
dB units relate the relative ratio of two power levels
For dBm units, all power levels are referenced by1mW
Examples : 1mW = 0dBm and 1W = -30dBm
It is common to reference the voltage level to either a
50O or 75O resistor
example:
]
V
V
log[ ]
V
V
log[ SNR
) rms ( n
) rms ( x
) rms ( n
) rms ( x
20 10
2
2
= =
dBm
mW
V
rms n
1
50
log 10
2
) (
O
dBm
mW
I
rms n
1
50
log 10
) (
2
O
or
O 75
or
when V
x(rms)
=V
n(rms)
, SNR=0dB
] log[
power noise
power signal
2
) rms ( x
V
2
) rms ( n
V
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-5
Noise Summation
Noise sources V
n1
(t),V
n2
(t),V
n3
(t),.
Total noise V
n0
(t)= V
n1
(t)+V
n2
(t)+V
n3
(t)+
Example : summation of 2 noise sources
- Voltage noises - Current noises
) t ( i
no
) t ( i
n1
) t ( i
n2
) t ( V
1 n
) t ( V
2 n
) t ( V
no
+
| |
) rms ( n ) rms ( n ) rms ( n ) rms ( n
T T
n n ) rms ( n ) rms ( n n n ) rms ( no
V CV V V
dt ) t ( V ) t ( V
T
V V dt ) t ( V ) t ( V
T
V
2 1
2
2
2
1
0 0
2 1
2
2
2
1
2
2 1
2
2
2 1
+ + =
+ + = + =
} }
) t ( V ) t ( V ) t ( V
n n no 2 1
+ =
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-6
Noise Summation (Cont.)
Correlation coefficient
where -1sCs1
C = 1; the two noise signals are fully correlated
C = 0 ; the two noise signals are fully uncorrelated
Typically, different inherent noise sources are uncorrelated
For two uncorrelated noise signals
V
2
no(rms)
=V
2
n1(rms)
+ V
2
n2(rms)
For two fully correlated noise signals
V
2
no(rms)
=[V
n1(rms)
V
ns(rms)
]
2
To reduce overall noise, concentrate on the reduction of
large noise signals.
) rms ( n ) rms ( n
T
n n
V V
dt ) t ( V ) t ( V
T
C
2 1
0
2 1
1
}
=

Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-7
Frequency-Domain Analysis
Units of Hz(rather than radians/sec) are commonly used
Noise spectral density
periodic signals(e.g. sinusoid) have power at distinct
frequency
random signals have their power spread out over the
frequency spectrum
Example
Time-domain signal
0
2 . 0 4 . 0 6 . 0 8 . 0
3 . 0
2 . 0
1 . 0
0
1 . 0
2 . 0
) (s Time
) (f V
n
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-8
Frequency-Domain Analysis (Cont.)
Spectral density
Root spectral density
Vertical axis is a measure
of the normalized noise
power over 1 Hz
bandwidth at each
frequency point
1 . 0 10 0 . 1 100 000 , 1
0 . 1
16 . 3
10
6 . 31
Hz
V
) (f V
n
1 . 0 10 0 . 1 100 000 , 1
0 . 1
10
100
000 , 1
Hz
) V (
2

Hz
) (
2
f V
n
Hz
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-9
Frequency-Domain Analysis (Cont.)
Resolution Bandwidth(RBW)
V
2
/Hz use 1Hz bandwidth => normalized
Mean-squared value of a random signal at a precise
frequency is zero.
Random-noise power must be measured over a specific
bandwidth.
Example1: Normalized power between 99.5Hz and
100.5Hz is 10(v)
2
---shown in previous page
Example2: Mean-squared value of noise power at
100Hz is 1(v)
2
when 0.1Hz is used
=> Mean-squared value measured at 100Hz
is directly proportional to the bandwidth of the
bandpass filter used for measurement
Total mean-squared power
}

=
0
2 2
df ) f ( V V
n ) rms ( n
}

=
0
2 2
df ) f ( I I
n ) rms ( n
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-10
Noise Types in CMOS transistor
Two major sources
Thermal, or white noise
flat spectrum density
V
n
(f)=V
nw
is a constant
Flicker, or 1/f noise
Spectrum density is inversely proportional to frequency
V
n
2
(f)= / f where K
v
is a constant.
The intersection of flicker and white noise curves is
called 1/f noise corner
Spectral density
2
v
K
2 6
2 6
2
n
) 10 1 (
f
) 10 2 . 3 (
) f ( V

~
2 . 3 V ) f ( V
nw n
= =
Hz
V
1 . 0 0 . 1
10 100
0 . 1
2 . 3
10
) (f V
n
Hz
Hz
V
1/f noise
domnates
White noise
dominates
Hz
V
1,000
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-11
Noise in MOSFET
Thermal noise ( white noise caused by random thermal
motion of electron) Noise power
Real Resistor R
mean square V
nT
:
Af: bandwidth in which the noise is measured, in Hz
4kT, at room temperature, is equal to 1.6610
20
VC
MOSFET
If the device is in saturation, then
frequency
f kTR 4 V
2
nT
A =
m
g R
2
3
1
~

Af cant be infinite, could be assumed up to


several hundred MHz for MOSFET. Since,
for very high frequency (~10
12
Hz), other
physical phenomena enter which cause
to decrease with increasing frequency.
f V
m m
nT
g
kT
g
i
nT
A = =
3
8
2 2
) (
~
V
nT
i
nT
2
n
V
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-12
Noise in MOSFET (Cont.)
Flicker Noise (1/f)
In an MOS transistor, extra electron energy
states exist at boundary between the Si and SiO
2
. These can
trap and release electrons from the channel, and hence
introduce noise. Since the process is relatively slow, most of
the noise energy will be at low frequency.
Noise power
f
f
f
WL C
k
V
ox
nf
A
=
2
Thermal noise + Flicker noise
where G is the noise conductance
The mean squares of the noise currents are added, since the
different noise mechanism are statistically independent.
i
n
f g
WLf C
K
g
KT
i i i
m
ox m
nf nT n
A
(

|
|
.
|

\
|
+ = + =
2 2 2
3
8
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-13
Filtered Noise
Noise amplification and filtering
spectral density
: input noise spectral density
: output noise spectral density
root spectral density
) ( ) ( ) ( f V f j A f V
ni no
2
2
2
2t =
) (f V
ni
) (f V
no
) (f V
ni
2
) ( ) ( ) ( f V f j A f V
ni no
2
2
2
2t =
) ( ) ( ) ( f V f j A f V
ni no
t = 2
) s ( A
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-14
Filtered Noise (Cont.)
Total output mean-squared value
Summation of multiple filtered uncorrelated noise sources
Example : 3 sources
) f ( V
1 n
) f ( V
2 n
) f ( V
3 n
+
2
1
3 2 1
2 2
2 )] ( | ) ( | [ ) (
, ,
f V f j A f V
i
ni i no
=
t =
) s ( A
1
) s ( A
2
) s ( A
3
Uncorrelated
noise sources
}

t =
0
2
2
2
2 df ) f ( V ) f j ( A V
ni ) rms ( no

=
t =
n
i
ni i no
) f ( V ) j ( A ) f ( V
1
2
2
2
2
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-15
Noise Bandwidth
The noise bandwidth of a given filter is equal to the frequency
span of a brick wall filter that has the same output noise rms
value that the given filter has when white noise is applied to
both filters. (Peak gains are the same for the given and brick-
wall filters.)
Example : a 1st-order lowpass response with a 3 dB
bandwidth of f
o
(Such a response would occur
from a RC filter with )
input signal V
ni
(f)=V
nw
(White noise)
1. For the response A(s)= ,
2. For brick-wall filter with f
x
bandwidth,
3. From 1 and 2, noise bandwidth f
x
=
RC 2
1
f
o
t
=
o
f 2
s
1
1
t
+
2
f V
df
)
f
f
( 1
V
V
o
2
nw
0
2
o
2
nw
2
) rms ( no
t
=
+
=
}

2
f
o
t
x nw
f
nw ) rms ( no
f V df V V
x
2
0
2 2
= =
}
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-16
Noise Bandwidth (Cont.)
) f ( V
ni
O = K R 1
F 159 . 0 C =
RC 2
1
f
0
t
=
) f ( V
no
| ) f 2 j ( A |
brick
t
100
f
o
10
f
o
o
f
o x
f
2
f
t
=
0
20
) (dB
| ) f 2 j ( A | t
100
f
o
10
o
f
o
f
o
f 10
0
20
) (dB
Hz
nv
0 . 1 10 100
3
10
4
10
20
-20dB/decade
f
) (f V
n
0
f 2
s
1
1
) s ( A
t
+
=
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-17
Noise Bandwidth (Cont.)
For a RC filter
KT/C noise
SC sampling circuit
circuit noise model
V
i
=0 is assumed
RC
f
o
t
=
2
1
RC
f
x
4
1
= and

+
i
V
+
o
V

clock

+
i
V
o
V
noiseless resistor
eq
R
C
KT
C R
KTR
V
eq
eq
) rms ( o
= =
4
4
2
C
eq
2
R
KTR 4 V
=
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-18
Approximate Noise Calculation
Piecewise integration of noise
simplify integration formulas
integrate noise power
in different frequency
regions and then
add together
example
) f ( V
ni
) f ( V
no
) f ( V
no
)
Hz
nV
(
1
N
2
N
3
N
4
N
) Hz ( frequency
curve
f
1
) f ( V
ni
)
Hz
nV
(
2
0 2
200
) Hz ( frequency
20
0
20

| ) f 2 j ( A | t
) (dB
7 6 5 4 3 2
10 10 10 10 10 10 10 1
7 6 5 4 3 2
10 10 10 10 10 10 10 1
7 6 5 4 3 2
10 10 10 10 10 10 10 1
2
0 2
200
) s ( A
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-19
Approximate Noise Calculation (Cont.)
The noise power in the N
4
region is quite close to the total
noise power. Thus, in practice, there is little need to find the
noise contributions in N
1
~N
3
regions. Such an observation
leads us to the 1/f noise tangent principle.
| | ) ( . . . .
) ( ) ( ) ( ) (
) (
nv 10 88 5 10 33 1 10 6 3 10 84 1
df f V df f V df f V df f V V
2
1
9 8 5 5
2
1
100
1
10
100
10
10 10
2
no
2
no
2
no
2
no rms o
3 4
3 4
+ + + ~
(

+ + + =
} } } }

Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-20
Approximate Noise Calculation (Cont.)
1/f noise tangent principle
To determine the frequency region or regions that
contribute to dominant noise, lower a 1/f noise line until
it touches the spectral density curve --- The total noise
can be approximated by the noise in the vicinity of the
1/f line.
The reason this simple rule works is that a curve
proportional to 1/x results in equal power over each
decade of frequency. Therefore, by lowering this
constant power/frequency curve, the largest power
contribution will touch it first.
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-21
Noise Models for Circuit Elements
Three main noise mechanisms
1. Thermal noise
white noise
2. Shot noise
occurs in pn junctions
white noise
3. Flicker noise
1/f noise
Resistor noise
thermal noise is the major noise source
spectral density V
R
2
(f) or I
R
2
(f)
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-22
Noise Models for Circuit Elements (Cont.)
1. Series voltage noise source
V
R
2
(f)=4KTR
where K is Boltzmamns constant (1.38x10
-23
JK
-1
)
T is temperature in Kelvin's
R is the resistance value
2. Parallel current noise source
Diode noise
short noise
V
d
2
(f)=2KTr
d
where
Capacitors and inductors do not generate noise
R
KT
R
(f) V
(f)
R
R
4
2
2
2
= = I
D D
T
S D
S
T
S
D
T
D D
D
d
q
KT V
V ) ln (V
V
r
I I I I
I
I
I
I I
= = =
c
c
=
c
c
=
1
D
d
d
d
q
r
(f) V
(f) I I 2
2
2
2
= =
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-23
Noise Models for Circuit Element (Cont.)
OPAMPs
Bipolar OPAMP CMOS OPAMP
(All noise sources are uncorrelated)
) (f I
n
2

) (f V
n
2
) (f I
n
2
+
Noiseless
Noiseless
) (f V
n
2
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-24
Noise Models for Circuit Element (Cont.)
Element Noise Models
Resistor
R
(Noiseless)
Diode
Forward (
Biased)
R
KT
f
R
4
2
= ) ( I
D
d
q
KT
r
I
=
D
2
d
KTr 2 ) f ( V =
D
d
q (f) I I 2
2
=
D
d
qI
KT
r =
(Noiseless)
R (Noiseless)
KTR ) f ( V
R
4
2
=
R
(Noiseless)
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-25
Noise Models for Circuit Element (Cont.)
)
) f (
f
K
q( (f)
)
g
KT(r (f) V
C B
B
i
m
b
i
2
2
2
2
2
1
4
|
I I
I I + + =
+ =
(Active
region)
MOSFET
(Active
region)
) f ( V
2
g
) f ( I
2
d
) f ( V
2
i
Noiseless
f
ox
WLC
K
m
g
1
)
3
2
( KT 4 ) f (
2
i
V + =
simplified model for low and
moderate frequencies
BJT
) f ( I
2
i
Noiseless
) f ( V
2
i
Opamp
) (Noiseless
) ( ), ( ), ( f I f I f V
n n n +
Value depends on opamp
typically, all uncorrelated
m d
ox
g
g kT f I
f WLC
K
f V
)
3
2
( 4 ) (
) (
2
2
=
=
) (f I
n
2
+
) (f V
n
2
+
) f ( I
n
2

Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-26
OPAMP example
a lowpass filter equivalent noise model
assuming all noise sources are uncorrelated
using superposition
1. due to , , and
2. due to , , and
3.
Noise Analysis Examples
) f ( V
2
1 no
) f (
n1
I
) f (
nf
I
) f (
n
I
) f ( V
2
2 no
) f (
n+
I
) f ( V
2 n
) f ( V
n
) f ( V ) f ( V ) f ( V
2
2 no
2
1 no
2
no
+ =
f
C
2
R
1
R
1 n
I
n
I
+ n
I
f
R
nf
I
n
V
2 n
V
) f ( V
no
1
R
f
R
f
C
2
R
i
V
o
V
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-27
Noise Analysis Examples (Cont.)
V
no1
2
(f)
V
no2
2
(f)
f f
f
total
f
f
total o
C SR
R
SC
R
V
+
=
+
=
1
1
1
I I
2
1
2 2
2
2
2
2 2
2
2 1
1 )] ( ) ( ) ( [ ) (
f f
f
n n n no
C fR j
R
R
f V f V R f f V
t +
+ + + =
+
I
2
2
0
2
1
2 2
) rms ( no ) rms ( no no ) rms ( no
V V df ) f ( V V + = =
}

1
R
f
R
f
C
total
V
o
V
o
V
total
I
f
C
f
R
|
|
|
.
|

\
|
+
+ =
f f
f
total o
C SR
R
R
V V
1
1
1

| |
2
f
2
n
2
nf
2
n1
2
no1
j2 1
R
(f) I (f) I (f) I (f) V
f f
C fR +
+ + =


Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-28
Noise Analysis Examples (Cont.)
CMOS examples
a differential input stage
assuming
Q
1
and Q
2
are identical
Q
3
and Q
4
are
.
identical
3
5
5
3
4 3
1
2 1
2
3
2
1
m
m
n
no
o m
n
no
n
no
o m
n
no
n
no
g
g
|
V
V
| ) (
R g |
V
V
| |
V
V
| ) (
R g |
V
V
| |
V
V
| ) (
=
= =
= =
(The drain of Q
2
will
track that of Q
1
)
+ in
V
in
V
bias
V
4 2 ds ds o
r // r R ~
) output (
5 5
2
1
n m
V g
5 5
2
1
n m
V g
5 5 n m
V g
Q5
Q2
Q1
Q3
Q4
2 n
V
1 n
V
4 n
V
3 n
V
5 n
V
DD
V
o
V
SS
V
5 n
V
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-29
Noise Analysis Examples (Cont.)
Since (3) is relative small compared to the others, it can be
ignored.
Equivalent input noise
For the white noise portion, i.e. thermal noise
) f (
n
V )
o
R
m
g ( ) f (
n
V )
o
R
m
g ( ) f (
no
V
2
3
2
3
2
2
1
2
1
2
2
+ =
2
)
1 m
g
3 m
g
)( f (
2
3 n
V 2 ) f (
2
1 n
V 2
2
)
o
R
1 m
g (
) f (
2
no
V
) f (
2
neq
V + = =
,
mi
g
1
3
2
KT 4 f
2
thermal ni
V assuming ) )( ( ) (
) (
=
) s ( A ) s ( A
) (
) (
f A
f V
no
equivalent
Input noise
i
V
i
V
o
V
) f ( V
no
) ( ) ( ) ( ) (
) (
3 m
g
1
2
1 m
g
3 m
g
KT
3
16
1 m
g
1
KT
3
16
f
2
thermal neq
V + =
o
V
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-30
Noise Analysis Examples (Cont.)
g
m1
should be made as large as possible to minimize
thermal noise contribution.
For flicker (1/f) noise portion
assuming
Di i i mi
)
L
w
( Cox g I 2 =
]
L W
L K
) (
L W
K
[
f C
) f ( V
f C L W
K
) f ( V
p
n
ox
ker) flic ( neq
ox i i
i
ker) flic ( ni
2
3 1
1 3
1 1
1
2
2
2

+ =
=
. (4.101)
(
(

+ =
p
n
n n ker) flic ( neq
)
L
W
(
)
L
W
(
) f ( V ) f ( V ) f ( V
1
3
2
3
2
1
2
2 2
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-31
Noise Analysis Examples (Cont.)
Recall that the first term in (4.101) is due to the p-channel
input transistors, Q
1
and Q
2
, and the second term is due to
the n-channel loads, Q
3
and Q
4 .
We note some points for 1/f
noise here:
1. For L
1
=L
3 ,
the noise of the n-channel loads dominate
since and typically n-channel transistors have
larger 1/f noise than p-channel transistors (i.e. , K
3
> K
1
).
2. Taking L
3
longer greatly helps due to the inverse squared
relationship in the second term of (4.101). This limits the
signal swings somewhat, but it may be a reasonably
trade-off where low noise is important.
3. The input noise is independent of W
3
, and therefore we
can make it large to maximize signal swing at the output.
p n
>
Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan , Analog IC Design, 2011
4-32
Noise Analysis Examples (Cont.)
4. Taking W
1
wider also helps to minimize 1/f noise.
(Recall that it helps white noise, as well.)
5. Taking L
1
longer increases the noise because the
second term in (4.101) is dominant. Specifically, this
decreases the input-referred noise of the p-channel
drive transistors , which are not the dominate noise
sources, but it also increases the input-referred noise of
the n-channel load transistors, which are the dominant
noise sources !
Total rms input noise, V
neq(rms.)
2
, integrated from f
1
to f
2.
) f f )](
gm
( )
gm
gm
( kT )
gm
( kT [
1 2
3
2
1
3
1
1
3
16 1
3
16
+ =
)]
L w
L
)( ( a
L w
a
[
p
n
n
p
2
3
1
1
1 1
2

+ +
1
2
;
f
f
c
k
a where
ox
i
i
ln =
| |df f V f V V
f
f
flic neq thermal neq rms neq

2
1
2
}
+ = ) ( ) (
ker) ( ) ( ) (

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