ANALOG ELECTRONIC CIRCUITS & SYSTEMS

LABORATORY MANUAL

GARY

E.

F O R D ' -; C A f t t
E D I T I O N

M.

ARFT

T H I R D

ANALOG E L E C T R O N I C CIRCUITS AND SYSTEMS

LABORATORY MANUAL Third Edition

Gary E. Ford
Department of Electrical and Computer Engineering University of California, Davis and

Carl M. Arft
Department of Electrical and Computer Engineering University of California, Davis

KENDALL/HUNT
4050 Westmark

PUBLISHING
Dubuque,

COMPANY
Iowa 52002

Drive

Contents
Introduction Outline of the Manual Nature of Engineering Design The Engineering Notebook P r o j e c t 1: Circuit Response to Sinusoidal Excitation 1.1 1.2 1.3 1.4 Objectives Experimental Preliminaries I: Signal Generation and Display Experimental Preliminaries II: Sinusoidal Circuit Response Experimental Measurements 1 1 2 4 8 8 9 12 14 17 17 17 23 24 26 26 26 30 30

Project 2: Passive Filters 2.1 2.2 2.3 2.4 Objectives Analysis and Design SPICE Simulation Experimental Measurements

P r o j e c t 3: Operational Amplifiers and Active Filters 3.1 3.2 3.3 3.4 Objectives Analysis and Design SPICE Simulation Experimental Measurements

iii

P r o j e c t 4: Noise Reduction System 4.1 4.2 4.3 4.4 Background Design Specifications Design Approach Reporting Requirements

34 34 37 38 40 42 42 42 44 45 47 47 49 51 59 69 74 78 81 81 87 87 93 93 97 101
iv

A B r e a d b o a r d Grounding, Decoupling, and W i r i n g A.l The Breadboard A.2 Proper Grounding A.3 Power Supply Decoupling A.4 Proper Wiring Techniques B Resistor a n d Capacitor D a t a B.l Resistors B.2 Capacitors C HP33120A Function Generator User Guide D HP54600 Digital Oscilloscope User Guide E Fluke 8010A Digital Multimeter O p e r a t i n g Instructions F Philips PM6303A RCL M e t e r O p e r a t i n g Instructions G Hewlett Packard 6237B Triple Power Supply O p e r a t i n g Instructions H S P I C E Examples H.l Simulation of a Second-Order Low-Pass Filter H.2 Simulation of a Second-Order RLC Bandpass Filter H.3 Use of the .SUBCKT Command I Operational Amplifier D a t a I.1 1.2 1.3 Understanding Operational Amplifier Data Sheets LM741 Data Sheet LM348 Data Sheet

Non-Ideal O p - A m p Frequency Response J.l J.2 J.3 Non-Ideal, Frequency-Dependent Op-Amp Model Example: Noninverting Amplifier SPICE Analysis Using the Non-Ideal Model

105 105 106 110 114 114 115 117 122 122 123 125

K Op-Amp Filter Circuit Design P r o c e d u r e K.l Design Procedure for an All-Pole Transfer Function K.2 Design Procedure for a General Transfer Function K.3 Useful Circuits L PSpice and H S P I C E C o m m a n d s for a General Transfer Function L.l PSpice

L.2 HSPICE M Component Costs

Non-Ideal O p - A m p Frequency Response J.l J.2 J.3 Non-Ideal, Frequency-Dependent Op-Amp Model Example: Noninverting Amplifier SPICE Analysis Using the Non-Ideal Model

105 105 106 110 114 114 115 117 122 122 123 125

K Op-Amp Filter Circuit Design P r o c e d u r e K.l Design Procedure for an All-Pole Transfer Function K.2 Design Procedure for a General Transfer Function K.3 Useful Circuits L PSpice and H S P I C E C o m m a n d s for a General Transfer Function L.l PSpice

L.2 HSPICE M Component Costs

Acknowledgement
The authors would like to acknowledge the support of the University of California Davis Undergraduate Instructional Improvement Program for partially supporting the work in this manual. The authors would also like to thank Eunyoung Kim, Grace Cho, Richard Strandberg, Karl Nelson and Chris Wei for their assistance in the preparation of this manual, and Travis Kleeburg and Matthew Schram for their assistance with the revision.

Introduction
The purpose of this laboratory manual is to provide a project-oriented introduction to analog circuits, for use in Electrical and Computer Engineering 100 at the University of California, Davis. The purposes of the laboratory are 1. To introduce the student to electronic instrumentation and measurement techniques. 2. To introduce the use of operational amplifier based circuits. 3. To familiarize the student with the common laboratory procedures of documentation of experimental results.

Outline of the Manual

There are three major components to this laboratory manual: introductory material, descriptions of four laboratory projects, and several appendices of background information and data. The laboratory projects covered in this manual are designed to give students experience in the engineering design process. The next section of the introduction provides a description of the major steps in the engineering design process. Students will work on the design projects in pairs and each will be required to record all work in a laboratory notebook, beginning no later than the second meeting of the laboratory. The last section of the introduction covers the details of creating and maintaining an engineering notebook. The laboratory projects in this manual require a considerable amount of effort on the part of the student. There are three general tasks associated with each project: analysis and design, SPICE simulation, and experimental measurements (except for Project 1, which includes only laboratory work and experimental measurements). Following is a description of each task: The analysis and design is to be done outside of the laboratory sessions and should be completed and entered into the notebook prior to each session. The SPICE simulations can be done during the laboratory sessions; however, since the computer laboratory is open at other times, students are encouraged to complete the simulations on their own time to allow more time for constructing, debugging, and testing circuits in the laboratory.

 The experimental measurements are performed in the laboratory during the assigned laboratory time. Students should prepare for each laboratory session by filling in their notebook with an outline of the procedures to be followed in the session. Thus, when the student comes to the laboratory session, it is only necessary to fill in the blank spaces in the notebook as circuits are constructed and measurements taken. The appendices in this manual provide important information on breadboard wiring practices, data on resistors, capacitors, and operational amplifiers, costs of components, background information on noise reduction systems, an operational amplifier circuit design procedure, information on additional SPICE commands, and operating instructions for the laboratory instruments.

Nature of Engineering Design

One of the purposes of this laboratory course is to introduce the student to the concept of engineering design. Engineering design is one of the most exciting aspects of engineering and is an important reason why engineers are in high demand in industry. An important ability for every engineer is the ability to creatively solve a problem and develop a new or modified component that meets reliability criteria, is easily manufactured, and has reasonable cost. Developing this ability is a significant aspect of this laboratory course. In industry, engineering design is carried out at many different levels. Some engineers deal with very fundamental design aimed at improving our ability to use the principles of physics, chemistry, and mathematics in such things as device fabrication, integrated circuit (IC) processing, and use of electronic properties of materials. Others carry out design by putting together in new ways electronic devices such as transistors, resistors, capacitors, and so forth. Yet others put larger components together such as IC's, printed circuit boards (PCB's) or electronic systems. In this laboratory we concentrate on design with passive elements (resistors, inductors, and capacitors) and analog IC's known as operational amplifiers. Thus we are working at a fairly high level of design, making use of components previously designed by others but now readily available to us. A prerequisite to any engineering design is a firm understanding of the pertinent engineering science, physics, chemistry, and/or mathematics. Also required is skill in both engineering and mathematical analysis. However, design is a much broader undertaking than any of these others because it requires not only knowledge and skill in these areas but also a certain amount of art and creativity. Many feel that design cannot be taught but must be learned through experience. In this course we attempt to teach the basic concepts of design through lecture and reading material, but we also provide the student with laboratory experience to learn design through practice. At first don't be surprised if you are frustrated by the assignments. Particularly in the early phases of the major design project (Project 4), it may seem that you do not have the information necessary to solve the problems and you may even feel that the problems are poorly defined. However, if you keep reviewing the background material and consult with your laboratory partner and the laboratory instructor, you will soon start to make progress.

Engineering Design Process In practice, the customer for an engineering product seldom is able to provide adequate specifications for what is actually wanted. This is partially due to the fact that most customers are not experts in engineering design and therefore do not know the capabilities and limitations of the design process. It is also due to the fact that most engineering customers want something that would be either impossible or unreasonably expensive to manufacture. You as a design engineer are the expert who is expected to go beyond the specifications provided by the customer and understand the customer's real needs and then develop a set of reasonable specifications that meet the customer's needs yet are capable of being met by a practical engineering design. Therefore, the first step in the design process is defining a reasonable set of specifications. This is usually an iterative process requiring considerable discussion with the customer to understand the true needs and to educate the customer to what can and cannot be expected from the engineering design process. Once a set of specifications has been agreed upon, the engineering designer must then come up with a prototype circuit to meet the specifications. Usually prototype circuits are modifications and combinations of well-known circuits which are selected by the designer using experience and creativity to meet the specifications. The creativity part of design is often one of the most exciting parts of the design process and the student is urged to exercise creativity as much as possible in this second step of the design process. However, creativity is of almost no use if it is not later tempered by practicality. The resulting prototype circuit must meet many stringent tests before it may be selected as the design to meet the specifications. Nonetheless, there are usually many designs that meet the specifications and those that meet :hese specifications with the highest reliability, lowest cost, smallest environmental impact, and best manufacturability are a challenge to find. Once the prototype circuit has been selected, the third step in the design process is the analysis of the circuit to see if the specifications are met. This analysis can be done by hand using pencil and paper or by computer simulation. In this laboratory, SPICE simulation will be the primary analytical tool. In the analysis step, you should also keep in mind the potential manufacturability of the circuit, as well as economics, reliability, and environmental impact. The fourth step in the design process is the construction and testing of the circuit. This is i major component of this laboratory course. In this step the actual performance of the circuit is compared to the simulation results and the specifications. The fifth step in the design process is to prepare the design for production. This includes selecting the manufacturing procedure, the testing procedures, the maintenance procedures, ind evaluating the cost, reliability, and environmental impact of the circuit. It also includes preparing the documentation such as a user's manual, technical manuals, and so forth, and in preparing training sessions for those who must manufacture, sell, or use the product. All steps of the design process involve iteration. If at any point the prototype circuit fails :o meet any of the necessary specifications, then the designer must go back to a previous step md repeat the process. This may include going all the way back to the specification step and modifying the specifications to recognize the desirability of some feature or the difficulty of implementing another feature.

In summary, the five steps of engineering design are: 1. Agreeing on the specifications 2. Choosing a prototype design 3. Analyzing and/or simulating the prototype circuit 4. Constructing and testing the prototype circuit 5. Preparing the prototype circuit for manufacturing At each step not only are the specifications to be considered, but also the cost, reliability, environmental impact, manufacturability, and the maintainability of the circuit. Each step is iterative and often it is necessary to repeat steps if the prototype circuit fails to meet the specifications at one of the steps.

The Engineering Notebook

A complete record of your work in the laboratory is to be maintained in an engineering notebook. Before explaining what is to be recorded in the notebook it is necessary to differentiate between a notebook and an engineering report. The notebook is a working document used to record all of the details of the work done in the laboratory In an industrial setting, the notebook is primarily a record for your own use, although if you are working in a project group other group members may refer to it occasionally. It has no rigid format, although some guidelines should be followed which will be presented below. It should be neat and readable, although it is often written in outline form as a collection of short phrases instead of complete sentences. The important objective is to provide yourself with enough information to be able to recall exactly what work you have done on your project. The engineering report, on the other hand, is a formal document written to summarize the work completed on a project. It is often written at the conclusion of the project, but in the case of long projects, interim reports or progress reports are also required. This document is primarily intended for your supervisor, the project leader, or for other project managers. In the case of development of electronic circuits, a description of the design, implementation, test, evaluation, and performance would be included, but the day-to-day details would be left out. You are required to maintain an engineering notebook in this course. You should have your notebook open on your lab bench at all times, ready for use in recording all of your measurements and observations. A problem with many laboratory courses is that the laboratory notebooks are graded, and the grading standards applied to the laboratory notebooks are so severe that students feel that they are required instead to write formal engineering reports in their notebooks! They begin to record their observations and measurements in the lab on scratch paper and then leave the lab and edit the information before recording it very carefully in their notebooks. This is unfortunate because they then do not learn how to properly maintain a working notebook and they also view this as such a painful process that they may avoid it altogether when they begin working in industry. We will do our best to avoid this problem. In
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this course, you are required to keep a working notebook, but the notebook itself will not be graded. Your lab notebook is a diary of your activity on your laboratory projects. It should be a continuous chronological account of exactly what was done, when it was done, and why. It should be complete enough that an engineer, using only the recorded material, could repeat any measurement, check any result, duplicate any set-up or even reconstruct the entire development. You will find a well kept notebook a great help to you in many ways. It will serve you: 1. As a compact, handy, orderly reference book. When you want a piece of early data, you can avoid digging through piles of stray sheets of paper on your desk or in your files by simply opening your notebook to the right page. 2. As evidence of diligence. Sometimes lack of progress is not due to lack of effort. But unless you can point to the record of your efforts in your notebook, wrong conclusions may be drawn. 3. In avoiding repetition. Lost, misplaced, or forgotten data often must be taken all over again. You won't have to go through this wasted effort if you keep good records. 4. As a record of priority. One of your sources of recognition is the designs you produce. Unless your notebook clearly shows the date of conception, the full description of the design, and the record of your subsequent efforts to realize that design, your position is weak and you may lose credit for what is really yours. 5. As a guide to your thinking. The ready accessibility of all data concerning your job facilitates review, helps you see where you are (what's been tried and what hasn't), and points the way by revealing the best solutions to date. Even the time spent making entries is not wasted, as it forces careful consideration of your work and this often reveals errors or points overlooked. As mentioned above, there is no rigid format for writing a lab notebook, but it is easier to follow later if you adopt a standard format. Again, the most important thing is to include all of the information that allows you to understand all the work you have done on the project and to be able to repeat any of the work to verify the results, if that is needed at a later date. The notebook must be neat and organized well enough that you can find needed information when it is wanted. With these guidelines in mind, here is a general outline for documenting a laboratory project: 1. Objectives. Briefly describe the objectives of the project: the circuit to be designed, implemented, and tested, and its intended use. 2. Specifications. Dcscribc the technical and performance specifications that must be met by the circuit or system that you are to design. 3. Design methodology. Describe the procedures you followed in designing your circuit. Explain your design decisions and write down all equations used and calculations made. Sketch rough schematics of your circuits, with nodes labeled for SPICE analysis. Include your SPICE input commands and graphical outputs.
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4. Implementation. Draw detailed schematics of all circuits you build. These should he very complete, using functional schematics of integrated circuits instead of the pinout schematics given in the data books. Label each terminal with its function where appropriate and give the pin number to help with troubleshooting. Measure the values of resistors and capacitors when they are critical to performance. 5. Troubleshooting. Describe the procedures followed in troubleshooting your circuits. Don't simply write "we tried it and it worked," but instead describe the test configuration, test signals applied, and measurements taken. Discuss how you concluded that it was working correctly. If it did not work properly, explain the problem and how you solved it. Discuss any redesign that was required. Keep a list of the equipment used. Since this list will not change often, list your equipment in the front of your notebook, and then list any changes as they occur. Give the manufacturer, model number, and serial number. 6. Test and evaluation. Explain the test set-ups and the measurements taken. Provide clear, organized graphs, performance tables and observations. Graphs should be drawn as the measurements are taken. In this way, you can visually detect anomalous values and quickly check these measurements to verify their accuracy. Explain what the data means by describing how it agrees with the corresponding mathematical model. Your final report should be more than just a collection of tables, graphs, and equations. Your interpretations and explanations of this material is the most important part of the report. If you realize that your data is not in agreement with theory, then explain why you think it is in error and what data you expected to record. 7. Conclusion. Summarize the work accomplished. Discuss any critical design factors. Compare the actual performance with the theoretical performance. Discuss alternative approaches. It is strongly suggested that you use an 8 1/2-inch by 11-inch spiral ring gridded paper lab book to record your observations. The large size allows you to insert copies of application notes, and SPICE inputs and graphical output. The gridded paper makes it easier to draw schematics, graphs, and tables. It is not necessary to record all information while you are working in the lab. Items 1,2,7 and parts of 3 and 4 above can be entered outside of lab, in preparation for the lab. This is similar to the common practice in industry, where you would work out your paper design at your desk, and then move to your lab bench to do the experimental work. Other guidelines regarding your notebook include the following: 1. All entries should be clearly legible, preferably in ink. 2. Date your first entry at the beginning of each work period, whether in lab or outside of lab. 3. Make entries in chronological order. Leave no blank pages. Any notations out of chronological order should be so indicated and dated. 4. Cross out, but do not erase superseded entries. Leave them legible. Never tear out pages.
6

5. Include adequate topic headings to facilitate later search and indexing. Use explanatory text freely 6. Show schematics with element values of all tested circuits. Show block diagrams of test setups. Include instrument numbers. Indicate clearly where readings comprising recorded data were observed. 7. Adequately label and reference all curves and coordinate axes. Graph sheets should be securely pasted in place. 8. Intermediate calculations, if of no interest in themselves, may be made on scratch paper, but all premises and factors involved in the calculations and all results should be recorded.

P r o j e c t 1: Circuit Response to Sinusoidal Excitation

The purpose of this project is to provide an introduction to the use of the laboratory instrumentation and to investigate the response of a simple circuit to sinusoidal excitation. In this project and subsequent projects, you will work in small groups (typically two students) to construct and measure various circuits. It is required that each group acquire a medium-sized solder less breadboard (also called a protoboard). Your protoboard should be approximately 3 inches by 6 inches. Do not purchase the very small breadboards, which are approximately 2 by 3 inches. Your lab instructor can provide more information on where to acquire the proper breadboard. Before you begin wiring circuits on the breadboard, carefully read through Appendix A for important information on proper breadboard grounding, decoupling, and wiring practices. To construct your circuits, your group will need to acquire several components from the storeroom. The resistor color codes, capacitor value codes, and the values available in the storeroom are given in Appendix B. The instruments you will use most frequently in the laboratory are the Hewlett Packard 33120A function generator/arbitrary waveform generator and the Hewlett Packard 54600B digital oscilloscope. You should carefully read the operating manuals for these instruments, given in Appendices C and D of this manual. The better you understand the operation of these instruments, the faster and more effectively you will be able to complete the laboratory projects for this course. You will also use the Fluke 8010A digital multimeter (DMM), the operation of which is described in E.

1.1

Objectives

Become familiar with the signal generation and measurement equipment used in the laboratory. Gain experience in proper breadboard wiring practices. Observe the response of simple RL circuits to sinusoidal inputs. Investigate the effects of real components on the predicted theoretical circuit response.

1.2

Experimental Preliminaries I: Signal Generation and Display

In this section, you will become familiar with the use of the oscilloscope to observe sinusoidal signals. You will generate a sinusoidal signal with the function generator, display the waveform on the oscilloscope, and measure its amplitude and frequency with the oscilloscope. 1.2.1 I n i t i a l S e t t i n g s of t h e Oscilloscope

To reset the oscilloscope to its default operating condition, perform the following steps: 1. Press Setup and then press the Default Setup softkey at the bottom right of the display. 2. Adjust the vertical sensitivity with the Volts/Div knob to 500 mV/div, as displayed at the upper left on the display. 3. Adjust the horizontal time base with the Time/Div knob to 500 /us/div, as displayed at the upper right center on the display. You should observe a horizontal line displayed on the oscilloscope (check your settings carefully and if this line still doesn't appear, consult with your teaching assistant). 1.2.2 Signal G e n e r a t i o n

You will now use the function generator to generate a sinusoidal signal
v(t) = V0 c o s ( 2 t t / + <j>) (1.1)

where VQ is the zero-to-peak amplitude, / is the frequency in Hz, and (p is the phase angle (chosen to be the reference value of zero). This signal will be displayed on the oscilloscope, and its amplitude and frequency will be measured using the oscilloscope. Now acquire a 100 O resistor from the storeroom (the resistor color code and values available in the storeroom are given in Appendix B). Using test leads, interconnect the function generator, oscilloscope, and the 100 Q resistor. You will need two test leads having BNC connectors at one end and alligator clips at the other end. These leads are located at the end of the lab benches and the lab instructors can identify them for you. Connect the BNC connector of one test lead to the Channel 1 input of the oscilloscope and the BNC connector of another test lead to the output of the function generator. Connect the clips on the red leads together on one end of the 100 0 resistor and connect the clips on the black leads (ground) together on the other end of the resistor. Set the function generator controls to generate a 1 kHz sine wave as described below (numbers in parentheses refer to the circled numbers in Figure C.l in Appendix C).

1. Turn the instrument on by pressing the Power button. 2. Choose sine wave output by pressing the ^ ^ button (1).

3. Set the frequency to 1.00 kHz by pressing the Freq button and then turning the knob to get the display to read the desired 1.000,000,0 kHz. For more information, refer to the section entitled "Setting the Output Frequency" in Appendix C. 4. Set the amplitude to 1.500 VPP (peak-to-peak voltage value) by pressing the Ampl button (3) and adjusting the displayed amplitude by turning the knob. For more information, refer to the section entitled "Setting the Output Amplitude" in Appendix C. You should now observe a sine wave on the oscilloscope (if not, check your connections and settings carefully and if you still don't observe the sine wave, consult with your teaching assistant). 1.2.3 Signal M e a s u r e m e n t s

You should observe that the peak-to-peak vertical deflection of the sine wave displayed on the oscilloscope is 2 divisions, corresponding to a peak-to-peak voltage V p _ p of 1V. The oscilloscope displayed value of 1.0 V for Vp~p corresponds to an amplitude VQ of 0.5 V. Sketch the observed display in your laboratory notebook. Note that the oscilloscope-displayed value of the amplitude differs from that of the function generator. Refer to the section entitled Important Considerations Regarding Output Amplitude Display" in Appendix C for an explanation. Using this explanation, describe in your laboratory notebook why a 100 ft resistor would be expected to yield an oscilloscope Vp-p of 1 V when the function generator was set to generate 1.5 V (hint: think voltage divider). Now measure the frequency of the signal with the oscilloscope. Press Time and then press the Freq softkey below the display. Near the bottom of the display, you should read "Freq(l)=1.000 kHz," in agreement with the selected function generator output frequency. Now measure the amplitude of the signal with the oscilloscope. Press Voltage and then press the V p-p and the V rms softkeys below the display. Near the bottom of the display, you should see the displayed values of peak-to-peak and RMS voltage. For a sine wave, the relationships among root-mean-square (RMS) voltage, zero-to-peak voltage (V0) and peak-to-peak voltage {Vp-p) are

Using the oscilloscope readings of the sinusoidal signal amplitude, compute the scaling factor between RMS voltage and peak-to-peak voltage and compare to the value in the equation above.

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1.2.4

Instrument Adjustments

The goal of this section is to investigate further the operation and adjustments of the oscilloscope and function generator. For each of the numbered items below, make the adjustment and observe the changes on the oscilloscope display. Comment on the changes in your laboratory notebook, then return the oscilloscope or function generator to the original settings and move on the next adjustment. Oscilloscope Adjustments: 1. Adjust the Channel 1 Volts/Div knob. 2. Adjust the Channel 1 Position control. With this control set so that the display is deflected off the top of the screen, note that 1 f is displayed on the right of the display, providing you with information on how to adjust the position so that you can view the signal. 3. Observe the effect of the three positions of the input coupling by pressing jT] and then toggling the Couplng softkey. 4. Adjust the Horizontal Time/Div knob. 5. Observe the effect of the trigger slope by pressing Slope/Coupling and toggle the Slope softkey to display the down arrow. Note that the signal has a negative slope passing through the first vertical dotted line from the left of the display. Toggle Slope to display an up arrow and describe the change in the display of the signal. 6. Observe the effect of varying the TRIGGER Level knob. 7. Observe the effect of switching the trigger source to line by pressing Source and then pressing the Line softkey. In this position, the 60 Hz AC power line voltage is used as the trigger signal. Since the line voltage and the function generator signals are not synchronized, the displayed signal from the function generator does not stand still on the screen. The Line trigger source is typically used to determine if there is 60 Hz interference in the displayed signal. If there is, this interference component will stand still on the screen. The most important function of the oscilloscope to understand is the trigger. When the cathode ray tube (CRT) beam of the display runs off the right side of the screen, the trigger circuit monitors the input signal for the chosen slope and the chosen amplitude level. When these conditions are detected, the horizontal sweep of the CRT beam begins on the left side of the screen. In this way, the display of a periodic signal will begin at the same location on the screen on each sweep and the signal will appear to stand still on the display.

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Function Generator Adjustments: 1. Vary the output frequency Freq (3). 2. Vary the output amplitude Ampl (3). 3. Vary the DC offset voltage Offset (3). Refer to the section entitled "Setting a DC Offset Voltage" in Appendix C. At this point, you should understand the basic operation of the oscilloscope and function generator. For future adjustments and measurements, only the desired signals or measurements will be described and it will be left to you to adjust the controls as needed. Only when we introduce additional capabilities of the instruments will the details of the adjustment of controls be described.

1.3

Experimental Preliminaries II: Sinusoidal Circuit Response

In this section, you will analyze a simple first-order series RL circuit. Since you will later construct this circuit using practical ("real") components, it is important to realize that a practical circuit component does not exactly behave like the ideal components discussed in class. This is especially true for an inductor, which we discuss next. 1.3.1 Practical Inductor

The inductor we will use in the lab is constructed from many turns of small gauge wire wrapped around an iron core and then encased in plastic. The resistance of the wire cannot be neglected and the inductor must be modeled as the series combination of an ideal inductor (L) and a resistor (Rs), as shown in Figure 1.1. The equivalent impedance of the practical inductor is then Zeq=juL + Rs (1.3)

L
fYYYY

Rs AA/v

Figure 1.1: Model of a practical inductor You will now measure the actual values of L and Rs for the inductor you will use in your circuit. Obtain a 100 mH inductor from the storeroom. The nominal value of the series
12

resistance for this inductor is 100 f l Use the Phillips PM 6303A Automatic RCL Meter in your laboratory room to measure the actual inductance L and series resistance RS of your inductor. The operating manual for the RCL meter is given in Appendix F of this manual, but its operation is so simple that you probably won't need to read the manual. Turn the instrument on (the power switch is on the left rear panel) and connect the inductor to the front panel test posts. Measure inductance by pressing the button labeled Cs or Ls and resistance with the button Rs. Make sure to note the measurements in your laboratory notebook and save the inductor you used, as these will be used again in Project 2. 1.3.2 Series R L C i r c u i t Sinusoidal R e s p o n s e

Consider the series RL circuit shown in Figure 1.2, consisting of the combination of the practical inductor and a 1 kft resistor. Practical Inductor

+ O

-o +

V
- O

1 kQ < R

V,out -O -

Figure 1.2: Series RL circuit with practical inductor

This circuit is a voltage divider, with the input phasor voltage Vf n dividing across the impedance ZEQ of the practical inductor of Equation (1.3) and the resistance R to produce the output phasor voltage V0ut'v Vout
R

R + Zeq

y Vm

R y " R + Rs + juL"1

MS: + M V ~ 1 + ja,L/(R + Rs) m

(I 41 >

~here u 2irf is the frequency of the sinusoidal input signal driving the circuit. The frequency response (or transfer function) is then hc )=
Yout

HR

+ Rs)

n ^
1

[JUJ)

1 +jujL/{R

+ Rs)

1 +ju/u>c

'

The parameter K is the DC gain, which is the magnitude of the transfer function when u 0: K = \H(jO)\ (1.6)
13

The parameter ojc is known as the 3-dB cutoff frequency, which is the frequency at which the magnitude is down by 3 dB from the peak value. This occurs when \H(juc)\ = i^Ml By inspection of Equation (1.5), we see that R+ R
S UJC = -

= 0.707K

(1.7)

(1-8)
/ , NX

R + R

(1.9)

In terms of K and

the magnitude of the output sinusoid is

VOUT = =
K

y/l + (w/cOcy

VIN

(1.10)

and the phase is cf)out = ZV 0Ut = - tan - 1 (w/w c ) (1.11)

Acquire a 1 kfi resistor from the storeroom. Measure its resistance with the digital multimeter by choosing the resistance function and the 2 kfi range (refer to Appendix E). Compute the values of the parameters K and toc of the circuit using your measured component values.

1.4

Experimental Measurements

In this section, you will construct the simple first-order series RL circuit of Figure 1.2, use the skills you have learned to measure its response to a sinusoidal input signal, and compare to the theoretical results derived above. 1. Build the circuit on your breadboard. Before starting, see Appendix A for important information on using breadboards. 2. Drive the circuit input, Vin(t), with the function generator output, and connect this input signal to the oscilloscope Channel 1 input. 3. Connect the circuit output, Vou^t), to the oscilloscope Channel 2 input. 4. To display both the Channel 1 and Channel 2 signals, press [2j and toggle the 2 softkey to On. Then adjust the vertical position knobs for Channels 1 and 2 such that the Channel 1 signal is displayed on the top half of the screen and the Channel 2 signal is displayed on the bottom half of the screen. In making measurements on this circuit and on circuits we will test later in the course, we will always observe input and output signals on the oscilloscope screen to see that we are producing the signals that we expect.
14

First investigate the response of the circuit to a 1600 Hz sinusoid. Set up the function generator to generate a sinusoid and adjust the frequency of the signal to 1.600 kHz. Set up the oscilloscope to display the frequency of Channel 1 and the RMS voltages of Channels 1 and 2. Adjust the input signal amplitude to 1.0 VRMS. Adjust the Volts/Div knobs as needed for good displays of the signals. Carefully sketch the display in your laboratory notebook. Note that the output signal is a sinusoid having the same frequency as the input, but with altered magnitude and phase. Using the displayed values of the input and output signal amplitudes, compare this experimental result to the theoretical result by evaluating Equation (1.10) at a frequency of u = 2tt x 1600 rad/s. Measuring the phase difference between the input and output signals is more difficult, as it involves measuring a time difference between the signals and then computing the phase. A phase difference is equivalent to a time delay, as shown by the following two forms of the equation for the output signal
Vout(t) \Vaut\ COS(2TTft

(f>out) =

|V 0Ut | cos[27r/(t -

td)]

(1.12)

where td is the delay of the output signal relative to the input signal. The phase in radians is then given by
'Pout ~ 2,71 ftrf

(1.13)

with frequency / in Hz, period T in seconds, and time delay td in seconds. Since 2ir radians is equivalent to 360 degrees, the phase in degrees is given by
<Pout

= -360ftd

-360|

(1.14)

To determine the period T of the sinusoidal signal, press Time and then press the Period softkey and note the displayed value of the period. To determine the time delay td between the input and output signals, press Cursors |. Press the t 1 softkey and adjust the knob below the Cursors button to move the vertical cursor line to a zero-crossing of the input signal. Then press the t 2 softkey and adjust the cursor knob to move the second vertical cursor line to the corresponding zero-crossing of the output signal. Compute the output phase in degrees with Equation (1.14). Compare this experimental result with the theoretical result by evaluating Equation (1.11), converting the results from radians to degrees. We are often interested in the changes in sinusoidal signal magnitude caused by a circuit as a function of the sinusoidal frequency. You are to investigate this frequency response property experimentally. With the input amplitude set to 1.0 VRMS, measure the output amplitude at the following frequencies (in Hz): 100, 200, 400, 800, 1600, 3200, 6400 and 12800. In general, when performing frequency sweeps this broad, it is a good idea to use logarithmic scaling, to match the plot. Of course, if you observe unusual behavior, it would likely be better to perform more measurements. In making these measurements, set the frequency with the function generator, observe the signals on the oscilloscope to verify that you are getting the results expected, then measure the output signal RMS voltage using the oscilloscope. Sketch the plot of the output signal amplitude against frequency, with amplitude plotted on a linear scale and frequency on a log
15

scale. Note that on a log scale, the frequencies chosen will be equally spaced. While you may want to use a computer to produce this plot later, you should always make a rough plot while you are taking the data, as this will allow you detect errors and make additional measurements as needed. Along with the sketch, describe why the measured circuit response behaves as it does. Also describe the relationship between the parameters K and u>c and the frequency response that you have measured. Do your predicted values agree with the measured response?

16

P r o j e c t 2: Passive Filters
The purpose of this project is to investigate the frequency domain characteristics of several circuits built solely from resistors, capacitors, and inductors. Since these circuits contain no controlled sources, they are known as passive circuits. For this project and subsequent projects, you will be simulating several circuits using SPICE. Refer to Appendix H for SPICE examples.

2.1

Objectives

Derive transfer functions for passive low-pass and bandpass filters. Observe how considering the actual (practical) component values alters the properties of the filters. Use SPICE to model the frequency response of the filter circuits. Build the circuits and measure the response of the filters over a range of frequencies. Compare the results of the transfer function analysis, SPICE analysis, and laboratory measurements.

2.2

Analysis and Design

In this section, the circuits that you will investigate are introduced and you are asked to analyze them to determine their frequency responses theoretically. You will derive the transfer functions and then rearrange them into specific forms that will make sketching the Bode frequency response plots more convenient. In the designs below, when you are asked to compute values of response parameters from equations involving circuit elements, use the nominal value of 100 mH for the inductance L and 100 Q for the resistance R s of the practical inductor you acquired and measured in Project 1. For capacitors and resistors needed in the designs, use the nominal (marked) values of these elements.

17

2.2.1

Second-Order Low-Pass Filter (Practical Inductor)

The circuit for a second-order passive low-pass filter, constructed from a practical inductor, is shown in Figure 2.1. Practical Inductor

+ O V

-o +

Vout O -

- O

Figure 2.1: Second order low-pass filter with practical inductor Analyze the circuit using the following 4-step procedure: 1. Derive the expression for the frequency response H(ju>) = V o u i (jcj)/Vi n (ja;), writing the expression in the following form tf 0 " ) =
1+

7^7

X2

(2-1)

n+v

where K is the DC gain (K |i/(jO)|), un is the "corner frequency" of the filter, and Q is the quality factor. Note that for a second-order filter, the 3-dB cutoff does not occur at u)n, thus the use of the new term "corner frequency." In fact, the 3-dB cutoff frequency of a second-order filter, ljc, changes depending upon the value of Q. For a second-order low-pass filter, the value of Q is directly related to the magnitude of the response peak that will occur near ton if the filter is "underdamped" (Q > 0.707). It is related to the damping coefficient, by < = 552. Derive expressions for iC, cjn, and Q in terms of i?,, Rs, L, and C. 3. Using a practical inductor having the nominal values L 100 mH and Rs 100 Q, design a filter with Q = 2.0, fn wn/27r = 1591 Hz, and K = 1. Choose a standard value capacitor and resistor such that the filter meets the given specifications as closely as possible. The standard value capacitors and resistors available in the storeroom are listed in Appendix B.
18
(2 2)

'

\H(Jo>)\ (dB)

Figure 2.2: Underdamped (Q > 0.707) second-order low-pass filter response 4. Sketch the Bode straight-line magnitude plot for the filter you have designed. In the experimental section of this lab, you will verify your design by measuring the frequency response as well as the parameters ton (or /) and Q. The frequency response can be directly measured from the circuit; however, the response parameters un and Q cannot be directly measured. Instead, this must be done in an indirect way, by making frequency response measurements and computing the parameters from these measurements. For a high-Q, underdamped filter (Q > 0.707), there is a peak in the magnitude response that can be used for this purpose, as shown in Figure 2.2. Denoting the frequency of the peak as comax and the magnitude of the transfer function at iomax as Hmax, the following relationships can be shown: K2Q:
Hmax = \H(jUmax)\
2

1 -

1 4 Q2

(2.3)

Wmax

y1

2q2

uj:

(2.4)

Solving these equations for u>2 and Q2 we obtain uz 1 TT

(2.5)

max

2 K2

1 + A/1

K Hr,

(2.6)

Thus, by measuring comax, Hmax, and the DC gain K, we can compute the experimental values of ujn and Q.

19

2.2.2

Second-Order B a n d p a s s Filter (Ideal Inductor)

We next consider a passive bandpass filter in which the inductor is assumed to be ideal. The circuit for a second-order passive bandpass filter constructed from an ideal inductor is shown in Figure 2.3.

+ o

R V W

o +

Figure 2.3: Second order bandpass filter with ideal inductor Analyze the circuit using the following procedure: 1. Derive the expression for the frequency response H(ju>) = Vout(jco)/Vin(ju)), expression in the following form writing the

(2.7)

where is the center frequency of the filter (the frequency at which the transfer function magnitude is maximum), K is the gain at the center frequency (K \H(ju>o)\), and Q is the quality factor. In a bandpass filter, increasing values of Q indicate a narrower passband in the frequency domain. 2. Derive expressions for K, a?o> and Q in terms of R, L, and C. 3. Discuss how the value of R affects the center frequency ujq, the quality factor Q and the gain at the center frequency K. Explain using the expressions you have derived for these response parameters. 4. For R = 1 kfi, L = 100 mH, and C = 0.1 F, compute the values of /o = u)q/2-k, Q, and K. Sketch the Bode straight-line magnitude plot for this filter. 5. Repeat step 4 with R = 10 kf2. Sketch the Bode straight-line magnitude plot for this filter.

20

In the experimental section of this lab, you will measure and verify coo and Q. This is easier for the bandpass filter than for the low-pass filter because the center frequency of the bandpass filter, u>o, can be directly measured. The quality factor, Q, must be determined indirectly, however. This is done by first determining the frequencies /1 and j i on either side of /o (where h > /l) at which the response is down to 0.707 of the peak response (or down by 3 dB, see Figure 2.4). The quality factor Q is then computed from
Q = fo (2.8)

h - h

\H{jco)\ (dB)

201og(Hmax)

20log(0.707 * H

Figure 2.4: Second order bandpass filter response

2.2.3

Second-Order Bandpass Filter (Practical Inductor)

When a practical inductor is used in the bandpass filter circuit, as shown in Figure 2.5, the derivation of the frequency response becomes more complicated. To analyze this circuit, first consider the equivalent impedance Zeq of the parallel combination of the practical inductor (series combination of L and Rs)
_

{Rs+juL)-1
R s + J u L

^~

jwC 1 juC

_ Rs+ JUL - W L C + juR.C

+1

21

o +

V ir R o O

V,out

Figure 2.5: Second order bandpass filter with practical inductor The frequency response of the circuit is then expressed as a voltage divider involving Zeq and R: Z'eq P H(M = R + Zeq Rs + juL

(2.10)

Analyze this circuit as follows 1. Rewrite equation (2.10) in the form

=
J Q

yrn.
\ ^O

(2.H)

2. Derive expressions for K, u;n, u>o, and Q in terms of R, L, Rs, and C. The terms ljq, K, and Q are defined in Section 2.2.2. The new term, is the corner frequency of an additional zero in the numerator due to the resistance Rs. What effect does Rs have on the DC gain of the circuit? 3. For R = I kft, L = 100 mH, Rs = 100 ft, and C = 0.1 yuF, compute the values of fo = c j o / 2 7 t , Q, K, and fn = un/2ir. How do these results differ from the results obtained in Step 4 of Section 2.2.2 using an ideal inductor? Compare the frequency responses of the two filters by sketching their Bode magnitude plots (straight-line approximations only). 4. For R = 10 kft, L = 100 mH, Rs = 100 ft, and C = 0.1 //F, compute the values of / 0 , Q, K, and fn. How do these results differ from the results obtained in Step 5 of Section 2.2.2
22

using an ideal inductor? Compare the frequency responses of the two filters by sketching their Bode magnitude plots (straight-line approximations only). 2.2.4 E f f e c t of A c t u a l C o m p o n e n t V a l u e s

In your circuit analysis and design up to this point you used nominal values for the inductance, capacitance, and resistance. Practical components will have values that differ for the nominal values within a specified percent tolerance. For example, the tolerance of the resistors used in the lab is 5% and the tolerance of the capacitors is 10%. In this section of the lab, you will investigate the effects of the actual component values on the frequency response parameters you previously computed for your circuits. Acquire from the storeroom the resistor and capacitor needed in your design of the secondorder low-pass filter in Section 2.2.1 and the 0.1 fiF capacitor and 1 kQ, and 10 kQ resistors needed for the bandpass filter in Section 2.2.3. Measure the values of these components with the Phillips RCL Meter. Make sure to keep these components that you have measured, as you will use these same components to construct your circuits. Using these measured values, perform the following analyses: 1. For the second-order low-pass filter in Section 2.2.1, recalculate the values of Q, / n , and K that result from the use of the actual acquired component values. Compute the percent change in these parameters from the values obtained in Section 2.2.1 using the nominal values of the components. 2. For the second-order bandpass filter, recalculate the values of /o, Q, K, and fn (Steps 3 and 4 in Section 2.2.3), and then compute the percent change from the values obtained using the nominal component values.

2.3

SPICE Simulation

You will now use SPICE to simulate your low-pass and bandpass filters. For each SPICE ?jialysis, you are to include in your lab notebook: the schematic diagram of the simulated circuit, marked with the node numbers and variable names used, your SPICE input commands, and your output graphs. You will use awaves to generate a Bode plot from the output of SPICE. Your Bode plots should show the magnitude in dB and phase in degrees, plotted against frequency in Hz on a . igarithmic scale. For all of the circuits analyzed with SPICE, use the actual component values, i^s measured in Section 2.2.4. Perform the following SPICE analyses:
23

1. Do an AC analysis of the series RL circuit of Section 1.3.2 of Project 1. For your analysis, use the resistor and inductor values that you measured in Project 1. The input signal AC amplitude should be IV. Plot the magnitude and phase of the frequency response over the range of frequencies from 100 Hz to 100 kHz. Convert your experimental gain measurements for this circuit to dB and compare to the SPICE simulation results. 2. Do an AC analysis of the second-order low-pass filter of Section 2.2.1. For your analysis, use the resistor and capacitor values that you measured in 2.2.4. Plot the magnitude (in dB) and phase of the frequency response over the range of frequencies from 100 Hz to 100 kHz for the filter you designed. Using the cursor capabilities of the PROBE or awaves graphic displays of the frequency response, determine the frequency fmax and the magnitude Hmax of the peak in the frequency response and compute ujq and Q from equations (2.5) and (2.6) and compare to the design values of these parameters. 3. Do an AC analysis of the second-order bandpass filter (with a practical inductor) of Section 2.2.3. For your analysis, use the resistor and capacitor values that you measured in 2.2.4. Plot the magnitude and phase of the frequency responses of the two filters considered (R = 1 kft and R = 10 kft). The frequency range should be from about one decade below to about one decade above the center frequency. Using the cursor capabilities of the PROBE or awaves graphic displays of the frequency response, determine the center frequency fa and the frequencies f\ and fa at which the response is down to 0.707 of its peak value. Compute Q from equation (2.8) and compare the experimental values of Q and fa to the design values.

2.4

Experimental Measurements

In this section, you will construct the circuits you have analyzed and designed, and then measure the frequency response and create plots for comparison with your SPICE simulation results. Construct the circuits and make the following measurements: 1. Construct the second-order low-pass filter of Section 2.2.1. Take gain measurements over the frequency range 100 Hz to 100 kHz. Use a calculator to convert the gain to dB, then sketch a plot of gain in dB against frequency on a log scale. As in Project 1, you may later want to plot your results using a computer plotting program, but by making a rough plot by hand as you take your measurements you can discover erroneous readings and repeat the measurements as needed. Compare the plot with your SPICE results. Determine the frequency fmax of the response peak by slowly adjusting the frequency of the function generator, while watching for the maximum output on the oscilloscope or the DMM. When you find / m a i , record its value from the oscilloscope frequency counter. Measure the gain at this frequency (H m a x ) and then compute experimental values of ojq and Q using equations (2.5) and (2.6). Compare the experimental and design values of these parameters. 2. Construct each of the two second-order bandpass filters (with a practical inductor) of Section 2.2.3. Take gain measurements and plot, as with the low-pass filter. Compare
24

your plots with your SPICE results. Determine the center frequency /o, the frequencies fi and ji at which the gain is down to 0.707 of its peak value and use equation (2.8) to compute an experimental value of Q. Compare the experimental and design values of luq and Q.

25

P r o j e c t 3: Operational Amplifiers and Active Filters

The purpose of this project is to investigate various common active circuits involving operational amplifiers discussed in class. To power your circuits you will be using the HP6237B triple output power supply. The operating instructions for this instrument are given in Appendix G. The op-amp you will be using is the National Semiconductor LM741 op-amp. The data sheet for this op-amp is given in Appendix I. You will also be using the non-ideal model for an op-amp, which is given in Appendix J (also refer to the last section of Appendix H).

3.1

Objectives

Derive transfer functions for various types "of active circuits. Compare the transfer functions for the ideal and non-ideal cases. Use SPICE to model the response of the amplifier circuits using a non-ideal, more realistic model of the LM741. Build the circuits, measure the frequency response, and compare to the simulation results.

3.2

Analysis and Design

In the analysis and design of the circuits below, use standard value resistors and capacitors and typical values for the non-ideal op-amp parameters. 3.2.1 Unity Gain Amplifier

The schematic diagram for a unity gain op-amp circuit is shown in Figure 3.1. Using the ideal ap-amp model, KVL around the outermost loop yields Vj n = V u t - This type of amplifier is also referred to as a "voltage follower" since, assuming the ideal op-amp model, the circuit simply reproduces the input signal at the output, i.e. the output "follows" the input. It is also sometimes called a "buffer" amplifier because it isolates the output from the input, such that Vj n = V ou t regardless of the value of Rl0

26

V,

Rl

vn
-o -

o-

Figure 3.1: Unity gain amplifier circuit Using the non-ideal, frequency-dependent op-amp model described in Appendix J, derive an expression for the frequency response of this circuit. In your model, you may assume that R{ is very large (Ri oo) and that Ro is very small (Ro 0). Assume that the open-loop gain > at DC) is Aq = 2 x 105, which is typical for a 741 op-amp. Select the values of R and C in the op-amp model given in Appendix J so that the resulting single pole model has a pole frequency of 5 Hz (typical value for the 741 op-amp). Find an expression for the 3-dB cutoff frequency of the unity gain amplifier circuit, u c . 3.2.2 Inverting Amplifier

Using the ideal op-amp model, design an inverting amplifier as shown in Figure 3.2. The amplifier should have a gain of Vout/Vin 10 and an input resistance of 10 kft or greater with a 1 kfi load resistance. Show the schematic diagram of your circuit with all component values labeled.
r

Figure 3.2: Inverting amplifier circuit

Using the non-ideal, frequency-dependent op-amp model described in Appendix J, derive an expression for the frequency response of this circuit. Again assume that R{ oo, R0 & 0, and > R and C are chosen for a pole at 5 Hz. Find an expression for the gain of the circuit at DC
27

and the 3-dB cutoff frequency. 3.2.3 Integrating Amplifier

Using the ideal op-amp model, design an op-amp integrating amplifier as shown in Figure 3.3. The input impedance should be 10 kH or greater. The circuit should produce a 2 volt peak-topeak sinusoidal output signal in response to a 2 volt peak-to-peak (zero average value) sinusoidal input signal having a frequency of 1 kHz.

CF

Figure 3.3: Integrating amplifier circuit

3.2.4

Bandpass Filter

Consider the bandpass filter circuit shown in Figure 3.4 and analyze the circuit as follows: 1. Using the ideal op-amp model, determine the frequency response of the individual lowpass and high-pass stages, Hi0(juS) and Hhi(ju), in terms of Rl, Cl, Rh-, and What are the 3-dB cutoff frequencies of the high-pass and low-pass stages (cuci and uC2, respectively)? 2. Determine the frequency response of the entire bandpass filter, H(ju) = Hi0(ju>)-Hhi(ju>), in terms of u c i and coC2. Write the frequency response in the following form:

(3.1)

where uo is the center frequency of the filter, K is the gain at the center frequency (K \H(ju>o)\), and Q is the quality factor. What are cjo, Q, and K in terms of u>ci and a;C2? What are they in terms of Rl, Cl, Rh? and Ch?
28

29

3.3

SPICE Simulation

You will now use SPICE to simulate the four op-amp based circuits. For each SPICE analysis, you are to include in your lab notebook the schematic diagram of the circuit simulated, marked with the node numbers and variable names used, your input SPICE commands, and your output graphs. Your Bode plots should show gain magnitude in dB and phase in degrees, plotted against frequency in Hz on a logarithmic scale. The frequency range for all Bode plots should be 10 Hz to 10 MHz. For all of the circuits analyzed with SPICE, use the non-ideal op-amp model described in Appendix J including frequency response characteristics, using parameter values for the 741 op-amp. Use standard values for all components. Perform the following SPICE analyses: 1. Do an AC analysis of the unity gain amplifier of Section 3.2.1, plotting the frequency response. Determine the 3-dB cutoff frequency and compare to the value you calculated using the non-ideal op-amp circuit model. 2. Do an AC analysis of the inverting amplifier of Section 3.2.2, plotting the frequency response. Determine the 3-dB cutoff frequency and compare to the value you calculated using the non-ideal op-amp circuit model. 3. Do a transient time-domain (.TRAN) analysis of the integrator of Section 3.2.3. Refer to Appendix H for examples of time-domain analyses. Use the pulse (PULSE) or piecewise linear waveform (PWL) source waveforms to create a 1 kHz 2 V peak-to-peak, zero DC value square wave input signal. Plot the resulting output signal. Note that a square wave is used because it is easier to observe the integration function of the circuit. 4. Do an AC analysis of the bandpass filter of Section 3.2.4 for each of the three sets of Rl and Cl values given in Table 3.1. Determine the lower and upper cutoff frequencies, the center frequency, and the passband gain. Compare these values to the values you calculated previously using the ideal op-amp circuit model.

3.4

Experimental Measurements

In this section, you will construct the four op-amp based circuits and perform experimental measurements for comparison to your analytical and simulation results. In order to perform these measurements, you must first become familiar with the operation of the power supply and the 741 operational amplifier, the details of which are presented next.

30

3.4.1

Power Supply

An operational amplifier requires a source of DC voltages known as a power supply, so you will first investigate the HP6237B triple output power supply on your lab bench. The operating instructions for this instrument are given in Appendix G. In the instructions for this instrument given here, numbers in parentheses refer to the circled numbers in Figure 3-1 of the operating instructions in Appendix G. This power supply can be modeled as three adjustable voltage sources, as shown in Figure 3.5. You will need to produce +15 V and 15 V to power your operational amplifiers, so you will be using the two outputs labeled +20 V and 20 V. The two adjustable sources associated with these outputs have a single control so that their output voltages will track. It is important to note that all of the supplies are "floating," which means that they are not connected to a ground reference. In other words, setting the +20V output to +15V means that it is at +15V with respect to the COM (common) terminal (5), but it is at an unknown voltage with respect to ground. For this reason, you must externally connect the COM terminal to the ground terminal (8), which will serve as the ground reference for your circuits. You can then use the outputs from the +20V and 20V terminals as supply voltages for your op-amps.

GND

Figure 3.5: Power supply model Adjust the power supply as follows: 1. Switch the METER (3) to +20 V. 2. Adjust the TRACKING RATIO (6) to the DesktopFIXED position. 3. Turn on the power supply by switching LINE (1) to ON. 4. Adjust the VOLTAGE +20 V control (7) to produce 15 V, as indicated by the volt meter on the power supply. 5. Using your DMM in DC voltage mode, confirm that you have +15 V between the +20 V and ground terminals, and that you have 15 V between the 20 V and ground terminals.

31

You should make these adjustments each time you begin work at your lab bench. The power supply should either be switched off or disconnected from your breadboard when you are wiring up a circuit. The circuit should be checked carefully before power is applied. 3.4.2 LM741 Operational Amplifier

Your circuits will be based on an LM741 operational amplifier in an 8-pin dual in-line package (DIP). The data sheet for this op-amp, with a guide to understanding this information, is given in Appendix I. The top view of the LM741 DIP and its internal connections are shown in Figure 3.6. The pin 1 end of the DIP is indicated by a semicircular notch or a white band. Pin 1 may also be indicated by a dot. The 15 V supply voltages are applied to pin 7 (V + ) and pin 4 (V~). To simplify the schematics, these power connections for our op-amp circuits won't be shown, but you will need to remember to make these connections for each op-amp used in a circuit. The offset null connections (pins 1 and 5) won't be used in our circuits and there is no internal connection to pin 8.

are shown for reference.

3.4.3

Measurements

You are now ready to construct the circuits. For all of the circuits, before you apply the supply voltages V+ and V~, check to make sure that the 20 V portion of the triple power supply is producing 15 V. Make your wiring on the breadboard relatively neat, keeping the leads short. Using shorter wires will reduce the coupling of unwanted signals into your circuits. If wires are available in enough different colors, use a color code for your wiring, choosing a separate color for the supply voltages, ground, and for signals. This will make your circuit easier to debug. Construct the circuits and make the following measurements: 1. Construct the unity gain amplifier of Section 3.2.1. Take gain measurements over the
32

frequency range 10 Hz to 10 MHz. Use a calculator to convert the gain to dB, then sketch a plot of gain in dB against frequency on a log scale. Compare your plot with your SPICE results. 2. Construct the inverting amplifier of Section 3.2.2. Take gain measurements over the frequency range 10 Hz to 10 MHz. Use a calculator to convert the gain to dB, then sketch a plot of gain in dB against frequency on a log scale. Compare your plot with your SPICE results. 3. Construct the integrator of Section 3.2.3. For your input signal, use the function generator to generate a 1 kHz, 2 V peak-to-peak square wave signal having an average value of zero volts. Display the input and output signals on the oscilloscope. It is important to note that the op-amp has a non-zero offset voltage which was not modeled in your analytical or SPICE analyses. You will likely encounter problems from this constant offset voltage, since a constant input to an integrator produces a ramp output. This ramp will eventually saturate the op-amp, forcing its output to either the positive or negative supply voltage. To counteract this problem, first place a resistor between the op-amp non-inverting input and ground. The resistor should be the same value as the resistor connected to the inverting input (Ri). This resistor will tend to cancel the offset. Observe and comment on the effect of adding this resistor. To further solve the saturation problem, create a "leaky" capacitor in the integrator by connecting a large resistor in parallel with it. Observe and comment on the signal distortion created by this resistor. Experimentally find a value for the resistance that provides a good compromise between canceling the offset problems and minimizing the signal distortion. 4. Construct the bandpass filter of Section 3.2.4. Take gain measurements over the frequency range 10 Hz to 10 MHz for each of the three sets of Rh and values given in Table 3.1. Use a calculator to convert the gain to dB, then sketch a plot of gain in dB against frequency on a log scale. Compare your plot with your SPICE results.

33

P r o j e c t 4: Noise Reduction System

This project involves the design of a noise reduction system comprised of a preemphasis filter and a deemphasis filter. For this project, you will be designing higher-order active filter circuits using op-amps. For a general op-amp filter design procedure, refer to Appendix K. In addition to the SPICE examples presented previously, Appendix L gives other SPICE commands that are useful for general transfer functions. As part of your report, you will perform a cost analysis of your circuit. Approximate costs of op-amps, resistors, and capacitors are given in Appendix M.

4.1

Background

In systems that involve the transmission or reproduction of signals, the presence of noise is an important issue. In the best case, noise is simply an annoyance. In the worst case, noise causes so much signal distortion that the original signal is corrupted or lost entirely. The amount of unwanted noise present in a signal is quantified by the signal-to-noise ratio, or SNR, defined as (4.1) where P g,s is the average signal power and Pavg,n is the average noise power. A high SNR corresponds to a low relative noise level. Various techniques have been developed to reduce the noise (increase the SNR) that is introduced into a signal, including filtering techniques such as those that you will explore in this project.
aV

In this project, we will focus on systems for recording, transmitting, or playing audio signals. These may include FM and satellite radios, CD and MP3 players, and cellular telephones to name a few. A primary goal when designing these types of systems is to ensure that the signal you hear is as close as possible to the original signal. For this reason, engineers must find ways to minimize the amount of random noise that is introduced into the signal through the recording, transmitting, and/or playback process. To understand how noise is introduced into a signal, consider the following example. A simplified model of an FM radio transmission and reception system is shown in Figure 4.1. In addition to the desired signal, noise is introduced at various stages. Noise is introduced during the amplification of the signal for transmission, and during amplification after reception. In addition, noise is also introduced during transmission from other electromagnetic sources or environmental factors.
34

Original audio signal

"yAA
Received audio signal (original signal + noise)

Receiver

Figure 4.1: Simplified model of an FM transmission system, showing noise sources The input and noise signals have differing frequency characteristics which can be exploited :o improve the quality of the received signal. Without getting into the details of random signals, most noise signals have more energy concentrated in the higher frequency bands. In contrast, :he input signal power is concentrated at the lower frequencies, falling off sharply at higher frequencies. The noise is mainly a problem at higher frequencies where the signal power is low compared to the noise power (i.e. at frequencies where there is a low SNR). In addition, it is :his high-frequency noise, or "hiss," that is most annoying to humans. Thus, the strategy behind a noise reduction system is to increase the amplitude of the input signal at frequencies where the SNR is low (called preemphasis) prior to transmission. This improves the SNR for these frequencies. At the receiving end, a deemphasis system is designed :o "undo" the effects of the preemphasis by decreasing the signal amplitude back to its original level. The added noise is also decreased by the deemphasis system, so the SNR improvement is maintained. A simplified model of the noise reduction system, consisting of the preemphasis filter, additive noise due to transmission and reception, and the deemphasis filter, is shown in Figure 4.2. The frequency responses of the two filters are chosen to reduce high-frequency noise while ensuring that the output of the cascade of the two filters, y(t), is as close as possible to the original signal, x(t). Therefore, over the frequency range of our system the preemphasis and deemphasis filters should satisfy Hp(u>)Hd(u>) = 1 (4.2) or in terms of dB 201og|ifJ,(w)| + 201og|tfd(w)| = 0 (4.3)

35

Input Signal

Preemphasis Filter

Transmission/ Reception

Deemphasis Filter

Output Signal

H/a>)
Noise, n{t)

yit)

Figure 4.2: Simplified model of the noise reduction system For FM radio systems we are primarily concerned with noise at high frequencies. To improve the SNR at high frequencies, filters having the frequency responses shown in Figure 4.3 are utilized. In North America, the corner frequency of the filters is chosen to be f0 = 13.3 kHz, or u)0 = 8.38 x 104 rad/s. The cascade of the two filters has unity gain for all frequencies, so the output signal, y(t), is the same as the input signal, x(t). However, the noise is reduced above

201og|///,(co)|

201og|//t,(co)|

Figure 4.3: Preemphasis/deemphasis filter frequency responses for FM radio transmission The FM radio preemphasis/deemphasis system represents one of the simplest noise reduction systems. Many systems, for example the Dolby system developed for cassette tape recording, use more complicated preemphasis/deemphasis schemes. As an example of a more complicated system, consider the preemphasis and deemphasis filter frequency responses shown in Figure 4.4. This type of system would be useful for reducing noise over a given frequency band. The preemphasis filter introduces a gain of K over the frequency range from u>\ to u>2- After the addition of noise, the deemphasis filter reduces the gain by 1 jK over the same frequency range, such that the net gain of the system is (K)(l/K) = 1 or 0 dB over the entire frequency range. It is this type of noise reduction system that you are to design and implement for this project.

36

20Iogjtf(a>)|
iL

201og|//(/ (o)|

201og(A-) -----

c
CO,

2 0 log(l / K )

Preemphasis

Deemphasis

Figure 4.4: Example preemphasis/deemphasis filter frequency responses for noise reduction over a certain frequency band

4.2

Design Specifications

For this project, you are to design a noise reduction system incorporating preemphasis/deemphasis niters with frequency responses similar to those shown in Figure 4.4. The suggested specifications of the two filters are as follows: 1. At the two frequencies 100 Hz and 10 kHz, the output of the preemphasis filter must be within 3 dB of the input x{t). 2. The deemphasis filter should reduce noise over the frequency range 500 Hz to 2 kHz by at least 20 dB. That is, the noise that appears in the output y(t) must be at least 20 dB below the noise n(t) over the frequency range 500 Hz to 2 kHz. 3. The overall frequency response of the system must not deviate from 0 dB by more than 3 dB over the frequency range 100 Hz to 10 kHz. That is, the output y(t) must not deviate from the input x(t) (with noise absent, i.e. n(t) = 0) by more than 3 dB over the frequency range 100 Hz to 10 kHz. 4. The design should consist entirely of active circuits, with no inductors. As described in the section titled Nature of Engineering Design in the introduction of this lab manual, these specifications may need to be modified during the design process, dictated by technical or economic constraints. If you feel you must modify the specifications, you should explain the need for these modifications in detail. In addition to meeting the above technical specifications, your design must be cost effective. The costs of your design include the costs associated with labor, manufacturing, and design. In an attempt to estimate these costs, you must compute the cost of components (using the information in Appendix M) and keep track of the amount of time spent by each of the lab partners in the following categories: paper design, SPICE simulation and design, and lab implementation. Your design must also be reliable which includes, but is not limited to, the following:
37

1. Power supply variability. 2. Component interchangeability, e.g. replacing an op-amp or resistor. 3. Temperature effects. You are to investigate these reliability issues in the lab.

4.3

Design Approach

There are many possible ways to design circuits to meet the specifications and each student is urged to be creative in the design. Many possible solutions exist which meet the overall design requirements. The key to this project is to understand the two filters required. The preemphasis filter must provide 20 dB more gain over the specified frequency band (500 Hz to 2 kHz) than outside this band. The deemphasis filter must compensate the first so that the overall product of the two transfer functions is unity (or 0 dB) at all frequencies. Remember that when two filters are connected in cascade, the resulting transfer function is the product of the two individual transfer functions, and the resulting Bode plot is the sum of the individual plots. One way to simplify the design process is to first find transfer functions which meet the specifications and then design the circuits to implement these transfer functions. SPICE simulation and experimentation can be used in both phases of the design. SPICE commands for general transfer functions for both HSPICE and Pspice are described in Appendix L. As an alternative, mathematical software such as Matlab may be used to find the appropriate transfer functions. When the desired transfer functions have been determined, circuits considered in the textbook, lecture, or available elsewhere can be used to implement the transfer functions, or the Six Step Design Procedure given in Appendix K can be used to design the circuits. These circuits should then be simulated with SPICE. While you may use the ideal op-amp model in your analytical designs, you must use the non-ideal 741 model in your SPICE simulations. For your simulations and your hardware implementation, you should design and debug each subcircuit separately. You should interconnect the subcircuits only after you have confirmed that each is working correctly on its own. In connecting the circuits together, you must use buffer circuits (i.e. unity gain amplifiers) to insure that one subcircuit does not load another, or use summing circuits to add a pair of signals. You should attempt to maximize the input resistance of each filter circuit in your design to minimize the interaction between the subcircuits when connected together. Since your implementation will involve several op-amps, use the LM348 IC, which includes four op-amps in one dual in-line package (DIP). The pin assignments of the LM348 are given in Appendix I. The op-amps in this package have the same characteristics as the 741. While it is up to the student to decide on an approach to meet the given specifications, some possible approaches are presented next. These approaches will only be briefly outlined. The student should consider these approaches and then develop an independent design with the positive features of these designs and with additional features developed by the student.

38

4.3.1

Parallel Higher-Order Filters

Parallel combinations of higher-order low-pass, high-pass, and bandpass filters can be considered ::r the filter designs. Recall that the overall frequency response of two filters in parallel is the :;m of the individual frequency responses (not in dB). For the deemphasis filter, consider the parallel combination of a higher-order low-pass filter and high-pass filter, as shown in Figure 4.5. If the low-pass filter has a cutoff frequency of about "00 Hz and the high-pass filter has a cutoff frequency of about 2 kHz, then the overall response Kill be of the form desired. An iterative process is needed to determine the filter order and the values of the cutoff frequencies required to meet the specifications.

Figure 4.5: Parallel high-pass/low-pass deemphasis filter The preemphasis filter must compensate for the deemphasis filter such that the cascade of the two filters is 0 dB at all frequencies. The ideal preemphasis filter to accomplish this is the filter having a frequency response that is the reciprocal of that of the deemphasis filter. However, this is not one of our basic filters. An approximation to the ideal filter can be obtained by a parallel combination of a bandpass filter and a unity gain all-pass filter (i.e., adding one to :he frequency response of a bandpass filter), as shown in Figure 4.6. The bandpass filter can be constructed in many ways. To properly compensate for the filters used in the deemphasis filter, rwo higher-order filters should be used in the preemphasis filter as well. Thus the bandpass filter should be constructed from two higher-order filters (a cascade of two bandpass filters or a low-pass and a high-pass filter). Experiment with possibilities until you get a good design. The transfer function command available on SPICE will be very helpful in designing these filters.

Figure 4.6: Parallel bandpass/all-pass preemphasis filter

39

4.3.2

R a m p Filters

In this approach we approximate the changes in gain at 500 Hz and 2 kHz with a second-order ramp filter. A simple second-order ramp transfer function is
2 I i s^ + s + U).2 Vn r
U J n

(4-4)

This is an up-ramp if u>d > ujn and a down-ramp if u d < u n . The ramp filter has gain of 20 log (Kul/ujf) dB at low frequencies and 20 log K dB at high frequencies. The quality factor Qn affects the ramp primarily at u n while Qd affects the ramp primarily at u d . A value of Q = 0.707 gives a flat response while Q = 1.0 goes right through the point where the ramp and the horizontal line intersect, but must peak up above the final value (similar to the effect of Q in low-pass and high-pass filters). The preemphasis filter can be constructed from two second-order ramp functions cascaded together. The first filter is an up-ramp that starts at a frequency below 500 Hz and ends at around 500 Hz. The second filter is a down-ramp that starts at around 2 kHz and ends above 2 kHz. The cascade of these two filters will give the desired response. The deemphasis filter is exactly the inverse (or reciprocal) of the preemphasis filter and thus will guarantee an almost perfect 0 dB at all frequencies for the overall cascade of the preemphasis and deemphasis filters. The second-order ramp filter circuit can be obtained in several ways. The easiest is to apply the six-step design procedure from Appendix K to obtain a circuit based on operational amplifier integrators. Using this approach you can also realize directly the entire fourth-order up-ramp or down-ramp filter.

4.4

Reporting Requirements

Your progress will be reviewed twice during this project: once after deciding on your design and completing the SPICE simulations, and again when the project has been completed. For the first review, you must detail your design approach, your SPICE simulations of transfer functions and circuits, and provide detailed schematics of the circuit you plan to construct. The final review will cover the entire project. In addition to the material from the first review, this also includes the construction, debugging, testing, and evaluation of the system in the laboratory. You final report must include the following: 1. A complete description of the design procedure used and the evolution of the design. 2. Details of your SPICE simulations of the transfer functions of the two filters. Give the equations for the transfer functions on which you will base your design.

40

3. Details of your SPICE simulations of your circuits. Compare the results of these simulations with the specifications. 4. The final design: detailed schematics and full parts lists. 5. A complete description of the test procedures used in evaluating the performance of the design, the results of this testing, and comparison of performance with the specifications. 6. A cost analysis including component costs and the labor time required for paper design, SPICE simulation and design, and lab implementation. 7. A discussion of reliability issues.

41

Appendix A

B r e a d b o a r d Grounding, Decoupling, and W i r i n g

It is not uncommon for circuit designs that looked good on paper and during simulation to fail in the initial prototype implementation. Many circuit failures are due to problems involving grounding, decoupling, and wiring practices. Sometimes these potential problems are overlooked during the prototype phase, only to cause hours or days of frustrating troubleshooting. In this section, good practices in grounding, decoupling, and wiring will be presented.

A.l

The Breadboard

A representative breadboard with a single LM741 op-amp mounted is shown in Figure A.1(a). The breadboard consists of arrays of holes for inserting electronic components or bare wires. Strips of metal run beneath the holes to provide electrical connections between certain holes. These connections are illustrated in A. 1(b). The breadboard shown has a dual in-line package (DIP) channel, allowing DIPs to be mounted straddling the channel. Notice that when DIPs are mounted in this way, there are four connection holes available horizontally for each DIP pin. The breadboard in Figure A.l also has two vertical bus sections. In each bus section there are two bus lines, with connections along the entire length of the section. These are usually used for supply voltages and ground.

A.2

Proper Grounding

Electronic systems should be designed with a single ground reference point. Ideally each connection in a circuit that must return to ground is connected directly to this single reference ground point. In practical systems, this ideal is not easily achieved. Instead each integrated circuit, or small group of integrated circuits, has a local ground point which in turn is connected to the single ground point. In this lab, local analog grounds, also referred to as signal grounds, will be indicated by the
42

DIP Channel

Bus Section

Bus Section

(a)

(b)

F i g u r e A . l : A medium-sized solderless breadboard (also known as a protoboard). (a) Breadboard with 8-pin DIP mounted along the DIP channel, (b) Illustration of the internal electrical connections of a breadboard

43

schematic symbol 4-. All analog signals and integrated circuits should be grounded through this connection to the system ground. Two power supply voltages, +15 V and 15 V, will be required to power the active op-amp circuits constructed in the lab. The chassis ground terminal on the triple power supply will be used as the system reference ground, and all local grounds are to be connected to this point. The connections between the power supplies and the local power and ground busses on your breadboard are shown schematically in Figure A.2

A.3

Power Supply Decoupling

In addition to proper grounding, it is important to properly decouple the power supply voltages on your breadboard. This is done by connecting capacitors between the power supply busses and the local ground busses, as shown in Figure A.2. This provides a local low-impedance return path for the signal current. The use of decoupling capacitors prevents the feedback of signal components from one part of the circuit to another through the power supply, and also helps to attenuate voltage ripples from the power supply. Properly decoupling the supply voltage provides protection against both high- and lowfrequency noise. High-frequency noise (100 MHz and above) comes primarily from two sources: 1. Rapid switching of logic levels in digital devices. The bulk of the switching current from a low-to-high transition shows up in power supply current surges, while the bulk of the switching current from a high-to-low transition shows up in ground current surges. 2. Coupling of high-frequency signals or noise from one signal path to another, adjacent path. Noise is transmitted through changing magnetic fields that result from the changing electric fields and are picked up on adjacent wires, especially those that run right next to each other for a significant distance. Note that the frequency of coupled noise is not the frequency of the switching signal, but the frequency of the signal's slew rate. For instance, in a gate that is switching from 0 V to 4 V at 1 MHz, the slew rate of the output is typically about 1 ns/V, which corresponds to a frequency of around 160 MHz. The faster the slew rate, the higher the frequency, until one has an ideal square wave with infinite frequency. It is this frequency component that gives rise to the strong magnetic fields associated with switching bipolar devices. Low frequency noise on the power supply line results mainly from the change in the supply current demand as devices change state. For instance, gates, flip-flops, and registers will draw different supply currents depending upon the state of the outputs. The most commonly used method for countering these noise problems is to decouple the power supply line. With this approach, capacitors are used to stabilize the power supply line and filter out the unwanted frequency components. A small value capacitor (0.001 to 0.1 /zF) is used near the device to insure that the transient currents arising from the device are minimized. The rule of thumb is to use one small capacitor for every two active devices. The devices must be located near each other and near the capacitor. If the capacitor is too far away, resistive
44

and inductive current drops will diminish the capacitor's effect. These capacitors must be highfrequency RF capacitors, such as ceramic disk capacitors. For low frequency components, a large value capacitor (i.e. 50 ^ F to 100 nF) is most often used to accommodate the continually changing current requirements of the voltage supply bus line. For this capacitor to be of a reasonable size, polarized electrolytic or tantalum capacitors are used.

AA

Proper Wiring Techniques

Since we will not be working with signals having either extremely high frequency components or very low signal levels, the wiring layout and routing is not critical. However, the use of good wiring practices will prevent any possible problems and will also make your troubleshooting much easier. The principal guideline to follow is to keep analog wiring as short as possible and to separate it from adjacent wiring. This will reduce the coupling of noise components into the analog signals from adjacent wires. The greatest care should be taken for analog lines carrying low amplitude signals or that are connected to devices having extremely high input impedances. To aid in troubleshooting, it is a good practice to adopt a wiring color convention: use separate colors for power supplies, grounds, analog signals, digital signals, etc. This will make it easier to trace the signal path through your circuits and will remind you to separate analog and digital wiring. Finally, you should be careful not to run wires over any of the integrated circuits on your breadboard. This makes it very difficult to remove the ICs, which you may need to do in the troubleshooting phase.

45

Triple Power Supply

System reference ground

Protoboard

C,

Cl
C^ Electrolytic or tantalum capacitor, 1 jaF or greater C2: 0.01 j^F disk ceramic capacitor

Hf-

+15 V bus

Ground

-15 V bus

Figure A.2: Proper implementation of power and ground connections on a breadboard. Notice the use of decoupling capacitors to reduce noise in the supply voltages.

46

n 10 12 15 18 22 27

0 100 120 150 180 200 220 270 300 330 390 470 510 560 680 820 910

n 1000 1100 1200 1300 1500 1800 2000 2200 2700 3300 3900 4700 5100 5600 6800 8200

n 10K 12K 15K 18K 20K 22K 24K 27K 30K 33K 36K 39K 47K 51K

n 100K 120K 130K 150K 180K 220K 270K 330K 390K 430K 470K 560K 620K 680K

Q 1M

3.3

33 39 47

5.6

56 62 68 82

68K 82K 91K

Table B.l: Resistor values available in the storeroom

48

B.2

Capacitors

Numerical codes for mylar capacitors are given in Figure B.2. Capacitor values available in the storeroom are listed in Table B.2.
EXAMPLES: 1S1K = 15 x 10 = 150 pF 759 = 75 X0.1 = 7.5 p F NOTE: T h e letter " R " m a y be u s e d at times to s i g n i f y a decimal point: as in: 2R2 = 2.2 (pF or
MULTIPLIER F O R THE NUMBER: 0 1 2 3 4 5 8 9 MULTIPLY BY: i 10 100 1000 10.000 100,000 001 0.1 TOLERANCE OF CAPACfTOR 10 p F O R

First digit of capacitor's value: 1 Second digit of capacitor's value: 5 Multiplier: Multiply the first ft second digits by the proper value from the Multiplier Chart. To find the tolerance of the capacrtor, look up this letter in the Tolerance columns.

LESS

LETTER
8 C D P O H J K M
v

OVER 10 p F

=0.1 pF 0 25 p f iO.SpF i l OpF 2.0 pF

=2% =3% = 5% 210% 20%

Figure B.2: Capacitor numerical code

For larger capacitances above 1 ^uF, electrolytic capacitors with polarized dielectrics are available. These are cylindrical with axial leads (one lead coming out of each end, or two leads coming out of one end). They are large enough that the capacitance value is written out and no color or numerical code is needed. The negative lead is indicated by an arrow, usually marked with 0 or - . This negative lead must be connected to the lower of the two voltages across the capacitor. These capacitors also have a maximum voltage rating marked on the capacitor.

49

pF 10 15 20 22 25

pF 100 120 200 220 250 270 300 390 470

MF
.001 .01

MF

mF

.10 .15 .2

MF 10*

^F 100*

.002

.02

2.2*

22*

.003

.03

.3 3.3* 33* 47*

33 39 47 68 82

.0047 .0068

.047 .068

.47

4.7*

(* indicates a polarizec capacitor) Table B.2: Capacitor values available in the storeroom

50

Appendix C

HP33120A Function G e n e r a t o r User Guide 1

The following is a heavily condensed version of the User Guide for the HP33120 Function Generator/Arbitrary Waveform Generator. It is intended to provide the basic information needed to learn to use the waveform generator to generate the signals for the laboratory projects described in this book.

The Front Panel

The front panel, shown in Figure C.l, has two rows of keys to select various functions and operations. Most keys have a shifted function printed in blue above the key. To perform a shifted function, press Shift (the Shift annunciator will turn on). Then, press the key that has the desired label above it. For example, to select the AM (amplitude modulation) function, press Shift AM (the shifted version of the r key). If you accidentally press Shift , just press it again to turn off the Shift annunciator. Most keys also have a number printed in green next to the key To enable the number mode, press Enter Number (the N u m annunciator will turn on). Then, press the keys that have the desired numbers printed next to them. For example, to select the number "10", press Enter Number [ |~T] [~0~] (next to the r s J and Recall keys). If you accidentally press Enter Number , just press Shift Cancel to turn off the N u m annunciator.

'Excerpts and figures from IIP33120A Function Generator/Arbitrary Waveform Generator User's Guide, Copyright 1994, 1996, Hewlett-Packard Corp., All rights reserved, reproduced by permission.

51

Front Panel Number Entry

You can enter numbers from the front panel using one of three methods:
Use the knob and the arrow keys to modify the displayed number.

Use the arrow keys to edit individual digits.

Increments the flashing digit. Decrements the flashing digit. Moves the flashing digit to the right. Moves the flashing digit to the left.

Use the "Enter Number" mode to enter a number with the appropriate units.

Ent*r Numter

. n o

<

iiI MHi Vp I m p kHx I I mV I I r m H Z I 1 dm I I B j | Bc S ik p c

Use "Enter" for those operations that do not require units to be specified (AM Level, Offset, % Duty, and Store/Recall State).

53

Setting the Output Frequency

At power-on, t h e function generator o u t p u t s a sine wave at 1 kHz w i t h an a m p l i t u d e of 100 m V peak-to-peak. T h e following example shows how t o change t h e frequency to 1.2 MHz:

Frec

1 E n a b l e t h e frequency

modify

mode.

The displayed frequency is either t h e power-on value or t h e previous frequency selected. When you change functions, t h e s a m e frequency is used if t h e p r e s e n t value is valid for t h e new function.
1.000,000,0 KHz

Enter Number
1

2 E n t e r t h e m a g n i t u d e of t h e d e s i r e d f r e q u e n c y . Notice t h a t t h e Num annunciator t u r n s on a n d "ENTER NUM" flashes on t h e display, indicating t h a t t h e n u m b e r mode is enabled. 1.2 To cancel the number mode, press
Shift Cancel .

m Vpp

3 Set the units to the desired value. The u n i t s are selected using the a r r o w keys on t h e right side of t h e f r o n t panel. As soon as you select t h e units, t h e function g e n e r a t o r o u t p u t s the waveform with t h e displayed frequency. To turn off the flashing digit, move the cursor to the left of the display using the arrow keys.
1.200,000,0 MHz

You can also use the knob and arrow keys to enter an number as shown in the section titled Front Entry.

Panel

Number

54

Setting the Output Amplitude

At power-on, the function generator outputs a sine wave at 1 kHz with an amplitude of 100 mV peak-to-peak. The following example shows how to change the amplitude to 50 mVrms:
AmP'

1 Enable the amplitude

modify mode.

T h e displayed a m p l i t u d e is either t h e power-on value or t h e previous a m p l i t u d e selected. W h e n you change functions, t h e s a m e amplitude is used if t h e p r e s e n t value is valid for t h e new function.
100.0 mVPP

Enter Number

2 Enter the magnitude of the desired amplitude, vpy 1

Notice t h a t t h e Num a n n u n c i a t o r t u r n s on a n d "ENTER NUM" flashes on t h e display, indicating t h a t t h e n u m b e r mode is enabled.
50

To cancel the number mode, press

Shift
V

Shift

Cancel .

3 Set the units to the desired value.

mVrms

^ s a r e selected using t h e arrow keys on t h e right side of the f r o n t panel. As soon a s you select t h e units, t h e function g e n e r a t o r o u t p u t s t h e waveform with the displayed a m p l i t u d e . To turn off the

u n

flashing digit, move the cursor to the left of the display using the arrow keys.
50.00 mVRMS

You can also use the knob and arrow keys to enter an number as shown in the section titled Front Entry.

Panel

Number

Important Considerations Regarding O u t p u t Amplitude Display It is important to realize that, in some circumstances, the amplitude of the output signal indicated on the front panel of the function generator may not match the measured value on the oscilloscope. This is true, for example, in Project 1 when you connect the output of the function generator across a 100 Q resistor. In order to understand the reason for this apparent discrepancy, it is necessary to understand the output stage of the function generator. The equivalent circuit for the output stage is shown in Figure C.2. The output stage is modeled as a voltage source, Vs, in series with an internal
55

source resistance, RS = 50 Q. The output of the function generator is connected to a circuit with a load resistance, or termination, of Rl.
I

VA

i $ i i +

Rs =50Q

vsQ

|
I I I I I

R L | VL

"

6 1 I

Figure C.2: Equivalent circuit model of the output stage of the function generator In this laboratory, the function generators have been set to "expect" a high-resistance termination (i.e., Rl oo). In this case, there is almost no current flow and Vl = VS. Therefore, in this mode the function generator displays the amplitude of VS as the output amplitude. In many cases, this setting does result in the function generator displaying the proper output voltage. For example, the oscilloscope has a very high input impedance (approximately 1 MH). If you connect the function generator directly to the oscilloscope, the measured amplitude will agree with that displayed by the function generator. But, what happens if the termination is not much larger than RS? As an example, let us consider the case in which Rl = 50 0. Now RS and Rl form a voltage divider and Vl = V8/2. For this reason, the amplitude that you would measure across the 50 Q load would be one-half that displayed by the function generator. To further confuse matters, the function generator can be set to "expect" a 50-H termination. In this mode, the function generator displays one-half the amplitude of VS. This allows the displayed amplitude to agree with that measured across a 50-H termination. This is often desired, since many types of electronic equipment have a 50-f2 input impedance.

V ^ Function generator equivalent circuit

56

Setting a D C Offset Voltage

At power-on, the function generator outputs a sine wave with a DC offset of 0 volts. The following example shows how to change the offset to -1.5 mVdc:

0ffset

1 Enable the offset modify mode. The displayed offset voltage is either the power-on value or the previous offset selected. When you change functions, the same offset is used if the present value is valid for the new function.
+0.000 VDC

Enter Number

2 Enter the magnitude of the desired offset. Q

1 . 5

Notice that the Num annunciator turns on and "ENTER NUM" flashes on the display, indicating that the number mode is enabled. Notice that toggles the displayed value between + and - .

-1.5

To cancel the number mode, press

Shift

Cancel .

3 Set the units to the desired value. At this point, the function generator outputs the waveform with the displayed offset. Notice that the Offset annunciator turns on, indicating that the waveform is being output with an offset. The annunciator will turn on when the offset is any value other than 0 volts. To turn off the flashing digit, move the cursor to the left of the display using the arrow keys.
-01.50 mVDC

You can also use the knob and arrow keys to enter an number as shown in the section titled Front Entry.

Panel

Number

57

Power-On and Reset State

The following table shows the power-on and reset state of the function generator. The parameters marked with a bullet () are stored in non-volatile memory. The power-on state will be different if the power-down recall mode has been enabled.
Output Configuration Function Frequency Amplitude (into 50 ohms) Offset Output Units Output Termination Modulation AM Carrier Waveform AM Modulating Waveform AM Depth FM Carrier Waveform FM Modulating Waveform FM Peak Frequency Deviation Burst Carrier Frequency Burst Count Burst Rate Burst Starting Phase FSK Carrier Waveform FSK "Hop" Frequency FSK Rate Modulation State Sweep Start / Stop Frequency Sweep Time Sweep Mode System-Related Operations Power-Down Recall Display Mode Comma Separators Triggering Operations Trigger Source Input/Output Configuration GPIB Address Interface Baud Rate Parity Calibration Calibration State Power-On/Reset State Sine wave 1 kHz 100 mV peak-to-peak 0.00 Vdc Volts peak-to-peak 50 ohms Power-On/Reset State 1 kHz Sine wave 100 Hz Sine wave 100% 1 kHz Sine wave 10 Hz Sine wave 100 Hz 1 kHz Sine wave 1 cycle 100 Hz 0 degrees 1 kHz Sine wave 100 Hz Sine wave 10 Hz Off 100 H z / 1 kHz 1 second Linear Power-On/Reset State Disabled On On Power-On/Reset State Internal Power-On/Reset State 10 GPIB (IEEE-488) 9600 baud None (8 data bits) Power-On/Reset State Secured

58

Appendix D

HP54600 Digital Oscilloscope User Guide 1

The following is a heavily condensed version of the User and Service Guide for the HP 54600B Digital Oscilloscope. It is intended to provide the basic information needed to learn how to use the oscilloscope for measurements in the ECE undergraduate circuits and digital systems laboratories.

The Front Panel

The front panel has knobs, grey keys, and white keys. The knobs are used most often, to adjust measurement parameters and variables. The grey keys bring up softkey menus on the display that allow you access to many of the oscilloscope features. The white keys are instant action keys and menus are not associated with them. Throughout this document, the front-panel keys are denoted by a box around the name of the key, and softkeys are denoted by a change in the text type. For example, Source is the grey front-panel key labeled "source" under the trigger portion of the front panel, and Line is a softkey. The word Line is at the bottom of the display directly above an unlabeled softkey (which is also grey). Figure D.l is a diagram of the front-panel controls and input connectors of the HP 54600B. Refer to this figure to follow the instructions in this document. Figure D.2 is a status line example. The status line, located at the top of of the display, lets you quickly determine the setup of the oscilloscope. You will learn to interpret the setup of the oscilloscope from the status line. (Note that Channels 3 and 4 are not present on the HP 54600B.) Figure D.3 is a diagram showing which grey keys to press to bring up the various softkey menus.
Excerpts and figures from HP54600 Oscilloscope Operating Manual, Copyright 1992, 1997, Hewlett-Packard Corp., All rights reserved, reproduced by permission.

59

Figure D.l: HP 54600B Front panel controls

Channel 4 is on, 10 V/div Delayed sweep is on, 500 ns/div Main sweep 500 ps/div

/T
111100? 2 4.00V 4 10V g 5003/ 500 i/ Auto^l

Autostore is on Channel 3 is off Channel 2 is on, 4 V/div Channel 1 is on, ac coupled, inverted, 100 mV/div Auto triggered, positive slope; trigger source is channel 1 Peak detect is on and operating

Figure D.2: Display status line indicators

60

Connecting a Signal to the Oscilloscope

To avoid damage to the oscilloscope, make sure that the voltage level of the signal you are using is less than or equal to 400 V (dc plus the peak ac). 1. Use a cable or a probe to connect a signal to channel 1. If you are using a probe, the oscilloscope allows you to enter the attenuation factor for the probe. The attenuation factor changes the vertical scaling of the oscilloscope so that the measurement results reflect the actual voltage levels at the probe tip. 2. To set the probe attenuation factor press [7]. Next toggle the P r o b e softkey to change the attenuation factor to match the probe you are using. You should compensate 10:1 probes to match their characteristics to the oscilloscope. A poorly compensated probe can introduce measurement errors. To compensate a probe, follow these steps. 1. Connect the 10:1 probe from channel 1 to the front-panel probe adjust signal on the oscilloscope. 2. Press Autoscale 3. Use a nonmetallic tool to adjust the trimmer capacitor on the probe for the flattest pulse possible as displayed on the oscilloscope, as shown in Figure D.4.

Displaying a Signal Automatically

The oscilloscope has an Autoscale feature that automatically sets up the oscilloscope to best display the input signal. Using Autoscale requires signals with a frequency greater than or equal to 50 Hz and a duty cycle greater than 1%. When you press the Autoscale key, the oscilloscope turns on and scales all channels that have signals applied, and it selects a time base range based on the trigger source. The trigger source selected is the highest numbered input that has a signal applied. (If a signal is connected to the external trigger input, then it is selected as the trigger source.) 1. Connect a signal to the oscilloscope. 2. Press Autoscale When you press the Autoscale key, the oscilloscope changes the front-panel setup to display the signal. However, if you pressed the Autoscale key unintentionally, you can use the Undo Autoscale feature. To use this feature, perform the following step. Press Setup Next, press the U n d o Autoscale softkey. The oscilloscope returns to the configuration in effect before you pressed the Autoscale key.
62

Overcompensation causes pulse peaking.

Correct compensation with a flat pulse top.

Undercompensation causes pulse rolloff.

X
F i g u r e D.4: Probe compensation

63

Setting up the Vertical Window

The following exercise guides you through the vertical keys, knobs, and status line. 1. Center the signal on the display with the Position knob. The Position knob moves the signal vertically, and it is calibrated. Notice that as you turn the Position knob, a voltage value is displayed for a short time indicating how fax the ground reference is located from the center of the screen. Also notice that the ground symbol on the right side of the display moves in conjunction with the Position knob. M e a s u r e m e n t hints: If the channel is dc coupled, you can quickly measure the dc component of the signal by simply noting its distance from the ground symbol. If the channel is ac coupled, the dc component of the signal is removed allowing you to use greater sensitivity to display the ac component of the signal. 2. Change the vertical setup and notice that each change affects the status line differently. You can quickly determine the vertical setup from the status line in the display. Change the vertical sensitivity with the Volts/Div knob and notice that it causes the status line to change. Press [Tj. A softkey menu appears on the display,,and the channel turns on (or remains on if it was already turned on). Toggle each of the softkeys and notice which keys cause the status line to change. Channels 1 and 2 have a vernier softkey that allows the Volts/Div knob to change the vertical step size in smaller increments. These smaller increments are calibrated, which results in accurate measurements even with the vernier turned on. To turn the channel off, either press [T] a second time or press the left-most softkey.

Setting Up the Time Base

The following exercise guides you through the time base keys, knobs, and status line. 1. Turn the Time/Div knob and notice the change it makes to the status line. The Time/Div knob changes the sweep speed from 2 ns to 5 s in a 1-2-5 step sequence, and the value is displayed in the status line. 2. Change the horizontal setup and notice that each change affects the status line differently. Press Main/Delayed A softkey menu appears on the display with six softkey choices.

64

 Toggle each of the softkeys and notice which keys cause the status line to change. There is also a horizontal vernier softkey that allows the Time/Div knob to change the sweep speed in smaller increments. These smaller increments are calibrated, which results in accurate measurements even with the vernier turned on. Turn the Delay knob and notice that its value is displayed in the status line. The Delay knob moves the main sweep horizontally, and it pauses at 0.00 s, mimicking a mechanical detent. At the top of the graticule is a solid triangle symbol and an open triangle symbol. The solid triangle symbol indicates the trigger point and it moves in conjunction with the Delay knob. The open triangle symbol indicates the time reference point. If the time reference softkey is set to left, the open triangle is located one graticule in from the left side of the display. If the time reference softkey is set to center, the open triangle is located at the center of the display. The delay number tells you how far the open triangle reference point is located from the solid triangle trigger point. All events displayed left of the solid triangle trigger point happened before the trigger occurred, and these events are called pretrigger information. You will find this feature very useful because you can now see the events that led up to the trigger point. Everything to the right of the solid triangle trigger point is called posttrigger information. The amount of delay range (pretrigger and posttrigger information) available is dependent on the sweep speed selected.

Triggering the Oscilloscope

The following exercise guides you through the trigger keys, knobs, and status line. 1. Turn the trigger level knob and notice the changes it makes to the display. On an internally triggered HP 54600B, as you turn the Level knob or press a trigger menu key, for a short time two things happen on the display. First, the trigger level is displayed in inverse video. If the trigger is dc coupled, it is displayed as a voltage. If the trigger is ac coupled or if LF reject was selected, it is displayed as a percentage of the trigger range. Second, if the trigger source is turned on, a line is displayed showing the location of the trigger level (as long as ac coupling or low frequency reject are not selected). 2. Change the trigger setup and notice that each change affects the status line differently. Press Source A softkey menu appears on the display showing the trigger source choices. Toggle each of the softkeys and notice that each key causes the status line to change. Press Mode A softkey menu appears on the display with five trigger mode choices. Toggle the Single and T V softkeys and notice that they affect the status line differently (You can only select TV if the trigger source is either channel 1 or 2.) When the oscilloscope is triggering properly, the trigger mode portion of the status line is blank.
65

Press Slope/Coupling A softkey menu appears on the display. If you selected Auto level, Auto, Normal, or Single as a trigger mode, six softkey choices are displayed. If you selected TV as a trigger source, five other softkey choices are available. Toggle each of the softkeys and notice which keys affect the status line. On the HP 54600B, external trigger is always dc coupled. If you select ac coupling or low frequency reject, these functions do not occur until you change the trigger source to channel 1, channel 2, or line. Adjust the holdoff knob and notice the change it makes to the display. Holdoff keeps the trigger from rearming for an amount of time that you set with the Holdoff knob. Holdoff is often used to stabilize the complex waveforms. The Holdoff range is from 200.0 ns to about 13.5 s. It is displayed, for a short time, in inverse video near the bottom of the display. W h a t h a p p e n s if t h e oscilloscope loses trigger? If Auto Level is the trigger mode, Auto flashes in the status line. If dc coupled, the oscilloscope resets the trigger level to the center of the signal. If ac coupled, the oscilloscope resets the trigger level to the middle of the screen. (Every time you press the Auto Level softkey, the oscilloscope resets the trigger level.) If Auto is the trigger mode, Auto flashes in the status line and the oscilloscope free runs. If either Normal or TV is the trigger mode, the trigger setup flashes in the status line.

Using Roli Mode

Roll mode continuously moves data across the display from right to left. It allows you to see dynamic changes (like adjusting a potentiometer) on low frequency signals. Two frequently used applications are transducer monitoring and power supply testing. 1. Press Mode . Then press the A u t o Lvl, Auto, or N o r m a l softkey. 2. Press Main/Delayed . Press the Roll softkey. The oscilloscope is now untriggered and runs continuously. Also notice that the time reference softkey selection changes to center and right. 4. Press Mode Then press the Single softkey.

The oscilloscope fills either 1/2 or 9/10 of the display (depending on the time reference selection), then it searches for a trigger. After a trigger is found, the remainder of the display is filled. Then, the oscilloscope stops acquiring data. You can also make automatic measurements in the roll mode. Notice that the oscilloscope briefly interrupts the moving data while it makes the measurement. The acquisition
66

system does not miss any data during the measurement. The slight shift in the display after the measurement is complete is that of the display catching up to the acquisition system. Roll mode operating hints: Math functions, averaging, and peak detect are not available. Holdoff and horizontal delay do not affect the signal. Both a free running (nontriggered) display and a triggered display (available in the single mode only) are available. Roll mode is available at sweep speeds up to 200 ms.

Making Frequency Measurements Automatically

The automatic measurement capability of the oscilloscope makes frequency measurements easy, is the following steps demonstrate. 1. Connect a signal to the oscilloscope and obtain a stable display. 2. Press Time A softkey menu appears with six softkey choices. 3. Toggle the Source softkey to select a channel for the frequency measurement. 4. Press the Freq softkey. The oscilloscope automatically measures the frequency and displays the result on the lower line of the display. The number in parentheses after the word Freq is the number of the channel that the oscilloscope used for the measurement. The oscilloscope retains in memory and displays the three most current measurement results. If you make a fourth measurement, the left-most result is dropped. If the Show Meas softkey is turned on, cursors are displayed on the waveform that show the measurement points for the fight-most measurement result. If you select more than one measurement, you can show a previous measurement by reselecting the measurement. To find the Show Meas softkey, press the N e x t M e n u softkey key. The oscilloscope makes automatic measurements on the first displayed event.

Making Voltage Measurements Automatically

You can measure the following voltage parameters automatically with the oscilloscope: peak:o-peak, average, rms, maximum, minimum, top, and base. The following exercise guides you :hrough the Voltage keys by making an rms voltage measurement.
67

1. Connect a signal to the oscilloscope and obtain a stable display. 2. Press Voltage A softkey menu appears with six softkey choices. Three of the softkeys are voltage measurement functions. Source: Selects a channel for the voltage measurement. Voltage Measurements: Three voltage measurement choices are available: Vp-p, Vavg. and Vrms. The measurements are determined by voltage histograms of the signal. Clear Meas (clear measurement): Erases any measurement results from the display, and removes the horizontal and vertical cursors from the display. N e x t Menu: Replaces the softkey menu with six additional softkey choices. 3. Press the Vrms softkey. The oscilloscope automatically measures the rms voltage and displays the result on the display. The oscilloscope makes automatic measurements on the first pulse or period in the display.

68

Appendix E

Fluke 8010A Digital M u l t i m e t e r Operating Instructions 1

Note that some of the lab benches have Fluke 8000A DMMs. These DMMs have the same functions as the model 8010A, but the buttons have been rearranged.

The Front Panel

1 Reprinted from Fluke 8010 Instruction Manual, Copyright 1991, Fluke Manufacturing Corp., All rights reserved, reproduced with permission.

69

LOW BATTERY INDICATOR (RECHARGEABLE] BATTERY OPTION ONLY) POLARITY SIGN DISABLED DURING Vac, mA/Aac, a n d KD FUNCTIONS

DISPLAY ANNUNCIATORS
NOTE:

OVERRANGE INDICATION
P o s i t i o n of d e c i m a l point d e p e n d e n t on range selected.

ITEM NO. 1 Display

NAME

FUNCTION 3V4-digit LCD display. Indicates measured input values and an overrange condition. (Also contains an annunciator for low battery charge, if the Rechargeable Battery Option is installed.) A two-position switch (push IN and push OUT) used to select ac (IN) or dc (OUT) for current or voltage measurement. Interlocked switches, used with the AC/DC Function switch to select the measurement functions. Pushing one switch will release the others. The conductance function is selected by pushing the kO switch and one of three pairs of Range Function switches. The Low Ohms feature of the 8012A is selected by pressing the V and mA switches simultaneously. Interlocked switches that select the measurement ranges. Pushing a switch selects the corresponding range and releases a depressed switch(es). A fuse protected, test lead connector for current measurements, less than 2A. Fuse is accessible from the front panel. Test lead connector used as the low or common input for all measurement functions. Test lead connector used as the high input for all voltage, resistance, continuity and conductance measurement functions. Test lead connector used for the 10A Range current function of the 801 OA. Test lead connector used for the Low Ohms resistance function of the 8012A. ZERO Control used to compensate for test lead resistance. Push-on/push-off switch. Used for energizing and de-energizing the instrument.

2 3

AC/DC Function Switch V/mA/kO/S Function Switches

Range Switches

5 6 7 8 9

mA Input Connector COMMON Input Connector V/kO/S Input Connector 10A Input Connector Low Ohms Input Connector /ZERO Control POWER Switch

10

70

Maximum Input Levels

FUNCTION SELECTED DC V or dB RANGE SELECTED ALL R A N G E S v/km/s 20V, 200V, 750V AC 2V, 2 0 0 m V DC mA or AC V / k f t / S and k f 2 or S ALL RANGES COMMON 5 0 0 V d c or ac r m s ALL RANGES m A and COMMON and COMMON 7 5 0 V r m s f o r n o l o n g e r t h a n 15 s e c o n d s or 1 0 7 V - H z 7 5 0 V r m s c o n t i n o u s or 1 0 7 V-Hz INPUT TERMINALS M A X I M U M INPUT OVERLOAD 1 0 0 0 V dc or p e a k ac

Double fuse protected:

2 A , 2 5 0 V f u s e in

series w i t h a 3 A , 6 0 0 V f u s e

Operation Summary for Various Measurements

Voltage
V O L T A G E , LINEAR (V)

71

Current
CURRENT (mA)

Resistance
RESISTANCE (kfl) 1. D E - E N E R G I Z E C I R C U I T T O B E M E A S U R E D

72

Conductance
C O N D U C T A N C E (S = 1 / 0 ) 1. D E - E N E R G I Z E C I R C U I T T O BE M E A S U R E D

73

Appendix F

Philips P M 6 3 0 3 A RCL M e t e r O p e r a t i n g Instructions 1

Front Panel Operation Overview
measured value indication that component under test is outside the 0.25% accuracy range of the instrument measurement unit - MO. kO. n - degrees - pF. nF, jiF, mF - JIH. mH, H, kH quality factor

automatic mode enable

dissipation factor

internal dc bias voltage 2V

automatic trimming of open-circuit impedance short-circuit impedance

3 PM6303A automatic RCL meter

KkQ DEQ rpkH

DOMINANTS DOMINANT* DOMINANT*

Rp

Fi-

- < = > - | aoz* nmI

AUTO

m
Cp or Lp C t or L* C>

internal bias voltage on instrument reset

automatic measurement mode

measurement frequency

parallel / series capacitance or inductance

phase angle parallel resistance series resistance impedance

equivalentcircuit symbols

selected parameter - quality factor - dissipation factor - impedance - phase angle

connectors for front panel test posts remote probes: PM 9541A Kelvin Clips PM 9542A RCL Adapter

Reprinted from Philips PM6303A RCL Meter Operating Manual, Copyright 1992, Philips GmbH, All rights reserved, reproduced with permission.

74

Keyboard: Description
RESET

Function

instrument reset to initial state (use e.g. ball point pen) keypad used to select required measurement:

PARAMETER
AUTO Q D

AUTO:

Rp

Rs

Cp or Lp Cs or Ls

< t >

automatic measurement mode: the dominant parameter is automatically displayed Q: quality factor (tan <> Q = 1/D) j; D: dissipation factor (tan 6; D = 1/Q) Rp: parallel resistance Rs: series resistance Z: impedance (image impedance) Cp or Lp: parallel capacitance/inductance Cs or Ls: series capacitance/inductance phase angle

DC BIAS
ON OFF

keys used to switch the internal 2 V dc dias on or off (to measure electrolytic capacitors) key used for automatic trimming of - open-circuit impedance (>100 kn) - short-circuit impedance (<10 o)

TRIM

Display Section: max. of four digits for the measurement value. The asterisk indicates that the component is outside the 0.25 % accuracy range of the instrument.

75

Description

Function display of measuring unit: M Q, kQ, Q for resistances DEG (degree) for phase angle
n

rrkR f

DEG

M<Q

F, p F, f j F, m F j j H , rn H , H, kH

for capacitances for inductances

equivalent circuit symbols with marker for dominant component display of selected parameter quality factor dissipation factor impedance phase angle indication that internal bias voltage is turned on

aoz*

AUTO
FREQ 1kHz

automatic measurement of dominant parameter measurement frequency 1 kHz (fixed)

Connections:

: joY o: V ; 6 o\\ . . \' p 9 a-'.-' ::

connectors for - test posts for four-wire measurement - SMD adapter

connector for - PM 9541A Four-wire Kelvin Clip Test Cable - PM 9542A RCL Adapter

H )}

76

Appendix G

Hewlett Packard 6237B Triple Power Supply Operating Instructions 1

NOTE
For the Model 6237B, for +6V in the following substitute steps. +18V

a. C o n n e c t line c o r d t o p o w e r s o u r c e a n d t u r n L I N E 0 on. LINE ON indicator will light.

switch

ft *ti

3-1
3-2

b. S e t M E T E R s w i t c h ( 3 ) t o t h e + 6 V p o s i t i o n a n d , w i t h n o load c o n n e c t e d , vary + 6 V V O L T A G E c o n t r o l @ trol s e t t i n g a n d t h e a m m e t e r i n d i c a t e s z e r o . c. S e t t h e + 6 V V O L T A G E c o n t r o l f o r a 6 - v o l t m e t e r i n d i c a t i o n a n d s h o r t t h e + 6 V o u t p u t t e r m i n a l t o COM ( c o m m o n ) t e r m i n a l ( ) w i t h an i n s u l a t e d t e s t lead. a p p r o x i m a t e l y 1 .OA (1.1 A in t h e 6 2 3 7 B ) . The a m m e t e r s h o u l d i n d i c a t e a s h o r t - c i r c u i t o u t p u t c u r r e n t of Remove the short f r o m the output terminals. over its r a n g e a n d c h e c k t h a t t h e v o l t m e t e r r e s p o n d s t o t h e c o n -

Figure 3-1. Controls and Indicators

TURN-ON CHECKOUT PROCEDURE

T h e f o l l o w i n g s t e p s d e s c r i b e t h e u s e of t h e Model

6 2 3 6 B o r 6 2 3 7 B f r o n t p a n e l c o n t r o l s a n d i n d i c a t o r s illust r a t e d in F i g u r e 3-1 a n d serve as a brief c h e c k t h a t t h e s u p ply is o p e r a t i o n a l . Follow this c h e c k o u t p r o c e d u r e or the m o r e d e t a i l e d p e r f o r m a n c e t e s t of p a r a g r a p h 5 - 6 w h e n t h e i n s t r u m e n t is r e c e i v e d a n d b e f o r e it is c o n n e c t e d t o a n y load e q u i p m e n t . P r o c e e d t o t h e m o r e d e t a i l e d p r o c e d u r e s b e g i n n i n g in p a r a g r a p h 5-6 if a n y d i f f i c u l t i e s a r e e n c o u n t e r e d . d. Set the METER switch to t h e + 2 0 V position and turn TRACKING RATIO control T A G E control indicates zero. (7) ( 5 ) - fully clockwise to the F I X E D position. With n o load c o n n e c t e d , vary 2 0 V VOLover its r a n g e a n d c h e c k t h a t t h e voltmeter responds to the control setting and the ammeter

Reprinted from HP3312A Function Generator Operating Manual, Copyright 1989, Hewlett-Packard Corp. All rights reserved, reproduced by permission.

78

3-10
e. Set t h e 2 0 V V O L T A G E c o n t r o l f o r a 20-volt m e t e r cation a n d s h o r t t h e + 2 0 V o u t p u t t e r m i n a l t o t h e c o m - o n terminal with an i n s u l a t e d t e s t lead. T h e a m m e t e r - a u l d indicate a s h o r t - c i r c u i t o u t p u t c u r r e n t of 0 . 5 5 A :=%. R e m o v e the s h o r t f r o m t h e o u t p u t t e r m i n a l s . f. Repeat steps (d) a n d (e), b u t s u b s t i t u t e t h e 20V rosition of t h e M E T E R switch and t h e - 2 0 V o u t p u t ter- nal. g. A d j u s t t h e + 2 0 V o u t p u t f o r a 2 0 V m e t e r i n d i c a t i o n , " h e n set the M E T E R switch t o t h e 20V p o s i t i o n a n d d-eck t h e e f f e c t of t h e T R A C K I N G R A T I O c o n t r o l o n t h e .oltage of t h e 20V o u t p u t . T h e 20V o u t p u t s h o u l d be adjustable f r o m less t h a n 0 . 5 volts t o a m a x i m u m of 1 8 t o 22 volts. 3-3 If this brief c h e c k o u t p r o c e d u r e o r later use of the 3-12 3-11

Overload Protection Circuits

20-Volt C u r r e n t L i m i t . T h e + 2 0 V and - 2 0 V

o u t p u t s are individually p r o t e c t e d against o v e r l o a d or shortcircuit damage by s e p a r a t e c u r r e n t limit c i r c u i t s a d j u s t e d at t h e f a c t o r y t o limit t h e o u t p u t c u r r e n t t o 0 . 5 5 A 5%. (This is 110% of t h e m a x i m u m rated o u t p u t . ) The c u r r e n t limits can be set by a d j u s t i n g resistor R6 f o r t h e + 2 0 V o u t p u t and R 2 6 f o r t h e 20V o u t p u t . (See p a r a g r a p h 5-47 for c u r r e n t limit c a l i b r a t i o n i n s t r u c t i o n s . ) N o d e t e r i o r a t i o n of s u p p l y p e r f o r m a n c e o c c u r s if t h e o u t p u t c u r r e n t remains below t h e c u r r e n t limit setting. If a single load is c o n n e c t e d b e t w e e n t h e + 2 0 V and 20V o u t p u t s , the circuit set f o r the lesser c u r r e n t limit will limit t h e o u t p u t . +6V C u r r e n t F o l d b a c k (Model 6 2 3 6 B ) . The over-

load a n d short-circuit p r o t e c t i o n c i r c u i t f o r t h e +6V o u t p u t of t h e Model 6 2 3 6 B reduces t h e o u t p u t c u r r e n t limit as the o u t p u t terminal voltage decreases. (The o p e r a t i n g region of the +6V o u t p u t is e n c l o s e d by heavy lines in Figure 3-3). The m a x i m u m r a t e d o u t p u t c u r r e n t is 2 . 5 A a n d the c u r r e n t limit is f a c t o r y - a d j u s t e d t o o p e r a t e at 2 . 7 5 A 5 % w h e n the o u t p u t is 6 volts. A t l o w e r o u t p u t voltages, t h e circuit reduces t h e m a x i m u m o b t a i n a b l e o u t p u t c u r r e n t linearly until 1A 1 5 % f l o w s w h e n t h e o u t p u t is s h o r t e d . T h e shortcircuit c u r r e n t c a n n o t be a d j u s t e d , b u t R 4 6 c a n be set t o limit t h e m a x i m u m c u r r e n t at 6 V t o 2 . 7 5 A 5%. (See paragraph 5-47 f o r c u r r e n t limit c a l i b r a t i o n i n s t r u c t i o n . ) 3-13 + 1 8 V o l t C u r r e n t Limit (Model 6 2 3 7 B ) . The +18-

supply reveals a possible m a l f u n c t i o n , see S e c t i o n V of this -nanual f o r detailed t e s t , t r o u b l e s h o o t i n g , a n d a d j u s t m e n t procedures.

3-6
3-7

OPERATION
This p o w e r s u p p l y can be o p e r a t e d individually or

in parallel with a n o t h e r s u p p l y (see p a r a g r a p h 3 - 1 9 ) . All o u t p u t t e r m i n a l s are isolated f r o m g r o u n d . T h e 2 0 V and +6V or + 1 8 V o u t p u t s use a single c o m m o n o u t p u t t e r m i n a l . This c o m m o n (COM) t e r m i n a l or a n y o n e of t h e o t h e r o u t p u t terminals m a y be g r o u n d e d t o t h e chassis at t h e f r o n t panel ground terminal ( ( ) in Figure 3 - 1 ) , or all o u t p u t s m a y be left floating. Loads can be c o n n e c t e d s e p a r a t e l y b e t w e e n each of t h e 0 t o 2 0 V o u t p u t t e r m i n a l s a n d t h e COM terminal, or b e t w e e n t h e 20V a n d t h e + 2 0 V t e r m i n a l s f o r a 0 to 40V output.

volt o u t p u t of t h e Model 6 2 3 7 B is p r o t e c t e d by a fixed current limit circuit t h a t o p e r a t e s at 1 . 1 A ( 1 1 0 % of its maxim u m r a t e d o u t p u t ) . The c i r c u i t is similar t o t h e ones in t h e 20-volt supplies. (See p a r a g r a p h 5 - 4 7 f o r calibration instructions.)

3-14
3-1 5

Operation Beyond Rated Output

The s u p p l y m a y be able t o p r o v i d e voltages a n d

c u r r e n t s greater t h a n its rated m a x i m u m o u t p u t s if t h e line voltage is at or a b o v e its n o m i n a l value. O p e r a t i o n can ext e n d i n t o t h e s h a d e d areas o n t h e m e t e r f a c e s w i t h o u t d a m age t o t h e s u p p l y , b u t p e r f o r m a n c e c a n n o t be g u a r a n t e e d t o m e e t s p e c i f i c a t i o n s . If t h e line voltage is m a i n t a i n e d in t h e u p p e r end of t h e i n p u t voltage range, h o w e v e r , t h e supply p r o b a b l y will o p e r a t e w i t h i n its s p e c i f i c a t i o n s .

3-8
3-9

Tracking Ratio Control

With the T R A C K I N G R A T I O c o n t r o l in t h e

FIXED p o s i t i o n , t h e voltage of t h e 20V s u p p l y t r a c k s t h a t of the + 2 0 V s u p p l y w i t h i n 1% f o r c o n v e n i e n c e in varying the s y m m e t r i c a l voltages n e e d e d by o p e r a t i o n a l amplifiers a n d o t h e r circuits using b a l a n c e d positive a n d negative inputs. T u r n t h e T R A C K I N G R A T I O c o n t r o l c o u n t e r c l o c k wise o u t of t h e F I X E D p o s i t i o n t o set t h e voltage of t h e - 2 0 V supply lower t h a n t h a t of t h e + 2 0 V s u p p l y . The negative s u p p l y can be set f r o m a m i n i m u m of less t h a n 0 . 5 volts t o a m a x i m u m w i t h i n 10% of t h e + 2 0 V s u p p l y ' s o u t p u t . Once this is d o n e , t h e 2 0 V V O L T A G E c o n t r o l still c o n t r o l s b o t h o u t p u t s and m a i n t a i n s a c o n s t a n t r a t i o b e t w e e n their voltages.

3-16
3-1 7

Connecting Loads
C o n n e c t each l o a d t o t h e p o w e r s u p p l y o u t p u t

t e r m i n a l s using s e p a r a t e pairs of c o n n e c t i n g w i r e s . This minimizes m u t u a l c o u p l i n g b e t w e e n loads a n d t a k e s full a d v a n t a g e of the l o w o u t p u t i m p e d a n c e of t h e s u p p l y . Load wires m u s t be of a d e q u a t e l y heavy gauge t o m a i n t a i n s a t i s f a c t o r y r e g u l a t i o n a t t h e l o a d . Make e a c h pair of c o n n e c t i n g wires as s h o r t as possible a n d t w i s t o r shield

79

t h e m t o r e d u c e noise p i c k - u p . If shielded wire is used, c o n n e c t o n e e n d of t h e shield t o t h e p o w e r supply ground terminal a n d leave t h e o t h e r end u n c o n n e c t e d . 3-18 If load c o n s i d e r a t i o n s require locating o u t p u t p o w e r d i s t r i b u t i o n t e r m i n a l s at a distance f r o m t h e power s u p p l y , t h e n t h e p o w e r s u p p l y o u t p u t terminals should be c o n n e c t e d t o t h e r e m o t e d i s t r i b u t i o n terminals by a pair of twisted o r shielded wires a n d each load should be c o n n e c t e d t o t h e r e m o t e d i s t r i b u t i o n t e r m i n a l s separately.

3-24

Reverse C u r r e n t Loading. An active load connect-

ed to the power s u p p l y m a y actually deliver a reverse current t o t h e supply during a p o r t i o n of its operating cycle. An external source c a n n o t be allowed to p u m p c u r r e n t into t h e supply w i t h o u t risking loss of regulation and possible damage to the o u t p u t c a p a c i t o r . T o avoid these effects, it is necessary t o preload t h e supply with a d u m m y load resistor so t h a t the p o w e r s u p p l y delivers c u r r e n t through the entire operating cycle of the toad device. 3-25 Reverse Voltage P r o t e c t i o n . Internal diodes connected with reverse p o l a r i t y across t h e o u t p u t terminals p r o t e c t the o u t p u t e l e c t r o l y t i c capacitors and the driver transistors f r o m t h e e f f e c t s of a reverse voltage applied across a supply o u t p u t . Since series regulator transistors c a n n o t w i t h s t a n d reverse voltage either, d i o d e s are also c o n n e c t e d across t h e m . When operating supplies in parallel, these diodes p r o t e c t an u n e n e r g i z e d supply t h a t is in parallel with an energized s u p p l y .

3-19
3-20

Parallel Operation
T w o o r m o r e p o w e r supplies can be c o n n e c t e d in

parallel t o o b t a i n a t o t a l o u t p u t c u r r e n t greater t h a n t h a t available f r o m o n e s u p p l y . T h e total o u t p u t c u r r e n t is the sum of the o u t p u t c u r r e n t s of t h e individual supplies. The o u t p u t voltage c o n t r o l s of o n e p o w e r s u p p l y should be set t o t h e desired o u t p u t voltage, a n d the o t h e r s u p p l y set for a slightly larger o u t p u t voltage. T h e supply set t o t h e lower o u t p u t voltage will act as a c o n s t a n t voltage source, while t h e supply set t o t h e higher o u t p u t will act as a currentlimited source, d r o p p i n g its o u t p u t voltage until it equals t h a t of t h e o t h e r s u p p l y . T h e c o n s t a n t voltage source will deliver o n l y t h a t f r a c t i o n of its r a t e d o u t p u t c u r r e n t necessary t o fulfill t h e total c u r r e n t d e m a n d .

2.75A

3-21

Special Operating Considerations

3-22 Pulse Loading. T h e p o w e r s u p p l y will a u t o m a t i cally cross over f r o m c o n s t a n t - v o l t a g e t o current-limit o p e r a t i o n in response t o an increase in t h e o u t p u t c u r r e n t over t h e preset limit. A l t h o u g h t h e preset limit m a y be set higher t h a n t h e average o u t p u t c u r r e n t , high peak currents as occur in pulse loading m a y e x c e e d the preset c u r r e n t limit and cause crossover t o o c c u r a n d d e g r a d e p e r f o r m a n c e , 3-23 O u t p u t C a p a c i t a n c e . An internal c a p a c i t o r across the o u t p u t terminals of t h e p o w e r s u p p l y helps t o supply high-current pulses of s h o r t d u r a t i o n during constant-voltage o p e r a t i o n . Any c a p a c i t a n c e a d d e d externally will improve t h e pulse c u r r e n t c a p a b i l i t y , b u t will decrease t h e load p r o t e c t i o n provided by t h e c u r r e n t limiting circuit. A high-current o u t p u t pulse m a y d a m a g e load c o m p o n e n t s b e f o r e t h e average o u t p u t c u r r e n t is large e n o u g h t o cause the c u r r e n t limiting circuit to o p e r a t e .
SHORT CIRCUIT CURRENT MAY VARY 1 5 % FROM UNIT TO UNIT (AMPERES )

NOTE: THE LOWER END-POINT OF THE CURRENT LIMIT LINE IS NOT ADJUSTABLE; THE UPPER-END POINT IS SET AT THE FACTORY FOR 2.75A 5 % . BETWEEN ITS END-POINTS, THE ACTUAL CURRENT LIMIT IS A STRAIGHT-LINE FUNCTION.

Figure 3-3. C u r r e n t L i m i t Characteristics of t h e 6 V S u p p l y (Model 6 2 3 6 B )

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Appendix H

SPICE Examples
In this appendix we give examples of the use of SPICE in the design and simulation of analog circuits. These examples have been written for hspice from Avant! Corporation (see Appendix L), but they are also compatible with PSpice Evaluation Version 8.0. Information on SPICE is available in many books, including: Introduction to Electric Circuits, by Richard C. Dorf and James A. Svoboda (Fourth Ed., Wiley, 1998), Introduction to PSpice Manual for Electric Circuits, by James W. Nilsson and Susan A. Riedel (Fourth Ed., Prentice Hall, 2000), and SPICE by Paul W. Tuinenga (Third Ed., Prentice Hall, 1995). We assume in this appendix that the reader has a basic understanding of SPICE, either from a presentation in a class or from reading the books cited above. We will introduce you to the use of SPICE in circuit design and simulation and demonstrate the generation of graphical results by a postprocessor. Shown here are example graphics produced by AvanWaves by Avant!, but similar results can be generated by PROBE, the graphical postprocessor for PSpice. Detailed examples of transient and frequency response analysis are first given for a second-order passive low-pass filter circuit, followed by less detailed examples for other filter circuits.

H.l

Simulation of a Second-Order Low-Pass Filter

Consider the second-order RLC low-pass filter of Figure 2.1 in Project 2. The first step in simulating this circuit is to label the circuit nodes, as shown in Figure H.l. First consider a time-domain transient response analysis of this circuit. Open a text editor on your computer system to create the SPICE command file, commonly known as a "netlist." The name for this file is typically given an extension of ".cir" although this is not required by hspice. The file created for transient analysis is the following, which will be described in detail next:

81

+ o V - O

AA/V390 Q

(D

R2

-AAAr
100 n

< D

_/YYY\__

Li

100 mH

-o + Ci V, out -O -

0.1 j^F

Figure H.l: RLC circuit with nodes labeled for SPICE analysis
S e c o n d - O r d e r Low-Pass * Transient response * E l e m e n t +node - n o d e Rl 1 2 Rs 2 3 LI 4 3 Cl 4 0 Vin 1 0 Filter

value 390 100 100M IC=0 O . l u IC=0 PULSE ( 0

* Transient analysis .TRAN 0.01M 3M 0 0.01M UIC .OPTIONS POST .END

The first line of the file is the title of the SPICE simulation. The lines beginning with asterisks (*) are comments used to explain the purpose of the simulation and the commands used. Comments should be used liberally so that it is easier to understand the simulation, particularly if you need to review the simulation several days or weeks after it was created. Four commands define components Ri, Rs, L\, and Ci, indicating the nodes to which they are connected and their values. For the capacitor and inductor, the final argument IC=0 indicates that the associated initial condition is zero (capacitor voltage or inductor current). The command beginning with Vin indicates a PULSE source, which has the following syntax:
PULSE(VI V2 TD TR TF PW PER)

where:

82

Parameter
VI V2 TD TR TF

P W
PER

Definition Default Initial value Pulse value Delay time 0.0 Rise time TSTEP Fall time TSTEP Pulse width TSTOP Period

Units Volts or Amps Volts or Amps Seconds Seconds Seconds Seconds

Thus, t h e following c o m m a n d : Vin 1 0 PULSE ( 0 1 0 IP IP)

specifies initial value 0 V, pulse value 1 V, delay time of 0 seconds, and rise and fall times of 1 picosecond. For more information on the PULSE source, consult one of the SPICE references given above. To perform a transient analysis, the .TRAN command is used, which has the syntax:
.TRAN TSTEP TSTOP <TSTART> <UIC>

where TSTEP is the printing or plotting time increment and the computing increment for the post-processor. TSTOP is the final time and TSTART is the initial time. If TSTART is omitted, it is assumed to be zero. The transient analysis always begins at time zero. UIC (use initial conditions) is an optional keyword that indicates that the user does not want SPICE to solve for the quiescent operating point before beginning the transient analysis. If this keyword is specified, SPICE uses the values specified using IC=. . . on the various components as the initial transient condition and proceeds with the analysis. Thus, the command
.TRAN 0.01M 3M 0 UIC specifies a transient analysis with TSTEP of 0.01 ms, TSTOP of 3 ms, TSTART of 0 s, a n d t h e initial conditions specified for t h e components are t o b e used.

Finally, the . OPTIONS POST command specifies the generation of the data files needed by the awaves postprocessor and the required .END command completes the input file. Assuming that the input file was named s p l . c i r , hspice is executed on this file by typing the command hspice s p l . c i r >! s p l . o u t at the command line, which redirects program output and error output to the file s p l . out. Also generated is the file s p l . t r O which contains the post-processor data on the transient analysis. The AvanWaves post-processor is executed by typing the command awaves spl & A plot of the generated transient response is given in Figure H.2.
83

Figure H.2: Second order low-pass filter transient response

84

Now consider a frequency response analysis of this circuit. The complete SPICE input file is presented below and then discussed:
S e c o n d - O r d e r Low-Pass * Frequency response E l e m e n t +node - n o d e Rl 1 2 Rs 2 3 LI 3 4 CI 4 0 Vin 1 0 * AC a n a l y s i s .AC DEC 100 100 100K .PRINT VDB(4), VP(4) .OPTIONS POST .END Filter

value 390 100 100M 0. lu AC

The frequency response analysis requires that the source be changed to an AC source. Note that if this source is given an amplitude of 1 V, then the output voltage will be the same as the frequency response of the circuit. Thus, we define the source as:
Vin 1 0 AC 1

indicating that the positive node is 1, the negative node is 0, the source type is A and the C magnitude is IV. A frequency response analysis is generated with the the . AC command, which has the syntax:
.AC DEC ND FSTART FST0P

where DEC specifies decade frequency variation and N is the number of frequency samples per D decade. FSTART is the starting frequency and FST0P is the final frequency. Note that in order for this analysis to be meaningful, at least one independent source must have been specified with an A value. In the example above, we use the command C
.AC DEC 100 100 100K

which generates 100 samples per decade change in frequency, with a frequency range of 100 Hz to 100 kHz. The .PRINT command is included in this example to specify the that dB magnitude and phase of node 4 be generated and made available to the post-processor. The resulting frequency response plot produced by awaves is shown in Figure H.3.

85

86

H.2

Simulation of a Second-Order RLC Bandpass Filter

Consider the simulation of the second-order RLC bandpass filter discussed in Project 2 and rhown in Figure 2.5, which includes a practical inductor having a non-zero series resistance. While we are interested in performing a frequency response analysis, the main objective of this example is to demonstrate methods for computing component values from defined parameter values. The SPICE input file is shown below. By comparison with Figure 2.5, you can determine the node numbering that was used.
Second-Order Bandpass * Frequency response * Variables .PARAM R0=63.662 .PARAM f0=100KHZ .PARAM Q=2.0 .PARAM T P I = 6 . 2 8 3 1 8 element VI Rl LI RS Cl node 4 4 2 3 2 node v a l u e 0 AC 1 0 2 R= ' R 0 / Q ' 3 L= ' R 0 / ( T P I * f 0 ) ' 0 R= ' ( R 0 / Q ) / 1 0 ' 0 C= ' 1 / ( T P I * f 0 * R 0 ) ' Filter

.AC DEC 200 100 100MEG .PRINT VDB(2), VP(2) .OPTIONS POST .END

The . PARAM commands define variable names and their corresponding values. These variables are then used in functions that determine the component values in the circuit. The resulting frequency response plot is shown in Figure H.4.

H.3

Use of the . S U B C K T Command

A subcircuit that consists of SPICE elements can be defined and referenced in a fashion similar to that for other circuit components. The subcircuit is defined in the netlist file by a grouping of element commands; the program then automatically inserts the group of elements wherever the subcircuit is referenced. There is no limit on the size or complexity of subcircuits, and subcircuits may contain other subcircuits.

87

88

The definition of a subcircuit begins with the . SUBCKT command, which has the following general form:
.SUBCKT subname N1 N2 N3 ...

where subname is the subcircuit name, and Nl, N2, N3, . . . are the external nodes, which cannot be zero. The group of element commands which immediately follow the .SUBCKT command define the subcircuit. The last command in a subcircuit definition is the .ENDS command. Control commands may not appear within a subcircuit definition; however, subcircuit definitions may contain anything else, including other subcircuit definitions, device models, and subcircuit calls (see below). Note that any device models or subcircuit definitions included as part of a subcircuit definition are strictly local (i.e., such models and definitions are not known outside the subcircuit definition). Also, any element nodes not included on the .SUBCKT command are strictly local, with the exception of 0 (ground) which is always global. The . ENDS command has the general form:
.ENDS subname

This command must be the last one for any subcircuit definition. The subcircuit name, if included, indicates which subcircuit definition is being terminated; if omitted, all subcircuits being defined are terminated. The name is needed only when nested subcircuit definitions are being made. Subcircuits are used in SPICE by specifying pseudo-elements beginning with the letter X and an optional appended label, followed by the circuit nodes to be used in expanding the subcircuit, and ending with the subcircuit name:
X<label> Nl N2 N3 . . . subname

Consider preparing a subcircuit netlist for the non-ideal, frequency-dependent op-amp circuit discussed in Appendix J and shown in Figure J.5. This circuit is redrawn in Figure H.5 with the nodes labeled for SPICE simulation.

89

0 o-

R < v, i p-n

Figure H.5: Non-Ideal, frequency-dependent op-amp equivalent circuit, labeled for SPICE analysis The external nodes, labeled 1, 2, and 3 are the noninverting input, the inverting input, and the output, respectively. Nodes that will be local to the subcircuit are labeled 4, 5, and 6. The subcircuit netlist is given below, assuming typical 741 op-amp parameters: R{ = 2 MQ. R0 = 75 O, A0 = 2 x 10, and an open-loop cutoff frequency of / i = 5 Hz, which is modeled by R = 1 CL and C = 0.03183 F. The subcircuit is named NOpAmp and comments have been used to identify the external nodes.
* N o n - I d e a l op-amp s u b c i r c u i t * n o n - i n v e r t i n g i n p u t (+) * I inverting input (-) * | | output

I I I
3

.SUBCKT NOpAmp 1 2 Ri 1 2 2MEG Ei 4 0 1 2 1 R 4 5 1 C 5 0 0.03183 E0 6 0 5 0 200K R0 6 3 75 .ENDS

Now consider using this subcircuit to simulate the dual op-amp circuit shown in Figure H.6, labeled for SPICE analysis. The SPICE command file is:
Dual op-amp circuit

* Component d e f i n i t i o n s Rl 1 2 10K Cl 2 7 0 . 1 5 u RF1 3 4 0 . 0 1 XI 2 3 4 NOpAmp

90

C,

-If

F i g u r e H . 6 : Dual op-amp circuit with nodes labeled for SPICE analysis

R2 C2 RF2 X2 Vi

4 5 6 5 1

5 0 7 6 0

10K 0.0068u 0.01 7 NOpAmp AC 1

* N o n - I d e a l op-amp s u b c i r c u i t * n o n - i n v e r t i n g i n p u t (+) * | inverting input (-) * | | output

I I I
3

.SUBCKT NOpAmp 1 2 Ri 1 2 2MEG Ei 4 0 1 2 1 R 4 5 1 C 5 0 0.03183 E0 6 0 5 0 200K RO 6 3 75 .ENDS .AC DEC 100 100 100K .PRINT VDB(7), VP(7) .OPTIONS POST .END

Notice that the left op-amp is defined as component XI and the right op-amp is defined as component X2, both referencing the NOpAmp subcircuit. The direct feedback paths from output to inverting input for both op-amps is defined by a resistance of 0.01 7, as hspice does not have
91

a definition for an ideal wire. The frequency response generated by the awaves postprocessor is shown in Figure H.7. An analysis of the circuit of Figure H.6 assuming ideal op-amps would show that it is a second order low-pass filter, which is confirmed by the magnitude response up to about 20 kHz. The decreased attenuation above 20 kHz is caused by the non-ideal properties of the op-amps.

Figure H.7: Frequency response of dual op-amp circuit. The upper plot shows the magnitude in dB, and the lower plot shows phase in degrees.

92

Appendix I

Operational Amplifier D a t a
This appendix provides design data for the operational amplifiers you will use in the laboratory. Information is first provided on how to understand this data.

1.1

Understanding Operational Amplifier Data Sheets

To be able to design circuits and systems from integrated circuits, you will need to learn how to read and understand the data sheets provided by the IC manufacturers. In many cases, this will be the only information on which to base your design. In this section, a short guide to understanding IC data sheets is provided. The guide primarily provides definitions of the terms and symbols used for analog ICs (based on the 741 operational amplifier). In reading this description, refer to the data sheet from National Semiconductor for the LM741 given in Section 1.2 You must be warned that data sheets are often incomplete or incorrect. They may have been based on an early prototype of the device and not have been changed when the final device specifications were established. They are often written hurriedly and with little attention to detail by someone in marketing who was given incomplete or incorrect information by the designer. Unfortunately, these data sheets are not often revised when a new edition of a data book is published. Thus, you must read the data sheets critically. When the information is incomplete, you may need to make some measurements on the device to determine its true characteristics. Be alert for errors. Some data sheets have even given the wrong pin assignments for a device, which can lead to damage to the device if connected in this way. If there is a second source for the device, check the data sheet from this source for inconsistencies. 1.1.1 General Description

The general description provides a short description of the basic characteristics of the device. This is read to determine if the device has characteristics that suggest it should be considered

93

for use in a design that you are developing. 1.1.2 Schematic and Connection Diagrams

Complete schematics are given for many analog ICs, which also provide notation and pin assignments for inputs and outputs. Analog ICs are often provided in several packages, so the connection diagrams are provided for each of these. 1.1.3 Absolute Maximum Ratings

The absolute maximum ratings are values of operating parameters beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits, but below them by a reasonable safety margin. The device can usually be expected to rapidly fail if this warning is not heeded. 1.1.4 Electrical Characteristics

The table of electrical characteristics provides information on input and output voltages and currents. The columns labeled "min" and "max" specify the minimum and maximum voltages or currents that the device will provide. The column labeled "typ" lists typical or average values. The following are definitions of the most important parameters listed in the table. Input offset voltage: That voltage which must be applied between the input terminals through two equal resistances to obtain zero output voltage. See Figure 1.1(a). Input offset current: The difference in the currents into the two input terminals when the output is at zero. See Figure 1.1(b). Input bias current: The average of the input currents. See Figure 1.1(b). Input resistance: The ratio of the change in input voltage to the change in input current on either input with the other grounded. See Figure 1.1(a). Input voltage range: The range of voltages on the input terminals for which the amplifier operates within specifications. Large signal voltage gain: The ratio of the output voltage swing to the change in input voltage required to drive the output from zero to this voltage. O u t p u t voltage swing: The peak output voltage swing, referred to zero, that can be obtained without clipping. O u t p u t short circuit c u r r e n t : The maximum output current available when the output is shorted to ground or to either supply. Common-mode rejection ratio: The ratio of the input common-mode voltage range to the peak-to-peak change in input offset voltage over this range.

94

Figure LI: (a) An equivalent circuit for an operational amplifier showing the effect of input resistance, output resistance, and input voltage offset, (b) Equivalent circuit for the input currents to an operational amplifier.

95

Supply voltage rejection ratio: The ratio of the change in input offset voltage to the change in power supply voltages producing it. Transient response: The closed-loop step-function response of the amplifier under smallsignal conditions. B a n d w i d t h : That frequency at which the voltage gain is reduced to 0.707 times the low frequency value. Slew rate: The internally-limited rate of change in output voltage with a large amplitude step function applied to the input. Supply current: The current drawn from the power supply by the operational amplifier when the output current and voltage are essentially zero.

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1.2

LM741 Data Sheet

National Semiconductor
August 2000

(9

LM741 Operational Amplifier

General Description
The LM741 series are general purpose operational amplifiers which feature improved performance over industry standards like the LM709. They are direct, plug-in replacements for the 709C, LM201, MC1439 and 748 in most applications. The amplifiers offer many features which make their application nearly foolproof: overload protection on the input and output, no latch-up when the common mode range is exceeded, as well as freedom from oscillations. The LM741C is identical to the LM741/LM741A except that the LM741C has their performance guaranteed over a 0C to +70C temperature range, instead of -55C to +125*C.

Features

Connection Diagrams
Metal Can Package
N C
OFFSET NULL

Dual-ln-Line or S.O. Package

OFFSET NULL
INVERTING INPUT -

INVERTING INPUT NON-INVERTING INPUT

NON-INVERTING INPUT - O F F S E T NULL

Note 1: LM741H is available per JM38510/10101

Order Number LM741H, LM741H/883 (Note 1), LM741 AH/883 or LM741CH See NS Package Number H08C Ceramic Flatpak
NC [ +0FFSET NULL -INPUT INPUT i OUTPUT -OFFSET NULL

Order Number LM741J, LM741J/883, LM741CN See NS Package Number J08A, M08A or N08E

00934103

Order Number LM741W/883 See NS Package Number W10A

Typical Application

Offset Nulling Circuit

OUTPUT

Reprinted from LM741 Operational Amplifier DataSheet, Rev. August 2000, National Semiconductor Corp. All rights reserved, reproduced by permission.
97

Absolute Maximum Ratings (Note 2)

If M i l i t a r y / A e r o s p a c e s p e c i f i e d devices are required, please c o n t a c t the National S e m i c o n d u c t o r Sales Office/ D i s t r i b u t o r s f o r availability a n d specifications. (Note 7) LM741A S u p p l y Voltage P o w e r Dissipation (Note 3) Differential Input Voltage Input Voltage (Note 4) Output Short Circuit Duration Operating Temperature Range Storage Temperature Range Junction T e m p e r a t u r e Soldering Information N - P a c k a g e (10 s e c o n d s ) J - o r H - P a c k a g e (10 s e c o n d s ) M-Package Vapor P h a s e ( 6 0 s e c o n d s ) Infrared (15 s e c o n d s ) 215'C 215'C 215C 215C 215'C 215'C 260C 300'C 260C 300'C 260C 300'C 22V 500 mW 30V 15V Continuous - 5 5 ' C to + 1 2 5 ' C - 6 5 ' C to + 1 5 0 ' C 150'C LM741 2 2V 5 0 0 mW 30V 15V Continuous - 5 5 ' C to + 1 2 5 ' C - 6 5 C to + 1 5 0 ' C 150C LM741C 18V 5 0 0 mW 30V 15V Continuous 0 ' C to +70C - 6 5 C to + 1 5 0 ' C 100'C

S e e AN-450 " S u r f a c e Mounting M e t h o d s and Their Effect on Product Reliability" for other m e t h o d s of soldering surface mount devices. ESD Tolerance (Note 8) 400V 400V 400V

Electrical Characteristics (Note 5)

Parameter Conditions Min Input Offset Voltage T a = 25'C R s < 10 kQ R s < 50Q. TAMIN - "'"a - Tamax R s < 50Q R s S 10 kH A v e r a g e Input Offset Voltage Drift Input Offset Voltage Adjustment R a n g e Input Offset Current T a = 25'C Tamin ^ T a < T A M A X Average Input Offset Current Drift Input Bias Current T a = 25'C Tamin - T a < T A M A X Input R e s i s t a n c e T a = 25'C, Vs = 20V T a min - T a < T a m a x , V s = 20V Input Voltage R a n g e T a = 25'C Tamin ^ T a < T A M A X 12 13 12 13 V V 1.0 0.5 6.0 30 80 0.210 0.3 2.0 80 500 1.5 0.3 2.0 80 500 0.8 nA PA MO MQ 3.0 30 70 0.5 20 85 200 500 20 200 300 nA nA nA/C T a = 25'C, V s = 20V 10 15 15 mV 15 4.0 6.0 7.5 mV mV pV/'C 0.8 3.0 1.0 5.0 2.0 6.0 mV mV LM741A Typ Max Min LM741 Typ Max Min LM741C Typ Max Units

98

Electrical Characteristics (Note 5) (continued)

Thermal Resistance ejA (Junction to Ambient) 9jC (Junction to Case) Cerdip (J) 100'C/W N/A

Note 3: For operation at elevated temperatures, these devices must be derated based on thermal resistance, and Tj max. (listed under "Absolute Maximum Ratings"). Tj = T A + (6,a Pd)-

DIP (N) 100'CAV N/A

H08 (H) 170"C/W 25'C/W

SO-8 (M) 195'CAV N/A

Note 4: For supply voltages less than 15V, the absolute maximum input voltage is equal to the supply voltage. Note 5: Unless otherwise specified, these specifications apply for V s = 15V. -55'C < T A s +125"C (IM7*U/LM741 A). For the LM741C/LM741E, these specifications are limited to O'C < T A fi +70'C. Note 6: Calculated value from: BW (MHz) = 0.35/Rise Time(ps). Note 7: For military specifications see RETS741X for LM741 and RETTS741AX for LM741A. Note 8: Human body model, 1.5 kfl in series with 100 pF.

Schematic Diagram

100

1.3

LM348 Data Sheet 2

National Semiconductor
November 2003

LM148/LM248/LM348 Quad 741 Op Amps

General Description
The LM148 series is a true Quad 741, It consists of four independent, high gain, internally compensated, low power operational amplifiers which have been designed to provide functional characteristics identical to those of the familiar 741 operational amplifier. In addition the total supply current for all four amplifiers is comparable to the supply current of a single 741 type op amp. Other features include input offset currents and input bias current which are much less than those of a standard 741. Also, excellent isolation between amplifiers has been achieved by independently biasing each amplifier and using layout techniques which minimize thermal coupling. The LM148 can be used anywhere multiple 741 or 1558 type amplifiers are being used and in applications where amplifier matching or high packing density is required. For lower power refer to LF444.

Features
741 op amp operating characteristics Class AB output stageno crossover distortion Pin compatible with the LM124 Overload protection for inputs and outputs Low supply current drain: 0.6 mA/Amplifier Low input offset voltage: 1 mV Low input offset current: 4 nA Low input bias current 30 nA High degree of isolation between amplifiers: 120 dB Gain bandwidth product LM148 (unity gain): 1.0 MHz

Schematic Diagram

1 pF in the LM149

Reprinted from LM148/LM248/LM348 Quad 741 DataSheet, Rev. November 2003, National Semiconductor Corp., All rights reserved, reproduced by permission.

101

Absolute Maximum Ratings (Note 4)

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

LM148 Supply Voltage Differential Input Voltage Output Short Circuit Duration (Note 1) Power Dissipation (Pd at 25C) and Thermal Resistance (9jA), (Note 2) Molded DIP (N) Pd Cavity DIP (J) Pd
9JA

LM248 18V 36V Continuous

LM348 18V 36V Continuous

22 V 44V Continuous

750 mW 100'C/W 1100 mW 110'C/W 150'C -55'C < TA < +125'C -65'C to +150'C 300'C 800 mW 110'C/W 110'C -25C < TA < +85C -65'C to +150'C 300'C 700 mW 110'C/W 100'C 0'C < TA < +70"C -65'C to +150C 300'C 260'C

Maximum Junction Temperature (T]MAX) Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering, 10 sec.) Ceramic Lead Temperature (Soldering, 10 sec.) Plastic Soldering Information Dual-ln-Line Package Soldering (10 seconds) Small Outline Package Vapor Phase (60 seconds) infrared (15 seconds) mount devices. ESD tolerance (Note 5)

260'C 215C 220'C

260'C 215'C 220"C

260'C 215C 220'C

See AN-450 "Surface Mounting Methods and Their Effect on Product Reliability'' for other methods of soldering surface

500V

500V

500V

(Note 3)

Electrical Characteristics
Parameter Conditions
T a = 25'C, R s < 10 kQ T a = 25'C T a = 25'C T a = 25'C

LM248 LM348 LM148 Min Typ Max Min Typ Max Min Typ Max 1.0 4 30 0.8 50 2.5 2.4 160 3.6 25 5.0 25 100 0.8 1.0 4 30 2.5 2.4 160 4.5 25 6.0 50 200 0.8 1.0 4 30 2.5 2.4 160 4.5 6.0 50 200

Units mV nA nA MQ mA V/mV

Input Offset Voltage Input Offset Current Input Bias Current Input Resistance Supply Current All Amplifiers Large Signal Voltage Gain Amplifier to Amplifier Coupling Small Signal Bandwidth Phase Margin Slew Rate Output Short Circuit Current Input Offset Voltage Input Offset Current

T a = 25C, V s = 15V
T a = 25'C, V s = 15V

V o u x = 10V, R L > 2 kQ T a = 25C, f = 1 Hz to 20 kHz (Input Referred) See Crosstalk Test Circuit
T a = 25"C,

-120 1.0 60 0.5 25 6.0 75

-120 1.0 60 0.5 25 7.5 125

-120 1.0 60 0.5 25 7.5 100

dB MHz degrees V/ps mA mV nA

LM148 Series T a = 25'C, LM148 Series (A v = 1) T a = 25'C, LM148 Series (A v = 1) T a = 25C R s < 10 kQ

102

Electrical Characteristics (continued)

(Note 3)
Parameter Conditions Min LM148 Typ Max Min LM248 Typ Max Min LM348 Typ Max Units

Input Bias Current Large Signal Voltage Gain Output Voltage Swing Input Voltage Range Common-Mode Rejection Ratio Supply Voltage Rejection
R s < 10 k n , 5 V < V s < 1 5 V

325 V s = 15V, V OUT = 10V, RL > 2 kn V s = 15V, R l = 10 ka RL = 2 ka V s = 15V R s < 10 k> 25 12 13 10 12 12 70 77 90 96 15 12 13 10 12 12 70 77 90 96

500 15 12 13 10 12 12 70 77 90 96

400

nA V/mV V V V dB dB

Note 1: Any of the amplifier outputs can be shorted to ground indefinitely; however, more than one should not be simultaneously shorted as the maximum junction temperature will be exceeded. Note 2: The maximum power dissipation for these devices must be derated at elevated temperatures and is dicated by TJMAX, 8JA, and the ambient temperature, TA. The maximum available power dissipation at any temperature is Pd = (TJMAX - TA)/6jA or the 25"C Pdm/w. whichever is less. Note 3: These specifications apply for V s = 1SV and over the absolute maximum operating temperature range (TL < TA < TH) unless otherwise noted. Note 4: Refer to RETS 148X for LM148 military specifications. Note 5: Human body model, 1.5 kO in series with 100 pF.

Cross Talk Test Circuit vs = isv

O*AAA I <AA/ *IS. 9.

r -55CST

.....
SC

...

z 3 o

II"

IS

= 5 >

10 IS 20 POSITIVE SUPPLY VOLTAGE (V)

00778643

103

Appendix J

Non-Ideal O p - A m p Frequency Response

This appendix describes the non-ideal frequency response properties of an op-amp. This is an important consideration when designing op-amp circuits, since it limits the maximum frequency of operation of the circuit.

J.l

Non-Ideal, Frequency-Dependent Op-Amp Model

For the ideal model, we assume that the open-loop gain of the op-amp, Ao, is a constant. In actuality, the voltage gain of an op-amp is a function of the frequency of the excitation signal. We will denote the frequency-dependent open-loop gain as A(juj) or A ( f ) . To a reasonable approximation, the op-amp can be modeled as a first-order low pass filter having a gain of

where Ao is the open-loop gain at DC and uj\ is the open-loop cutoff frequency. Typically, Ao is greater than 104 and cui is less than 100 rad/s. Notice that the gain decreases as the frequency increases. A circuit model, incorporating a finite input resistance Ri and a non-zero output resistance R0 in addition to the frequency-dependent gain is shown in Figure J.l. In the model, the voltage Vp-n is the differential voltage between the noninverting and inverting op-amp inputs. Other important parameters pertaining to the non-ideal op-amp model are the unity gain frequency, fu, and the gain-bandwidth product, GB. The unity gain frequency is the frequency at which A(fu) 1, or where the gain is equal to one. For the 741 op-amp, fu 1 MHz. The gain-bandwidth product is the product of the frequency and open-loop gain at that frequency: GB = A ( f ) f (J.2)

For the 741 op-amp, GB 106 Hz. Because the open-loop DC gain of the 741 op-amp is

105

+ o-o +

O-

+
-O +

V, p-n V;, V, out

-O -

V:r

:>A(/co)Vp.n
o-o

Vc
-

(a)

(b)

Figure J.2: (a) Open-loop-amplifier schematic; (b) Equivalent circuit model rad/s. The open-loop response has a large DC gain but a low cutoff frequency. The magnitude is equal to 1 (0 dB) at to 106 rad/s, confirming that the gain-bandwidth product of the op-amp is 106 rad/s.

120 100 80 3
vS

open-loop

60 40 20 0
10 102 103 104 105 106 i07

C (rad/s) D Figure J.3: Bode straight-line magnitude plots for the noninverting op-amp circuit, operating open-loop and closed-loop

J.2.2

Closed-loop Operation

Now consider the case of a noninverting op-amp circuit operating closed-loop. The schematic of this circuit is shown in Figure J.4(a) and the equivalent circuit model is shown in Figure J.4(b). The analysis of the circuit model proceeds as follows. Denote the node voltage at the
107

J.3

SPICE Analysis Using the Non-Ideal Model

Now that we have established the frequency-dependence of a non-ideal op-amp, how do we incorporate these effects into a SPICE model? In the following section, we show that the lowpass behavior of a non-ideal op-amp can be simulated simply by incorporating a resistor and capacitor into the SPICE model. J.3.1 S P I C E Equivalent Circuit

An equivalent circuit for SPICE analysis of the non-ideal, frequency-dependent op-amp model is shown in Figure J.5. The circuit accounts for a finite input resistance (Ri), non-zero output resistance (R0), and first-order low-pass frequency response. The frequency response characteristics are modeled by the additional dependent voltage source and series RC subcircuit. The goal is to determine the values of R and C that we must choose to obtain the proper response. This is done by analyzing the circuit and relating the values of R and C to the op-amp open-loop cutoff frequency, uj\.

+
o-

R0 A/W

o +

i <

P - n

V,

!>A

Vn

-o

Figure

J.5:

Non-ideal op-amp equivalent circuit

Applying the voltage divider relationship to the RC subcircuit yields

v,
v

v**7 y - 1 + iA..n R+l/juC

d , 1 P~
n

juRC

pn

(J.19)

Assuming the output is an open circuit as shown in the figure (i.e. no load resistor), the output voltage of the op-amp is

and the frequency response is H(ju)

Vo

Vp_n

Ao 1 + jujRC

(J.21)

Note that the frequency response in Equation (J.21) is the same as that in Equation (J.l)
110

provided that
Ul =

(J-22)

Thus, in the equivalent circuit, it is necessary to choose values of R and C such that RC = l/u>\. Since the circuit will only be used for SPICE analysis, we will choose R = 1 Cl and then C can be calculated from C = (J.23) For example, the 741 op-amp has an open-loop DC gain of Aq = 2 x 105 and a gain-bandwidth product of GB = 1 MHz, which yields an open-loop cutoff frequency of approximately 5 Hz, or 107T rad/sec (refer to Equation J.3). For our SPICE model, we choose R = 1 Cl. The value of C we should choose is then C = ~ = 0.03183 F (J.24)
10?r
v

'

J.3.2

S P I C E Analysis Example

As an example, consider the inverting amplifier, based on a 741 op-amp, shown in Figure J.6. The corresponding equivalent circuit, prepared for SPICE analysis, is shown in Figure J.7. Notice that, for the inverting amplifier, the positive terminal of the input source is connected to the inverting input of the op-amp. This means that the voltage at node 2 is V(2) = V p _ n . To account for this, the dependent source controlled by V(2) has been flipped so that the negative terminal is connected to node 3. R2

A/W

V,out
O -

Figure J.6: Inverting amplifier

Assume the following parameters for the 741 op-amp: Aq = 2 x 10, / i = 5 Hz, Ri 2 MO, and R0 = 75 Cl. The SPICE input file for performing a frequency response analysis of the circuit is as follows:

111

Figure J.7: Inverting amplifier equivalent circuit for SPICE analysis

N o n - i d e a l op-amp SPICE a n a l y s i s Rl 1 2 10K Rl 2 0 2MEG R2 2 6 100K E3 3 0 2 0 1 R3 3 4 1 C3 4 0 0 . 0 3 1 8 3 E5 0 5 4 0 200K RO 5 6 75 RL 6 0 IK VS 1 0 AC 1 .AC DEC 40 100 10MEG .PRINT VDB(6), VP(6) .OPTIONS POST .END

The resulting frequency response plot for the output (node 6) generated from awaves is shown in Figure J.8. Using the measurement feature of awaves, the 3-dB cutoff frequency of the inverting amplifier circuit is found to be 83.9 kHz.

112

113

K.3

Useful Circuits

Using this design procedure, only two types of circuits are required to implement the transfer functions: an inverting summing integrator and a positive summing amplifier. K.3.1 Inverting Summing Integrator

Figure K.3 shows the block diagram of an inverting summing integrator. Each input voltage, Vi( 5 )---ln(s), experiences a corresponding gain K\...Kn. The voltages are then summed and the result is integated and inverted (w0/s). The output is then
n

V0(s) = -^J^KiViis), i=i

Ki> 0

(K.19)

Figure K.3: Inverting summing integrator block diagram Figure K.4 shows the op-amp implementation of the inverting summing integrator. This circuit is analyzed as follows. Assuming the ideal op-amp model, writing an s-domain node equation at the inverting input yields

Ki Solving for V0(s):

2X2

-tin

z=l

Thus, we choose the following values for C and Rf. C =

awo

(K.22

117

Figure K.4: Op-amp implementation of an inverting summing integrator = | (K.23)

where a is a scaling factor that is chosen to yield practical values for Ri and C. The amplifier output is then: V(s) = - ^ T ^ V i i s ) s a ii n Ur (K.24)

-TE^W
s

i=l

K.3.2

Positive S u m m i n g Amplifier

Figure K.5 shows the block-diagram for a positive summing amplifier. The output of this circuit is n Vo{s) =
i= 1

KiVi(s),

Ki> 0

(K.25)

The op-amp implementation of the positive summing amplifier is shown in Figure K.6. The circuit is analyzed as follows. Denote the node voltage at the noninverting input as V+. Using the ideal op-amp model, V+ is related to the output voltage, V0, by a voltage divider across Ra and Rt' K-a ~r Mb
118

R,

Figure K.6: Op-amp implementation of positive summing amplifier

119

Therefore, the resistor values Ri can be arbitrarily scaled by a constant without affecting the circuit output. In Equation (K.33), notice that all of the terms on the right-hand side are constant for all values of i except for K\. Therefore the requirement for Ri can simply be written as Ri = jr( <K'35) where a is a constant chosen to yield reasonable resistor values. To determine the required values of Ra and R^, first sum the coefficients K( over i l...n:

= *=1

R j ^ R i
n
1

D = 1+ |

(K.36)

Rn We then have Rg Rb i=i This provides the design equation for the choice of the ratio of Ra and R

121

Appendix L

PSpice a n d H S P I C E C o m m a n d s for a General Transfer Function

In this appendix, PSpice and HSPICE commands are described for a general transfer function element. These commands are simply extensions of the voltage controlled voltage source (VCVS) commands. PSpice has six keywords (POLY, VALUE, TABLE, LAPLACE, FREQ, and CHEBYSHEV) that can be added to the definition of either a voltage-controlled-voltage source (E) or a voltage-controlled-current source (G). HSPICE accepts the two keywords POLY and LAPLACE. Both PSpice and HSPICE work the same with the POLY function and allow POLY not only on "E" and "G" controlled sources, but also on "F" and "H" controlled sources. The reader is referred to either the HSPICE or PSpice manuals for a description of the use of POLY. In this appendix we will concentrate on the use of LAPLACE. Unfortunately PSpice and HSPICE use slightly different syntax for LAPLACE, so we will treat the two separately.

L.l

PSpice

The evaluation version of PSpice has a full implementation of the various options for controlled sources "E" and "G". These options are summarized below: POLY The standard SPICE non-linear controlled source which works both in PSpice and HSPICE with all four controlled sources (E, F, G, and H). See the appropriate Spice manual for the details on the use of POLY. VALUE Available only in PSpice, this is used with the E and G source as a much better alternative to POLY for defining non-linear sources. The VALUE keyword is followed by an equal sign and an expression enclosed in curly brackets. The expression can be any mathematical function of any valid currents or voltages in the circuit. For example, to calculate the power through an independent source between nodes (0,2), we add to our netlist the controlled source "Epwr" between nodes 5 and 0:
Epwr ( 5 , 0 ) VALUE = { V ( 0 , 2 ) * I ( V 0 ) >

122

TABLE Available only in PSpice, this is similar to VALUE except that the function is expressed ES a table rather than a mathematical function (see PSpice manual). L L A P L A C E Available in a slightly different form on HSPICE, this keyword is followed in PSpice by: 1. any valid voltage in the circuit enclosed in curly brackets (this will be the input to the LAPLACE function), 2. an equal sign, and 3. an algebraic expression in "s" for the Laplace transform function.

Thus we could pass the voltage V(l) through a circuit block with Laplace transform H{s) 1 /(LCs2 + RCs + 1) yielding an output voltage between nodes (2,0) with the following PSpice command:
E o u t ( 2 , 0 ) LAPLACE { V ( l ) > = { 1 / ( L * C * s * s + R * C * s + l ) >

F R E Q This is available in PSpice and is similar to LAPLACE, but the frequency response is expressed as a table rather than a mathematical expression (see PSpice manual), C H E B Y S H E V This automatically enters the appropriate LAPLACE transform for a Chebyshev equal-ripple filter (see PSpice manual).

L.2

HSPICE

HSPICE has both the POLY command and the LAPLACE command discussed in the last section. The POLY command operates exactly as in PSpice. The LAPLACE command in HSPICE has two forms: a general form similar to PSpice and a pole-zero form. The general form defines the transfer function in ratio of polynomials of the form
m m 1 ( H(s)x = bms n + bm.1s - ; + -" + b0 ans + a _ i s + * + ao
n _ 1 n

(L.l

where and {a^} are the real coefficients of the transfer function. The corresponding HSPICE command is E<name><node +><node - > LAPLACE <in + Xin -> 60,61,..., bm / a 0 , a i , . . . , a n

where <node -f-> and <node - > are the output nodes and <in +> and <in - > are the input nodes.

123

124

Appendix M

C o m p o n e n t Costs
The following tables provide approximate costs of the capacitors, resistors, and op-amps used to implement your circuits. These costs are based on small-quantity (1-10) purchases of the components, and prices given are the price per part. 1

Source: Digi-Key Corp., Thief River Falls, MN. Catalog Edition Sept.-Dec. 2004, pp. 523-524, 811, 904, 967.

125

Resistors: Carbon, 1/4 watt, 5% Metal Film, 1/4 watt, 1% Operational Amplifiers: LM741C op-amp LM348N quad 741 op-amp

0.07 0.17

$0.68 1.01

126

THIRD

EDITION

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