Chapter 5: Shift Register Polynomial Division

Modulo 2 operations
In this chapter, it is important to learn some coding theory. Say we have a binary bit stream like so: R = 1011001 We can treat the following as a polynomial with dummy variables as follows in this equation:

It is also important to review modulo 2 addition: 0+0=0 0+1=1 1+0=1 1+1=0 Within our modulo 2 system, addition with polynomials, for example is done like so:

Multiplication done with the modulo 2 system using polynomials example:

In the division of polynomial P(x) by G(x), there must also be a quotient Q(x) and a remainder R(x). This is depicted in the formula below.

As an example, for P(x) = x7 + x6 + x +1 and G(x) = x3 +1 below, we calculate the quotient Q and remainder R. x4 + x3 + x +1
7 6 x3 +1 x + x + x +1

x7 + x4 x6 + x4 + x x6 + x3 + x x4 + x3 + x x4 + x x3 x3 +1 1 A LFSR, or linear feedback shift register can be used to test circuits. A linear feedback shift register looks much like a normal register, except that certain bits are the function of other bits in the previous state. Much like the tests described in chapter 4, an LFSR is fed the output of a circuit under test, generating a signature. This signature is compared to signatures of another circuit known to behave normally. The amazing thing here is that the LFSR performs polynomial division, and that the remainder of this division operation is used as the signature.

Figure 5-1: Circuit testing using LFSR A notable thing about LFSRs is the fact that it can be used to find modulo 2 polynomial division remainders. The LFSR in figure 5-2 represents division by G(x) = x5+x3+x2+1. In table 5-1, the input P=11001110 is sequentially fed into the circuit, with high order terms fed in first. By the end of clock cycle 8, the remainder R(x)=01101 remains in stored in the register's flip-flops.

figure 5-2: a diagram of a LFSR implementing division by polynomial x5+x3+x2+1 Clock Input x0 x1 x2 x3 x4 0 N/A 0 0 0 0 0 1 1 1 0 0 0 0 2 1 1 1 0 0 0 3 0 0 1 1 0 0 4 0 0 0 1 1 0 5 1 1 0 0 1 1 6 1 0 1 1 1 1 7 1 0 0 0 0 1 8 0 1 0 1 1 0 Table 5-1: LFSR states for LFSR described in figure 5-2 during division of P=11001110
However, like other test compression methods, there exists a possibility of masking/aliasing. For in input P, there will exist a remainder R when divided by G. Inputs that create the same remainder can be generated with a simple linear function. P prime, an input that is not P will always mask if P`(x) = E(x) + P(x), where E(x) is G(x) times a polynomial multiplier

The following is a table of error polynomials that are undetectable for P(x) = x7 + x6 + x3 + x2 + x and divisor G(x) = x5 + x3 + x2 +1 P(x) = x7 + x6 + x3 + x2 + x Multiplier E(x) 1 x x+1 x2 x2 +1 x2 + x x2 + x +1 Table 5-2 x5 + x3 + x2 +1 x6 + x4 + x3 + x x6 + x5 + x4 + x2 + x +1 x7 + x5 + x4 + x2 x7 + x4 + x3 +1 x7 + x6 + x5 + x3 + x2 + x x7 + x6 + x +1 G(x) = x5 + x3 + x2 +1 P`(x) = E(x) + P(x) x7 + x6 + x5 + x +1 x7 + x4 + x2 x7 + x5 + x4 + x3 +1 x6 + x5 + x4 + x3 + x x6 + x4 + x2 + x +1 x5 x3 + x2 + 1

Problems
1. Convert the binary bit stream 1010111101 into a polynomial. 2. Convert the polynomial x9+x7+x3+1 into a binary bit stream. 3. Do the the error polynomials in table 5-2 really generate the same signature as P(x)? Prove it by dividing each E(x) in the table by G(x). 4. a) Draw a LFSR that implements division by a polynomial G=x6+x3+x2+1 b) Find the remainder when you divide it by polynomial P=x8+x7+x3+1 c) Find 7 error polynomials using the method shown in table 5-2 5. a) Draw a LFSR that implements division by a polynomial G=x7+x5+1 b) Find the remainder when you divide it by polynomial P=x9+x4+x3 c) Find 7 error polynomials using the method shown in table 5-2