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TD035STED6
Ver 0.00

TFT LCD Specification Model NO.: TD035STED6

TENTATIVE

Customer Signature

Date

Table of Contents
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NO. Cover Sheet Table of Contents Record of Reversion 1 2 3 4 5 6 7 8 9 10 11 12 13 Features General Specification Input / Output Terminals Absolute Maximum Ratings Electrical Characteristics Block Diagram Timing Chart Power On/Off Sequence Optical Characteristics Reliability Handling Cautions Mechanical Drawing Packing Drawing Item Page 1 2 3 4 4 5 8 9 11 12 15 17 21 22 25 26

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Record of Reversion
Rev
0.00

Issued Date
Mar, 11,2005 New

Description

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The 3.5 LCD module is the Transflective active matrix color TFT LCD module. LTPS (Low Temperature Poly Silicon) TFT technology is used and it COG design. The LCD module includes s touch panel, backlight and TFT LCD panel with minimal external circuits and components required.

1. FEATURES

2. GENERAL SPECIFICATION
Item Display Size (Diagonal) Display Type Active Area (HxV) Number of Dots (HxV) Dot Pitch (HxV) Color Arrangement Color Numbers Outline Dimension (HxVxT) Weight LCD Panel + Power consumption T-CON + L/S Backlight * Exclude FPC and protrusions. 288 (Typ, IF = 20mA) Description 3.5 inch (8.9cm) Transflective 53.28 X 71.04 240 x RGB x 320 0.074 X 0.222 RGB Stripe 262,144 (6 bits) 64.3 X 87.1X2.95* TBD 25 (Typ) MW Unit mm dot mm Mm G

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3.1 TFT LCD module
Pin Symbol I/O
I I I O I I I I I

3. INPUT/OUTPUT TERMINALS
Description
Data Enable Signal LCM Pixel Clock IC Reset Signal TSP Interface Signal YU Digital Ground VCOM Input VCOM Input Analog Ground Gate Off Voltage, -5.2V ~ -5.8V, Typ. -5.5V Gate Off Voltage, -5.2V ~ -5.8V, Typ. -5.5V Gate On Voltage, 9.5V ~ 10.5V, Ty p. 10V Gate On Voltage, 9.5V ~ 10.5V, Ty p. 10V Digital Ground TSP Interface Signal XL Positive Power Output for VCOM VCOM Output VCOM Output Negative Power Output for VCOM Analog Ground Digital Supply Power, 2.7V ~ 3.0V, Typ. 2.85V Digital Supply Power, 2.7V ~ 3.0V, Typ. 2.85V Analog Supply Power, 4.8V ~ 5.6V, Typ. 5.0V Analog Supply Power, 4.8V ~ 5.6V, Typ. 5.0V TSP Interface Signal YL Digital Ground AVDD TSP3 DVSS AVDD DVDD DVDD VGH DVSS TSP2 VCOM_H VCOM_O VCOM_O VCOM_L AVSS VGH VVEE VVEE

Remark
DE MCLK ENABLE TSP1 DVSS VCOM_I VCOM_I AVSS

1 2 3 4 5 6 7 8 9 10 11 12

DE MCLK ENABLE TSP1 DVSS VCOM_I VCOM_I AVSS

VVEE

VVEE

VGH

VGH

I I O O O O O I I

13 DVSS 14 TSP2 15 VCOM_H 16 VCOM_O 17 VCOM_O 18 VCOM_L 19 AVSS 20 21 22 23

DVDD

DVDD

AVDD

AVDD

I O I

24 TSP3 25 DVSS

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26 IV6P 27 TSP4
O O Negative Voltage Output Pad TSP Interface Signal XR Digital Supply Power, 2.7V ~ 3.0V, DVDD (TB_RL) Tpy. 2.85V I (TB_RL) IV6P TSP4 DVDD Shift direction (Right/Left) H: D1D240 L: D240D1

28

Shift direction (Top/Bottom) H: TopBottom L: BottomTop

29 PD17 30 PD16 31 PD15 32 PD14 33 PD13 34 PD12 35 PD11 36 PD10 37 PD9 38 PD8 39 PD7 40 PD6 41 PD5 42 PD4 43 PD3 44 PD2 45 PD1 46 PD0 47 ISC 48 49 50
DVSS(SCL)

I I I I I I I I I I I I I I I I I I O I

R5 (Red MSB) R4 R3 R2 R1 R0 (Red LSB) G5 (Green MSB) G4 G3 G2 G1 G0 (Green LSB) B5 (Blue MSB) B4 B3 B2 B1 B0 (Blue LSB) Capacitor Connection Pad

PD17 PD16 PD15 PD14 PD13 PD12 PD11 PD10 PD9 PD8 PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0 ISC

Digital Ground(Serial interface clock input) Digital Ground(Serial interface data input/output) Digital Ground(Serial interface chip select input)
Digital Ground Horizontal SYNC Input Digital Ground

DVSS(SCL)

DVSS(SDA)

DVSS(SDA)

DVSS(CS)

I I I I I

DVSS(CS) DVSS HSYNC DVSS DVSS(CM)

51 DVSS 52 HSYNC 53 DVSS 54 DVSS(CM)

Digital Ground(Display mode

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select) 55
Positive Power Output for Source VS O I I I O O I Driver Vertical SYNC Input LED Power (Anode) LED Power (Anode) LED Power (Cathode) LED Power (Cathode) Digital Ground VS VSYNC MAIN_LED+ MAIN_LED+ MAIN_LEDMAIN_LEDDVSS

56 VSYNC 57 MAIN_LED+ 58 MAIN_LED+ 59 MAIN_LED60 MAIN_LED61 DVSS 3.2 Touch panel Pin
Touch Panel Pin 1 2 3 4 Module Pin 1 2 3 4

Symbol YU XR YL XL

Description Touch Panel Right Side Touch Panel Lower Side Touch Panel Left Side Touch Panel Upper Side

Remark

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3.3 Back light pin assignment

(57,58)

(59,60)

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GND=0V Item Logic Supply Voltage Power Supply for H/V Driver Touch Panel Operation Voltage Backlight LED forward Voltage Backlight LED reverse Voltage Backlight LED forward current (Ta=25J) Operating Temperature Storage Temperature Symbol VDD1, VDD2 AVDD MIN -0.3 -0.3 -0.3 -5.8 -20 -30 MAX +3.6 6 +19 -5.2 5.5 4 5 30 +70 +80 Unit V V V V V V V mA J J Note2 Note 1 Remark

4. ABSOLUTE MAXIMUM RATINGS

VGH VVEE
VTouch VF VR IF Topr Tstg

Note1. The operating voltage is between +0.5V and 5.0V at the moment when the power is turned on Note 2. Relation between maximum LED forward current and ambient temperature is showed as bellow.

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T a=25J MIN TYP MAX Unit V V V V V R[5:0], G[5:0], V mA mA mA mA B[5:0], CLK DE Note 1,2 Note 3 Remark

5. ELECTRICAL CHARACTERISTICS 5.1 Driving TFT LCD Panel

Item Logic Supply Voltage Symbol VDD1 VDD2 AVDD Power Supply for H/V Driver High Data Input Voltage Low VDD1,VDD2 Supply Current AVDD Supply Current VGH Supply Current VVEE Supply Current VIL IVDD1 IAVDD IVDD IVEE VGH VVEE VIH

2.4 2.4 4.8 9.5

-5.8

2.8 2.8 5 10
-5.5

3.3 3.3 5.6 10.5

-5.2

0.7VDD1 0
-

0.7/0.04 1.65 0.07 0.05

VDD1 0.2VDD1
1.7/0.2 4.0 0.2 0.5

Note 1: The typical supply current specification is measured at the line inversion test pattern (black and white interlacing horizontal lines as the diagram shown below)

Note 2: VDD2 rush current accept 120mA, 500u sec during system booting. Note 3: Gamma correction voltage is set to achieve the optimum at VCC5=5.0V. Use the voltage at level as close to 5.0V as possible.

5.2 DC/DC Spec Item MIN VDD2 AVDD VGH VVEE Input voltage TYP MAX Input Current 0.04 1.65 0.07 0.05 Input ripple(Max) -50 mV 150mV -Note 1

2.4V 4.8V 9.5V

-5.8 V

2.8V 5V 10V
-5.5 V

3.3V 5.6V 10.5V

-5.2 V

Note 1: VCC5 is analog voltage supply therefore use as less ripple as possible.

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5.3 Driving backlight Item Forward Current LED Life Time Forward Current Voltage Symbol IF VF MIN TYP 20 10,000 3.6 MAX 30 4.0 Unit mA Hr V Ta=25J Remark LED/Part IF : 15mA IF : 20mA ,LED/Part

Note : Backlight driving circuit is recommend as the fix current circuit.

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6. BLOCK DIAGRAM

TD035STEC1 LCD Module

Touch Panel

VVEE SDA CS SCL Vcom_H Vcom_L VS

Back Light

TFT Panel

10uF X5R 10V~16V

ASIC

VDD2

VGH
VDD, VDD, AVDD, CS, Vsync, Hsync, SCL, DC-ENB, MCLK, RESETB DE, CM, TB_RL, INVSEL, R [5:0] B [5:0] G [5:0] CKV1, CKV2 STV, CSV

Schottky diode
Recommended schottky diode VForward < 0.4V/100mA, VReverse > 15V

LED (+) LED ( ) yU, yL xL, xR

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7.1 Display timing Parameter
Vertical cycle Vertical data start Vertical front porch Vertical blanking period Vertical active area Horizontal cycle Horizontal front porch Horizontal Sync Pulse width Horizontal Back porch Horizontal Data start Horizontal active area Clock frequency

7. TIMING CHART

Display Mode

Symbol
VP VDS VFP VBL VDISP HP HFP HS HBP HDS HDISP tclk fclk

Conditions

Ratings MIN TYP MAX

323 326 4 2 6 320 280 10 10 20 30 240 5.44 184 340 300 240 7.0 2 1 3 260 4 8 18 26 240 4.5

Unit
Line Line Line Line Line dot dot dot dot dot dot MHz nS

VS+VBP VS+VBP+VFP

Normal

HS+HBP

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Input timing chart

Vertical Timing chart

VS

HS VFP DE VS VBL VBP VDISP VFP

RGB[5:0] VP

Horizontal Timing chart

HS
*1 CLK

HFP DE RGB[5:0]

HS HBL

HBP HDISP

HFP

HP
*1 The frequency of CLK should be continued whether in display or blank region to ensure IC operating normally.

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Setup/ Hold Timing chart

Vs tvsys tvsyh

Hs thv

thsys

thsyh

tclk CLK tckl tckh

DATA tds tdh

Parameter Vertical Sync. Setup time Vertical Sync. Hold time Horizontal Sync. Setup time Horizontal Sync. Hold time Phase difference of Sync. Signal Falling edge Clock L Period Clock H Period Data setup time Data Hold time Digital logic input

Symbol Conditions
tvsys tvsyh thsys thsyh 240x320 thv 176x220 128 x160 240 x 240 tckl tckh tds tdh Trise/Tfall

Ratings MIN
20 20 20 20 0 0 0 0 30 30 20 20

TYP
50 50

MAX
239 175 127 239 70 70 15

Unit
ns ns ns ns

clk

% % ns ns ns

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8.1 Power On Sequence(with DC/DC supply outward & SD fixed at low)

8. Power On/Off Sequence

Note: In some application, SD signal fixed at low level during power on. ASIC should produce white pattern when receiving10th S. And internal power regulator should function normally.

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8.2 Power Off Sequence(with DC/DC supply outward & SD fixed at low )

Note: When SD fixed at low during power off, user should provide white pattern before power off. Note: The reset signal should be pulled to the level below VIL to ensure the ASIC will reset normally while power on.

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9.1 Optical Specification
(1) Back light Off / w Touch panel Ta=25J Item Viewing Angles Chromaticity Contrast Ratio Reflectivity Symbol K11+K12 K21+K22 White CR R x y Condition CR = 2 K=0 K=0 K=0 MIN 70 75 10:1 TBD TYP 85 95 15:1 TBD MAX Unit Degree % Remarks Note 9-1 Note 9-3 Note 9-2 Note 9-4

9. Optical Characteristics

(2) Back Light On /w Touch panel Ta=25J Item Viewing Angles Response Time Contrast Ratio Luminance NTSC Uniformity Chromaticity Symbol K11+K12 K21+K22 Tr+Tf CR L White x y Condition CR = 2 K=0 K=0 K=0 IF =20mA K=0 MIN 100 90 80:1 32 70 TYP 120 110 35 100:1 135 36 80 0.31
0.33

MAX 40 -

Unit

Remarks

Degree Note 9-1 ms cd/m 2 % % Note 9-5 Note 9-6 Note 9-7 Note 9-7 Note 9-8 Note 9-3

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9.2 Basic measure condition
(1) Driving voltage VDD= 12.0V, VEE=-6.5V (2) Ambient temperature: Ta=25J (3) Testing point: measure in the display center point and the test angle K=0X (4) Testing Facility Environmental illumination: = 10 Lux

a. System A
Oscilloscope Photo Detector 0 X Light Source 30X

Driving Circuit & Video Signal

Touch Panel LCD Panel Back Light

b. System B
TFT LCD Module with back light & touch panel Photometer

Video Signal Input

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Note 9-1: Viewing angle diagrams (Measure System A)
Normal K= 0X

K: Viewing Angle X: Viewing Direction

K21

K22 3 O'clock X=0X

K12

K11

12 O'clock X=90X

6 O'clock X=270X 9 O'clock X=180X X

Note 9-2: Contrast ratio in back light off (Measure System A) Contrast Ration is measured in optimum common electrode voltage. CR = Luminance with white image Luminance with black image

Note 9-3: White chromaticity as back light off: (Measure System A) Note 9-4: Reflectivity (R) (Measure System A) In the measuring system B. calculate the reflectance by the following formula. Reflectivity(R)= Output from the white display panel Output from the reflectance standard X Reflectance factor of reflectance standard

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Note 9-5: Definition of response time: (Measure System B)
White Black White

100% 90%

Luminance
10% 0%

Tr

Tf

Note 9-6: Contrast Ratio in back light On (Measure System B) Contrast Ration is measured in optimum common electrode voltage. CR = Luminance with white image Luminance with black image

Note 9-7: Luminance: (Measure System B) Test Point: Display Center Note 9-8: Uniformity (Measure System B) The luminance of 9 points as the black dot in the figure shown below are measured and the uniformity is defined as the formula: Uniformity = The minimum luminance among 9 points The maximum luminance among 9 points
W 1/2W 1/6W 1/6W

1/6H 1/2H

1/6H

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No 1 2 3 4 5 6 Test Item High Temperature Operation Low Temperature Operation High Temperature Storage (non-operation) Low Temperature Storage (non-operation) Thermal Shock (non-operation) Surface Discharge (non-operation) (LCD surface) Shock (non-operation) Ta=+60J, 240hrs Ta= -10J, 240hrs Ta=+70J, 240hrs Ta= -20J, 240hrs -20J 70J,30 cycles 30 min 30 min C=150pF, R=330 [ ; Discharge: Air: 15kV; Contact: 8kV 5 times / Point; 5 Points / Panel Acceleration: 100G; Period: 6ms Directions: X, Y, Z; Cycles: Three times Condition

10. Reliability

High Temperature & High Humidity Operation Ta=+40J, 95% RH, 240hrs

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11.1 ESD (Electrical Static Discharge) strategy ESD will cause serious damage of the panel, ESD strategy is very important in handling. Following items are the recommended ESD strategy (1) In handling LCD panel, please wear gloves with non-charged material. Using the conduction ring connect wrist to the earth and the conducting shoes to the earth is necessary. (2) The machine and working table for the panel should have ESD protection strategy. (3) In handling the panel, ionized air flowing decrease the charge in the environment is necessary. (4) In the process of assemble the module, shield case should connect to the ground. 11.2 Environment (1) Working environment should be clean room. (2) Because touch panel has protective film on the surface, please remove the protection film slowly with ionizer to prevent the electrostatic discharge. 11.3 Touch panel (1) The front touch panel is vulnerable to heavy weight, so any input must be done by special stylus or by a finger. Do not put any heavy stuff on it. (2) When any dust or stain is observed on a film surface, clean it using a lens cleaner for glasses or something similar. 11.4 Others (1) Turn off the power supply before connecting and disconnecting signal input cable. (2) Because the connection area of FPC and panel is not so strong, do not handle panel only by FPC or bend FPC. (3) Water drop on the surface when panel is powered on will corrode panel electrode. (4) Before opening up the packing bag, watch out the environment for the panel storage. High temperature and high humidity environment is prohibited. (5) In the case the TFT LCD module is broken, please watch out whether liquid crystal leaks out or not. If your hand touches liquid crystal, wash your hands cleanly with water and soap as soon as possible 11.5 Design notes on touch panel (1) Explanation of each boundary of touch panel .Boundary of Double-sided adhesive a. Electrically detectable within this zone. When holding the touch panel by housing, it needs to be held at outside of this zone. b. Film is supported by double-sided adhesive tape. .Viewing area

11. Handling Cautions

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a. Cosmetic inspection to be done for this area. This area is set as inside of boundary of double-sided adhesive with tolerance. .Boundary of transparent insulation a. Purpose is to "Help to secure insulation. b. Electrical insulation on this area is not guaranteed. c. We do recommend not to hold this area by something like housing or gasket.

.Active area
a. This area is where the performance is guaranteed. This area set as some distance inside from the boundary area of double-sided adhesive tape since its neighboring area is less durable to writing friction. b. Please refer to the attached module drawing for the bezel opening and window size design.

There is some possibility to damage ITO

No Damage to ITO

Bezel Film Adhesuve Glass plate

Boundary of Adhesive Viewing Area Boundary of Transparent insulation Active Area

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(2) Housing and touch panel a. Please have clearance between the side of touch panel, and any conductive material such as metal frame.(drawing.1) Transparent electrode exists on glass of touch panel from end to end. b. It is recommended to fix a touch panel on the LCD module chassis rather than the touch panel housing. Clinging at conductive material and side of touch panel might cause malfunction.

Bezel Film Adhesive Transparent electrode Glass plate

Drawing 1

Drawing 2

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(1) The image will remain on display when the power is suddenly cut off in abnormal condition, ie, unit dropped and battery fell out. The phenomenon is because the electrical charge well be held in pixel, if there is no extra input signal to release it, the residual image occurs. (2) The imaging discharge circuit is used for clearing the image residual on display. The circuit is designed on panel IC and customer can input signal to driver the function especially in the case that the battery or power supplier unit are removable. (3) The circuit below is designed on panel IC to avoid image sticking ..

11.6 Note for image discharge circuit

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12. Mechanical Drawing

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13. Packing Drawing

Module with display face down Rotation Tray

Cardboard

Carton *Module quantity on 1 Tray=8pcs

Desiccant

Empty Tray(1 layer) Tray with Module Total 15 layers

LDPE bag

207

318

450

Module quantity in 1 carton=120pcs

Fix by adhesion tape

TD035STED6 module delivery packing method (1). Module packed into tray cavity with display face down. (2). Tray stacking with 15 layers and with 1 empty tray above the stacking tray unit. 2 pcs desiccant put above the empty tray. (3). Stacking tray unit put into the LDPE bag and fix by adhesive tape. (4) Put 1pc cardboard inside the carton bottom, then pack the finished package into the carton. (5). Carton sealing with adhesive tape.
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