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show the entry list S7-200 Communication interface modules -- Configuring and programming communication -AS-Interface communication How do you address the ASI slaves via the 243-2 in STEP 7-Micro/WIN? Does the S7-22x have a connection to the AS-i bus? Why are the slaves of the ASI master CP 243-2 of an S7-22x CPU read slowly or incorrectly? Does the S7-21x have a connection to the AS-i bus? How do you address the ASI slaves via the CP 242-2 in STEP 7-Micro/WIN? How do you address the ASI slaves via the 243-2 in STEP 7-Micro/WIN? Display part number Instructions: STEP 7-Micro/WIN from Version 3.2 recognizes the inputs and outputs of slaves automatically with the help of the AS-i wizard and reserves a variable memory area to evaluate the signal. The AS-i wizard also provides the option of slave addressing. These functions are explained in the following examples: Output 3 ("Q3") of the signal light with the address 7 should light on input of 1 ("I1") of slave 1 and input of 2 ("I2") of slave 31. The setup of this configuration corresponds with the set up of Micro Automation Set 16 on Entry ID: 21693687.

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Fig. 01: Structure 1. After setup, switch the CPE in STOP and accept the current configuration in CP 243-2 by pressing "SET" and checking the slave address assignment in "DISPLAY". To end, press "SET" again and switch the CPU to RUN again. If further slave errors are displayed after ending, it can be due to an identical address assignment. If this is the case, you need to ensure that each slave address is only connected to the AS-i Bus once and rename identical addresses one after the other (step 4). 2. Connect the CPU with your PC and open STEP 7-Micro/WIN. First create the connection with your CPU in the "Communication" view so that no other CPU from a previous project causes module position shifts in the AS-i wizard.

Fig. 02: Communication 3. Open the AS-i wizard.

Fig. 03: Open the AS-i wizard. 4. Select "Change AS-i slave address" in AS-i wizard

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Figure 04: Select "Change AS-i slave address" 5. The CPU must be switched to STOP to read the AS-i master (CP 243-2). If the CPU is still in the RUN mode, switch the CPU to STOP via the wizard. Select the slave address you want to change (in this case, address 3), specify the new address to be assigned and confirm with "Modify". Repeat this step until all slaves have the desired addresses and accept the current configuration again in CP 2432 (step 1).

Fig. 05: Change AS-i slave address 6. After error-free configuration of the slave addresses, open the AS-i wizard in STEP 7-Micro/WIN (step 3) again. However, this time select "Map AS-i slaves" (Figure 04: "Map AS-i slaves.").

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7. Enter the module position by clicking on "Read module". To read the CP 243-2, the CPU must be switched to STOP again. Select the module to be read and confirm with "Enter >".

Fig. 06: Specify module position 8. Skip the offset assignment and slave type specification of the wizard. You can see and also change the symbolic name assignment of a slave input and output in the window "Specify digital slaves".

Fig. 07: Specify digital slaves 9. Specify the start address for your configuration in the variable memory. The slave inputs and outputs with their symbolic names (Figure 07) are displayed in this memory area and can therefore be evaluated in the STEP 7-Micro/WIN project.

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Fig. 08: Assign memory for configuration 10. Complete the AS-i wizard in the project component overview. 11. Call the subroutine "ASI0_CTRL" in program block "MAIN" cyclically and assign the variable address for the "Error" byte.

Fig. 09: Call "ASI0_CTRL" cyclically 12. Open the "ASI0_SYM" table in the "symbol table" view and look for the inputs and outputs to be evaluated.

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Fig. 10: Symbol table "ASI0_SYM" 13. Compile the connection of the inputs and outputs to be evaluated in the "MAIN" program block.

Fig. 11: Connecting the inputs and outputs to be evaluated 14. Load the project into the CPU and change to RUN mode. Check the function by closing input 1 of slave 1 and input 2 of slave 31. The red signal light (output 3 of slave 7) lights up. Notes: More information on "S7-200 AS-Interface" is available in:
l l l

S7-200 system manual in Entry ID: 1109582 CP 243-2 AS Interface Master manual in Entry ID: 2659515 MAS 16: In AS Interface network, switch to standalone within the industrial applications in Entry ID: 21693687

Keywords: Module addressing, Address assignment, Distributed I/O Does the S7-22x have a connection to the AS-i bus? Display part number Guidance: Yes with the AS-i master module CP243-2. With this you can connect up to 62 AS-i slaves.

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One AS-i master module can be connected to the CPU222 and up to two of these modules can be run on the 224/ 224XP/ 226 controllers. Keyword: I/Os Why are the slaves of the ASI master CP 243-2 of an S7-22x CPU read slowly or incorrectly? Display part number Instructions: Inputs from the ASI Bus are interpreted as analog values. These analog values are imported by the CPU 22x with smoothing (filtering). This has the effect that the whole word changes when there is a change to the signal of an input and signals are displayed "flickering". When using an ASI master, you must disable the analog input filter for the addresses occupied by the ASI master on the CPU 22x. You make this setting in the "system data block" window, in the "Analog input filter" tab.

Keywords: Filters Does the S7-21x have a connection to the AS-i bus? Display part number Guidance: Yes with the AS-i master module CP242-2 or CP242-8. With this you can connect up to 31 AS-i slaves. One AS-i master module can be connected to the CPU212 and up to two of these modules can be run on the 214/215/216 controllers. With the CP242-8 the S7-200 can be master for the AS-i system and slave for PROFIBUS-DP. Keyword: I/Os

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How do you address the ASI slaves via the CP 242-2 in STEP 7-Micro/WIN? Display part number Instructions: The following example demonstrates how this works. We slotted the CP242-2 directly next to a CPU 214. The CP 242-2 thus occupies the digital addresses IB 2 and QB 2 and the analog addresses AIW 0 to AIW14 and AQW0 to AQW14. The address of each ASI slave is defined automatically. The address of the first byte is taken from the slot of the CP242-2. In our example the analog input and output areas each start at byte 0. Analog input area (for ASI-DI) Byte Bit 7 to 4 number AIB 0 Reserved Bit 3 to 0 Slave 1 with Bit 3----2----1----0 Analog output area (for ASI-DO) Byte number AQB 0 Bit 7 to 4 Reserved Bit 3 to 0 Slave 1 with Bit 3----2----1---0 Slave 3 Output 1 =Bit 0 Output 2 =Bit 1 Output 3 =Bit 2 Output 4 =Bit 3 Slave 5 with Bit 3----2----1---0 Slave 7 with Bit 3----2----1---0 Slave 9 with Bit 3----2----1---0 Slave 11 with Bit 3----2----1---0 Slave 13 with Bit 3----2----1---0 Slave 15 with Bit 3----2----1---0

AIB 1

Slave 2 Input 1 =Bit4 Input 2 =Bit 5 Input 3 =Bit 6 Input 4 =Bit 7

Slave 3 Input 1 =Bit 0 Input 2 =Bit 1 Input 3 =Bit 2 Input 4 =Bit 3

AQB 1

Slave 2 Output 1 =Bit 4 Output 2 =Bit 5 Output 3 =Bit 6 Output 4 =Bit 7

AIB 2

Slave 4 with Bit 7---6---5---4

Slave 5 with Bit 3----2----1----0

AQB 2

Slave 4 with Bit 7---6---5---4

AIB 3

Slave 6 with Bit 7---6---5---4

Slave 7 with Bit 3----2----1----0

AQB 3

Slave 6 with Bit 7---6---5---4

AIB 4

Slave 8 with Bit 7---6---5---4

Slave 9 with Bit 3----2----1----0

AQB 4

Slave 8 with Bit 7---6---5---4

AIB 5

Slave 10 with Bit 7---6---5---4

Slave 11 with Bit 3----2----1----0

AQB 5

Slave 10 with Bit 7---6---5---4

AIB 6

Slave 12 with Bit 7---6---5---4

Slave 13 with Bit 3----2----1----0

AQB 6

Slave 12 with Bit 7---6---5---4

AIB 7

Slave 14 with Bit 7---6---5---4

Slave 15 with Bit 3----2----1----0

AQB 7

Slave 14 with Bit 7---6---5---4

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AIB 8

Slave 16 with Bit 7---6---5---4

Slave 17 with Bit 3----2----1----0

AQB 8

Slave 16 with Bit 7---6---5---4

Slave 17 with Bit 3----2----1---0 Slave 19 with Bit 3----2----1---0 Slave 21 with Bit 3----2----1---0 Slave 23 with Bit 3----2----1---0 Slave 25 with Bit 3----2----1---0 Slave 27 with Bit 3----2----1---0 Slave 29 with Bit 3----2----1---0 Slave 31 with Bit 3----2----1---0

AIB 9

Slave 18 with Bit 7---6---5---4

Slave 19 with Bit 3----2----1----0

AQB 9

Slave 18 with Bit 7---6---5---4

AIB 10

Slave 20 with Bit 7---6---5---4

Slave 21 with Bit 3----2----1----0

AQB 10

Slave 20 with Bit 7---6---5---4

AIB 11

Slave 22 with Bit 7---6---5---4

Slave 23 with Bit 3----2----1----0

AQB 11

Slave 22 with Bit 7---6---5---4

AIB 12

Slave 24 with Bit 7---6---5---4

Slave 25 with Bit 3----2----1----0

AQB 12

Slave 24 with Bit 7---6---5---4

AIB 13

Slave 26 with Bit 7---6---5---4

Slave 27 with Bit 3----2----1----0

AQB 13

Slave 26 with Bit 7---6---5---4

AIB 14

Slave 28 with Bit 7---6---5---4

Slave 29 with Bit 3----2----1----0

AQB 14

Slave 28 with Bit 7---6---5---4

AIB15

Slave 30 with Bit 7---6---5---4

Slave 31 with Bit 3----2----1----0

AQB 15

Slave 30 with Bit 7---6---5---4

The addresses of the AS-I slaves 1 to 7 (with different modules) are then as follows in our example: Slave no. ASI slave address type 4 DI + 4 DO 4 DI 4 DO 2 DI 2 DI 4 DI+4 DO 4 DO AIW address byte by byte 0 1 none 2 2 3 none AIW address word by word 0 0 none 2 2 2 none Bit no. of byte AQW address byte by byte 0 none AQW Bit no. address of byte word by word 0 none 0 to 3 none

1 2 3 4 5 6 7

0 to 3 4 to 7 none 4 and 5 0 and 1 4 to 7 none

none none 3 3

none none 2 2

none none 4 to 7 0 to 3

The assignment of the digital addresses of the ASI slaves to the addresses of the ASI systems is also

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automatic. In our example we use the variable store as of VB 800 for the ASI slave signals. Input data from the ASI slaves into the CP 242-2 Slave 1 Input 1, Bit 0 Slave 1 Input 2, Bit 1 Slave 1 Input 3, Bit 2 Slave 1 Input 4, Bit 3 Slave 2 Input 1, Bit 4 Slave 2 Input 2, Bit 5 Slave 2 Input 3, Bit 6 Slave 2 Input 4, Bit 7 Slave 3 Input 1, Bit 0 Slave 3 Input 2, Bit 1 Slave 3 Input 3, Bit 2 Slave 3 Input 4, Bit 3 ...... Slave 30 Input 1, Bit 4 Slave 30 Input 2, Bit 5 Slave 30 Input 3, Bit 6 Slave 30 Input 4, Bit 7 Slave 31 Input 1, Bit 0 Slave 31 Input 2, Bit 1 Slave 31 Input 3, Bit 2 Slave 31 Input 4, Bit 3 Address Output data from the CP242-2 to the ASI slaves Slave 1 Output 1, bit 0 Slave 1 Output 2, bit 1 Slave 1 Output 3, Bit 2 Slave 1 Output 4, Bit 3 Slave 2 Output 1, Bit 4 Slave 2 Output 2, Bit 5 Slave 2 Output 3, Bit 6 Slave 2 Output 4, Bit 7 Slave 3 Output 1, Bit 0 Slave 3 Output 2, Bit 1 Slave 3 Output 3, Bit 2 Slave 3 Output 4, Bit 3 ...... Slave 30 Input 1, Bit 4 Slave 30 Input 2, Bit 5 Slave 30 Input 3, Bit 6 Slave 30 Input 4, Bit 7 Slave 31 Input 1, Bit 0 Slave 31 Input 2, Bit 1 Slave 31 Input 3, Bit 2 Slave 31 Input 4, Bit 3 Address

V 800.0 V 800.1 V 800.2 V 800.3 V 801.4 V 801.5 V 801.6 V 801.7 V 801.0 V 801.1 V 801.2 V 801.3 .......... V 815.4 V 815.5 V 815.6 V 815.7 V 815.0 V 815.1 V 815.2 V 815.3

V 900.0 V 900.1 V 900.2 V 900.3 V 901.4 V 901.5 V 901.6 V 901.7 V 901.0 V 901.1 V 901.2 V 901.3 .......... V 915.4 V 915.5 V 915.6 V 915.7 V 915.0 V 915.1 V 915.2 V 915.3

Using the following program you can now address the ASI modules. Main program LD CALL LD CALL MEND SM 0.1 0 I 2.1 1 Call subprogram 0 in the first cycle Subprogram for the CPU start-up processing CP READY signal from the status input byte of the CP242-2 is applied (status byte 8 DI) Subprogram 1 in ASI slave data is captured and processed End of main program

Subprogram for the start-up cycle

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SBR LD SI RI

0 SM 0.0 Q2.7,1 Q2.0,4

Subprogram for the 1st cycle In every cycle Set the "PLC_RUN" bit to "1" in the control byte (8 DO) of the CP 242-2 Select base 0 for slave data (control byte 8 DQ, Q 2.0 to Q 2.7 on the CP 242-2). For this BS0 to BS3 must be set to "0" in the control byte. Subprogram has terminated

RET

Subprogram for data communications between S7-200 CPU and CP 242-2 SBR LD BMW LD A = LD BMW 1 SM 0.0 AIW 0,VW 800,8 V800.0 V815.1 V903.2 SM0.0 VW900,AQW0,8 Subprogram for data communications between CPU and CP242-2 In each cycle Store 8 words of input data in the variable memory from VW800 to VW814 Input 1 of Slave 1 Input 2 of Slave 15 Address Output 3 of Slave 7 In each cycle Copy 8 words ( 16 bytes ) as of variable memory VW 900 in the output data of the ASI slaves to the analog address area of the CP 242-2 Subprogram 1 has terminated

RET

Keywords: distributed I/Os, address assignment, address allocation Entry ID:29451960 Date:2008-06-10 I regard this article.... as helpful Copy link
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