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COLLEGE OF ENGINEERING, POTTAPALAYAM 630 611 Lecture Schedule Branch: ELECTRONICS & COMMUNICATION ENGINEERING Subject: COMPUTER ARCHITECTURE Duration: Jan12 to May12 Section: A AIM: The aim of this course is to familiarize the student with Basic structure of computers, arithmetic, basic processing unit, and memory system and input and output organization. OBJECTIVE: On completion of this course, the student will understand Subject Code: CS1358 Year/Semester: III/VI Staff Handling: D.ANAND
S.No
Basics of functional units, bus structures, memory operations, assembly language. Idea about arithmetic operations, integer divisions, signed operations, floating point operations. Fundamental concepts with hard wired control, pipelining and hazards. Basic concepts of memory and its managements. Accessing input and output devices, buses and standard input and output interfaces. Date Period Number
UNIT I -BASIC STRUCTURE OF COMPUTERS
Topics to be Covered
Book No [PageNo]
Target Hours :12
1 2 3 4 5 6 7 8 9 10 11 12
2/01/12 3/01/12 5/01/12 6/01/12 9/01/12 10/01/12 12/01/12 13/01/12 19/01/12 20/01/12 21/01/12 23/01/12
3 2 7 1 3 2 7 1 7 1 2 3
Introduction about Functional units Basic operational concepts Bus structures software performance Memory locations and addresses Memory operations Instruction and instruction sequencing. Addressing modes Assembly language Basic I/O operations Stacks and queues
13/01/12
Assignment 1
Date of Announcement :
UNIT II - ARITHMETIC
13 14 15 16 17
2 1 3 3 2
Addition and subtraction of signed numbers Design of fast adders Multiplication of positive numbers Signed operand multiplication Fast multiplication
18 19 20 21 22
7 1 3 2 7
T390 T393
23 10/02/12 1 Tutorial Problem Solving Notes & ppt 24 11/02/12 7 Assignment 2 Date of Announcement : 2/02/12 Date Of Submission : 9/02/12 CIT I 07-02-2012
UNIT III - BASIC PROCESSING UNIT Target Hours :12
25 26 27 28 29 30 31 32 33 34 35
13/02/12 14/02/12 16/02/12 17/02/12 20/02/12 21/02/12 23/02/12 24/02/12 27/02/12 28/02/12 1/03/12
3 2 7 1 3 2 7 1 3 2 7
Fundamental concepts Execution of a complete instruction Multiple bus organization. Hardwired control Micro programmed control Pipelining Basic concepts Data hazards Instruction hazards Influence on instruction sets Data path and control consideration Superscalar operation
T412 T421 T423 T425 T429 T454 T461 T465 T476 T479 T481
36 2/03/12 Assignment - 3
37 38 39 40 41 42 43 44 45 46 47 48
5/03/12 6/03/12 8/03/12 9/03/12 10/03/12 12/03/12 13/03/12 15/03/12 16/03/12 19/03/12 20/03/12 22/03/12
Basic concepts Semiconductor RAM, ROM. Speed, size and cost Cache memories Performance consideration Virtual memory Memory management requirements Secondary storage
Assignment - 4
49 50 51 52 53 54 55 56 57 58 59 60
26/03/12 27/03/12 29/03/12 30/03/12 2/04/12 3/04/12 7/04/12 9/04/12 10/04/12 12/04/12 13/04/12 13/04/12
Accessing I/O devices Interrupts Direct Memory Access Buses Interface circuits Standard I/O interfaces (PCI, SCSI, and USB).
Assignment - 5
TEXT BOOK
S.No T Title of the Book Author Publisher
Computer Organization
Year 2002
REFERENCES R1
Computer Organization & Architecture Designing for Performance2 1998. Computer Organization & Design, the hardware / software interface,. Computer Architecture & Organization
William Stallings
2003 reprint
R2
R3
John P. Hayes
STAFF INCHARGE
HOD/ECE