Appendix 1: Scrambling

[HIGH SPEED COMMUNICATIONS FUNDAMENTALS (SDH)]

Scrambling: In digital-to-digital conversion, modifying part of the rules in line coding scheme to create bit synchronization without increasing the number of bits. Scrambling is widely used in long distance communication technologies (such as SDH transmission, satellite, radio relay communications and PSTN modemsetc). A scrambler can be placed just before a Forward Error Correction (FEC ) coder, or it can be placed after the FEC, just before the modulation or line coding. A scrambler in this context has nothing to do with encrypting, as the intent is not to render the message unintelligible, but to give the transmitted data useful engineering properties. A scrambler replaces sequences into other sequences without removing undesirable sequences, and as a result it changes the probability of occurrence of vexatious sequences. Clearly it is not foolproof as there are input sequences that yield all-zeros, all-ones, or other undesirable periodic output sequences. A scrambler is therefore not a good substitute for a line code, which, through a coding step, removes unwanted sequences. Given an STM-N frame, all the A1, A2, J0 bytes are transported without modification. All the other bytes, both payload and overhead, are subject to "scrambling." The framing bytes are sent without being scrambled so that the beginning of the frame can be easily delimited. Scrambling the rest of the frame prevents the unintentional introduction of the framing pattern of N A1s and A2s anywhere else into the frame (which could lead to the receiver becoming misaligned). Misalignment is called a Loss of Frame (LOF) condition, and it results in the loss of all data within the SDH signal. Another reason for scrambling is to maintain an adequate number of bit transitions. This enables clock recovery at the receiver. Inability to recover the signal timing at the receiver is one cause of the Loss of Signal (LOS) condition, which results in all the data in the signal being lost. At SDH rates, scrambling is done in hardware with a simple circuit that (bit-wise) adds a pseudorandom bit sequence to all the bits in the frame (with the exceptions noted above). At the receiving end, the same pseudo random sequence is (bit-wise) "subtracted" from the signal. The pseudorandom sequence has nice "randomness" properties, but it actually repeats (if it did not repeat, the transmitter's and the receiver's scramblers cannot be synchronized). In SDH, the scrambler's bit sequence repeats every 127 bits and is restarted at the beginning of every frame. We can determine the number of payload bytes that pass until the scrambler sequence repeats. This is in fact 16 bytes (127 bits / 8 bits per byte = 16). One method of generating a pseudorandom bit sequence is by using a sequence of shift registers and binary adders (XOR gates). Such a circuit to generate the regenerator section layer scrambling sequence is shown in Figure below . The bits (the D flip-flops shown) are reset to 1 at the beginning of the SDH frame. With every clock tick they are shifted right one position. Assuming the input data stream is all zeros, 256 bits of the output stream are:

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Appendix 1: Scrambling

[HIGH SPEED COMMUNICATIONS FUNDAMENTALS (SDH)]

11111110000001000001100001010001111001000101100111010100111110 10000111000100100110110101101111011000110100101110111001100101 01011111110000001000001100001010001111001000101100111010100111 11010000111000100100110110101101111011000110100101110111001100 10101011. It can be verified that this sequence is 127 bits long, and it repeats (beginning with 1111111). Note that the scrambler is initialized at 1111111 on the most significant bit of the byte which follows the last byte of the first row of the SOH of STM-N frame.

Scrambler

Scrambled Data Out

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