General Information

Instructor
Xuan-Tu Tran, PhD

2009

Office: Room 314, Building G2 (by appointment) Tel.: +84-4-3754 9664 (Office) Email: tutx@vnu.edu.vn (recommended)

ELT2034: Digital Design

Lecture 1: Course Overview Spring 2012
Xuan-Tu Tran, PhD Faculty of Electronics and Telecommunication (FET) Key Laboratory for Smart Integrated Systems (SIS Lab) VNU University of Engineering and Technology Email: tutx@vnu.edu.vn www.uet.vnu.edu.vn/~tutx

Home page: http://www.uet.vnu.edu.vn/~tutx

Course Web Page

BBC system + homepage (please visit my homepage first) http://www.bbc.vnu.edu.vn

Teaching Assistants
Ngoc-Mai Nguyen, MSc., Research engineer, PhD student (SIS Lab) Van-Mien Nguyen, Research engineer, M.Sc. student (SIS Lab) Duy-Hieu Bui, Research engineer, MSc. (SIS Lab) Van-Huan Tran, Research engineer (SIS Lab)

Administrative Details
Grading
Take-Home Entry ExamPass condition Project Exams Final Exam (writing) 40% 60%

Administrative
Office:
Room 314, G2 building, UET campus

Office hours
By appointment Sending e-mails is a good way to reach me

Students have to be present:

at least 80% of the course meetings

Ressources
IEEE Standard 1076-1993
Find using search engines on WWW (Google)

Honor
You are encouraged to collaborate with other students in projects Final VHDL code, project report for each homework should be done by your self Exams are closed book, closed notes (only pen, blank paper, and a prepared computer are allowed)

Use my homepages resources, too much digest Xilinx FPGA

EDA/CAD tools: ISE foundation suite, EDK (student edition); ModelSim (Mentor Graphics student edition) Development Kit: Spartan-3E development kits (Xilinx), DE2 (Altera), or Actel Schematic, FSM, VHDL

Administration
Text books
Digital Design: Principles and Practices (4th edition), ISBN 0-13-186389-4
By John F. Wakerly, Prentice Hall, June 2010 Available at Laboratory for Smart Integrated Systems

Course objectives
Students should be able to
Analyzing digital systems Understanding numbering systems, Boolean Algebra (conversion, calculation) Designing, analyzing combinational circuits (adders, multiplexers) Designing, analyzing sequential circuits (flip-flops, registers, counters, FSM, ALU, processors) Hardware description languages and EDA/CAD tools Build their own projects and report related matters

References
Digital Design Fundamentals
By Kenneth J. Breeding, 2nd Ed., Prentice Hall, 1992 Available at Laboratory on Smart Integrated Systems

VHDL: Programming by Example

By Douglas L. Perry, McGraw-Hill, ISBN: 0-071-40070-2 Available at the Smart Integrated Systems Laboratory

Wai-Kai Cheng (Editor). Logic Design. CRC Press, ISBN: 0-8493-1734-7, 2003.

Course outline
Introduction Numbering Systems and Codes Digital Circuits Boolean and Switching Algebra Combinational logic design principles Hardware description languages Combinational logic design practices Sequential logic design principles Sequential logic design practices Memory, CPLD, and FPGAs

Introduction to Digital Systems

What is a digital system? Why are digital systems so pervasive (to be present everywhere)?

10

Microelectronics / VLSI Circuits Design

Why is Microelectronics / VLSI Circuits Design important?
Integrated Circuits (ICs) can be found in any applications High income
33 973M US$ 20 137M US$

Examples
Digital TVs (Multimedia)

WiFi routers (Communication)

VLSI Systems
(Systems-on-Chip)

MP3 Players (Multimedia)

8 137M US$ [LaPedus - EETimes]

Mobile phone (Telecoms, Multimedia)

Washing machine (Customer Electronics) Automobile applications

11

12

IC products
Processors
CPU, DSP, Controllers

- What is a digital system?

A system that processes discrete information
Discrete entities may represent anything
from simple arithmetic integers, letters of the alphabet, or other abstract symbols to values for a voltage, a pressure, or any other physical

Memory chips
RAM, ROM, EEPROM

Analog
Mobile communication, audio/video processing

quantities.

What these entities represent is not important in processing of the information.

Programmable
PLA, FPGA

Embedded systems
Used in cars, factories Network cards

System-on-chip (SoC)

13

14

- What is a digital system?

- What is a digital system? (cont.)

Computer applications
The computer is required to process information related to physical quantities (pressure or temperature).
Computer Nature: physical quantities

A digital system is one that accepts as input digital information representing numbers, symbols, or physical quantities, processes this input information in some specific manner, and produces a digital output.

Discrete (digital) quantities

Continuous variables (analog quantities)

Digital inputs

Digital System

Digital outputs

Physical quantities & computer

Nature (analog)

???
Computer (digital)

???

Nature (analog)

Physical quantities must be converted to a digital form !!!

15 16

- What is a digital system? (cont.)

Thermocouple in an analog system

- What is a digital system?

Converting a physical quantity to a digital form
Physical quantity voltage/current (by a transducer) (coming energy in one form to going energy in another form)
Ex.: thermocouple (temperature transducer) Output voltage is proportional to the temperature

Voltage/Current

Digital form (by an analog-to-digital converter)

How does this thermocouple be used in a digital system?

Analog ADC quantities (voltage, current)

Computer

DAC

Analog quantities (voltage, current)

(0 & 1)
17 18

Parallel-comparator ADC converter

2-bit parallel-comparator ADC use 3 parallel comparators Use resistors to divide voltage in order to provide reference voltages to comparators Full-scale voltage equals VMax (the voltage at the top resistor) Incoming voltage is provided to non-invert input of comparators Outgoing value at the output of a comparator gets high when its incoming voltage is higher than its reference voltage
Ex.: VIN = 2.6 Volt A3: Low A2: High A1: High
19

Examples
Monitoring the environment for the developer used on a photographic processing lab
We must to measure the temperature of the developer Then, use the results to turn on/off a heating element

Heater H1 S Monitoring & Control System

Photographic processing Lab

H2 S

Heater

Sensors
20

Examples (cont.)
ATM (Automatic Teller Machine)
We must to measure the temperature of the environment surrounding ATMs Then, use the results to turn on/off air-conditioners

- Why are digital systems so pervasive?

Flexibility Reliability Cost

21

22

Design and fabricating ICs

Design: history and jobs

23

24

The VLSI Design Process

Move from higher to lower levels of abstraction Use CAD tools to automate parts of the process Use hierarchy to manage complexity Different design styles trade off:
Design time Non-recurring engineering (NRE) cost Unit cost Performance Power Consumption

VLSI Levels of Abstraction

Specification
(what the chip does, inputs/outputs)

Architecture
major resources, connections

Register-Transfer
logic blocks, FSMs, connections

Logic
gates, flip-flops, latches, connections

Circuit
transistors, parasitics, connections

Layout
mask layers, polygons

25

26

VLSI / ASIC design flow

Designers Tasks Tools

Designer Tasks Define Overall Chip Architect C/RTL Model Initial Floorplan Behavioral Simulation Logic Designer Logic Simulation Synthesis Datapath Schematics Cell Libraries Circuit Designer Circuit Schematics Circuit Simulation Megacell Blocks Layout and Floorplan Physical Designer Place and Route Parasitics Extraction DRC/LVS/ERC Place/Route Tools Physical Design and Evaluation Tools Schematic Editor Circuit Simulator Router RTL Simulator Synthesis Tools Timing Analyzer Power Estimator Tools Text Editor C Compiler

27

28

VLSI Design Tradeoffs

Non-Recurring Engineering (NRE) Costs
Design Costs Mask Tooling costs

Design Methodologies
Top-Down Design Method
High level functions are defined first Lower level implementation details are filled in later

Unit Cost - related to chip size

Amount of logic Current technology

Performance
Clock speed Implementation

Power consumption
Power supply voltage Clock speed

29

30

Design Methodologies (cont.)

Bottom-Up Design Method
Low level functions are defined and finished first High level implementation are completed in later

VLSI Trends: Moores Law

In 1965, Gordon Moore predicted that transistors would continue to shrink, allowing:
Doubled transistor density every 18-24 months Doubled performance every 18-24 months
Your job is No exponential to postpone is forever, forever! BUT

History has proven Moore right But, is the end is in sight?

Physical limitations Economic limitations

Gordon Moore Intel Co-Founder and Chairmain Emeritus

Image source: Intel Corporation www.intel.com

31

32

Moore law

Microprocessor Trends (Intel)

Year 1971 1974 1976 1982 1985 1989 1993
- Feature sizes are getting smaller : - 0.25 m, 0.18 m, 0.12m, 90nm, 65nm, 45nm, 32nm - Gates counts and memory sizes are increasing : - 10M, 20M, 100M, 1 G! - Clock speeds are increasing : - 100Mhz, 400Mhz, 1 GHz, 3 GHz, - Power cannot increase at the same pace : - 10W, 20W, 50W, 100W, - Design time cannot increase : - 3m, 6m, 12m !!!
33

Chip 4004 8080 8088 80286 80386 80486 Pentium Pentium Pro Mobile PII Pentium 4 Pentium 4 (N) Itanium 2 (M) Pentium 4 (P) Core 2 Duo

L 10m 6m 3m 1.5m 1.5m 0.8m 0.8m 0.6m 0.25m 180nm 130nm 130nm 90nm 65nm

transistors 2.3K 6.0K 29K 134K 275K 1.2M 3.1M 15.5M 27.4 42M 55M 410M 125M 291M

1995 1999 2000 2002 2003 2004 2006

Deep Submicron

Source: http://www.intel.com/pressroom/kits/quickreffam.htm, media reports

34

Microprocessor Trends
100 90 Transistors (Millions) 80 70 60 50 40 30 20 10 0 1970 1980 1990
G4 P4 Alpha (R.I.P)

DRAM Memory Trends (Log Scale)

1000
Source: Textbook, Industry Reports

100

64 16 4

512 256 128

Intel Motorola DEC/Compaq

10 1 0.25 0.1 0.01 0.0625 1

Size (Mb)

2000

1975

1980

1985

1990

1995

2000

2005

Sources: http://www.intel.com/pressroom/kits/quickreffam.htm
35 36

Processor Performance Trends

Summary - Technology Trends

Processor
Logic capacity Clock frequency Cost per function increases ~ 30% per year increases ~ 20% per year decreases ~20% per year

Memory
DRAM capacity: (4x every 3 years) Speed: Cost per bit:
Vax 11/780

increases ~ 60% per year increases ~ 10% per year decreases ~25% per year

Source: Hennesy & Patterson Computer Architecture: A Quantitative Approach, 3rd Ed., Morgan-Kaufmann, 2002.

37

38

Technology Directions: SIA Roadmap

Year
Feature size (nm) Logic trans/cm2 Cost/trans (mc) #pads/chip Clock (MHz) Chip size (mm2) Wiring levels Power supply (V) High-perf pow (W)

Gallery - Early Processors

1999 2002 2005 2008 2011 2014

180 6.2M 1.735 1867 1250 340 6-7 1.8 90 130 18M .580 2553 2100 430 7 1.5 130 100 39M .255 3492 3500 520 7-8 1.2 160 70 84M .110 4776 6000 620 8-9 0.9 170 50 180M .049 6532 10000 750 9 0.6 175 35 390M .022 8935 16900 900 10 0.5 183
Intel 4004 (1971)
First P - 2300 xtors L=10m
39 40

Mos Technology 6502

10

Intel 4004
Introduction date: November 15, 1971 Clock speed: 108 KHz Number of transistors: 2,300 (10 microns) Bus width: 4 bits Addressable memory: 640 bytes Typical use: calculator, first microcomputer chip, arithmetic manipulation

Gallery - Current Processors

Process Shrinks

Pentium 4
42M transistors / 1.3-1.8GHz 49-55W L=180nm
41

Pentium 4 Northwood Pentium 4 Prescott

55M transistors / 2-2.5GHz 55W L=130nm Area=131mm2 125M transistors / 2.8-3.4GHz 115W L=90nm Area=112mm2
42

Pentium 4
0.18-micron process technology (2, 1.9, 1.8, 1.7, 1.6, 1.5, and 1.4 GHz) Introduction date: August 27, 2001 (2, 1.9 GHz); ...; November 20, 2000 (1.5, 1.4 GHz) Level Two cache: 256 KB Advanced Transfer Cache (Integrated) System Bus Speed: 400 MHz SSE2 SIMD Extensions Transistors: 42 Million Typical Use: Desktops and entrylevel workstations 0.13-micron process technology (2.53, 2.2, 2 GHz) Introduction date: January 7, 2002 Level Two cache: 512 KB Advanced Transistors: 55 Million

Gallery - Current Processors

Intel Core 2 Duo Conroe

291M transistors / 2.67GHz / 65W L=65nm Area=143mm2
Image courtesy Intel Corporations All Rights Reserved

43

44

11

Gallery - Current Processors

Multi-core processors
Increase performance Power consumption

Gallery - Current Processors

Challenges
Complexity Tasks management On-chip communication Chip temperature etc. IBM Cell Processor
234M transistors / 2GHz / ??W L=90nm Area=221mm2
Image courtesy International Business Machines All Rights Reserved

Athlon 64 X2 4800+ and 4400+

45 46

Gallery - Current Processors

Intel Polaris (80 cores)
Trillion operations/second Area: 275mm2 Consumption: 62W IEEE SOC Conference (2006)

Gallery - Current FPGA

Teraflop ASCI Red at Sandia National Lab (1996)

104 cabinets housing 10,000 Pentium Processors spread out over 2500 square feet It consumed a mere 500kw

Xilinx Virtex FPGA

47

48

12

Gallery - Graphics Processor

FAUST chip

Flexible Architecture of a Unified System for Telecoms

RAC

TX Units
ARM

AHB System
Year: 2005 130 nm CMOS (STMicroelectronics) 20-node asynchronous NoC 23 NoC units AHB subsystem including an ARM946 core 24 clocks (DFS to save power) 8 M Gates (including 81 RAM blocks) Area: core 70 mm2 - chip 80 mm2 3.3 V

RX Units

ETH

DART

nVidia GeForce4
57M transistors / 300MHz / ??W L=0.15m
49

275 functional I/Os - Package : TBGA 420 Power supplies: core 1.2 V I/Os
D. Lattard, et al. ISSCC07
50

FAUST Architecture
NOC1 IF 84 Pads RAC SPort APort EXP OFDM MOD. ALAM. MOD. CDMA MOD. MAPP. BIT INTER. TURBO CODER CONV. CODER Clk & Test CTRL

FT R&D MITSUB-ITE LIST LETI LETI

NoC Perf.

RAM

AHB

CPU

RAM

EXT. RAM CTRL

RAM IF 58 Pads

HouseKeeping NoC Async/Sync IF Async node FRAME SYNC. EXP NOC2 IF 83 Pads SPort DART APort ODFM DEM. CDMA DEM. DEMAPP. DEINTER. ROTOR EQUAL. CHAN. EST. CONV. DEC. ETHER NET ETHERNET IF 17 Pads

51

13