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  • 1-Bit Full Adder

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    Deepamdivya
    11 Ansichten2 Seiten
    A 1-bit adder takes two 1-bit inputs and adds them together. To make it a full adder, it also needs to consider a Carry In and Carry Out flag. The Carry Out flag specifies if the result of the addition was larger than the 1-bit result.

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    A 1-bit adder takes two 1-bit inputs and adds them together. To make it a full adder, it also needs to consider a Carry In and Carry Out flag. The Carry Out flag specifies if the result of the addition was larger than the 1-bit result.

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    11 Ansichten2 Seiten

    1-Bit Full Adder

    Hochgeladen von

    Deepamdivya
    A 1-bit adder takes two 1-bit inputs and adds them together. To make it a full adder, it also needs to consider a Carry In and Carry Out flag. The Carry Out flag specifies if the result of the addition was larger than the 1-bit result.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Als PDF, TXT herunterladen oder online auf Scribd lesen
    Markieren Sie unangemessene Inhalte
    von 2

    1bitFullAdder

    Introduction
    A1bitaddertakestwo1bitinputsandaddsthemtogether.Tomakeitafulladder,italsoneedsto consideracarryinandcarryoutflag.Thusa1bitfulladdertakesthree1bitinputsandcontainstwo1 bitoutputs.Thefirsttwoinputsarethetwobitsthataretobeaddedtogether,respectivelyAandB.The thirdinputisacarryinflag.Thisflagspecifieswhetherornotapreviousadditionhasoccurredwhich containedacarryout.Thefirstoutputisthe1bitresultoftheaddition.Thesecondoutputisthecarry outflagwhichspecifiesiftheresultoftheadditionwaslargerthanthe1bitresult. PurposeofIncludingCarryInandCarryOutFlags Whenaddingnumbersusingcircuitsitisnecessarytolookateachbitofanumberatatime.Theleast significantbitsareaddedfirst,withacarryinflagsetto0.Thenexttwoleastsignificantbitsareadded together,usingacarryinflagsettothecarryoutflagofthepreviousoperationg.Thisapproachallows thechaining1bitfulladderstogethertomakenbitfulladders. Asthebinarynumbersystemonlycontains1sand0s,itisnotnecessarytoaccountforacarryoutof anyvalueotherthan0or1,makingthecircuitdesignmuchsimplerthanitwouldbeifweweretryingto workwithdecimalnumbersystem!

    CircuitDiagram
    A xor Gate 1 B Carry Out Result

    Carry In

    and Gate 1

    and Gate 2

    or Gate 1

    and Gate 3

    LogicInformation
    Inputs: A1bit B1bit CarryInFlag1bit Output: Result1Bit CarryOut1Bit MatthewB.Gately(mgately@code85.com) LastRevisedAugust16th2008 Page1of2

    Gates: xorGate1: A B C andGate1: Ai B andGate2: AiCarryIn andGate3: B iCarryIn orGate1: andGate1iandGate 2iandGate3

    VHDLCode
    libraryIEEE; useIEEE.std_logic_1164.all; entityonebitfulladderis port(num1,num2,carryin:instd_logic; result,carryout:outstd_logic); endonebitfulladder; architecturebehaviorofonebitfulladderis signalS1,S2,S3:std_logic; begin result<=num1xornum2xorcarryin; S1<=num1andnum2; S2<=num1andcarryin; S3<=carryinandnum2; Carryout<=S1orS2orS3; endbehavior;

    MatthewB.Gately(mgately@code85.com) LastRevisedAugust16th2008

    Page2of2

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